A PCB design method for high-frequency electronic circuits

Abstract

This invention discloses a PCB design method for high-frequency electronic circuits. The method includes: obtaining the design requirements of the high-frequency electronic circuit; configuring a power management chip for the high-frequency electronic circuit; configuring several power rails for the high-frequency electronic circuit based on the voltage, speed level, and timing of the sub-units of the high-frequency electronic circuit, each power rail being used to transmit power from the power source; wherein the power management chip is used to manage the power distribution and timing management of the high-frequency electronic circuit; the power rails provide the same voltage, speed level, and timing to the corresponding sub-units; placing power rails with the same voltage, speed level, and timing on the same power layer of the PCB; and decoupling power rails with coupling relationships on the PCB. This method can realize power rail paralleling and rail splitting, and control the voltage of different modules in real time according to the operating voltage, startup sequence, and speed level.

Description

Technical Field

[0001] This invention relates to the field of high-frequency electronic circuits, and more specifically to a PCB design method for high-frequency electronic circuits. Background Technology

[0002] With technological advancements, electronic circuit design is becoming increasingly integrated and systematic. However, as electronic circuits improve, more and more problems are emerging. Due to greater functional integration and modularity, circuit boards and electronic devices are also exhibiting modularity. Integrating various modules together to form circuit boards or electronic devices has successfully facilitated the trend towards product miniaturization. However, this brings two problems: First, too many modules result in significant power consumption during electronic circuit design, exceeding the maximum power consumption of the core processor, potentially causing chip overheating and affecting normal functionality. Second, a larger number of modules leads to more complex voltage requirements. For example, many analog functions in industrial and medical applications, such as amplifiers, sensors, and data converters, require both positive and negative voltage power supplies. Typically, such circuits require 5 volts, 12 volts, 15 volts, or higher. However, while positive voltages are common on a typical printed circuit board (PCB), generating negative voltages becomes challenging, and when the required power exceeds 1 watt, the power supply must be isolated.

[0003] Therefore, designing high-frequency electronic circuits to enable real-time startup and shutdown of operating voltage, startup sequence, and speed level based on different functional modules within the device or on the PCB, and decoupling the power supply according to the coupling between the technical parameters of each module and the power rail, can make the design of high-frequency electronic circuits more complete. Summary of the Invention

[0004] In view of this, the present invention provides a PCB design method for high-frequency electronic circuits, which can solve the technical problem of real-time control of high-frequency electronic circuits and integrated digital circuits with multiple power domains.

[0005] To solve the above-mentioned technical problems, the present invention is implemented as follows.

[0006] A PCB design method for high-frequency electronic circuits, comprising:

[0007] Step S1: Obtain the design requirements of the high-frequency electronic circuit and configure a power management chip for the high-frequency electronic circuit;

[0008] Step S2: Based on the voltage, speed level, and timing of the sub-units of the high-frequency electronic circuit, configure several power rails for the high-frequency electronic circuit. Each power rail is used to transmit electrical energy from the power source. The power management chip is used to manage the power distribution and timing management of the high-frequency electronic circuit. The power rails provide the same voltage, speed level, and timing to the corresponding sub-units. Each power source has a corresponding dedicated power rail.

[0009] Step S3: Place power rails with the same voltage, speed level, and timing on the same power layer of the PCB;

[0010] Step S4: Decouple the power tracks that are coupled in the PCB.

[0011] Preferably, in step S1, the power domain of the high-frequency electronic circuit includes a low-power power domain, a full-power power domain, and / or other dedicated power domains; the power management chip is used to manage the power domain of the high-frequency electronic circuit.

[0012] Preferably, in step S2, the sub-unit is a device constituting the high-frequency electronic circuit and / or a circuit functional sub-module constituting the device.

[0013] Preferably, step S2, configuring several power rails for the high-frequency electronic circuit, includes decomposing the high-frequency electronic circuit according to the following rules:

[0014] Obtain the voltage, speed level, and timing of the sub-units of the high-frequency electronic circuit; group sub-units with the same voltage, speed level, and timing into the same set; configure one or more power rails for each set; merge multiple power rails belonging to the same set; and separate power rails belonging to different sets.

[0015] Preferably, in step S3, the parallel power rails are placed on the same power layer of the PCB.

[0016] Preferably, after step S4, step S5 is further included: controlling the power supply to start or stop each power rail.

[0017] Beneficial effects:

[0018] (1) This invention designs a power supply rail splitting strategy, which splits and parallels different power modules and implements it using PCB. It can realize power supply paralleling and splitting, and control the voltage of different modules in real time according to the working voltage, startup sequence and speed level.

[0019] (2) The present invention reduces the overall power consumption of the circuit board, avoids mutual interference between modules, and provides a guarantee for the design of high-frequency electronic circuits and integrated digital circuits with more power domains.

[0020] (3) The present invention can ensure that power consumption is reduced, startup sequence is improved, and coupling interference is avoided in the design of complex high-frequency digital circuits and integrated digital circuits with many power domains.

[0021] (4) The present invention has a complete solution, strong guidance, and strong application value. Attached Figure Description

[0022] Figure 1 A schematic diagram of the PCB design method for high-frequency electronic circuits provided by the present invention;

[0023] Figure 2 This is a schematic diagram illustrating the principle of track merging and paralleling provided by the present invention;

[0024] Figure 3 This is a schematic diagram of the PCB design for rail alignment and parallel rail connection provided by the present invention;

[0025] Figure 4 This is a schematic diagram of PCB layout and contact coupling capacitor reference values ​​provided by the present invention;

[0026] Figure 5 This is a schematic diagram showing reference values ​​for the contact coupling capacitance of some components provided by the present invention;

[0027] Figure 6 This is a schematic diagram illustrating the power supply rail splitting guidance for a certain SOC device provided by the present invention. Detailed Implementation

[0028] The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0029] like Figures 1-6 As shown, this invention proposes a PCB design method for high-frequency electronic circuits, comprising the following steps:

[0030] Step S1: Obtain the design requirements of the high-frequency electronic circuit and configure a power management chip for the high-frequency electronic circuit;

[0031] Step S2: Based on the voltage, speed level, and timing of the sub-units of the high-frequency electronic circuit, configure several power rails for the high-frequency electronic circuit. Each power rail is used to transmit electrical energy from the power source. The power management chip is used to manage the power distribution and timing management of the high-frequency electronic circuit. The power rails provide the same voltage, speed level, and timing to the corresponding sub-units. Each power source has a corresponding dedicated power rail.

[0032] Step S3: Place power rails with the same voltage, speed level, and timing on the same power layer of the PCB;

[0033] Step S4: Decouple the power tracks that are coupled in the PCB.

[0034] In step S1, a power management chip is added to the design of the high-frequency electronic circuit to achieve full power management, that is, to isolate each power domain separately, avoiding full-performance operation, allowing entry into ultra-low power consumption, and reducing functional states.

[0035] Further, in step S1, the power domain of the high-frequency electronic circuit includes a low-power power domain, a full-power power domain, and / or other dedicated power domains; the power management chip is used to manage the power domain of the high-frequency electronic circuit.

[0036] In this embodiment, step S2, power rail splitting, is for situations where there are multiple power domains in the same digital circuit or where the chip itself has multiple power domains.

[0037] Furthermore, configuring several power rails for the high-frequency electronic circuit includes decomposing the high-frequency electronic circuit according to the following rules: obtaining the operating voltage, startup time, speed level, and shutdown time of the sub-units of the high-frequency electronic circuit; grouping sub-units with the same operating voltage, startup time, speed level, and shutdown time into the same set; configuring one or more power rails for each set; multiple power rails belonging to the same set are parallel power rails; power rails belonging to different sets are separate power rails.

[0038] For example, module 1 requires a power supply voltage of 1.8V, while module 2 requires 3.3V. By designing these two modules with separate power rails, the circuit design process first divides them into two control rails, and subsequently, during PCB design, these two modules are separated during power supply partitioning. Similarly, modules 3 and 4 both require 5V, but module 3 is used more frequently or cannot start simultaneously with module 4. Therefore, modules 3 and 4 are also divided into different power rails, allowing for independent control of their startup. This not only reduces power consumption but also ensures the correct power-on sequence. The same principle applies to speed-level modules; only by ensuring the corresponding voltage can the modules at each speed level operate normally.

[0039] Furthermore, the sub-unit is a device constituting the high-frequency electronic circuit and / or a circuit functional sub-module constituting the device. After step S2, based on design requirements, the basic configuration of the high-frequency electronic circuit is initially determined, and the PCB design of the high-frequency electronic circuit then begins.

[0040] In the design process of the high-frequency electronic circuit, this invention allocates power rails to the devices and / or circuit functional sub-modules constituting the high-frequency electronic circuit according to decomposition rules. The power management chip controls each power rail, thereby controlling the high-frequency electronic circuit. Based on the device rail-combining and separating guidance strategy, and according to the requirements of actual operating voltage, startup time, and speed level, the circuit schematic is designed. Furthermore, based on the decoupling capacitor requirements of the devices constituting the high-frequency electronic circuit, the circuit decoupling capacitors are selected to complete the circuit design.

[0041] Step S3 involves placing the parallel power rails on the same power layer of the PCB.

[0042] Furthermore, after step S4, step S5 is also included: the power supply controls the start-up or shutdown of each power rail, thereby achieving the effects of reducing power consumption, ensuring the power-on sequence, and shielding interference.

[0043] In this invention, all power rails are decoupled to avoid coupling interference between them.

[0044] The technical solution of this invention includes parallel and split-rail circuit design. The circuit schematic is designed based on factors such as the operating voltage, startup time, and speed level of the high-frequency electronic circuit and its modules. During the design process, the enabling relationships for the same voltage and startup time are determined, thus completing the high-frequency electronic circuit design. After the high-frequency electronic circuit design, PCB design begins. During the PCB design process, the power supply rails are combined and split. Then, the combined and split rails are planned, completing the planar division and decoupling, and decoupling the rails using capacitors of appropriate levels.

[0045] The specific embodiments described above only illustrate the design principles of the present invention. The shapes and names of the components in this description may differ and are not limited. Therefore, those skilled in the art can modify or make equivalent substitutions to the technical solutions described in the foregoing embodiments; and these modifications and substitutions do not depart from the inventive spirit and technical solutions of the present invention, and should all fall within the protection scope of the present invention.

Claims

1. A PCB design method for high-frequency electronic circuits, characterized in that, The method includes the following steps: Step S1: Obtain the design requirements of the high-frequency electronic circuit and configure a power management chip for the high-frequency electronic circuit; Step S2: Based on the voltage, speed level, and timing of the sub-units of the high-frequency electronic circuit, configure several power rails for the high-frequency electronic circuit. Each power rail is used to transmit electrical energy from the power source. The power management chip is used to manage the power distribution and timing management of the high-frequency electronic circuit. The power rails provide the same voltage, speed level, and timing to the corresponding sub-units. Each power source has a corresponding dedicated power rail. Step S3: Place power rails with the same voltage, speed level, and timing on the same power layer of the PCB; Step S4: Decouple the power tracks that are coupled in the PCB. Configuring several power rails for the high-frequency electronic circuit includes decomposing the high-frequency electronic circuit according to the following rules: Obtain the voltage, speed level, and timing of the sub-units of the high-frequency electronic circuit; group sub-units with the same voltage, speed level, and timing into the same set; configure one or more power rails for each set; merge multiple power rails belonging to the same set; and separate power rails belonging to different sets.

2. The method as described in claim 1, characterized in that, In step S1, the power domain of the high-frequency electronic circuit includes a low-power power domain, a full-power power domain, and / or other dedicated power domains; the power management chip is used to manage the power domain of the high-frequency electronic circuit.

3. The method as described in any one of claims 1-2, characterized in that, In step S2, the sub-unit is a device constituting the high-frequency electronic circuit and / or a circuit functional sub-module constituting the device.

4. The method as described in claim 3, characterized in that, In step S3, the parallel power rails are placed on the same power layer of the PCB.

5. The method according to any one of claims 1-2, characterized in that, Following step S4, step S5 is also included: controlling the power supply to start or stop each power rail.

Images