Electronic device and control method thereof

Abstract

The present disclosure provides an electronic device and a control method thereof. The electronic device includes an input circuit and a processor. The input circuit includes a plurality of key switches arranged in an array. The processor is coupled to the key switches by a plurality of row lines and a plurality of column lines, and configured to perform the following operations: detecting a portion of the column lines and a portion of the row lines coupled to at least one conductive key switch; assigning one of the portion of the column lines and the portion of the row lines as a group of scan lines, and the other of the portion of the column lines and the portion of the row lines as a group of back scan lines; inputting a corresponding scan signal of a plurality of scan signals to a corresponding scan line of the group of scan lines; and detecting whether the corresponding scan signal is outputted from the group of back scan lines to confirm a position of the at least one conductive key switch.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to an electronic device and a control method thereof, and more particularly, to an electronic device having a plurality of keys and a control method thereof. BACKGROUND

[0002] For a device having a plurality of keys, it is traditionally confirmed whether a key is pressed by sequentially scanning each column line. However, the traditional scanning method can have the following problems:

[0003] 1. When the number of column lines is too large, the scanning time is relatively lengthened, thereby affecting the scanning period and power consumption of the device.

[0004] 2. When the impedance of a column line or a row line is too large and the charge and discharge time is lengthened, the reading time of a signal needs to be lengthened, thereby also affecting the scanning period and power consumption of the device. SUMMARY

[0005] One embodiment of the present disclosure is an electronic device. The electronic device includes an input circuit and a processor. The input circuit includes a plurality of key switches arranged in an array, wherein each key switch is configured to transition from an off state to an on state in response to a user input. The processor is coupled to the key switches by a plurality of column lines and a plurality of row lines, and is configured to: detect a portion of the column lines and a portion of the row lines coupled to at least one on key switch; assign one of the portion of the column lines and the portion of the row lines as a set of scan lines and the other of the portion of the column lines and the portion of the row lines as a set of back scan lines; input a corresponding scan signal of a plurality of scan signals to a corresponding scan line of the set of scan lines; and detect whether the corresponding scan signal is output by the set of back scan lines to confirm a position of the at least one on key switch.

[0006] Another embodiment of the present disclosure is a control method. The control method is applied to an electronic device including a processor and an input circuit including a plurality of key switches arranged in an array, each key switch configured to transition from an off state to an on state in response to a user input. The control method includes: detecting, by the processor, a portion of a plurality of column lines and a portion of a plurality of row lines coupled to at least one on key switch; assigning, by the processor, one of the portion of the column lines and the portion of the row lines as a set of scan lines and the other of the portion of the column lines and the portion of the row lines as a set of back scan lines; inputting, by the processor, a corresponding scan signal of a plurality of scan signals to a corresponding scan line of the set of scan lines; and detecting, by the processor, whether the corresponding scan signal is output by the set of back scan lines to confirm a position of the at least one on key switch.

[0007] Compared with the conventional scanning mode, the electronic device and the control method thereof of the present disclosure first detects the approximate location of the turned-on key switch in the switch array, and then performs a scanning operation on the detected area to confirm the specific position of the turned-on key switch, thereby shortening the scanning period in each scanning cycle. In this way, the power consumption of the electronic device can be reduced to achieve the effect of power saving (especially important for wireless electronic devices), and the signal reading time can also be ensured to be sufficient, making the signal reading more stable. Since the scanning period is shortened, the scanning frequency (i.e., the scanning period) can also be improved, and the present disclosure is also suitable for electronic devices that require low latency. BRIEF DESCRIPTION OF DRAWINGS

[0008] Figure 1 is a block diagram of an electronic device according to some embodiments of the present disclosure.

[0009] Figure 2 is a circuit diagram of an input circuit in an electronic device according to some embodiments of the present disclosure.

[0010] Figure 3 is a flowchart of a control method of an electronic device according to some embodiments of the present disclosure.

[0011] Figures 4A-4C is a signal diagram in an electronic device during a scanning period according to some embodiments of the present disclosure.

[0012] Figure 5 is a circuit diagram of an input circuit in an electronic device according to some other embodiments of the present disclosure.

[0013] BRIEF DESCRIPTION OF DRAWINGS

[0014] 100 electronic device

[0015] 110 processor

[0016] 120 input circuit

[0017] 200 control method

[0018] C row line

[0019] R column line

[0020] SW key switch

[0021] SL scanning line

[0022] RL back scanning line

[0023] Sc scanning signal

[0024] Sd1 first detection signal

[0025] Sd2 second detection signal DETAILED DESCRIPTION

[0026] The following detailed description is provided to understand the cases described, but the specific embodiments described are only used to explain the cases, and are not used to limit the cases, and the description of the structure and operation is not used to limit the order of execution. Any structure recombined by elements, the device generated has equal efficiency, is covered by the scope of the disclosure.

[0027] The terms used throughout the specification and claims (terms) generally have the ordinary meaning of each term used in the field, in the content disclosed herein, and in the specific context, unless otherwise indicated.

[0028] As used herein, "coupled" or "connected" can mean that two or more elements are in direct physical or electrical contact with each other, or that two or more elements are not in direct contact with each other, but can still cooperate or act upon each other.

[0029] Referring to Figure 1 , Figure 1 A block diagram of an electronic device 100 according to some embodiments of the disclosure is described. The electronic device 100 includes a processor 110, an input circuit 120, a plurality of column lines R, and a plurality of row lines C. In some embodiments, the electronic device 100 can be, for example, but not limited to, a computer, a mobile device, a remote controller, or a telephone having a plurality of keys. Specifically, the input circuit 120 includes a plurality of key switches SW arranged in an array to form a plurality of keys on the electronic device 100.

[0030] Structurally, the processor 110 is coupled to a plurality of first ends of the key switches SW in the same column via a corresponding column line R, and is coupled to a plurality of second ends of the key switches SW in the same row via each row line C. The plurality of column lines R and the plurality of row lines C are arranged perpendicular to each other. Each key switch SW is disposed between a corresponding column line R and a corresponding row line C.

[0031] Referring to Figure 2 , Figure 2 A circuit diagram of the input circuit 120 in the electronic device 100 according to some embodiments of the disclosure is described. For simplicity of description, Figure 2 only 8 column lines R[0]~R[7], 7 row lines C[0]~C[6], and 56 key switches SW[0,0]~SW[7,6] are shown, but the disclosure is not limited thereto. As Figure 2As shown, column line R[0] is coupled to the seven first terminals of the seven push-button switches SW[0,0] to SW[0,6] in the same column, while row lines C[0] to C[6] are coupled to the seven second terminals of the seven push-button switches SW[0,0] to SW[0,6] in the same column. The settings of the push-button switches SW in the other columns can be deduced in the same way, so they will not be described in detail here.

[0032] In some embodiments, each push-button switch SW is in the off state when idle (e.g., when not pressed by a user). When a user presses a button on the electronic device 100, the push-button switch SW corresponding to the pressed button will change from the off state to the on state in response to the user input (e.g., a pressing action), thereby forming a circuit with the processor 110 through the corresponding column line R and row line C. The push-button switches SW corresponding to the other unpressed buttons remain in the off state, so that the processor 110 cannot send or receive signals through the corresponding column line R and row line C.

[0033] In this embodiment, the push button switch SW can be implemented as a mechanical toggle switch or a membrane switch, and the processor 110 can be implemented as a microprocessor, but this disclosure is not limited thereto.

[0034] Please see Figure 3 , Figure 3 The control method 200, illustrated according to certain embodiments of the present disclosure, is described. The control method 200 may be derived from, for example... Figure 1 The processor 110 in the illustrated electronic device 100 executes the control method, enabling the processor 110 to determine whether any of the multiple buttons on the electronic device 100 have been pressed. In some embodiments, the control method 200 includes operations S201 to S205. For ease of explanation, the control method 200 will be described below with reference to the embodiments shown in Figures 2 and 4A to 4C.

[0035] At Figure 2 In one embodiment, the user presses three buttons corresponding to three push-button switches SW[2,4], SW[3,3], and SW[4,4] during a scan cycle (e.g., 4 milliseconds (ms)), causing the three push-button switches SW[2,4], SW[3,3], and SW[4,4] to change from an off state to an on state in response to the user's input.

[0036] Please refer to the following: Figure 4A , Figure 4AA signal diagram in the electronic device 100 during the scanning period is shown. At operation S201, the processor 110 simultaneously inputs a plurality of first detection signals Sdl to the input circuit 120 through a plurality of row lines C[0]-C[6], and receives the first detection signals Sdl through 3 of the column lines R[2]-R[4]. Accordingly, the processor 110 detects that 3 of the column lines R[2]-R[4] are coupled to the on-key switches SW[2,4], SW[3,3], SW[4,4] (i.e., detects the column lines coupled to the on-key switches). In the embodiment shown, the number of the first detection signals Sdl (e.g., 7) is equal to the number of the row lines C.

[0037] Referring to FIG. 2B, Figure 4B , Figure 4B A signal diagram in the electronic device 100 during the scanning period is shown. At operation S202, the processor 110 simultaneously inputs a plurality of second detection signals Sd2 to the input circuit 120 through a plurality of column lines R[0]-R[7], and receives the second detection signals Sd2 through 2 of the row lines C[3]-C[4]. Accordingly, the processor 110 detects that 2 of the row lines C[3]-C[4] are coupled to the on-key switches SW[2,4], SW[3,3], SW[4,4] (i.e., detects the row lines coupled to the on-key switches). In the embodiment shown, the number of the second detection signals Sd2 (e.g., 8) is equal to the number of the column lines R.

[0038] At operation S203, the processor 110 compares the number of the column lines R coupled to the on-key switches SW (e.g., SW[2,4], SW[3,3], SW[4,4]) and the number of the row lines C coupled to the on-key switches SW. In the embodiment shown, the number of the column lines R coupled to the on-key switches SW is 3, and the number of the row lines C coupled to the on-key switches SW is 2. Accordingly, the processor 110 obtains a result that the number of the row lines C coupled to the on-key switches SW is less. Figure 2 Figure 2 At operation S204, the processor 110 assigns the side with the smaller number as the scan line, and assigns the side with the larger number as the return line. Referring to FIG. 2C,

[0039] Next, at operation S204, the processor 110 assigns the side with the smaller number as the scan line, and assigns the side with the larger number as the return line. Referring to FIG. 2C, Figure 4C Figure 4C A signal diagram in the electronic device 100 during the scanning period is shown. As shown in FIG. 2D, the processor assigns the row lines C[3]-C[4] as 2 scan lines SL[0]-SL[1], and assigns the column lines R[2]-R[4] as 3 return lines RL[0]-RL[2]. Figure 4C

[0040] ​​​At operation S205, the processor 110 sequentially inputs corresponding scan signals to the plurality of scan lines SL, and confirms the specific positions of the turned-on key switches SW by detecting whether the plurality of retrace lines RL output corresponding scan signals. Here, the corresponding scan signals refer to the scan signals input to a specific scan line SL (e.g., Sc[0], Sc[1] as shown in FIG. 2A) in this disclosure. It can be understood that different scan lines SL can receive the same or different scan signals. In this embodiment, the scan signals (e.g., Sc[0], Sc[1] as shown in FIG. 2A) input to each scan line SL are the same as each other. Specifically, as shown in FIG. 2B, the processor 110 first inputs the scan signal Sc[0] to the scan line SL[0], and only the retrace line RL[1] receives the scan signal Sc[0]. Accordingly, the processor 110 determines that one turned-on key switch SW[3, 3] is located at the position of the 4th row and the 4th column. Then, the processor 110 inputs the scan signal Sc[1] to the scan line SL[1], and the retrace lines RL[0] and RL[2] receive the scan signal Sc[1] respectively. Accordingly, the processor 110 determines that two turned-on key switches SW[2, 4] and SW[4, 4] are located at the position of the 5th row and the 3rd column and the position of the 5th row and the 5th column respectively. In this way, the processor 110 can know the pressing state of the keys on the electronic device 100 according to the positions of the turned-on key switches SW[2, 4], SW[3, 3], and SW[4, 4]. Figure 4C Figure 4C Figure 4C

[0041] In some embodiments, each scan period includes a scan period (i.e., the execution period of operations S201-S205) and a sleep period. Generally, when the processor 110 completes the scanning operation in the scan period (i.e., at the end of the scan period), the sleep period can be entered. In some embodiments, in order to avoid the influence of physical bounce caused by the key being pressed on the scanning result, the processor 110 confirms the scanning result when the same scanning result is obtained in three consecutive scan periods. The scanning result of each scan period can be stored in the storage unit (e.g., the memory) of the electronic device 100 for the processor 110 to compare the scanning results of different scan periods.

[0042] ​​​In other embodiments, the processor 110 does not perform operations S203-S204. After operation S202, the processor 110 directly assigns the column lines R[2]-R[4] coupled to the turned-on key switches SW[2, 4], SW[3, 3], SW[4, 4] as 3 scan lines, and directly assigns the row lines C[3]-C[4] coupled to the turned-on key switches SW[2, 4], SW[3, 3], SW[4, 4] as 2 back scan lines. Then, the processor 110 performs operation S205. In operation S205, the processor 110 sequentially inputs corresponding scan signals to the 3 scan lines, and confirms the specific positions of the turned-on key switches SW[2, 4], SW[3, 3], SW[4, 4] by detecting whether the 2 back scan lines output corresponding scan signals.

[0043] Specifically, the processor 110 first inputs a corresponding scan signal to the first scan line (i.e., R[2]), and only receives the corresponding scan signal at the second back scan line (i.e., C[4]). Accordingly, the processor 110 determines that one turned-on key switch SW[2, 4] is located at the position of the 5th row and the 3rd column. The processor 110 then inputs a corresponding scan signal to the second scan line (i.e., R[3]), and only receives the corresponding scan signal at the first back scan line (i.e., C[3]). Accordingly, the processor 110 determines that one turned-on key switch SW[3, 3] is located at the position of the 4th row and the 4th column. Then, the processor 110 finally inputs a corresponding scan signal to the third scan line (i.e., R[4]), and only receives the corresponding scan signal at the second back scan line (i.e., C[4]). Accordingly, the processor 110 determines that one turned-on key switch SW[4, 4] is located at the position of the 5th row and the 5th column. In this way, the processor 110 can know the pressing state of the keys on the electronic device 100 according to the positions of the turned-on key switches SW[2, 4], SW[3, 3], SW[4, 4].

[0044] It can be understood that, in the embodiments in which operations S203-S204 are not performed, the processor 110 can also directly assign the row lines C[3]-C[4] coupled to the turned-on key switches SW[2, 4], SW[3, 3], SW[4, 4] as 2 scan lines, and directly assign the column lines R[2]-R[4] coupled to the turned-on key switches SW[2, 4], SW[3, 3], SW[4, 4] as 3 back scan lines after operation S202. The scanning operation is similar to the foregoing embodiments, and thus is not described here.

[0045] Please refer to Figure 5 , Figure 5 A circuit diagram of the electronic device 100 according to other embodiments of the present disclosure is described. For simplicity of description, Figure 5Only 6 column lines R[0]~R[5], 2 row lines C[0]~C[1] and 12 key switches SW[0,0]~SW[5,1] are shown, but the present disclosure is not limited thereto. Figure 5 In the embodiment, the processor 110 performs operations S201~S202 and detects that 1 row line C[0] and 3 column lines R[2]~R[4] are coupled to the turned-on key switch SW[2,0], SW[3,0], SW[4,0]. Accordingly, the processor 110 can omit subsequent operations S203~S205 and directly confirm the specific positions of the turned-on key switches SW[2,0], SW[3,0], SW[4,0]. In other words, when one of the number of column lines R coupled to the turned-on key switch SW and the number of row lines C coupled to the turned-on key switch SW is 1, the processor 110 can directly confirm the specific positions of the turned-on key switch SW, so as to greatly reduce the scanning time and frequency.

[0046] Compared with the conventional scanning mode of sequentially scanning each column of key switches, the electronic device 100 of the present disclosure first detects the approximate area of the turned-on key switch SW in the switch array, and then performs a scanning operation on the detected area to confirm the specific position of the turned-on key switch SW. In this way, the electronic device 100 of the present disclosure can shorten the scanning period in each scanning cycle. In the case where the scanning cycle is unchanged, the sleep period can be relatively increased, so as to reduce the power consumption of the electronic device 100 and achieve the effect of power saving (especially important for wireless electronic devices).

[0047] Some electronic devices are limited by their structure (for example, the circuit is manufactured in a carbon printing manner) and have a longer charging and discharging time, so they often cannot read signals due to insufficient scanning period. In the case where the scanning cycle is unchanged, the electronic device 100 of the present disclosure can ensure sufficient reading time for signals due to the simplified scanning operation, so as to make the reading of signals more stable.

[0048] In addition, since the scanning period is shortened, the scanning frequency can also be increased (i.e., the scanning cycle is shortened), and the control method 200 of the present disclosure is also suitable for electronic devices that require low latency.

[0049] Although the present disclosure has been disclosed as above with embodiments, it is not intended to limit the present disclosure, and those skilled in the art can make various modifications and decorations without departing from the spirit and scope of the present disclosure, so the protection scope of the present disclosure shall be subject to the scope defined by the appended claims.

Claims

1. An electronic device, comprising: an input circuit including a plurality of key switches arranged in an array, wherein each key switch is configured to transition from an off state to an on state in response to a user input; a processor coupled to the key switches by a plurality of row lines and a plurality of column lines, and configured to perform the following operations: detecting a portion of the column lines and a portion of the row lines coupled to at least one on key switch; assigning one of the portion of the column lines and the portion of the row lines as a set of scan lines and the other of the portion of the column lines and the portion of the row lines as a set of back scan lines; inputting a corresponding scan signal of a plurality of scan signals to a corresponding scan line of the set of scan lines; and detecting whether the corresponding scan signal is outputted by the set of back scan lines to confirm a position of the at least one on key switch; wherein the operation of detecting the portion of the column lines and the portion of the row lines comprises: inputting a plurality of first detection signals simultaneously through the row lines and receiving a portion of the first detection signals of the first detection signals through the portion of the column lines to detect the portion of the column lines; and inputting a plurality of second detection signals simultaneously through the column lines and receiving a portion of the second detection signals of the second detection signals through the portion of the row lines to detect the portion of the row lines.

2. The electronic device of claim 1, wherein the operation of assigning the set of scan lines and the set of back scan lines comprises: comparing a number of the portion of the column lines and a number of the portion of the row lines; and assigning the set of scan lines to the portion of the column lines and the portion of the row lines having a smaller number and assigning the set of back scan lines to the portion of the column lines and the portion of the row lines having a larger number.

3. The electronic device of claim 1, wherein after the operation of detecting the portion of the column lines and the portion of the row lines, the processor is further configured to: if one of the number of the portion of the column lines and the number of the portion of the row lines is one, directly confirming the position of the at least one on key switch.

4. The electronic device of claim 1, wherein the row lines and the column lines are perpendicularly interleaved with each other, and a corresponding key switch of the key switches is disposed between a corresponding column line of the column lines and a corresponding row line of the row lines.

5. A control method for an electronic device, wherein the electronic device includes a processor and an input circuit including a plurality of key switches arranged in an array, each key switch is configured to transition from an off state to an on state in response to a user input, the control method comprising: detecting, by the processor, a portion of a plurality of column lines and a portion of a plurality of row lines coupled to at least one on key switch; assigning, by the processor, one of the portion of the column lines and the portion of the row lines as a set of scan lines and the other of the portion of the column lines and the portion of the row lines as a set of back scan lines; inputting, by the processor, a corresponding scan signal of a plurality of scan signals to a corresponding scan line of the set of scan lines; and detecting, by the processor, whether the corresponding scan signal is outputted by the set of back scan lines to confirm a position of the at least one on key switch; wherein the operation of detecting the portion of the column lines and the portion of the row lines comprises: ​ ​ ​ The processor simultaneously inputs a plurality of first detection signals to the row lines and receives part of the first detection signals from the part of the column lines to detect the part of the column lines. And The processor simultaneously inputs a plurality of second detection signals to the column lines and receives part of the second detection signals from the part of the row lines to detect the part of the row lines.

6. The control method of claim 5, wherein the operation of assigning the set of scan lines and the set of retrace lines comprises: The processor compares the number of the part of the column lines and the number of the part of the row lines; and The processor assigns the set of scan lines to the part of the column lines and the part of the row lines with the smaller number and assigns the set of retrace lines to the part of the column lines and the part of the row lines with the larger number.

7. The control method of claim 5, wherein after the operation of detecting the part of the column lines and the part of the row lines, the control method further comprises: If one of the number of the part of the column lines and the number of the part of the row lines is 1, the processor directly confirms the position of the at least one turned-on key switch.

8. The control method of claim 5, wherein the row lines and the column lines are perpendicularly and alternately arranged, and a corresponding one of the key switches is disposed between a corresponding one of the column lines and a corresponding one of the row lines.

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