R-2R ladder resistor network circuit

Abstract

R‑2R ladder resistor network circuit, related to integrated circuit technology. The present invention includes an R‑2R resistor network and a switch voltage level conversion circuit, each controllable resistor arm of the R‑2R resistor network is provided with a switch, the switch is composed of a PMOS switch tube and an NMOS switch tube in parallel, the drains of the two MOS switch tubes in the controllable resistor arm are connected, the source of the NMOS switch tube is connected to a first external voltage point, and the source of the PMOS switch tube is connected to a second external voltage point; and also includes a voltage adaptive circuit, the voltage adaptive circuit includes a first resistor branch, a second resistor branch and an operational amplifier. The present invention can avoid the problem of inconsistent on-resistance caused by the process difference of the P / N switch tube, ensure the consistency of the switch resistance under the positive and negative reference conduction conditions, and improve the linearity of the overall digital-to-analog converter.

Description

Technical Field

[0001] The present invention relates to integrated circuit technology. Background Art

[0002] In the prior art, the positive and negative reference switches in the R-2R ladder network usually use the same device type, so as long as the device size is consistent and the gate-source voltage is the same, the consistency of the switch on-impedance can be guaranteed. However, in actual design, using the same switch tube type does not guarantee that the switch can be reliably turned on and off at different reference voltage nodes.

[0003] As we all know, the on-resistance of a conventional MOS switch , its resistance is inversely proportional to the width-to-length ratio (W / L) and the overdrive voltage (V GS -V TH ), generally, a single MOS tube can realize the switching of fixed voltage nodes, but for the fluctuation of multiple voltage nodes, complementary transistors are usually used for switching. However, there is also a problem with complementary transistors, that is, when the node voltage increases, the NMOS on-resistance increases and the PMOS on-resistance decreases. When the node voltage decreases, the NMOS on-resistance is small and the PMOS on-resistance increases. In this way, it is often impossible to ensure that the complementary switch has the same on-impedance when connecting different node voltages. Therefore, in most of the current high-voltage DACs, if the weighted resistor arm of the R-2R resistor network involves switching two reference voltages, the design of the switch is more inclined to use a pair of NMOS switch tubes to control the on and off of the positive and negative references respectively. When the switch tube size is the same, the gate terminal voltage of each NMOS tube is reasonably set to ensure that the impedance of the positive and negative reference voltages is equal when the switch is turned on. This is also the implementation method of analog switches in conventional high-voltage R-2R ladder networks.

[0004] However, in the R-2R ladder network, the conventional analog switch implementation is limited by two constraints: one is the change of the positive and negative reference voltage of the switching point, and the other is the change of the power supply voltage. In the conventional analog switch design, the positive and negative reference voltages of the switching point are constant, because once the reference voltage changes, it will destroy the designed on-off conditions, causing the changed switching point voltage to be unable to switch on and off reliably, directly affecting the output result of the DAC; if the voltage of the switching point remains unchanged, but the power supply voltage is not fixed and changes with the user's usage conditions, then the switch that originally turned on the positive and negative reference voltages will have inconsistent on-resistances, because V GS As the power supply voltage changes, the inconsistency of the on-switch impedance at the positive and negative reference voltages deteriorates the linearity of the R-2R ladder network, thereby reducing the accuracy of the overall DAC. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a high-precision R-2R ladder resistor network circuit.

[0006] The technical solution adopted by the present invention to solve the technical problem is that an R-2R ladder resistor network circuit includes an R-2R resistor network and a switch voltage level conversion circuit, each controllable resistor arm of the R-2R resistor network is provided with a switch, the switch is composed of a PMOS switch tube and an NMOS switch tube connected in parallel, the drains of the two MOS switch tubes are connected, the source of the NMOS switch tube is connected to a first external voltage point, and the source of the PMOS switch tube is connected to a second external voltage point; the switch voltage level conversion circuit has a positive phase signal output branch and a negative phase signal output branch,

[0007] It is characterized in that

[0008] It also includes a voltage adaptive circuit, which includes a first resistance branch, a second resistance branch and an operational amplifier, and the first PMOS tube, the first resistor R1, the second resistor R2 and the first NMOS tube constitute the first resistance branch;

[0009] The gate of the first PMOS tube is connected to the ground level VSS, the source is connected to the first external voltage point, and the drain is connected to the first resistor R1;

[0010] The source of the first NMOS tube is connected to the second external voltage point, the drain is connected to the second resistor R2, and the connection point between the first resistor R1 and the second resistor R2 is connected to the positive input terminal of the operational amplifier;

[0011] A third resistor R3 and a fourth resistor R4 connected in series between the first external voltage point and the second external voltage point form a second resistor branch, and a connection point between the third resistor R3 and the fourth resistor R4 is connected to the negative input terminal of the operational amplifier;

[0012] The output end of the operational amplifier is used as the output end of the voltage adaptive circuit and is connected to the gate of the first NMOS tube;

[0013] In the positive phase signal output branch, the high level terminal of the power supply of the inverter is connected to the first external voltage point, and the low level terminal of the power supply is connected to the ground level VSS;

[0014] In the inverted signal output branch, the low-level power supply terminal of the inverter is connected to the second external voltage point, and the high-level power supply terminal is connected to the output end of the voltage adaptive circuit.

[0015] Based on the implementation method of using P / N switch tubes in the R-2R network, the present invention flexibly designs a switch voltage adaptive circuit, which, on the one hand, ensures that the weight switch can be reliably turned on and off within a wider reference voltage range and accurately transmits the switch signal; on the other hand, the present invention can avoid the problem of inconsistent on-resistance caused by differences in the process of P / N switch tubes, ensure the consistency of switch resistance under positive and negative reference on-states, and improve the linearity of the overall digital-to-analog converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic diagram of an R-2R resistor network using a pair of complementary switching tubes.

[0017] Figure 2 This is a schematic diagram of an R-2R resistor network using a group of NMOS switching tubes.

[0018] Figure 3 The present invention is a switch voltage level conversion circuit diagram of the prior art.

[0019] Figure 4 It is a schematic diagram of the R-2R resistor network of the present invention.

[0020] Figure 5 It is a schematic diagram of a voltage adaptive circuit of the present invention.

[0021] Figure 6 It is a switching voltage level conversion circuit diagram of the present invention. DETAILED DESCRIPTION

[0022] In order to make the technical means, creative features, purpose and efficacy of the present invention easy to understand, the present invention is further described below in conjunction with specific diagrams. Unless otherwise specified, the present invention takes a 14-bit voltage-mode output DAC as an example, and the DAC core adopts a typical R-2R ladder network structure. Where VREFP=5V, VREFN=-5V or 0V, power supply voltage VSS=-15V, VCC=15V, VDD=5V.

[0023] Figure 1 The R-2R ladder network is implemented by using a pair of complementary switch tubes of exactly equal size. The resistor arm of each weight position is connected to the resistor network through a pair of CMOS switches. Assuming that the positive and negative reference voltages are VREFP=5V and VREFN=0V, when the highest weight position is connected to the 5V reference, then DB <13> is logic "0", DB_N <13> For logic "1", considering the reliability of the switch tube, the voltage corresponding to logic "0" is set to 0V, and the voltage corresponding to logic "1" is set to 10V. Therefore, MN1 and MP1 are turned on, and MN2 and MP2 are turned off. Then, after connecting to the 5V reference, the on-resistance of the highest weight switch is ; When the highest weight bit is connected to the 0V reference, then DB <13> is logic "1", DB_N <13> is logic "0", so MN2 is turned on, MP2, MN1, and MP1 are turned off. Then, after connecting to the 0V reference, the on-resistance of the switch with the highest weight is , it can be seen that R on1 ≠R on2 , that is, the on-resistance of the weight bit is different during the switching between “0” and “1”, so the structure of this complementary switch cannot ensure that the on-resistance of the weight bit is equal when switching voltage.

[0024] Figure 2 This is the method of using a group of NMOS switch tubes in the R-2R ladder network. As analyzed above, the attached Figure 1 The implementation method explained is difficult to ensure the consistency of the on-resistance, so the design of the switch is more inclined to use a pair of NMOS switch tubes to control the on and off of the positive and negative references respectively. When the switch tubes are of the same size, the gate voltage of each NMOS tube is reasonably set through the switch voltage level conversion circuit to ensure that the switch on-resistance is equal when switching to different reference voltages. Assuming that the positive and negative reference voltages are VREFP=5V and VREFN=-5V respectively, when the highest weight bit is connected to the 5V reference, MN2 uses the positive power supply VCC to turn on the gate voltage and 0V to turn off the gate voltage. When the positive reference is turned on, the on-resistance of MN2 is

[0025] When the negative reference is turned on, considering the consistency of the on-resistance, the gate control voltage Vc=5V is generated by the switch level conversion circuit, so the on-resistance of MN1 is , R on1 =R on2 , at this time, the weight bit has equal conduction impedance when switching voltage. However, the implementation of this switch is limited by two constraints. One is the change of positive and negative reference voltage at the switching point, and the other is the change of power supply voltage. Both of these changes will lead to inconsistent switch impedance or reliability problems of switch on and off. For example, when VREFN changes from -5V to 0V, , at this time R on1 ≠R on2 , the switch on-resistance is not equal when switching different reference voltages; and when VREFN changes from 0V to -5V, if the gate voltage of MN2 is 15V to turn on and 0V to turn off, then when the highest weight bit selects VREFN, MN1 is turned on, but MN2 will always inject current into the source end of MN1, causing MN2 to be unable to shut down reliably, thus directly affecting the gating function of the R-2R resistor network. For another example, when the power supply voltage VCC changes from 15V to 12V, the on-resistance of MN2 is , and the previously estimated on-resistance of MN1 Different, R on1 ≠R on2 ,From this, it can be seen that when the power supply voltage changes, the switch on-impedance is also not equal when switching different reference voltages;

[0026] Figure 3 It is a switch voltage level conversion circuit of the prior art, the two power supply terminals of the inverter outputting DB<13:0> are connected to 0V and VCC respectively, and the two power supply terminals of the inverter outputting DB<13:0> are connected to VSS and 5V high level respectively.

[0027] The R-2R ladder network in the present invention is implemented by a set of P / N switch tubes, see Figure 4 The N-type switch MN0 controls the on / off of the negative reference VREFN, and the P-type switch MP0 controls the on / off of the positive reference VREFP. In order to ensure the reliability of the switch on / off, the gate voltage of the switch must first be Figure 5 The switching voltage level conversion circuit shown in the figure generates a conditioned control voltage, where MP uses V REFP The voltage is turned off and turned on using the VSS voltage. MN is turned off using the VREFN voltage, and the turn-on voltage of MN0 is controlled by a voltage adaptive circuit. Figure 5 The voltage adaptive circuit shown provides the turn-on voltage Vsw_adj of MN0. In the voltage adaptive circuit, the input front end of the operational amplifier is two resistor string networks. The head and tail of the resistor string are connected together and connected to VREFP and VREFN respectively. The left resistor branch is connected in series with a PMOS tube MP with a gate terminal connected to VSS, two resistors R1 and R2 with a resistance value of r, and an NMOS tube MN with a gate terminal connected to the feedback voltage Vsw_adj. The other resistor branch is connected in series with two resistors R3 and R4 with a resistance value of r. When the operational amplifier loop is stable, according to the working characteristics of the "virtual short" and "virtual open" of the operational amplifier circuit, it can be obtained that V P =V N , due to V N = , so V P It is also the middle point of the resistor network, so V P The equivalent impedances above and below the point are consistent, so the on-resistances of MP and MN are the same, that is, ,It needs to be emphasized here that the size design of MP and MN should be proportional to the corresponding type of weight switches in the R-2R ladder network, so that the Vsw_adj generated by the feedback can be the gate end conduction voltage of the NMOS tube in the weight switch. The voltage adaptive circuit avoids the on-resistance inconsistency caused by the process differences of the P and N types of switch tubes, and also flexibly generates the gate end matching voltage of the NMOS switch under the conditions of the power voltage or the reference voltage changes.

[0028] See also Figure 6 , different from Figure 3 The prior art shown in the figure, the switch voltage level conversion circuit of the present invention has a positive phase signal output branch and a negative phase signal output branch. In the positive phase signal output branch, the high level terminal of the inverter power supply is connected to the first external voltage point VREFP, and the low level terminal of the power supply is connected to the ground level VSS; in the negative phase signal output branch, the low level terminal of the inverter power supply is connected to the second external voltage point VREFN, and the high level terminal of the power supply is connected to the output end of the voltage adaptive circuit.

[0029] In summary, the switch voltage adaptive circuit design in the present invention effectively solves the linearity problem of the on-resistance of the R-2R network switch in the high-precision DAC design. By adopting two complementary switch tubes, P and N, the reliable on-off of the weight switch under different reference voltage conditions is better guaranteed. At the same time, the feedback voltage generated by the voltage adaptive circuit also flexibly avoids the on-resistance inconsistency caused by the different process parameters and threshold voltages of the P and N tubes. The present invention can ensure that the R-2R ladder network can still perform high-linearity data conversion under the conditions of power supply voltage and reference voltage changes, and can be widely used in high-voltage and high-precision analog-to-digital converters, providing an effective method for the design of weight switches.

Claims

1. An R-2R ladder resistor network circuit, comprising an R-2R resistor network and a switch voltage level conversion circuit, wherein each controllable resistor arm of the R-2R resistor network has a switch, characterized in that: The switch is composed of a PMOS switch tube and an NMOS switch tube in parallel. The drains of the two MOS switch tubes in the controllable resistor arm are connected, the source of the NMOS switch tube is connected to a first external voltage point, and the source of the PMOS switch tube is connected to a second external voltage point; It also includes a voltage adaptive circuit, the voltage adaptive circuit includes a first resistance branch, a second resistance branch and an operational amplifier, the first PMOS tube, the first resistor (R1), the second resistor (R2) and the first NMOS tube constitute the first resistance branch; The gate of the first PMOS tube is connected to the ground level (VSS), the source is connected to the first external voltage point, and the drain is connected to the first resistor (R1); The source of the first NMOS tube is connected to the second external voltage point, the drain is connected to the second resistor (R2), and the connection point between the first resistor (R1) and the second resistor (R2) is connected to the positive input terminal of the operational amplifier; A third resistor R3 and a fourth resistor (R4) connected in series between the first external voltage point and the second external voltage point form a second resistor branch, and a connection point between the third resistor (R3) and the fourth resistor (R4) is connected to a negative input terminal of the operational amplifier; The output end of the operational amplifier serves as the output end of the voltage adaptive circuit and is connected to the gate of the first NMOS tube.

2. The R-2R ladder resistor network circuit according to claim 1, characterized in that: The switch voltage level conversion circuit has a positive phase signal output branch and a negative phase signal output branch, In the positive phase signal output branch, the high level terminal of the power supply of the inverter is connected to the first external voltage point, and the low level terminal of the power supply is connected to the ground level (VSS); In the inverted signal output branch, the low-level power supply terminal of the inverter is connected to the second external voltage point, and the high-level power supply terminal is connected to the output end of the voltage adaptive circuit.

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