Self-adaptive Wear Leveling Acceleration Device and Method Applied to Solid State Drives
By designing a self-applicable wear equalization acceleration device in a solid-state drive, using hardware acceleration strategies and wear equalization expressions, the problem of lack of uniformity and inefficiency of dynamic and static wear equalization algorithms in the prior art is solved, and more efficient wear equalization and longer overall disk life is achieved.
Patent Information
- Application Number
- CN202211189156.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-28
- Publication Date
- 2025-06-13
- Estimated Expiration
- 2042-09-28
AI Technical Summary
In existing solid-state drives, dynamic and static wear equalization algorithms are implemented through software respectively, and there is a lack of a unified hardware acceleration strategy, resulting in inefficiency and insufficient life of the entire disk.
A self-applicable wear equalization acceleration device is designed, and the hardware acceleration strategy is adopted. A wear equalization expression supports both dynamic and static wear equalization algorithms, including block information table, data reading module, comparison module and control module. The wear equalization expression is used to calculate the priority of each block to realize garbage collection.
The unification of dynamic and static wear equalization algorithms is achieved, and the overall disk life of solid-state drives is improved, and the efficiency is higher than that of pure software implementation.
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Figure CN115454349B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of garbage collection of solid state drives, and specifically to a self-adaptive wear leveling acceleration device and method applied to solid state drives. Background Art
[0002] SSDs are widely used in consumer and enterprise storage. Currently, the vast majority of SSDs use NAND Flash as the storage medium and use the WL (Wear-Leveling) wear leveling algorithm. The main purpose is to prevent some physical blocks of Nand from being frequently erased and written, resulting in poor data retention, which in turn causes a large number of Bit-flips, or even the generation of ECC Errors or BadBlocks, and the data becomes incorrect and can no longer be used, which would be catastrophic. The emergence of WL just solves this kind of problem. It can ensure that the wear (erasure) of each flash block in the SSD is balanced, ensuring the security of the entire disk data.
[0003] There are two types of WL: dynamic WL and static WL. Briefly speaking, dynamic WL selects the block with the fewest write / erase cycles each time, while static WL moves the Cold Data that has not been modified for a long time from the block with fewer write / erase cycles to the block with more write / erase cycles. Then, the block with fewer write / erase cycles will be reused. Generally, dynamic WL occurs during a Write Request, while static WL occurs during the idle phase when the trigger condition is periodically checked and executed, and it has the WL effect of the global block.
[0004] Traditional methods rely on software algorithms to implement dynamic wear leveling and static wear leveling algorithms. The dynamic / static wear leveling algorithms are two implementation methods and are not unified. Summary of the Invention
[0005] The technical problem to be solved by the present invention is to provide a self-adaptive wear leveling acceleration device and method applied to solid state drives, which uses a wear leveling expression to support both dynamic / static wear leveling algorithms and adopts a hardware acceleration strategy to implement the wear leveling algorithm.
[0006] To solve the above technical problem, the technical solution adopted by the present invention is: a self-adaptive wear leveling acceleration device applied to solid state drives, including a block information table, a data bus, a data reading module, a comparison module, a control module, and a system bus;
[0007] The control module is connected to an external CPU through the system bus and is used to receive configuration information sent by the CPU;
[0008] The block information table stores multiple block information, and each block information includes nand type, block erase count, and block valid data frame count;
[0009] The data reading module is connected to the block information table through the data bus, and reads the data at the corresponding address from the block information table according to the command from the control module;
[0010] The comparison module is connected to the data reading module. The comparison module distributes the data obtained from the data reading module according to the bit width given by the control module, and then calculates the minimum value according to A, B, C in the wear leveling expression given by the control module, the average APE, and the Nand type, and outputs it to the control module;
[0011] The wear leveling expression is:
[0012] Priority = A * abs(BPE - APE) * (BPE - APE) + B * VDFC + C;
[0013] Where A and B are set coefficients, 0 < A < 1, 0 < B < 1, C is a constant, BPE represents the number of erasures of the block, APE represents the average number of erasures, abs(BPE - APE) represents the absolute value of the difference between the block erasure times and the average erasure times, and VDFC represents the number of valid data frames included in the block;
[0014] The control module is connected to the comparison module and the data reading module, and is used to send configuration information to the data reading module and the comparison module, and initiate commands for data reading and comparison. After the minimum value is generated, the result is fed back to the system bus; the configuration information includes the address, length, and bit width of the block information table, A, B, C, the average APE in the wear leveling expression, and the Nand type for comparison.
[0015] Further, the data reading module reads a block of information in the block information table from the data bus and passes it to the comparison module. The comparison first checks whether the Nand type in the block information passed by the data reading module is the same as the Nand type configured by the control module. If they are the same, the Priority of the block is calculated according to the wear leveling formula, and then the Priority of the block is compared with the minimum Priority. If the Priority of the block is smaller, the minimum Priority and the corresponding block number are updated.
[0016] Further, the device is applicable to static wear leveling and dynamic wear leveling.
[0017] The present invention also discloses a self-adaptive wear leveling acceleration method applied to a solid state drive, including the following steps:
[0018] S01), the CPU in the system configures the address, length, and bit width of the block information table, A, B, C, the average APE in the wear leveling expression, and the Nand type to the corresponding registers in the control module through the control bus;
[0019] S02), the control module passes the address and length of the block information table to the data reading module, starts the data reading module. At the same time, the control module passes the bit width information, the Nand type to be compared, A, B, C, and the average APE in the wear leveling expression to the comparison module and starts the comparison module;
[0020] S03), the data reading module reads a block of information from the block information table according to the address and length configured by the control module from the data bus and passes it to the comparison module;
[0021] S04), the comparison module first compares whether the Nand type of the block information passed by the data reading module is the same as the Nand type in the control module register. If they are the same, it enters step S05); otherwise, it enters step S03) to read the next block information; if the number of comparison times reaches the target value, it enters step S06);
[0022] S05), the comparison module calculates the Priority of this block according to the wear leveling formula based on the block information, A, B, C, and the average APE obtained this time, and then compares the Priority of this block with the smallest Priority. If the Priority of this block is smaller, it updates the smallest Priority and the corresponding block number;
[0023] The wear leveling expression is:
[0024] Priority = A * abs(BPE - APE) * (BPE - APE) + B * VDFC + C;
[0025] Where A and B are set coefficients, 0 < A < 1, 0 < B < 1, C is a constant, BPE represents the number of erasures of the block, APE represents the average number of erasures, abs(BPE - APE) represents the absolute value of the difference between the block erasure times and the average erasure times, and VDFC represents the number of valid data frames contained in this block;
[0026] S06), this self - adaptive wear leveling ends, and the end register in the control module is set for the CPU to access the smallest Priority and the corresponding block number register.
[0027] Furthermore, this method is applicable to both static wear leveling and dynamic wear leveling.
[0028] Advantages of the present invention: The present invention uses a wear leveling expression to support both dynamic / static wear leveling algorithms simultaneously, with the firmware structure tending to be unified and convenient. And a hardware acceleration strategy is adopted to implement the wear leveling algorithm. The advantages of this device are simple structure, unified dynamic / static wear leveling algorithms, higher efficiency than pure software implementation, and improved lifespan of the entire disk. Description of the Drawings
[0029] Figure 1 It is a principle block diagram of a self-adaptive wear leveling acceleration device;
[0030] Figure 2 It is a schematic diagram of a block information table. Detailed Implementation Manner
[0031] The following further describes the present invention in conjunction with the drawings and specific embodiments.
[0032] Embodiment 1
[0033] This embodiment discloses a self-adaptive wear leveling acceleration device applied to a solid-state drive, as Figure 1 shown, including a block information table, a data bus, a data reading module, a comparison module, a control module, and a system bus.
[0034] The control module is connected to an external CPU through the system bus and is used to receive configuration information sent by the CPU; and the control module is connected to the comparison module and the data reading module, and is used to send the configuration information to the data reading module and the comparison module, and initiate commands for data reading and comparison, and feedback the result to the system bus after the minimum value is generated; the configuration information includes the address, length, and bit width of the Block information table, A, B, C, average APE in the wear leveling expression, and the Nand type to be compared.
[0035] As Figure 2 shown, the block information table stores multiple block information, and each block information includes the nand type (idle block, bad block, used block, etc.), the number of block erasures, and the number of valid data frames of the block.
[0036] The data reading module is connected to the block information table through the data bus and reads data at the corresponding address from the block information table according to the command from the control module;
[0037] The comparison module is connected to the data reading module. The comparison module distributes the data obtained from the data reading module according to the bit width given by the control module, and then calculates the minimum value according to A, B, C, average APE, and Nand type in the wear leveling expression given by the control module, and outputs it to the control module;
[0038] The wear leveling expression is:
[0039] Priority = A * abs(BPE - APE) * (BPE - APE) + B * VDFC + C;
[0040] Where A and B are set coefficients, 0 < A < 1, 0 < B < 1, C is a constant, BPE represents the number of erasures of the Block, APE represents the average number of erasures, abs(BPE - APE) represents the absolute value of the difference between the number of erasures of the Block and the average number of erasures, and VDFC represents the number of valid data frames contained in the Block.
[0041] In this embodiment, the data reading module reads a block information from the block information table in the data bus and transfers it to the comparison module. The comparison first compares whether the Nand type in the block information transferred by the data reading module is consistent with the Nand type configured by the control module. If they are consistent, the Priority of the Block is calculated according to the wear leveling formula, and then the Priority of the Block is compared with the minimum Priority. If the Priority of the Block is small, the minimum Priority and the corresponding Block number are updated.
[0042] Embodiment 2
[0043] This embodiment discloses an adaptive wear leveling acceleration method applied to a solid state drive, including the following steps:
[0044] S01), the CPU in the system configures the address, length, and bit width of the block information table, A, B, C, average APE in the wear leveling expression, and Nand type to the corresponding registers in the control module through the control bus;
[0045] S02), the control module transfers the address and length of the block information table to the data reading module, starts the data reading module, and at the same time the control module transfers the bit width information, the Nand type to be compared, A, B, C, and average APE in the wear leveling expression to the comparison module and starts the comparison module;
[0046] S03), the data reading module reads a block information from the block information table in the data bus according to the address and length configured by the control module and transfers it to the comparison module;
[0047] S04), the comparison module first compares whether the Nand type of the block information transferred by the data reading module is consistent with the Nand type in the control module register. If they are consistent, go to step S05); otherwise, go to step S03) to read the next Block information; if the comparison times reach the target value, go to step S06);
[0048] S05), The comparison module calculates the Priority of the current block based on the wear leveling formula using the block information, A, B, C, and the average APE obtained this time. Then it compares the Priority of this block with the smallest Priority. If the Priority of this block is smaller, it updates the smallest Priority and the corresponding Block number;
[0049] The wear leveling expression is:
[0050] Priority = A * abs(BPE - APE) * (BPE - APE) + B * VDFC + C;
[0051] Where A and B are set coefficients, 0 < A < 1, 0 < B < 1, C is a constant, BPE represents the number of erasures of the Block, APE represents the average number of erasures, abs(BPE - APE) represents the absolute value of the difference between the Block erasure times and the average erasure times, and VDFC represents the number of valid data frames contained in this Block;
[0052] S06), This self - adaptive wear leveling ends, and the end register in the control module is set to prepare for the CPU to access the smallest Priority and the corresponding Block number register.
[0053] Both of the above two embodiments use the wear leveling expression. In this formula, a constant C is set. If VDFC is 0 and (PE - APE) is negative, the calculated priority will be negative. Adding the constant C is to ensure that the calculated priority is greater than 0 and does not exceed the maximum priority.
[0054] Embodiment 1 and Embodiment 2 are applicable to both static wear leveling and dynamic wear leveling.
[0055] When a Free Block is obtained, VDFC is 0, and WL preferentially provides the Block with the smallest Priority for writing.
[0056] When there is a Block containing cold data, the PE value of this Block is less than the APE average value, (BPE - APE) is a value less than 0. If BPE is small enough, even if VDFC is large, the Priority will still be very small. WL preferentially provides this Block for garbage collection to achieve static wear leveling.
[0057] When there is no cold data block, the A * abs(BPE - APE) * (BPE - APE) of all blocks tends to be consistent. In this way, the block with a smaller VDFC has a lower priority, and the WL preferentially provides this block for garbage collection to achieve dynamic wear leveling.
[0058] It can be seen from this that the wear leveling expression is applicable to the cases of free blocks, blocks with cold data, and blocks without cold data.
[0059] The self - adaptive wear leveling acceleration device and method take the above - mentioned Priority formula and Nand type as input parameters, and obtain the corresponding Nand block for garbage collection through calculation and comparison.
[0060] The present invention uses a wear leveling expression to support both dynamic / static wear leveling algorithms simultaneously. The firmware structure tends to be unified and convenient. And it adopts a hardware acceleration strategy to implement the wear leveling algorithm. The advantages of this device are simple structure, unified dynamic / static wear leveling algorithms, higher efficiency than pure software implementation, and improved life of the entire disk.
[0061] The above description is only the basic principle and preferred embodiments of the present invention. The improvements and substitutions made by those skilled in the art based on the present invention fall within the protection scope of the present invention.
Claims
1. An adaptive wear leveling acceleration device applied to a solid state drive, characterized in that: it includes a block information table, a data bus, a data reading module, a comparison module, a control module and a system bus; the control module is connected to an external CPU through the system bus and is used to receive configuration information sent by the CPU; the block information table stores multiple block information, and each block information includes nand type, block erasure count, and block valid data frame count; the data reading module is connected to the block information table through the data bus and reads data at a corresponding address from the block information table according to a command from the control module; the comparison module is connected to the data reading module. The comparison module distributes the data obtained from the data reading module to the comparison module according to the bit width given by the control module, and then calculates the minimum value according to A, B, C in the wear leveling expression given by the control module, the average APE, and the Nand type, and outputs it to the control module; the wear leveling expression is: Priority = A * abs(BPE - APE) * (BPE - APE) + B * VDFC + C; where A and B are set coefficients, 0 < A < 1, 0 < B < 1, C is a constant, BPE represents the erasure count of the block, APE represents the average erasure count, abs(BPE - APE) represents the absolute value of the difference between the block erasure count and the average erasure count, and VDFC represents the number of valid data frames included in the block; the control module is connected to the comparison module and the data reading module, and is used to send configuration information to the data reading module and the comparison module, and initiate commands for data reading and comparison. After the minimum value is generated, the result is fed back to the system bus; the configuration information includes the address, length, and bit width of the Block information table, A, B, C, the average APE in the wear leveling expression, and the Nand type to be compared.
2. The adaptive wear leveling acceleration device applied to a solid state drive according to claim 1, characterized in that: the data reading module reads a block of information in the block information table from the data bus and transfers it to the comparison module. The comparison first compares whether the Nand type in the block information transferred by the data reading module is the same as the Nand type configured by the control module. If they are the same, the Priority of the block is calculated according to the wear leveling formula, and then the Priority of the block is compared with the minimum Priority. If the Priority of the block is small, the minimum Priority and the corresponding block number are updated.
3. The adaptive wear leveling acceleration device applied to a solid state drive according to claim 1, characterized in that: this device is applicable to static wear leveling and dynamic wear leveling.
4. An adaptive wear leveling acceleration method applied to a solid state drive, characterized in that: it includes the following steps: S01), the CPU in the system configures the address, length, and bit width of the block information table, A, B, C, average APE in the wear leveling expression, and the Nand type to the corresponding registers in the control module through the control bus; S02), the control module passes the address and length of the block information table to the data reading module and starts the data reading module. At the same time, the control module passes the bit width information, the Nand type to be compared, A, B, C, and average APE in the wear leveling expression to the comparison module and starts the comparison module; S03), the data reading module reads a block of information from the block information table according to the address and length configured by the control module from the data bus and passes it to the comparison module; S04), the comparison module first compares whether the Nand type of the block information passed by the data reading module is the same as the Nand type in the control module register. If they are the same, go to step S05); otherwise, go to step S03) to read the next Block information; if the comparison times reach the target value, go to step S06); S05), the comparison module calculates the Priority of this block according to the wear leveling formula with the block information, A, B, C, and average APE obtained this time, and then compares the Priority of this block with the smallest Priority. If the Priority of this block is smaller, update the smallest Priority and the corresponding Block number; The wear leveling expression is: Priority = A * abs(BPE - APE) * (BPE - APE) + B * VDFC + C; where A and B are set coefficients, 0 < A < 1, 0 < B < 1, C is a constant, BPE represents the number of erasures of the Block, APE represents the average number of erasures, abs(BPE - APE) represents the absolute value of the difference between the Block erasure times and the average erasure times, and VDFC represents the number of valid data frames contained in this Block; S06), this self-adaptive wear leveling ends, and the end register in the control module is set for the CPU to access the smallest Priority and the corresponding Block number register.
5. The self-adaptive wear leveling acceleration method applied to a solid-state drive according to claim 4, characterized in that: This method is applicable to both static wear leveling and dynamic wear leveling.
Citation Information
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