Signal processing methods, equipment operation monitoring methods, devices, equipment and media

Abstract

This invention relates to the field of signal processing technology, specifically to a signal processing method, a method for monitoring the operation of equipment, a device, equipment, and a medium, aiming to solve the problem of improving the signal sorting efficiency involved in radix-2 Fast Fourier Transform or inverse Fast Fourier Transform. To this end, the method provided by this invention includes forming a signal array based on a signal sequence, the signal array comprising 2... n Given n signals with n≥1, the signal array is reordered by calculating the reordering sequence from the 0th sorted array to the 3nth sorted array. The 0th sorted array contains one element with a value of 0. The values ​​of the elements in the 3nth sorted array represent the reordering sequence number of each signal element in the signal array. The signal array is then reordered based on the 3nth sorted array. This method effectively reduces the reordering time of the signal array and improves the efficiency of signal sorting involved in Fast Fourier Transform or Inverse Transform, thus meeting the processing requirements of signals with high real-time requirements.

Description

Technical Field

[0001] This invention relates to the field of signal processing technology, specifically to a signal processing method, an operation monitoring method for industrial equipment, an apparatus, a computer device, and a storage medium. Background Technology

[0002] When industrial equipment is running, it typically introduces characteristic signals with specific frequencies into its voltage, current, sound, and vibration signals. By analyzing these characteristic signals, the operating status of the industrial equipment can be determined, such as whether a malfunction has occurred. The conventional method for analyzing characteristic signals is to use a Fast Fourier Transform (FFT) to calculate the frequency domain signal of the acquired time-domain signal, and then extract the amplitude and phase of the characteristic signals from the frequency domain signal. In some cases, it is necessary to further process the frequency domain signal and then perform an inverse FFT on the processed frequency domain signal to obtain the corresponding time-domain signal for more complex analytical applications.

[0003] The implementation process of Fast Fourier Transform (FFT) or Inverse Fast Fourier Transform (IFT) consists of two parts: sorting and butterfly operations. The sorting algorithm significantly impacts the efficiency of FFT or IFT. Currently, sorting algorithms mainly include the exchange method, table lookup method, and bit reversal method, among others. The exchange method requires multiple parity grouping and transposition operations on the signal to be processed, consuming significant hardware resources and resulting in excessively long sorting times, severely affecting the efficiency of FFT or IFT. The table lookup method pre-stores the array used for sorting in a table file on external storage. At runtime, the table file is loaded into memory, and the signal to be processed is sorted using address addressing. While this method can improve sorting efficiency, the table file occupies additional storage space, and accessing the table file is also resource-intensive. The bit reversal method is a classic sorting algorithm that can significantly improve sorting efficiency, but its high efficiency relies heavily on program optimization, resulting in high programming complexity.

[0004] Accordingly, a new technical solution is needed in this field to solve the above problems. Summary of the Invention

[0005] To overcome the above-mentioned deficiencies, this invention is proposed to provide a signal processing method, an operation monitoring method for industrial equipment, an apparatus, a computer device, and a storage medium that solve or at least partially solve the technical problem of how to improve the signal sorting efficiency involved in radix-2 fast Fourier transform or inverse transform.

[0006] Firstly, a signal processing method is provided, the method comprising:

[0007] Obtain the first signal sequence;

[0008] A first signal array is formed based on the first signal sequence using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform, wherein the first signal array includes 2 n There are n signal elements, n≥1;

[0009] The first signal array is reordered for use in time-decimation radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform;

[0010] or,

[0011] Obtain the second signal sequence;

[0012] A second signal array is formed based on the second signal sequence, which is a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on frequency decimation.

[0013] Obtain a third signal array by transforming the second signal array using a radix-2 Fast Fourier Transform or an inverse radix-2 Fast Fourier Transform based on frequency decimation, wherein the third signal array comprises 2 n There are n signal elements, n≥1;

[0014] The third signal array is reordered;

[0015] The method further includes reordering the first signal array or the third signal array in the following manner:

[0016] Step S1: Determine the 1st to 3nth sorting arrays sequentially according to the preset 0th sorting array and in the following manner, wherein the preset 0th sorting array includes one element and the value of the element is 0, and the values ​​of the elements in the 3nth sorting array represent the reordering sequence number of each signal element in the first signal array or the third signal array respectively;

[0017] For the (3n-i)th sorted array, the elements of the (3n-i-1)th sorted array are appended to the end of the elements of the (3n-i-2)th sorted array to form the (3n-i)th sorted array, where i = 3n-3, ..., 3, 0;

[0018] For the 3n-i-1th sorted array, add 1 to the elements of the 3n-i-2th sorted array to form the 3n-i-1th sorted array;

[0019] For the 3n-i-2th sorted array, multiply the elements of the 3n-i-3th sorted array by 2 to form the 3n-i-2th sorted array;

[0020] Step S2: Reorder the first signal array or the third signal array according to the 3nth sorting array.

[0021] In one technical solution of the above signal processing method, the step of "reordering the signal array according to the 3nth sorted array" specifically includes:

[0022] The first signal array or the third signal array is reordered by address addressing and based on the elements in the 3nth sorted array.

[0023] In one technical solution of the above signal processing method, the step of "reordering the first signal array or the third signal array by address addressing and according to the elements in the 3nth sorted array" specifically includes:

[0024] In the memory of the computer device executing the signal processing method, a reordered array with the same data type and length as the target signal array is declared, wherein the target signal array is either the first signal array or the third signal array;

[0025] Using the address of the first signal element of the target signal array as the base address and the value of each element in the 3nth sorted array as the address offset, the effective address of each element in the reordered array in the target signal array is determined sequentially according to the base address and each address offset, and the value of the signal element pointed to by the effective address in the target signal array is used as the value of the corresponding element in the reordered array.

[0026] The reordered array is used as the reordered signal array.

[0027] In one technical solution of the above signal processing method, the computer device is an embedded computer device.

[0028] In a second aspect, a method for monitoring the operation of industrial equipment is provided, the method comprising:

[0029] Obtain the first signal sequence of the industrial equipment;

[0030] A first signal array is formed based on the first signal sequence using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform, wherein the first signal array includes 2 n There are n signal elements, n≥1;

[0031] The signal processing method described in the above signal processing method solution reorders the first signal array and performs a time-decimation-based radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform on the reordered first signal array to determine the first signal characteristics of the industrial equipment.

[0032] Based on the first signal characteristics, monitor the operating status of the industrial equipment;

[0033] or,

[0034] Obtain the second signal sequence of the industrial equipment;

[0035] A second signal array is formed based on the second signal sequence, which is a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on frequency decimation.

[0036] Obtain a third signal array by transforming the second signal array using a radix-2 Fast Fourier Transform or an inverse radix-2 Fast Fourier Transform based on frequency decimation, wherein the third signal array comprises 2 n There are n signal elements, n≥1;

[0037] The signal processing method described above reorders the third signal array to determine the second signal characteristics of the industrial equipment.

[0038] The operating status of the industrial equipment is monitored based on the second signal characteristic.

[0039] In a third aspect, a signal processing apparatus is provided, the apparatus comprising a first signal processing module and / or a second signal processing module;

[0040] The first signal processing module includes:

[0041] The first signal acquisition submodule is configured to acquire a first signal sequence;

[0042] The first signal array acquisition submodule is configured to form a first signal array based on time-decimation radix-2 Fast Fourier Transform or inverse radix-2 Fast Fourier Transform according to the first signal sequence, wherein the first signal array includes 2 n There are n signal elements, n≥1;

[0043] A first reordering submodule is configured to reorder the first signal array for use in a time-decimation-based radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform.

[0044] The second signal processing module includes:

[0045] The second signal acquisition submodule is configured to acquire a second signal sequence;

[0046] The second signal array acquisition submodule is configured to form a second signal array based on frequency decimation radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform according to the second signal sequence.

[0047] The third signal array acquisition submodule is configured to acquire a third signal array obtained by transforming the second signal array using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on frequency decimation, wherein the third signal array includes 2 n There are n signal elements, n≥1;

[0048] The second reordering submodule is configured to reorder the third signal array;

[0049] The first reordering submodule and the second reordering submodule are further configured to reorder the first signal array or the third signal array respectively in the following ways:

[0050] Step S1: Determine the 1st to 3nth sorting arrays sequentially according to the preset 0th sorting array and in the following manner, wherein the preset 0th sorting array includes one element and the value of the element is 0, and the values ​​of the elements in the 3nth sorting array represent the reordering sequence number of each signal element in the first signal array or the third signal array respectively;

[0051] For the (3n-i)th sorted array, the elements of the (3n-i-1)th sorted array are appended to the end of the elements of the (3n-i-2)th sorted array to form the (3n-i)th sorted array, where i = 3n-3, ..., 3, 0;

[0052] For the 3n-i-1th sorted array, add 1 to the elements of the 3n-i-2th sorted array to form the 3n-i-1th sorted array;

[0053] For the 3n-i-2th sorted array, multiply the elements of the 3n-i-3th sorted array by 2 to form the 3n-i-2th sorted array;

[0054] Step S2: Reorder the first signal array or the third signal array according to the 3nth sorting array.

[0055] In a fourth aspect, an operation monitoring device for industrial equipment is provided, the device comprising a first operation monitoring module and / or a second operation monitoring module;

[0056] The first operation monitoring module includes:

[0057] A first signal acquisition submodule is configured to acquire a first signal sequence of the industrial equipment;

[0058] The first signal array acquisition submodule is configured to form a first signal array based on time-decimation radix-2 Fast Fourier Transform or inverse radix-2 Fast Fourier Transform according to the first signal sequence, wherein the first signal array includes 2 n There are n signal elements, n≥1;

[0059] The first signal feature acquisition submodule is configured to use the signal processing method described in the above-mentioned signal processing method technical solution to reorder the first signal array and perform a time-decimation-based radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform on the reordered first signal array to determine the first signal feature of the industrial equipment.

[0060] The first monitoring submodule is configured to monitor the operating status of the industrial equipment based on the first signal characteristics;

[0061] The second operation monitoring module includes:

[0062] The second signal acquisition submodule is configured to acquire the second signal sequence of the industrial equipment;

[0063] The second signal array acquisition submodule is configured to form a second signal array based on frequency decimation radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform according to the second signal sequence.

[0064] The second signal feature acquisition submodule is configured to acquire a third signal array obtained by transforming the second signal array using a radix-2 Fast Fourier Transform or an inverse radix-2 Fast Fourier Transform based on frequency decimation, and then reorder the third signal array using the signal processing method described in the above-mentioned signal processing method to determine the second signal features of the industrial equipment; wherein, the third signal array includes 2 n There are n signal elements, n≥1;

[0065] The second monitoring submodule is configured to monitor the operating status of the industrial equipment based on the second signal characteristics.

[0066] In a fifth aspect, a computer device is provided, including a processor and a storage device, the storage device being adapted to store a plurality of program codes, the program codes being adapted to be loaded and executed by the processor to perform the signal processing method described above or the industrial equipment operation monitoring method described above.

[0067] In one technical solution of the aforementioned computer device, the computer device is an embedded computer device.

[0068] In a sixth aspect, a computer-readable storage medium is provided, wherein a plurality of program codes are stored, the program codes being adapted to be loaded and run by a processor to perform the signal processing method described above or the operation monitoring method for industrial equipment described above.

[0069] The above-described technical solutions of the present invention have at least one or more of the following beneficial effects:

[0070] In implementing the technical solution of the present invention, a first signal sequence can be obtained, and a first signal array based on time-decimation radix-2 Fast Fourier Transform or inverse radix-2 Fast Fourier Transform can be formed according to the first signal sequence, wherein the first signal array includes 2 n There are n signal elements, n≥1; the first signal array is reordered for use in radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform based on time decimation. Alternatively, a second signal sequence can be obtained, and a second signal array can be formed based on the second signal sequence using radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform based on frequency decimation; a third signal array is obtained by transforming the second signal array using radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform based on frequency decimation, wherein the third signal array includes 2 n There are n signal elements, n≥1; the third signal array is reordered.

[0071] The first signal array or the third signal array can be reordered using the reordering method described in steps S1 to S2.

[0072] Step S1: Based on the preset 0th sorting array, determine the 1st to 3nth sorting arrays sequentially using the following methods: the preset 0th sorting array includes one element with a value of 0; the values ​​of the elements in the 3nth sorting array represent the reordering sequence number of each signal element in the first or third signal array; for the 3n-ith sorting array, append the elements of the 3n-i-1th sorting array to the end of the elements of the 3n-i-2th sorting array to form the 3n-ith sorting array, where i = 3n-3, ..., 3, 0; for the 3n-i-1st sorting array, add 1 to the elements of the 3n-i-2nd sorting array to form the 3n-i-1st sorting array; for the 3n-i-2nd sorting array, multiply the elements of the 3n-i-3rd sorting array by 2 to form the 3n-i-2nd sorting array; Step S2: Reorder the first or third signal array based on the 3nth sorting array.

[0073] Compared with existing reordering methods such as parity decomposition and table lookup, the reordering method described in steps S1 to S2 above can effectively reduce the reordering time and meet the processing requirements of signals with high real-time requirements. Attached Figure Description

[0074] The disclosure of this invention will become more readily understood with reference to the accompanying drawings. It will be readily understood by those skilled in the art that these drawings are for illustrative purposes only and are not intended to limit the scope of protection of this invention. Wherein:

[0075] Figure 1 This is a schematic flowchart of the main steps of a signal processing method according to an embodiment of the present invention;

[0076] Figure 2 This is a schematic diagram of the transformation principle of the radix-2 fast Fourier transform based on time decimation;

[0077] Figure 3 This is a schematic flowchart of the main steps of a signal processing method according to another embodiment of the present invention;

[0078] Figure 4 This is a schematic diagram of the transformation principle of radix-2 fast Fourier transform based on frequency decimation;

[0079] Figure 5 This is a schematic flowchart of the main steps of a method for reordering a first signal array or a third signal array according to an embodiment of the present invention.

[0080] Figure 6 This is an adoption of an embodiment of the present invention. Figure 5 The diagram illustrates the method for reordering the first or third signal array.

[0081] Figure 7 This is a schematic flowchart illustrating the main steps of a method for reordering a first signal array based on the 3nth sorting array according to an embodiment of the present invention. Detailed Implementation

[0082] Some embodiments of the present invention will now be described with reference to the accompanying drawings. Those skilled in the art should understand that these embodiments are merely illustrative of the technical principles of the present invention and are not intended to limit the scope of protection of the present invention.

[0083] In the description of this invention, "module" and "processor" can include hardware, software, or a combination of both. A module may include hardware circuitry, various suitable sensors, communication ports, and memory, and may also include software components, such as program code, or a combination of software and hardware. A processor may be a central processing unit, a microprocessor, a digital signal processor, or any other suitable processor. The processor has data and / or signal processing capabilities. The processor may be implemented in software, in hardware, or a combination of both. Non-transitory computer-readable storage media include any suitable medium capable of storing program code, such as magnetic disks, hard disks, optical disks, flash memory, read-only memory, random access memory, etc.

[0084] First, embodiments of the signal processing method provided by the present invention will be described.

[0085] See appendix Figure 1 , Figure 1 This is a schematic flowchart illustrating the main steps of a signal processing method according to an embodiment of the present invention. Figure 1 As shown, the signal processing method in this embodiment of the invention mainly includes the following steps S101 to S103.

[0086] Step S101: Obtain the first signal sequence.

[0087] A signal sequence is a sequence of signals arranged in order of their respective order from first to last.

[0088] The signal types include, but are not limited to, current signals, voltage signals, sound signals, and vibration signals. Those skilled in the art can obtain the corresponding signal sequence based on the actual signal type to be processed.

[0089] Step S102: Form a first signal array based on the first signal sequence using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform, wherein the first signal array includes 2 n There are n signal elements, n≥1.

[0090] For example, in some implementations, the first sequence of signals may include 2 sequences arranged in chronological order. n There are 1 signal element, and the length of the first signal array formed based on these signal elements is 2. n That is, the first signal array can be composed of 2 nIt consists of several elements. According to the order of the elements in the first signal array, the value of each signal element in the first signal array is the signal arranged in the first signal sequence in the order of time. For example, the first signal sequence includes signals x(0), x(1), x(2) and x(3) arranged in the order of time. Based on this first signal sequence, the first signal array A = [x(0) x(1) x(2) x(3)] is formed, where the arrangement numbers of x(0), x(1), x(2) and x(3) in the first signal array are 0, 1, 2 and 3, respectively.

[0091] Step S103: Reorder the first signal array for use in time-decimation-based radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform.

[0092] See appendix Figure 2 , Figure 2 This example illustrates the transformation principle of a radix-2 Fast Fourier Transform (FFT) based on time decimation. The radix-2 FFT based on time decimation primarily achieves a fast Fourier transform of the signal through butterfly computation. For example... Figure 2 As shown, before performing the butterfly operation on the first signal array A = [x(0)x(1)x(2)x(3)x(4)x(5)x(6)x(7)] formed from the first signal sequence, the first signal array is first rearranged to obtain the rearranged first signal array A = [x(0)x(4)x(2)x(6)x(1)x(5)x(3)x(7)]. Then, the butterfly operation is performed on the rearranged first signal array. The result of the butterfly operation is the final result, i.e. Figure 2 The array in the array is [X(0) X(1) X(2) X(3) X(4) X(5) X(6) X(7)].

[0093] Please refer to the appendix for further details. Figure 3 , Figure 3 This is a schematic flowchart of the main steps of a signal processing method according to another embodiment of the present invention. Figure 3 As shown, the signal processing method in this embodiment of the invention mainly includes the following steps S201 to S204.

[0094] Step S201: Obtain the second signal sequence.

[0095] Step S202: Form a second signal array based on the second signal sequence using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on frequency decimation.

[0096] Step S203: Obtain the third signal array obtained by transforming the second signal array using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on frequency decimation, wherein the third signal array includes 2 n There are n signal elements, n≥1.

[0097] Step S204: Reorder the third signal array.

[0098] See appendix Figure 4 , Figure 4 This example illustrates the transformation principle of radix-2 Fast Fourier Transform (FFT) based on frequency decimation. The radix-2 FFT based on frequency decimation primarily achieves a fast Fourier transform of the signal through butterfly computation. For example... Figure 4 As shown, after performing a butterfly operation on the second signal array A = [x(0)x(1) x(2) x(3) x(4) x(5) x(6) x(7)] formed by the second signal sequence to obtain the third signal array [X(0) X(4) X(2) X(6) X(1) X(5) X(3) X(7)], the third signal array needs to be reordered to obtain the reordered third signal array [X(0) X(1) X(2) X(3) X(4) X(5) X(6) X(7)].

[0099] See appendix Figure 5 In this embodiment of the invention, the first signal array or the third signal array can be reordered through the following steps S301 to S302.

[0100] Step S301: Based on the preset 0th sorting array, determine the 1st to 3nth sorting arrays in sequence. The preset 0th sorting array includes one element with an element value of 0. The values ​​of the elements in the 3nth sorting array represent the reordering sequence number of each signal element in the first signal array or the third signal array.

[0101] For the (3n-i)th sorted array, append the elements of the (3n-i-1)th sorted array to the end of the elements of the (3n-i-2)th sorted array to form the (3n-i)th sorted array, where i = 3n-3, ..., 3, 0;

[0102] For the 3n-i-1th sorted array, add 1 to the elements of the 3n-i-2th sorted array to form the 3n-i-1th sorted array;

[0103] For the 3n-i-2th sorted array, multiply the elements of the 3n-i-3th sorted array by 2 to form the 3n-i-2th sorted array.

[0104] See appendix Figure 6 Taking n=4 as an example, the method for determining the 1st to 3rd n=12 sorted arrays will be explained.

[0105] First, the preset 0th sort array A0 is set to include one element with a value of 0, i.e., A0 = [0]. Then, the 1st to 12th sort arrays A1 to A12 are determined according to the sort array A0, where i = 9, 6, 3, 0.

[0106] 1. When i = 9, the first to third sorted arrays A1 to A3 can be determined.

[0107] The 3n-i-3rd sorted array is the 0th sorted array A0, the 3n-i-2nd sorted array is the 1st sorted array A1, the 3n-i-1st sorted array is the 2nd sorted array A2, and the 3n-ith sorted array is the 3rd sorted array A3.

[0108] Since the 0th sorted array A0 = [0], we can obtain the 1st sorted array A1 = A0 × 2 = [0], the 2nd sorted array A2 = A1 + 1 = [1], and the 3rd sorted array A3 =

[01] .

[0109] 2. When i = 6, the 4th to 6th sorted arrays A4 to A6 can be determined.

[0110] The 3n-i-3rd sorted array is the 3rd sorted array A3, the 3n-i-2nd sorted array is the 4th sorted array A4, the 3n-i-1st sorted array is the 5th sorted array A5, and the 3n-ith sorted array is the 6th sorted array A6.

[0111] Since the third sorted array A3 = [0 1], we can obtain the fourth sorted array A4 = A3 × 2 = [0 2], the fifth sorted array A5 = A4 + 1 = [1 3], and the sixth sorted array A6 = [0 2 1 3].

[0112] 3. When i = 3, the 7th to 9th sorted arrays A7 to A9 can be determined.

[0113] The 3n-i-3th sorted array is the 6th sorted array A6, the 3n-i-2th sorted array is the 7th sorted array A7, the 3n-i-1th sorted array is the 8th sorted array A8, and the 3n-ith sorted array is the 9th sorted array A9.

[0114] Since the 6th sorted array A6 = [0 2 1 3], we can obtain the 7th sorted array A7 = A6 × 2 = [04 2 6], the 8th sorted array A8 = A7 + 1 = [1 5 3 7], and the 9th sorted array A9 = [0 4 2 6 1 5 3 7].

[0115] 4. When i = 0, the 10th to 12th sorted arrays A10 to A12 can be determined.

[0116] The 3n-i-3rd sorted array is the 9th sorted array A9, the 3n-i-2nd sorted array is the 10th sorted array A10, the 3n-i-1st sorted array is the 11th sorted array A11, and the 3n-ith sorted array is the 12th sorted array A12.

[0117] Since the 9th sorted array A9 = [0 4 2 6 1 5 3 7], we can obtain the 10th sorted array A10 = A9 × 2 = [0 8 4 12 2 10 6 14], the 11th sorted array A11 = A10 + 1 = [1 9 5 13 3 11 7 15], and the 12th sorted array A12 = [0 8 4 12 2 10 6 14 1 9 5 13 3 11 7 15].

[0118] The above explains the method for determining the 1st to 12th sorted arrays A1 to A12.

[0119] Step S302: Reorder the first signal array or the third signal array according to the 3nth sorted array.

[0120] As can be seen from the aforementioned step S301, the values ​​of the elements in the 3nth sorting array represent the reordering sequence number of each signal element in the first signal array or the third signal array. Therefore, after determining the 3nth sorting array through step S301, the first signal array or the third signal array can be reordered according to the elements in the 3nth sorting array.

[0121] Based on the method described in steps S301 to S302 above, the reordering sequence number of each signal element when reordering the first signal array or the third signal array can be determined by calculation, thereby effectively reducing the reordering time and meeting the processing requirements of signals with high real-time requirements.

[0122] The following provides a further explanation of step S302.

[0123] To enable rapid and accurate reordering of the first or third signal array based on the 3nth sorted array, in some embodiments of step S302 above, the first or third signal array can be reordered using addressing based on elements in the 3nth sorted array. Reordering the first or third signal array using addressing is more suitable for reordering the first or third signal array via computer equipment, thereby improving the efficiency and reliability of the reordering process.

[0124] See appendix Figure 7 In some preferred embodiments, the signal array can be reordered according to the elements in the 3nth sorting array by following steps S401 to S403.

[0125] Step S401: Declare a reordered array in the memory of the computer device executing the signal processing method, which has the same data type and length as the target signal array, and the target signal array is either the first signal array or the third signal array.

[0126] For example, if the target signal array is of floating-point data type and has a length of 16 floating-point numbers, then the reordered array is also of floating-point data type and has a length of 16 floating-point numbers.

[0127] It should be noted that those skilled in the art can use conventional methods in the field of computer technology to declare a reordered array in the memory of the computer device executing the signal processing method, based on the data type and length of the target signal array. The embodiments of the present invention do not specifically limit the declaration method of the reordered array.

[0128] Step S402: Using the address of the first signal element in the target signal array as the base address and the value of each element in the 3nth sorted array as the address offset, determine the effective address of each element in the reordered array in the target signal array according to the base address and each address offset, and use the value of the signal element pointed to by the effective address in the target signal array as the value of the corresponding element in the reordered array.

[0129] The following uses a signal array D[2] with a data length of 8 floating-point numbers. 3 Taking [example] as an example, the above step S402 will be explained.

[0130] The target signal array is D[2] 3] = [y(0) y(1) y(2) y(3) y(4) y(5) y(6) y(7)], the address of element y(0) is 0, that is, the base address is 0; the reordered array is D1[2 3 The 3n sorted array A9 obtained through the aforementioned step S301 is [0 4 2 6 1 5 3 7].

[0131] 1. Determine the reordered array D1[2] 3 The value of the 0th element in ]

[0132] Reorder array D1[2] 3 The 0th element in the target signal array D[2] is in the target signal array D[2]. 3 The effective address in [] is the sum of the base address 0 and the value 0 of the 0th element in the sorted array A9, i.e., the effective address is 0. The effective address is 0 in the target signal array D[2]. 3 The value of the signal element pointed to in ] is y(0), and y(0) is used as the reordered array D1[2 3 The value of the 0th element in [].

[0133] 2. Determine the reordered array D1[2] 3 The value of the first element in ]

[0134] Reorder array D1[2] 3 The first element in the target signal array D[2] is in the target signal array D[2]. 3 The effective address in [] is the sum of the base address 0 and the value 4 of the first element in the sorted array A9, that is, the effective address is 4. The effective address 4 points to the signal element y(4) in the target signal array. y(4) is used as the reordered array D1[2] 3 The value of the first element in [].

[0135] 3. Determine the reordered array D1[2] 3 The value of the second element in ]

[0136] Reorder array D1[2] 3 The second element in the target signal array D[2] is in the target signal array D[2] 3 The effective address in [] is the sum of the base address 0 and the value 2 of the second element in the sorted array A9, i.e., the effective address is 2. The effective address 2 points to the signal element y(2) in the target signal array. y(2) is used as the resorted array D1[2]. 3 The value of the second element in [].

[0137] Similarly, the reordered array D1[2] can be determined. 3 The values ​​of the 3rd to 7th elements in the array, and the reordered array D1[2] is determined. 3After the values ​​of the 3rd to 7th elements in ], the reordered array D1[2] can be obtained. 3 ]=[y(0) y(4) y(2)y(6) y(1) y(5) y(3) y(7)].

[0138] Step S403: Use the reordered array as the reordered signal array.

[0139] By using the methods described in steps S401 to S403 above, the reordering of signal arrays can be completed quickly and reliably on a computer device that performs signal processing methods.

[0140] Furthermore, because the above method consumes relatively few computing resources from the computer device, it is applicable not only to computer devices with high computing power and large storage space, but also to computer devices with low computing power and small storage space. For example, in some embodiments, the computer device may be an embedded computer, particularly a low-specification embedded computer device with low computing power and small storage space.

[0141] The above is a description of embodiments of the signal processing method provided by the present invention.

[0142] In an application scenario according to an embodiment of the signal processing method of the present invention, the signal processing method can be used to process the equipment signals of industrial equipment so as to monitor the operating status of the industrial equipment based on the processed signals. An embodiment of the industrial equipment operation monitoring method based on the above-described signal processing method provided by the present invention will be described below.

[0143] In an industrial equipment operation monitoring method according to an embodiment of the present invention, the industrial equipment operation monitoring method may include the following steps 11 to 14.

[0144] Step 11: Obtain the first signal sequence of the industrial equipment.

[0145] Industrial equipment refers to equipment used in industrial production, such as lathes. A signal sequence for industrial equipment refers to a sequence of signals formed by arranging multiple equipment signals sequentially according to their respective order. The types of equipment signals include, but are not limited to, current signals, voltage signals, sound signals, and vibration signals from industrial equipment.

[0146] Step 12: Based on the first signal sequence, form a first signal array using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform, wherein the first signal array includes 2 nThere are n signal elements, n≥1.

[0147] Step 13: Using the signal processing method described in the aforementioned signal processing method embodiment, the first signal array is reordered, and the reordered first signal array is subjected to a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on time decimation to determine the first signal characteristics of the industrial equipment.

[0148] For example, if the signal elements in the first signal array are time-domain signals, then after performing a radix-2 fast Fourier transform based on time decimation on the reordered time-domain signals, the resulting first signal feature is the frequency domain feature of the industrial equipment.

[0149] Step 14: Monitor the operating status of industrial equipment based on the characteristics of the first signal.

[0150] In this embodiment, the signal characteristics of the industrial equipment's signals under different operating states can be pre-set. That is, the correspondence between different operating states and signal characteristics can be pre-set. After determining the actual signal characteristics (first signal characteristics) of the industrial equipment in step 13, the actual operating state of the industrial equipment can be determined by matching according to the above correspondence. The operating state of the industrial equipment includes, but is not limited to, normal operating state and fault operating state.

[0151] As can be seen from the embodiments of the aforementioned signal processing method, the signal processing method described in the aforementioned embodiments can effectively reduce the time for reordering the signal array and meet the processing requirements of signals with high real-time requirements. In the embodiments of the present invention, by using the above-mentioned signal processing method to process the equipment signal array of industrial equipment, the first signal characteristics of the industrial equipment can be determined in a timely and reliable manner, thereby enabling real-time monitoring of the operating status of the industrial equipment based on the first signal characteristics.

[0152] In another embodiment of the present invention, the method for monitoring the operation of industrial equipment may include the following steps 21 to 25.

[0153] Step 21: Obtain the second signal sequence of the industrial equipment.

[0154] Industrial equipment refers to equipment used in industrial production, such as lathes. A signal sequence for industrial equipment refers to a sequence of signals formed by arranging multiple equipment signals sequentially according to their respective order. The types of equipment signals include, but are not limited to, current signals, voltage signals, sound signals, and vibration signals from industrial equipment.

[0155] Step 22: Form a second signal array based on the second signal sequence using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on frequency decimation.

[0156] Step 23: Obtain the third signal array obtained by transforming the second signal array using a radix-2 Fast Fourier Transform or an inverse radix-2 Fast Fourier Transform based on frequency decimation, wherein the third signal array includes 2 n There are n signal elements, n≥1.

[0157] Step 24: Using the signal processing method described in the aforementioned signal processing method embodiment, the third signal array is reordered to determine the second signal characteristics of the industrial equipment.

[0158] Step 25: Monitor the operating status of industrial equipment based on the characteristics of the second signal.

[0159] In this embodiment, the signal characteristics of the industrial equipment's signals under different operating states can be pre-set. That is, the correspondence between different operating states and signal characteristics can be pre-set. After determining the actual signal characteristics (second signal characteristics) of the industrial equipment in step 24, the actual operating state of the industrial equipment can be determined by matching according to the above correspondence. The operating state of the industrial equipment includes, but is not limited to, normal operating state and fault operating state.

[0160] As can be seen from the embodiments of the aforementioned signal processing method, the signal processing method described in the aforementioned embodiments can effectively reduce the time for reordering the signal array and meet the processing requirements of signals with high real-time requirements. In the embodiments of the present invention, by using the above-mentioned signal processing method to process the equipment signal array of industrial equipment, the second signal characteristics of the industrial equipment can be determined in a timely and reliable manner, thereby enabling real-time monitoring of the operating status of the industrial equipment based on the second signal characteristics.

[0161] It should be noted that although the above embodiments only provide an example of a specific application scenario of monitoring the operating status of industrial equipment, those skilled in the art will understand that, without departing from the technical principles of the present invention, they can also reorder the signal sequences in other application scenarios to meet the needs of the corresponding application scenarios. These technical solutions that replace or modify the application scenarios still fall within the protection scope of the present invention. For example, by reordering the pixel grayscale signals of an image using the above signal processing method, and then performing a Fast Fourier Transform on the reordered pixel grayscale signals to determine the frequencies of the pixel grayscale signals of the image, the pixel grayscale signals can be filtered based on these frequencies.

[0162] It should be noted that although the steps in the above embodiments are described in a specific order, those skilled in the art will understand that in order to achieve the effects of the present invention, different steps do not necessarily have to be executed in such an order. They can be executed simultaneously (in parallel) or in other orders, and these variations are all within the scope of protection of the present invention.

[0163] Furthermore, the present invention also provides a signal processing apparatus.

[0164] In one embodiment of a signal processing apparatus according to the present invention, the signal processing apparatus mainly includes a first signal processing module and / or a second signal processing module.

[0165] The first signal processing module includes a first signal acquisition submodule, a first signal array acquisition submodule, and a first reordering submodule. The first signal acquisition submodule can be configured to acquire a first signal sequence; the first signal array acquisition submodule can be configured to form a first signal array based on time-decimation radix-2 Fast Fourier Transform or inverse radix-2 Fast Fourier Transform according to the first signal sequence, wherein the first signal array includes 2... n There are n signal elements, n≥1; the first reordering submodule can be configured to reorder the first signal array for use in time-decimation radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform.

[0166] The second signal processing module includes a second signal acquisition submodule, a second signal array acquisition submodule, a third signal array acquisition submodule, and a second reordering submodule. The second signal acquisition submodule can be configured to acquire a second signal sequence; the second signal array acquisition submodule can be configured to form a second signal array based on the second signal sequence using a radix-2 fast Fourier transform (RFFT) or inverse radix-2 fast Fourier transform (IFT); the third signal array acquisition submodule can be configured to acquire a third signal array obtained by transforming the second signal array using a radix-2 fast Fourier transform (RFFT) or IFT, wherein the third signal array includes 2... n There are 1 signal element, n≥1; the second reordering submodule can be configured to reorder the third signal array.

[0167] Furthermore, the first reordering submodule and the second reordering submodule are also configured to reorder the first signal array or the third signal array respectively in the following ways:

[0168] Step S1: Based on the preset 0th sorting array, determine the 1st to 3nth sorting arrays in sequence using the following methods. The preset 0th sorting array includes one element with a value of 0. The values ​​of the elements in the 3nth sorting array represent the reordering sequence number of each signal element in the first signal array or the third signal array, respectively.

[0169] For the (3n-i)th sorted array, append the elements of the (3n-i-1)th sorted array to the end of the elements of the (3n-i-2)th sorted array to form the (3n-i)th sorted array, where i = 3n-3, ..., 3, 0;

[0170] For the 3n-i-1th sorted array, add 1 to the elements of the 3n-i-2th sorted array to form the 3n-i-1th sorted array;

[0171] For the 3n-i-2th sorted array, multiply the elements of the 3n-i-3th sorted array by 2 to form the 3n-i-2th sorted array;

[0172] Step S2: Reorder the first signal array or the third signal array according to the 3nth sorted array.

[0173] The above-mentioned signal processing device is used to perform Figures 1 to 7 The signal processing method embodiments shown are similar in technical principle, the technical problems solved, and the technical effects produced. Those skilled in the art can clearly understand that, for the sake of convenience and brevity, the specific working process and related descriptions of the signal processing device can be referred to the content described in the embodiments of the signal processing method, which will not be repeated here.

[0174] Furthermore, the present invention also provides an operation monitoring device for industrial equipment.

[0175] In an embodiment of an industrial equipment operation monitoring device according to the present invention, the industrial equipment operation monitoring device mainly includes a first operation monitoring module and / or a second operation monitoring module.

[0176] The first operation monitoring module includes a first signal acquisition submodule, a first signal array acquisition submodule, a first signal feature acquisition submodule, and a first signal feature acquisition submodule. The first signal acquisition submodule can be configured to acquire a first signal sequence from the industrial equipment; the first signal array acquisition submodule can be configured to form a first signal array based on time-decimation radix-2 Fast Fourier Transform or inverse radix-2 Fast Fourier Transform according to the first signal sequence, wherein the first signal array includes 2... n There are n signal elements, n≥1; the first signal feature acquisition submodule can be configured to perform the signal processing method described in the aforementioned signal processing method embodiment, reorder the first signal array, and perform time-decimation-based radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform on the reordered first signal array to determine the first signal feature of the industrial equipment; the first monitoring submodule can be configured to monitor the operating status of the industrial equipment based on the first signal feature.

[0177] The second operation monitoring module includes a second signal acquisition submodule, a second signal array acquisition submodule, a second signal feature acquisition submodule, and a second monitoring submodule. The second signal acquisition submodule can be configured to acquire a second signal sequence from the industrial equipment; the second signal array acquisition submodule can be configured to form a second signal array based on the second signal sequence using a radix-2 fast Fourier transform (FFT) or inverse radix-2 FFT; the second signal feature acquisition submodule can be configured to acquire a third signal array obtained by transforming the second signal array using a radix-2 FFT or inverse radix-2 FFT, and then reorder the third signal array using the signal processing method described in the aforementioned signal processing method embodiment to determine the second signal features of the industrial equipment; wherein, the third signal array includes 2... n There are 1 signal element, n≥1; the second monitoring submodule can be configured to monitor the operating status of industrial equipment based on the characteristics of the second signal.

[0178] Those skilled in the art will understand that all or part of the processes in the method of the above embodiment of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable file, or some intermediate form. The computer-readable storage medium can include any entity or device capable of carrying the computer program code, a medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory, a random access memory, an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc. It should be noted that the content included in the computer-readable storage medium can be appropriately added or removed according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable storage medium does not include electrical carrier signals and telecommunication signals.

[0179] Furthermore, the present invention also provides a computer device. In one embodiment of the computer device according to the present invention, the computer device includes a processor and a storage device. The storage device can be configured to store a program for executing the signal processing method or the operation monitoring method of industrial equipment described in the above-described method embodiments. The processor can be configured to execute the program in the storage device, which includes, but is not limited to, the program for executing the signal processing method or the operation monitoring method of industrial equipment described in the above-described method embodiments. For ease of explanation, only the parts related to the embodiments of the present invention are shown. For specific technical details not disclosed, please refer to the method section of the embodiments of the present invention. The computer device can be a control device device comprising various electronic devices. In some embodiments, the computer device can be an embedded computer device, particularly a low-specification embedded computer device with low computing power and small storage space.

[0180] Furthermore, the present invention also provides a computer-readable storage medium. In one embodiment of the computer-readable storage medium according to the present invention, the computer-readable storage medium can be configured to store a program for executing the signal processing method or the operation monitoring method of industrial equipment described in the above-described method embodiments. This program can be loaded and run by a processor to implement the above-described signal processing method or the operation monitoring method of industrial equipment. For ease of explanation, only the parts related to the embodiments of the present invention are shown; for specific technical details not disclosed, please refer to the method section of the embodiments of the present invention. The computer-readable storage medium can be a storage device comprising various electronic devices. Optionally, in the embodiments of the present invention, the computer-readable storage medium is a non-transitory computer-readable storage medium.

[0181] Furthermore, it should be understood that since the various modules are only provided to illustrate the functional units of the device of the present invention, the physical devices corresponding to these modules may be the processor itself, or a part of the processor's software, hardware, or a combination of software and hardware. Therefore, the number of modules shown in the figures is merely illustrative. Those skilled in the art will understand that the various modules in the device can be adaptively split or combined. Such splitting or combining of specific modules will not cause the technical solution to deviate from the principles of the present invention; therefore, the technical solutions after splitting or combining will fall within the protection scope of the present invention.

[0182] The technical solution of the present invention has been described above with reference to one embodiment shown in the accompanying drawings. However, it will be readily understood by those skilled in the art that the scope of protection of the present invention is obviously not limited to these specific embodiments. Without departing from the principles of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions resulting from such changes or substitutions will all fall within the scope of protection of the present invention.

Claims

1. A signal processing method, wherein the signal is any one of a current signal, voltage signal, sound signal, and vibration signal from an industrial device, the method comprising: Obtain the first signal sequence; A first signal array is formed based on the first signal sequence using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform, wherein the first signal array includes... Each signal element ; The first signal array is reordered for use in time-decimation radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform; or, Obtain the second signal sequence; A second signal array is formed based on the second signal sequence using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on frequency decimation. Obtain a third signal array by transforming the second signal array using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on frequency decimation, wherein the third signal array includes... Each signal element ; The third signal array is reordered; The method is characterized in that it further includes reordering the first signal array or the third signal array in the following manner: Step S1: Based on the preset 0th sorted array, determine the 1st to 2nd sorted arrays sequentially using the following methods. A sorted array, wherein the preset 0th sorted array includes one element and the value of the element is 0, the 0th sorted array... The values ​​of the elements in the sorted arrays represent the reordering sequence number of each signal element in the first signal array or the third signal array; Regarding the first The sorted array will be the first one. The elements of the sorted array are concatenated in the first position. The tail of the elements of the sorted array forms the first... There are sorted arrays, where... ; Regarding the first The sorted array will have the first sorted array as described above. Add 1 to each element of the sorted array to form the nth sorted array. A sorted array; Regarding the first The sorted array will be sorted by the first... Multiplying the elements of the sorted array by 2 forms the first element. A sorted array; Step S2: According to the first A sorting array is used to reorder either the first signal array or the third signal array.

2. The signal processing method according to claim 1, characterized in that, According to the above The step of "reordering the first signal array or the third signal array using sorted arrays" specifically includes: By addressing and according to the first The elements in the sorted array are used to reorder either the first signal array or the third signal array.

3. The signal processing method according to claim 2, characterized in that, "Through address addressing and according to the aforementioned first..." The step of "reordering the elements of the sorted array to the first signal array or the third signal array" specifically includes: In the memory of the computer device executing the signal processing method, a reordered array with the same data type and length as the target signal array is declared, wherein the target signal array is either the first signal array or the third signal array; Using the address of the first signal element of the target signal array as the base address, and using the address of the first signal element of the target signal array as the base address, The value of each element in the sorted array is an address offset. Based on the base address and each address offset, the effective address of each element in the reordered array in the target signal array is determined sequentially, and the value of the signal element pointed to by the effective address in the target signal array is used as the value of the corresponding element in the reordered array. The reordered array is used as the reordered signal array.

4. The signal processing method according to claim 3, characterized in that, The computer device is an embedded computer device.

5. A method for monitoring the operation of industrial equipment, characterized in that, The method includes: Obtain the first signal sequence of the industrial equipment; A first signal array is formed based on the first signal sequence using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform, wherein the first signal array includes... Each signal element ; Using the signal processing method of any one of claims 1 to 4, the first signal array is reordered, and the reordered first signal array is subjected to a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on time decimation, in order to determine the first signal characteristics of the industrial equipment. Based on the first signal characteristics, monitor the operating status of the industrial equipment; or, Obtain the second signal sequence of the industrial equipment; A second signal array is formed based on the second signal sequence using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on frequency decimation. Obtain a third signal array by transforming the second signal array using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on frequency decimation, wherein the third signal array includes... Each signal element ; The signal processing method according to any one of claims 1 to 4 is used to reorder the third signal array in order to determine the second signal characteristics of the industrial equipment; The operating status of the industrial equipment is monitored based on the second signal characteristic.

6. A signal processing device, wherein the signal is any one of current signal, voltage signal, sound signal and vibration signal of industrial equipment, and the device includes a first signal processing module and / or a second signal processing module; The first signal processing module includes: The first signal acquisition submodule is configured to acquire a first signal sequence; The first signal array acquisition submodule is configured to form a first signal array based on time-decimation radix-2 Fast Fourier Transform or inverse radix-2 Fast Fourier Transform according to the first signal sequence, wherein the first signal array includes Each signal element ; A first reordering submodule is configured to reorder the first signal array for use in a time-decimation-based radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform. The second signal processing module includes: The second signal acquisition submodule is configured to acquire a second signal sequence; The second signal array acquisition submodule is configured to form a second signal array based on frequency decimation radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform according to the second signal sequence. The third signal array acquisition submodule is configured to acquire a third signal array obtained by transforming the second signal array using a radix-2 Fast Fourier Transform or an inverse radix-2 Fast Fourier Transform based on frequency decimation, wherein the third signal array includes... Each signal element ; The second reordering submodule is configured to reorder the third signal array; The first reordering submodule and the second reordering submodule are further configured to reorder the first signal array or the third signal array respectively in the following ways: Step S1: Based on the preset 0th sorted array, determine the 1st to 2nd sorted arrays sequentially using the following methods. A sorted array, wherein the preset 0th sorted array includes one element and the value of the element is 0, the 0th sorted array... The values ​​of the elements in the sorted arrays represent the reordering sequence number of each signal element in the first signal array or the third signal array; Regarding the first The sorted array will be the first one. The elements of the sorted array are concatenated in the first position. The tail of the elements of the sorted array forms the first... There are sorted arrays, where... ; Regarding the first The sorted array will have the first sorted array as described above. Add 1 to each element of the sorted array to form the nth sorted array. A sorted array; Regarding the first The sorted array will be sorted by the first... Multiplying the elements of the sorted array by 2 forms the first element. A sorted array; Step S2: According to the first A sorting array is used to reorder either the first signal array or the third signal array.

7. An operation monitoring device for industrial equipment, characterized in that, The device includes a first operation monitoring module and / or a second operation monitoring module; The first operation monitoring module includes: A first signal acquisition submodule is configured to acquire a first signal sequence of the industrial equipment; The first signal array acquisition submodule is configured to form a first signal array based on time-decimation radix-2 Fast Fourier Transform or inverse radix-2 Fast Fourier Transform according to the first signal sequence, wherein the first signal array includes Each signal element ; The first signal feature acquisition submodule is configured to use the signal processing method of any one of claims 1 to 4 to reorder the first signal array and perform a time-decimation-based radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform on the reordered first signal array to determine the first signal feature of the industrial equipment. The first monitoring submodule is configured to monitor the operating status of the industrial equipment based on the first signal characteristics; The second operation monitoring module includes: The second signal acquisition submodule is configured to acquire the second signal sequence of the industrial equipment; The second signal array acquisition submodule is configured to form a second signal array based on frequency decimation radix-2 fast Fourier transform or inverse radix-2 fast Fourier transform according to the second signal sequence. The second signal feature acquisition submodule is configured to acquire a third signal array obtained by transforming the second signal array using a radix-2 fast Fourier transform or an inverse radix-2 fast Fourier transform based on frequency decimation, and to reorder the third signal array using the signal processing method of any one of claims 1 to 4 to determine the second signal features of the industrial equipment; wherein, the third signal array includes Each signal element ; The second monitoring submodule is configured to monitor the operating status of the industrial equipment based on the second signal characteristics.

8. A computer device comprising a processor and a storage device, said storage device being adapted to store a plurality of program codes, characterized in that, The program code is adapted to be loaded and run by the processor to perform the signal processing method of any one of claims 1 to 3 or the operation monitoring method of the industrial equipment of claim 5.

9. The computer device according to claim 8, characterized in that, The computer device is an embedded computer device.

10. A computer-readable storage medium storing a plurality of program codes, characterized in that, The program code is adapted to be loaded and run by a processor to perform the signal processing method of any one of claims 1 to 3 or the operation monitoring method of the industrial equipment of claim 5.

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