Polar tunable HEMT based on ScAlN digital alloy and preparation method thereof

By adjusting the combination order and number of ScN and AlN layers, a ScAlN digital alloy barrier layer is formed, which solves the problem of insufficient two-dimensional electron gas concentration at the ScAlN/GaN heterojunction interface. This enables tunable polarization intensity and diversity of two-dimensional electron gas concentration at the ScAlN/GaN heterojunction interface, thereby improving the high-frequency and high-power performance of the device.

CN115458406BActive Publication Date: 2025-11-25XIDIAN UNIV
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202210271020.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-18
Publication Date
2025-11-25
Estimated Expiration
2042-03-18

AI Technical Summary

Technical Problem

In existing technologies, the concentration of two-dimensional electron gas at the ScAlN/GaN heterojunction interface is not high, which limits the application of the device in high-frequency and high-power devices. Furthermore, the ScAlN barrier layer has low tunability under a fixed Sc content, which cannot meet the polarization intensity requirements of different application scenarios.

Method used

By adjusting the combination order and number of ScN and AlN layers in a period of 10 Al(Sc)N layers on the AlN insertion layer, ScAlN digital alloy barrier layers with different polarization intensities and compositions are formed. Combined with the growth of homoepitaxial GaN channel layers, dislocation defects generated by heteroepitaxialization are reduced.

Benefits of technology

This technology enables the generation of two-dimensional electron gases of varying concentrations at the ScAlN/GaN heterojunction interface, enhancing the tunability of the device's polarization intensity, meeting the needs of different application scenarios, and reducing the risk of leakage current.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN115458406B_ABST
    Figure CN115458406B_ABST
Patent Text Reader

Abstract

The application provides a kind of polar tunable HEMT based on ScAlN digital alloy and a preparation method thereof, using MOCVD process on AlN interlayer 3, with 10 Al(Sc)N double layers as a period, by adjusting ScN layer and AlN layer combination order or / and respective layer number, ScN layer and AlN layer are grown, to form ScAlN digital alloy barrier layer 4 with different polarization intensity or / and different components, the application adjusts the combination order of ScN layer and AlN layer to generate two-dimensional electron gas with different concentrations at ScAlN / GaN heterojunction interface, so that ScAlN material has different polarization intensity under the same component; meanwhile, by using homoepitaxial GaN channel layer, the dislocation and other defects generated by heteroepitaxy are reduced, and the leakage is reduced.
Need to check novelty before this filing date? Find Prior Art

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of semiconductors, and particularly relates to a polarization-adjustable HEMT based on a ScAlN digital alloy and a preparation method thereof. BACKGROUND

[0002] 6G communication uses terahertz band signals, and puts forward higher requirements for new generation communication devices in terms of ultrahigh frequency and ultrahigh power. At present, the third generation of semiconductors represented by GaN is developing rapidly. GaN-based heterojunctions have broad application prospects in high-temperature, high-frequency and high-power devices due to good high-temperature resistance and the generation of high-concentration and high-electron-mobility two-dimensional electron gas by polarization. GaN-based HEMT becomes a high-frequency and high-power electronic device that is expected to realize 6G communication technology due to its large band gap, high breakdown field strength and high electron mobility, and has great market application value.

[0003] REFERENCE Figure 1 In the prior art, a ScAlN / GaN high electron mobility transistor using a ScAlN material with a Sc content of 15% to 20% as a barrier layer includes, from bottom to top, a substrate, a nucleation layer, a GaN channel layer, an AlN insertion layer and a barrier layer, wherein the barrier layer adopts a ScyAl1-yN material with a Sc component y of 15%-20% and a thickness of 1nm-30nm.

[0004] Since the high-frequency and high-power requirements of the device are related to the two-dimensional electron gas concentration at the ScAlN / GaN heterojunction interface, and the two-dimensional electron gas concentration at the ScAlN / GaN heterojunction interface in the prior art is not high, the application of the device in high-frequency and high-power devices is limited. The adjustable dimension of the ScAlN barrier layer grown by molecular beam epitaxy in the device in the prior art is low at a fixed Sc content, and cannot meet the different requirements of polarization intensity in different use scenarios. SUMMARY

[0005] In order to solve the above problems existing in the prior art, the application provides a polarization-adjustable HEMT based on a ScAlN digital alloy and a preparation method thereof. The technical problem to be solved by the application is solved by the following technical scheme:

[0006] In a first aspect, the application provides a preparation method of a polarization-adjustable HEMT based on a ScAlN digital alloy, which comprises the following steps:

[0007] Step one: obtaining a GaN substrate 1;

[0008] Step two: using a MOCVD process to homoepitaxially grow a GaN channel layer 2 on the GaN substrate 1;

[0009] Step three: depositing AlN interlayer 3 on GaN channel layer 2 using MOCVD process;

[0010] Step four: growing ScN layer and AlN layer by adjusting ScN layer and AlN layer combination order or / and respective layer number with 10 Al(Sc)N layers as a period on AlN interlayer 3 to form ScAlN digital alloy barrier layer 4 with different polarization strength or / and different component;

[0011] Wherein, the multiple of the number of AlN layers and the number of ScN layers determines the Sc component size in ScAlN digital alloy barrier layer 4, and the distance between ScN layers in the combination order determines the polarization strength of ScAlN digital alloy barrier layer 4;

[0012] Step five: growing GaN cap layer 5 on ScAlN digital alloy barrier layer 4 using MOCVD process;

[0013] Step six: growing SiN passivation layer 6 on GaN cap layer 5 using ALD process;

[0014] Step seven: making a mask on SiN passivation layer 6, and growing metal W as gate electrode 10 on SiN passivation layer 6 using electron beam evaporation technology;

[0015] Step eight: making a mask on SiN passivation layer 6, and removing SiN passivation layer 6 inward from the left and right edges respectively using RIE dry etching technology, and implanting Si ions into the two ohmic contact areas where SiN passivation layer 6 is removed using ion implantation technology to form source ohmic contact 7 and drain ohmic contact 8;

[0016] Step nine: depositing Ti / Al / Ni / Au metal combination as source 9 and drain 11 respectively on the two ohmic contact areas using electron beam evaporation technology.

[0017] Wherein, the range of Sc component in step four is 10%-40%. The thickness of GaN channel layer 2 is 30-300nm; the thickness of AlN interlayer 3 is 1-4nm; the thickness of ScAlN digital alloy barrier layer 4 is 10-50nm; the thickness of GaN cap layer 5 is 1-10nm; the thickness of SiN passivation layer 6 is 10-30nm.

[0018] Optionally, removing SiN passivation layer 6 with a width of 1um inward from the left and right edges in step seven. The process conditions for homoepitaxial growth of GaN channel layer 2 in step two are: temperature 1000℃, pressure 300Torr, gallium source flow 100sccm, ammonia flow 20000sccm, hydrogen flow 40000sccm.

[0019] Optionally, the process condition for depositing the AlN interlayer 3 in step three is: temperature 1050℃, pressure 50 Torr, aluminum source flow rate 20sccm, ammonia flow rate 15000sccm, and hydrogen flow rate 25000sccm.

[0020] Optionally, the process condition for growing the ScN layer and the AlN layer in step four is: temperature 1300℃, pressure 50 Torr, Sc source flow rate 15sccm, Al source flow rate 40sccm, ammonia flow rate 20000sccm, and hydrogen flow rate 30000sccm.

[0021] Optionally, the process condition for growing the GaN cap layer 5 in step five is: temperature 1050℃, pressure 50 Torr, gallium source flow rate 100sccm, ammonia flow rate 20000sccm, and hydrogen flow rate 30000sccm.

[0022] Optionally, the process condition for generating the metal W as the gate electrode 10 in step seven is: vacuum degree less than 3.5*10 -4 Pa, power 500W, and evaporation rate 1Å / s.

[0023] In a second aspect, the present application provides a polarization-adjustable HEMT based on ScAlN digital alloy, which is prepared by the preparation method in the first aspect.

[0024] The present application provides a polarization-adjustable HEMT based on ScAlN digital alloy and a preparation method thereof, which grows the ScN layer and the AlN layer by adjusting the combination order of the ScN layer and the AlN layer or / and the number of layers of each of the ScN layer and the AlN layer, forms the ScAlN digital alloy barrier layer 4 with different polarization strengths or / and different components, and uses the MOCVD process on the AlN interlayer 3 with 10 Al(Sc)N double layers as a period.

[0025] The present application will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 is a structure diagram of a traditional ScAlN / GaN high electron mobility transistor;

[0027] Figure 2 is a flowchart of a preparation method of a polarization-adjustable HEMT based on ScAlN digital alloy provided by an embodiment of the present application;

[0028] Figure 3 is a schematic diagram of 30 kinds of ScAlN digital alloys provided by an embodiment of the present application;

[0029] Figure 4 is a schematic diagram of a digital alloy atom with a period thickness of 2.6 nm provided by an embodiment of the present application;

[0030] Figure 5 is a schematic diagram of a polarization strength of a ScAlN digital alloy structure under a Sc component of 10%-40% provided by an embodiment of the present application;

[0031] Figure 6 is a process schematic diagram of a preparation method of a polarization-adjustable HEMT based on a ScAlN digital alloy provided by an embodiment of the present application;

[0032] Figure 7 is a structure schematic diagram of a polarization-adjustable HEMT based on a ScAlN digital alloy provided by an embodiment of the present application. DETAILED DESCRIPTION

[0033] The present application will be further described in detail below with specific embodiments, but the embodiments of the present application are not limited thereto.

[0034] As shown in Figure 2 , the preparation method of a polarization-adjustable HEMT based on a ScAlN digital alloy provided by the present application comprises:

[0035] Step one: obtaining a GaN substrate 1;

[0036] Step two: using a MOCVD process to grow a GaN channel layer 2 on the GaN substrate 1 by homoepitaxy;

[0037] The process conditions for growing the GaN channel layer 2 by homoepitaxy in step two are: a temperature of 1000℃, a pressure of 300 Torr, a gallium source flow of 100 sccm, an ammonia flow of 20000 sccm, and a hydrogen flow of 40000 sccm.

[0038] Step three: using a MOCVD process to deposit an AlN insertion layer 3 on the GaN channel layer 2;

[0039] The process conditions for depositing the AlN insertion layer 3 in step three are: a temperature of 1050℃, a pressure of 50 Torr, an aluminum source flow of 20 sccm, an ammonia flow of 15000 sccm, and a hydrogen flow of 25000 sccm.

[0040] Step four: using MOCVD process to grow ScN layer and AlN layer on AlN insertion layer 3 with 10 Al(Sc)N layers as a period by adjusting ScN layer and AlN layer combination order or / and respective layer number, forming ScAlN digital alloy barrier layer 4 with different polarization strength or / and different components;

[0041] Wherein, the multiple of the number of AlN layers and the number of ScN layers determines the Sc component size in ScAlN digital alloy barrier layer 4, and the distance between ScN layers in the combination order determines the polarization strength of ScAlN digital alloy barrier layer 4; the range of Sc component is 10%-40%.

[0042] It is worth noting that the higher the multiple, the smaller the Sc component, and the percentage of the number of ScN layers in the number of layers of ScAlN digital alloy barrier layer 4 is the value of the Sc component. The larger the distance between ScN layers, i.e. the larger the distance between ScN layers after replacing AlN layers with other ScN layers, the lower the polarization strength.

[0043] The process conditions for alternately growing at least one ScN double layer and multiple AlN double layers in step four are: temperature 1300℃, pressure 50Torr, Sc source flow 15sccm, Al source flow 40sccm, ammonia flow 20000sccm, hydrogen flow 30000sccm.

[0044] Reference Figure 3 The ScAlN digital alloy with 10 Al(Sc)N double layers as a period and Sc content of 10% to 40% contains 30 structures, the polarization strength of different Sc components is different, and different digital alloy structures under the same component also produce different polarization. Reference Figure 4 , Figure 4 The digital alloy atom schematic diagram in the period thickness of 2.6nm contains 20 layers of atoms or 10 layers of AlN. The structure in the figure represents ScAlN alloy with Sc component of 0.4, numbered "1247", representing "1", "2", "4", "7" layers of Al atoms replaced by Sc.

[0045] Reference Figure 5 , Figure 5 is the simulation calculation result of the polarization strength of the digital alloy barrier layer with the component, the arrangement of atoms in the period, its 5(a)- (d) respectively represent the cases of Sc component of 0.1, 0.2, 0.3, 0.4. The specific description is as follows: Figure 5

[0046] For Sc component of 0.1, there is only one case, i.e. any 1 layer of 10 Al atom layers is replaced by Sc, and the polarization strength of the digital alloy is about 1.9 C / m 2 ​; for Sc component of 0.2, any 2 layers of 10 Al atomic layers are replaced by Sc, so there are 5 cases in total, i.e. 1, 2 layers, 1, 3 layers, 1, 4 layers, 1, 5 layers, 1, 6 layers. It can be seen that with the increase of the distance of two Sc layers, the polarization strength of the alloy is continuously reduced from 2.52 to 1.60 C / m 2 . 0.3 component and 0.4 component and so on.

[0047] From Figure 5 , it can be clearly seen that with different components, the polarization strength of the system can be changed, and here it can be seen that under the same component, the ratio of Sc and Al is fixed, and by setting different combination modes of ScN and AlN layers, a large range of polarization strength can be achieved, realizing the multi-purpose demand of ScAlN / GaN HEMT under the same Sc component.

[0048] Step five: growing GaN cap layer 5 on ScAlN digital alloy barrier layer 4 using MOCVD process;

[0049] The process conditions for growing GaN cap layer 5 in step five are: temperature 1050℃, pressure 50 Torr, gallium source flow 100sccm, ammonia flow 20000sccm, hydrogen flow 30000sccm.

[0050] Step six: growing SiN passivation layer 6 on GaN cap layer 5 using ALD process;

[0051] Step seven: making a mask on SiN passivation layer 6, and growing metal W as gate electrode 10 on SiN passivation layer 6 using electron beam evaporation technology;

[0052] The process conditions for generating metal W as gate electrode 10 in step seven are: vacuum degree less than 3.5*10 -4 Pa, power 500W, evaporation rate 1Å / s.

[0053] Step eight: making a mask on SiN passivation layer 6, and using RIE dry etching technology to remove SiN passivation layer 6 inward from the left and right edges respectively, and using ion implantation technology to implant Si ions into the two ohmic contact areas where SiN passivation layer 6 is removed, forming source ohmic contact 7 and drain ohmic contact 8;

[0054] In this step eight, SiN passivation layer 6 with a width of 1um inward from the left and right edges is removed.

[0055] Step nine: using electron beam evaporation technology to deposit Ti / Al / Ni / Au metal combination as source 9 and drain 11 respectively on the top of the two ohmic contacts.

[0056] Among them, GaN channel layer 2 has a thickness of 30-300nm; AlN insertion layer 3 has a thickness of 1-4nm; ScAlN digital alloy barrier layer 4 has a thickness of 10-50nm; GaN cap layer 5 has a thickness of 1-10nm; and SiN passivation layer 6 has a thickness of 10-30nm.

[0057] This invention provides a polarization-tunable HEMT based on ScAlN digital alloy and its preparation method. Using MOCVD, ScN and AlN layers are grown on an AlN insertion layer 3 in periods of 10 Al(Sc)N bilayers. By adjusting the combination order and / or the number of each ScN and AlN layer, ScAlN digital alloy barrier layers 4 with different polarization intensities and / or different compositions are formed. This invention generates two-dimensional electron gases of different concentrations at the ScAlN / GaN heterojunction interface by adjusting the combination order of the ScN and AlN layers, thus enabling the ScAlN material to have different polarization intensities under the same composition. Simultaneously, a homoepitaxial GaN channel layer is used to reduce defects such as dislocations generated by heteroepitaxial growth, thereby reducing leakage current.

[0058] refer to Figure 6 The present invention illustrates the preparation process by way of examples.

[0059] Example 1:

[0060] Creating Sc 0.2 Al 0.8 High electron mobility transistor with N-digital alloy barrier layer

[0061] Step 1, as follows Figure 6 As shown in (a), a 200 nm GaN channel layer was homoepitaxially formed on a GaN substrate using MOCVD process. The process conditions were: temperature 1000℃, pressure 300 Torr, gallium source flow rate 100 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0062] Step 2, as follows Figure 6 As shown in (b), a 2 nm AlN insertion layer was deposited on the GaN channel layer using MOCVD process. The process conditions were: temperature 1050℃, pressure 50 Torr, aluminum source flow rate 20 sccm, ammonia flow rate 15000 sccm, and hydrogen flow rate 25000 sccm.

[0063] Step 3, as follows Figure 6(c) As shown, using MOCVD process, one ScN bilayer and four AlN bilayers are alternately grown on the AlN interlayer, short long period mixed growth forms a 20 nm thick ScAlN digital alloy barrier layer, process conditions are: temperature 1300℃, pressure 50 Torr, Sc source flow 15 sccm, Al source flow 40 sccm, ammonia flow 20000 sccm, hydrogen flow 30000 sccm;

[0064] Step 4, as shown in Figure 6 (d) As shown, using MOCVD process, a 1 nm GaN cap layer is grown on the ScAlN digital alloy barrier layer, process conditions are: temperature 1050℃, pressure 50 Torr, gallium source flow 100 sccm, ammonia flow 20000 sccm, hydrogen flow 30000 sccm;

[0065] Step 5, as shown in Figure 6 (e) As shown, using ALD process, a 10 nm SiN passivation layer is grown on the GaN cap layer;

[0066] Step 6, as shown in Figure 6 (f) As shown, the gate electrode is made. A mask is made on the SiN passivation layer, using electron beam evaporation technology, metal W is grown on the SiN passivation layer 6 as the gate electrode, the thickness of the metal is 500 nm, process conditions are: vacuum degree less than 3.5*10 -4 Pa, power 500 W, evaporation rate 1Å / s;

[0067] Step 7, as shown in Figure 6 (g) As shown, the ohmic contact groove is dry etched. A mask is made on the SiN passivation layer, using RIE dry etching technology, the SiN passivation layer with a width of 1um inward from the left and right edges is removed respectively;

[0068] Step 8, as shown in Figure 6 (h) As shown, using ion implantation technology, Si ions with a dose of 1×10 20 cm -3 are implanted into the ohmic contact area shown, forming the source and drain ohmic contacts;

[0069] Step 9, as shown in Figure 6 (i) As shown, using electron beam evaporation technology, Ti / Al / Ni / Au metal combination with thickness of 0.02um / 0.05um / 0.03um / 0.03um is respectively deposited on the two ohmic contacts as the source and drain, after growth, annealing in nitrogen atmosphere at 830℃ for 45s, the growth process conditions are: vacuum degree less than 3.5*10 -4 Pa, power 500 W, evaporation rate 1Å / s. The structure formed is shown in Figure j.

[0070] Example two:

[0071] Creating Sc 0.2 Al 0.8 High electron mobility transistor with N-digital alloy barrier layer;

[0072] Step 1, as follows Figure 6 As shown in (a), a 200 nm GaN channel layer was homoepitaxially formed on a GaN substrate using MOCVD process. The process conditions were: temperature 1000℃, pressure 300 Torr, gallium source flow rate 100 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 40000 sccm.

[0073] Step 2, as follows Figure 6 As shown in (b), a 2 nm AlN insertion layer was deposited on the GaN channel layer using MOCVD process. The process conditions were: temperature 1050℃, pressure 50 Torr, aluminum source flow rate 20 sccm, ammonia flow rate 15000 sccm, and hydrogen flow rate 25000 sccm.

[0074] Step 3, as follows Figure 6 As shown in (c), two ScN bilayers and eight AlN bilayers were alternately grown on the AlN insertion layer using MOCVD process, and a 20 nm thick ScAlN digital alloy barrier layer was formed by mixed growth of short and long periods. The process conditions were: temperature 1300℃, pressure 50 Torr, Sc source flow rate 15 sccm, Al source flow rate 40 sccm, ammonia flow rate 20000 sccm, hydrogen flow rate 30000 sccm.

[0075] Step 4, as follows Figure 6 As shown in (d), a 1 nm GaN cap layer was grown on the ScAlN digital alloy barrier layer using MOCVD process. The process conditions were: temperature 1050℃, pressure 50 Torr, gallium source flow rate 100 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 30000 sccm.

[0076] Step 5, as follows Figure 6 As shown in (e), a 10 nm SiN passivation layer is grown on the GaN cap layer using the ALD process;

[0077] Step 6, as follows Figure 6 As shown in (f), the gate electrode is fabricated. A mask is fabricated on the SiN passivation layer, and metal W is grown on the SiN passivation layer 6 as the gate electrode using electron beam evaporation. The metal thickness is 500 nm, and the process conditions are: vacuum degree less than 3.5 × 10⁻⁶. -4 Pa, power 500W, evaporation rate 1Å / s;

[0078] Step 7, as follows Figure 6As shown in (g), the ohmic contact groove is dry etched to create a mask on the SiN passivation layer. The 1µm width of the SiN passivation layer from the left and right edges is removed by RIE dry etching technology.

[0079] Step 8, as follows Figure 7 As shown in (h), an ion implantation technique was used to implant a dose of 1 × 10⁻⁶ into the ohmic contact region illustrated. 20 cm -3 Si ions form source-drain ohmic contacts;

[0080] Step 9, as follows Figure 7 As shown in Figure (i), Ti / Al / Ni / Au metal composites with thicknesses of 0.02 μm / 0.05 μm / 0.03 μm / 0.03 μm were deposited directly above the two ohmic contacts using electron beam evaporation as the source and drain, respectively. After growth, the metals were annealed at 830 °C for 45 s in a nitrogen atmosphere. The growth process conditions were: vacuum degree less than 3.5 × 10⁻⁶. -4 Pa, power 500W, evaporation rate 1Å / s.

[0081] like ​ As shown, the present invention provides a polarization-tunable HEMT based on ScAlN digital alloy, which is prepared using the preparation method of ScAlN digital alloy-based polarization-tunable HEMT.

[0082] Reference ​ The polarization-tunable high electron mobility transistor based on digital alloy ScAlN / GaN heterojunction of the present invention includes, from bottom to top, a GaN substrate 1, a GaN channel layer 2, an insertion layer 3, a barrier layer 4, a cap layer 5, a passivation layer 6, and gate, source, and drain electrodes.

[0083] The ScAlN digital alloy barrier layer has different polarization intensities with the same Sc composition but different digital alloy structures. The ScAlN digital alloy contains 30 structures with 10 Al(Sc)N bilayers as the period and Sc content ranging from 10% to 40%. There are heavily doped regions on both sides of the ScAlN digital alloy barrier layer 2 to the SiN passivation layer 6, which form ohmic contacts with the source and drain electrodes.

[0084] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A method for preparing a polarization-tunable HEMT based on ScAlN digital alloy, characterized in that, include: Step 1: Obtain the GaN substrate (1); Step 2: Homoeically grow a GaN channel layer (2) on a GaN substrate (1) using MOCVD process; Step 3: Deposit an AlN insertion layer (3) on the GaN channel layer (2) using MOCVD process; Step 4: Using MOCVD process, ScN and AlN layers are grown on the AlN insertion layer (3) in a period of 10 Al(Sc)N layers by adjusting the combination order of ScN and AlN layers or / and the number of their respective layers, to form ScAlN digital alloy barrier layers (4) with different polarization intensities or / and different compositions. The ratio of the number of AlN layers to the number of ScN layers determines the size of the Sc component in the ScAlN digital alloy barrier layer (4), and the distance between the ScN layers in the combination order determines the polarization intensity of the ScAlN digital alloy barrier layer (4). Step 5: Use MOCVD process to grow GaN cap layer (5) on ScAlN digital alloy barrier layer (4); Step 6: Use ALD process to grow SiN passivation layer (6) on GaN cap layer (5); Step 7: Fabricate a mask on the SiN passivation layer (6) and grow metal W on the SiN passivation layer (6) as a gate electrode (10) using electron beam evaporation technology. Step 8: Fabricate a mask on the SiN passivation layer (6), use RIE dry etching technology to remove the SiN passivation layer (6) from the left and right edges inward, and use ion implantation technology to implant Si ions into the two ohmic contact regions where the SiN passivation layer (6) has been removed to form the source ohmic contact (7) and the drain ohmic contact (8). Step 9: Use electron beam evaporation to deposit Ti / Al / Ni / Au metal combinations directly above the two ohmic contacts as the source (9) and drain (11), respectively.

2. The method for preparing a polarization-tunable HEMT according to claim 1, characterized in that, In step four, the Sc component ranges from 10% to 40%.

3. The method for preparing a polarization-tunable HEMT according to claim 1, characterized in that, The GaN channel layer (2) has a thickness of 30-300 nm; the AlN insertion layer (3) has a thickness of 1-4 nm; the ScAlN digital alloy barrier layer (4) has a thickness of 10-50 nm; the GaN cap layer (5) has a thickness of 1-10 nm; and the SiN passivation layer (6) has a thickness of 10-30 nm.

4. The method for preparing a polarization-tunable HEMT according to claim 1, characterized in that, In step seven, the 1µm wide SiN passivation layer on the left and right edges is removed (6).

5. The method for preparing a polarization-tunable HEMT according to claim 1, characterized in that, The process conditions for homoepitaxial growth of GaN channel layer (2) in step 2 are: temperature 1000℃, pressure 300Torr, gallium source flow rate 100sccm, ammonia flow rate 20000sccm, and hydrogen flow rate 40000sccm.

6. The method for preparing a polarization-tunable HEMT according to claim 1, characterized in that, The process conditions for depositing the AlN insertion layer (3) in step 3 are: temperature 1050℃, pressure 50 Torr, aluminum source flow rate 20 sccm, ammonia flow rate 15000 sccm, and hydrogen flow rate 25000 sccm.

7. The method for preparing a polarization-tunable HEMT according to claim 1, characterized in that, The process conditions for growing the ScN and AlN layers in step four are: temperature 1300℃, pressure 50 Torr, Sc source flow rate 15 sccm, Al source flow rate 40 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 30000 sccm.

8. The method for preparing a polarization-tunable HEMT according to claim 1, characterized in that, The process conditions for growing the GaN cap layer (5) in step five are: temperature 1050℃, pressure 50 Torr, gallium source flow rate 100 sccm, ammonia flow rate 20000 sccm, and hydrogen flow rate 30000 sccm.

9. The method for preparing a polarization-tunable HEMT according to claim 1, characterized in that, The process conditions for generating metal W as the gate electrode (10) in step seven are: vacuum degree less than 3.5*10 -4 Pa, power 500W, evaporation rate 1Å / s.

10. A polarization-tunable HEMT based on ScAlN digital alloy, characterized in that, Prepared using the preparation method according to any one of claims 1 to 9.

Citation Information

Patent Citations

  • Semiconductor device

    CN108615756A

  • Nitride high electron mobility transistor and manufacturing method thereof

    CN113314590A