A semiconductor chip manufacturing apparatus and a repair method

Abstract

The application provides a semiconductor chip manufacturing equipment and a repairing method, which comprises a rack, a wire slot, a control interface, a first guide rail, a second guide rail, a wire binding base, a chemical vapor deposition device, a wire binding head and a tension testing device; the wire binding base, the first guide rail and the chemical vapor deposition device are fixed on the rack, the second guide rail is slidingly arranged on the first guide rail, the wire binding head is slidingly arranged on the second guide rail, one end of the wire slot is arranged at one end of the first guide rail, the other end of the wire slot is arranged on the rack, the control interface is fixed on the rack, the tension testing device is arranged on the wire binding base, the chemical vapor deposition device is used for repairing a semi-finished semiconductor chip, and the control interface is electrically connected with the first guide rail, the second guide rail, the chemical vapor deposition device, the wire binding head and the tension testing device respectively. The application has the advantages of convenient chip surface defect detection and repair, strong chip voltage resistance and high reliability.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor chip, and particularly relates to a manufacturing device and a repairing method of semiconductor chip. BACKGROUND

[0002] The semiconductor circuit, namely, a module intelligent power system (MIPS), not only integrates power switching devices and driving circuits together, but also internally contains fault detection circuits of overvoltage, overcurrent and overheat, and can send detection signals to a CPU or a DSP for interrupt processing. The MIPS is composed of high-speed low-power consumption dies, optimized gate-level driving circuits and fast protection circuits. Even if a load accident or improper use occurs, the MIPS itself can not be damaged. The MIPS generally uses IGBT as a power switching element, and internally contains an integrated structure of a current sensor and a driving circuit.

[0003] The existing MIPS module intelligent power system IC driving control circuit, MIPS sampling amplification circuit and PFC current protection circuit and other low-voltage control circuits and high-voltage semiconductor circuits of an inverter circuit layout are on the same board. At the same time, the existing MIPS module intelligent power system only integrates a single MIPS module, and has not realized the integration of multiple MIPS module intelligent power systems. In the face of market miniaturization and low-cost competition, higher requirements are put forward for the high integration and high heat dissipation technology of the MIPS module intelligent power system, and higher requirements are put forward for the chip surface withstand voltage and the reliability of the chip operation. SUMMARY

[0004] In view of the above related technical problems, the present application provides a semiconductor chip manufacturing device and a repairing method which are convenient for chip surface defect detection and repair, improve the chip withstand voltage and reliability.

[0005] In order to solve the above technical problems, in a first aspect, an embodiment of the present application provides a semiconductor chip manufacturing device, comprising: a rack, a wire slot, a control interface, a first guide rail, a second guide rail, a wire binding base, a chemical vapor deposition device, a wire binding head and a tension test device.

[0006] The wire binding base, the first guide rail, and the chemical vapor deposition device are fixed to the frame. The second guide rail is slidably disposed on the first guide rail. The wire binding head is slidably disposed on the second guide rail. One end of the wire groove is disposed on one end of the first guide rail, and the other end of the wire groove is disposed on the frame. The control interface is fixed to the frame. The tensile testing device is disposed on the wire binding base. The chemical vapor deposition device is used to repair semi-finished semiconductor chips. The control interface is electrically connected to the first guide rail, the second guide rail, the chemical vapor deposition device, the wire binding head, and the tensile testing device.

[0007] Preferably, the first guide rail includes two oppositely arranged rails, and the wire groove includes two wire grooves, each of which is disposed at one end of the two first guide rails, and the two ends of the second guide rail are slidably disposed on the two first guide rails.

[0008] Preferably, the first guide rail is used to realize the Y-axis movement of the binding head, and the second guide rail is used to realize the X-axis movement of the binding head.

[0009] Preferably, the semiconductor chip manufacturing equipment further includes a connecting block, one end of which is slidably disposed on the second guide rail, and the binding wire head is fixedly disposed at the other end of the connecting block.

[0010] Preferably, the chemical vapor deposition apparatus comprises two oppositely arranged devices, on which a plurality of the semi-finished semiconductor chips are placed.

[0011] Preferably, the semiconductor chip manufacturing equipment further includes a protective ring fixed to the frame, and the chemical vapor deposition apparatus is disposed within the protective ring.

[0012] Preferably, the control interface includes a display screen and multiple buttons located on both sides of the display screen.

[0013] Preferably, the display screen is an LED display screen.

[0014] Preferably, the frame is further provided with multiple adjusting columns for adjusting the level of the frame.

[0015] Secondly, embodiments of the present invention also provide a method for repairing a semiconductor chip, the method comprising the following steps:

[0016] S1. Mounting components on a metal substrate: Place the finished metal substrate into a special carrier, and use an automatic die bonding device to mount the semiconductor inverter circuit chip onto the component mounting position reserved in the copper foil circuit layer of the finished metal substrate by brushing solder paste or applying silver glue.

[0017] S2. Manufacturing semi-finished components: High-voltage power devices are mounted onto silver-plated copper heat sinks using a soft solder die bonder to form semi-finished components.

[0018] S3. Automatic placement of components: Resistors, capacitors, and semi-finished components are placed into the component mounting positions using an automatic placement SMT equipment.

[0019] S4. Component soldering: The lead frame is placed on the corresponding soldering position on the metal substrate by a robot or manually, and all components are soldered to the corresponding mounting position by a reflow oven.

[0020] S5. Welding quality inspection: The welding quality of components is inspected using visual inspection AOI equipment;

[0021] S6. Remove residual debris: Remove flux and aluminum shavings remaining on the metal substrate by spraying and ultrasonic cleaning.

[0022] S7. Bonding line processing: The semiconductor chip manufacturing equipment is used to first bond lines to the chip surface, so that the semiconductor chip and the circuit wiring form an electrical connection;

[0023] S8. Tensile test process: Select a specific batch or a specific number of semiconductor chips through the first guide rail and the second guide rail, transport them to the tensile test device, bind them with metal wires, and then perform tensile tests.

[0024] S9. Chip Surface Inspection and Repair: The passivation layer on the surface of the semiconductor chip is inspected and repaired using a chemical vapor deposition device;

[0025] S10. Packaging and Marking: The metal substrate is encapsulated using packaging equipment, and then the product is marked using laser marking.

[0026] S11, Stress Relief Treatment: Post-curing stress relief treatment of the product is carried out in a high-temperature oven;

[0027] S12. Cut off the lead connecting ribs: The connecting ribs and dummy leads of the lead are cut off and shaped into the required shape using a rib cutting and forming equipment. Finally, after electrical parameter testing, the final qualified product is formed.

[0028] S13. Install the heat sink: Install the paper heat sink base onto the semiconductor circuit using screws to achieve a tight fit between the heat sink and the heat dissipation surface of the semiconductor circuit, forming the final product.

[0029] Compared with related technologies, this invention fixes the wire binding base, the first guide rail, and the chemical vapor deposition device to the frame; the second guide rail is slidably disposed on the first guide rail; the wire binding head is slidably disposed on the second guide rail; one end of the wire groove is disposed on one end of the first guide rail; the other end of the wire groove is disposed on the frame; the control interface is fixed to the frame; the tensile testing device is disposed on the wire binding base; the chemical vapor deposition device is used to repair semi-finished semiconductor chips; and the control interface is electrically connected to the first guide rail, the second guide rail, the chemical vapor deposition device, the wire binding head, and the tensile testing device, respectively; the first guide rail, the second guide rail, the chemical vapor deposition device, the wire binding head, and the tensile testing device are controlled through the control interface. The guide rail and the second guide rail are adjusted to place the wire bonding head above the corresponding wire bonding base to bond the semi-finished chip. A tensile testing device is used to test the adhesion between the metal wire and the chip surface after the metal wire is bonded. A chemical vapor deposition device is used to repair the passivation layer defects on the chip surface. This allows the obtained semiconductor chip to not only achieve wire bonding on the chip surface, but also to be compatible with chip surface defect identification, repair of chip surface defects, and tensile testing of the bonding wire. This makes the detection and repair of semiconductor chip surface defects convenient, and the chip has strong voltage resistance and high reliability. Attached Figure Description

[0030] The present invention will now be described in detail with reference to the accompanying drawings. The above and other aspects of the present invention will become clearer and more readily understood through the detailed description following the accompanying drawings. In the drawings:

[0031] Figure 1 This is a schematic diagram of the overall structure of the semiconductor chip manufacturing equipment of the present invention;

[0032] Figure 2 This is a front view of the semiconductor chip manufacturing equipment of the present invention;

[0033] Figure 3 This is a left view of the semiconductor chip manufacturing equipment of the present invention;

[0034] Figure 4 This is a top view of the semiconductor chip manufacturing equipment of the present invention;

[0035] Figure 5 This is a flowchart of the semiconductor chip repair method of the present invention.

[0036] In the diagram, 1. Wire trough, 2. Control interface, 3. First guide rail, 4. Second guide rail, 5. Wire binding base, 6. Chemical vapor deposition device, 7. Semi-finished semiconductor chip, 8. Wire binding end, 9. Tensile testing device, 10. Frame, 11. Adjustment column, 12. Display screen, 13. Button, 14. Connecting block, 15. Protective ring. Detailed Implementation

[0037] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0038] The specific embodiments / examples described herein are specific implementations of the present invention, used to illustrate the concept of the invention, and are illustrative and exemplary, and should not be construed as limiting the implementation methods or scope of the present invention. In addition to the embodiments described herein, those skilled in the art can employ other obvious technical solutions based on the content disclosed in the claims and specification of this application. These technical solutions include those that make any obvious substitutions and modifications to the embodiments described herein, all of which are within the protection scope of the present invention.

[0039] Please refer to Figures 1-4 As shown, where, Figure 1 This is a schematic diagram of the overall structure of the semiconductor chip manufacturing equipment of the present invention; Figure 2 This is a front view of the semiconductor chip manufacturing equipment of the present invention; Figure 3 This is a left view of the semiconductor chip manufacturing equipment of the present invention; Figure 4 This is a top view of the semiconductor chip manufacturing equipment of the present invention.

[0040] Example 1

[0041] This invention provides a semiconductor chip manufacturing apparatus, comprising: a frame 10, a wire channel 1, a control interface 2, a first guide rail 3, a second guide rail 4, a wire bonding base 5, a chemical vapor deposition apparatus 6, a wire bonding head 8, and a tensile testing device 9. The frame 10 is used to mount the wire channel 1, control interface 2, first guide rail 3, second guide rail 4, wire bonding base 5, chemical vapor deposition apparatus 6, and tensile testing device 9, etc., and provides good support. The wire channel 1 protects the connecting wires between the equipment and the control system, preventing the wires from being exposed. The second guide rail 4 slides easily on the first guide rail 3. The control interface 2 displays all parameters of the manufacturing equipment and allows direct operation of the equipment via the interface. The wire bonding head 8 is fixed to the second guide rail 4 and is used for connecting metal wires on the surface of semiconductor circuit chips to achieve electrical connections between semiconductor chips. The tensile testing device 9 is used to test the adhesion between the metal wires and the chip surface after the metal wires are bonded to the chip surface.

[0042] The wire-binding base 5, the first guide rail 3, and the chemical vapor deposition device 6 are fixed to the frame 10. The second guide rail 4 is slidably disposed on the first guide rail 3. The wire-binding head 8 is slidably disposed on the second guide rail 4. One end of the wire groove 1 is disposed on one end of the first guide rail 3, and the other end of the wire groove 1 is disposed on the frame 10. The control interface 2 is fixed to the frame 10. The tensile testing device 9 is disposed on the wire-binding base 5. The chemical vapor deposition device 6 is used to repair the semi-finished semiconductor chip 7. The control interface 2 is electrically connected to the first guide rail 3, the second guide rail 4, the chemical vapor deposition device 6, the wire-binding head 8, and the tensile testing device 9. The semi-finished semiconductor chip 7 is a semiconductor circuit chip to be wire-bound or repaired.

[0043] Specifically, the wire binding base 5, the first guide rail 3, and the chemical vapor deposition device 6 are fixed to the frame 10. The second guide rail 4 is slidably mounted on the first guide rail 3. The wire binding head 8 is slidably mounted on the second guide rail 4. One end of the wire groove 1 is mounted on one end of the first guide rail 3, and the other end of the wire groove 1 is mounted on the frame 10. The control interface 2 is fixed to the frame 10. The tensile testing device 9 is mounted on the wire binding base 5. The chemical vapor deposition device 6 is used to repair the semi-finished semiconductor chip 7. The control interface 2 is electrically connected to the first guide rail 3, the second guide rail 4, the chemical vapor deposition device 6, the wire binding head 8, and the tensile testing device 9, respectively. The interface 2 controls the first guide rail 3 and the second guide rail 4 to adjust the wire bonding head 8 to the corresponding wire bonding base 5 to bond the semi-finished chip. The tensile testing device 9 is used to test the adhesion between the metal wire and the chip surface after the metal wire is bonded. The chemical vapor deposition device 6 is used to repair the passivation layer defects on the chip surface. This allows the obtained semiconductor chip to not only achieve wire bonding on the chip surface, but also to be compatible with chip surface defect identification, repair of chip surface defects, and tensile testing of the bonding wire. This makes the detection and repair of semiconductor chip surface defects convenient, and the chip has strong voltage resistance and high reliability.

[0044] In this embodiment, the first guide rail 3 includes two oppositely arranged rails, and the wire groove 1 includes two wire grooves 1, each of which is disposed at one end of one of the two first guide rails 3. The two ends of the second guide rail 4 are slidably disposed on the two first guide rails 3. By setting two first guide rails 3, the second guide rail 4 is slidably disposed between the two first guide rails 3, resulting in high stability of the second guide rail 4 and convenient adjustment of the position of the binding wire head 8 during sliding.

[0045] In this embodiment, the first guide rail 3 is used to realize the Y-axis movement of the wire binding head 8, and the second guide rail 4 is used to realize the X-axis movement of the wire binding head 8. By moving the wire binding head 8 along the X and Y axes, the position of the wire binding head 8 on the wire binding base 5 can be easily adjusted, making it convenient to bind the semi-finished chip on the wire binding base 5.

[0046] In this embodiment, the semiconductor chip manufacturing equipment further includes a connecting block 14. One end of the connecting block 14 is slidably disposed on the second guide rail 4, and the other end of the connecting block 14 is fixedly disposed on the wire binding head 8. The connecting block 14 is used to fix the wire binding head 8 and slide on the second guide rail 4, making the operation between the wire binding head 8 and the wire binding base 5 convenient.

[0047] In this embodiment, the chemical vapor deposition apparatus 6 includes two that are arranged opposite each other, and a plurality of the semi-finished semiconductor chips 7 are placed on the two chemical vapor deposition apparatuses 6.

[0048] In this embodiment, the semiconductor chip manufacturing equipment further includes a protective ring 15, which is fixed to the frame 10, and the chemical vapor deposition apparatus 6 is disposed within the protective ring 15. The chemical vapor deposition apparatus 6 provides good protection and is easy to use.

[0049] In this embodiment, the control interface 2 includes a display screen 12 and multiple buttons 13 disposed on both sides of the display screen 12. The display screen 12 is used to display all parameters of the device, and the multiple buttons 13 can be operated directly on the interface, resulting in good device adjustment.

[0050] In this embodiment, the display screen 12 is an LED display screen 12. The LED display screen 12 has a good display effect and saves energy.

[0051] In this embodiment, a plurality of adjusting columns 11 for adjusting the level of the frame 10 are also provided below the frame 10. The plurality of adjusting columns 11 includes four columns, which are arranged below the four corners of the frame 10 for adjusting the overall level of the frame 10.

[0052] Example 2

[0053] like Figure 5 As shown, Figure 5 This is a flowchart of the semiconductor chip repair method of the present invention. The present invention also provides a semiconductor chip repair method based on the manufacturing equipment of Embodiment 1 above, the method comprising the following steps:

[0054] S1. Mounting components on a metal substrate: Place the finished metal substrate into a special carrier, and use an automatic die bonding device to mount the semiconductor inverter circuit chip onto the component mounting position reserved in the copper foil circuit layer of the finished metal substrate by brushing solder paste or applying silver glue.

[0055] S2. Manufacturing semi-finished components: High-voltage power devices are mounted onto silver-plated copper heat sinks using a soft solder die bonder to form semi-finished components.

[0056] S3. Automatic placement of components: Resistors, capacitors, and semi-finished components are placed into the component mounting positions using an automatic placement SMT equipment.

[0057] S4. Component soldering: The lead frame is placed on the corresponding soldering position on the metal substrate by a robot or manually, and all components are soldered to the corresponding mounting position by a reflow oven.

[0058] S5. Welding quality inspection: The welding quality of components is inspected using visual inspection AOI equipment;

[0059] S6. Remove residual debris: Remove flux and aluminum shavings remaining on the metal substrate by spraying and ultrasonic cleaning.

[0060] S7. Bonding line processing: The semiconductor chip manufacturing equipment is used to first bond lines to the chip surface, so that the semiconductor chip and the circuit wiring form an electrical connection;

[0061] S8. Tensile test process: Select a specific batch or a specific number of semiconductor chips through the first guide rail 3 and the second guide rail 4, transport them to the tensile test device 9, bind them with metal wires, and then perform a tensile test.

[0062] S9. Chip surface inspection and repair: The passivation layer on the surface of the semiconductor chip is inspected and repaired using a chemical vapor deposition apparatus 6.

[0063] S10. Packaging and Marking: The metal substrate is encapsulated using packaging equipment, and then the product is marked using laser marking.

[0064] S11, Stress Relief Treatment: Post-curing stress relief treatment of the product is carried out in a high-temperature oven;

[0065] S12. Cut off the lead connecting ribs: The connecting ribs and dummy leads of the lead are cut off and shaped into the required shape using a rib cutting and forming equipment. Finally, after electrical parameter testing, the final qualified product is formed.

[0066] S13. Install the heat sink: Install the paper heat sink base onto the semiconductor circuit using screws to achieve a tight fit between the heat sink and the heat dissipation surface of the semiconductor circuit, forming the final product.

[0067] Specifically, the finished metal substrate is placed into a special carrier (the carrier can be made of materials resistant to temperatures above 200°C, such as aluminum, synthetic stone, ceramics, or PPS) using automated equipment or manual labor. Semiconductor inverter circuit chips are then mounted onto the pre-reserved component mounting positions on the copper foil circuit layer of the finished metal substrate using an automated die bonder (DA machine). High-voltage power devices (PFC circuits) are then mounted onto silver-plated copper heat sinks using a soft solder bonder, forming semi-finished components. Resistors and capacitors are then mounted onto the component mounting positions using an automated surface mount technology (SMT) machine. Lead frames are placed onto the corresponding soldering positions on the metal substrate using a robotic arm or manually. The entire semi-finished product, including the carrier, passes through a reflow oven to solder all components to their corresponding mounting positions. The soldering quality is inspected using visual inspection (AOI) equipment, and residual flux and aluminum shavings are removed from the insulating substrate using cleaning methods such as spraying and ultrasonic cleaning. The semiconductor equipment of this invention first bonds wires to the chip surface, forming an electrical connection between the semiconductor circuit chip and the circuit wiring. Simultaneously, a specific batch or quantity is selected for a pull test after the bonding of the metal wires. While bonding the metal wires, the semiconductor equipment also inspects the passivation layer on the chip surface. Products with defects in the passivation layer surface are automatically sent to the chemical vapor deposition (CVD) unit 6 of the semiconductor equipment. Because only small defects on the chip surface need to be repaired, a simple characteristic thin film method: atmospheric pressure vapor deposition (APV) is used to repair the defects. APV can be used to prepare simple characteristic thin films such as single-crystal silicon, polycrystalline silicon, silicon dioxide, and doped SiO2. Under atmospheric pressure and at a temperature of approximately 400-800 degrees Celsius, vapor containing gaseous or liquid reactants that constitute the thin film elements is introduced into the CVD unit 66 in a suitable gas flow, causing a chemical reaction on the chip defect surface and depositing a thin film. The substrate circuit is then encapsulated in a specific mold using packaging equipment, and the product is marked with laser marking. Finally, the product undergoes post-curing stress relief treatment in a high-temperature oven. The connecting ribs and dummy leads of the leads are removed and shaped to the required form using a lead-cutting and forming equipment. After electrical parameter testing, a final qualified product is formed. A paper heat sink base is installed onto the semiconductor circuit using screws to achieve a tight fit between the heat sink and the semiconductor circuit's heat dissipation surface, forming the final product. The control interface 2 controls the first guide rail 3 and the second guide rail 4 to adjust the wire-binding head 8 above the corresponding wire-binding base 5 to bind the semi-finished chip. A tensile testing device 9 is used to test the adhesion between the metal wire and the chip surface after the metal wire is bound. A chemical vapor deposition device 6 is used to repair defects in the passivation layer on the chip surface. This allows the obtained semiconductor chip to not only achieve wire bonding on the chip surface but also to be compatible with chip surface defect identification, repair of chip surface defects, and tensile testing of the bonding wire. This makes semiconductor chip surface defect detection and repair convenient, and the chip has strong voltage resistance and high reliability.

[0068] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any alterations, equivalent substitutions, or improvements made within the spirit and principles of the present invention should be included within the scope of the claims of the present invention.

Claims

1. A semiconductor chip manufacturing apparatus, characterized in that, include: The frame, cable tray, control interface, first guide rail, second guide rail, cable binding base, chemical vapor deposition device, cable binding head, and tensile testing device; The wire binding base, the first guide rail, and the chemical vapor deposition device are fixed to the frame. The second guide rail is slidably disposed on the first guide rail. The wire binding head is slidably disposed on the second guide rail. One end of the wire groove is disposed on one end of the first guide rail, and the other end of the wire groove is disposed on the frame. The control interface is fixed to the frame. The tensile testing device is disposed on the wire binding base. The chemical vapor deposition device is used to repair semi-finished semiconductor chips. The control interface is electrically connected to the first guide rail, the second guide rail, the chemical vapor deposition device, the wire binding head, and the tensile testing device, respectively. The first guide rail includes two oppositely arranged rails, and the wire groove includes two wire grooves, each of which is disposed at one end of the two first guide rails. The two ends of the second guide rail are slidably disposed on the two first guide rails. The first guide rail is used to realize the Y-axis movement of the binding head, and the second guide rail is used to realize the X-axis movement of the binding head. The semiconductor chip manufacturing equipment also includes a connecting block, one end of which is slidably disposed on the second guide rail, and the binding wire head is fixedly disposed at the other end of the connecting block.

2. The semiconductor chip manufacturing equipment as described in claim 1, characterized in that, The chemical vapor deposition apparatus includes two devices arranged opposite each other, and a plurality of the semi-finished semiconductor chips are placed on the two chemical vapor deposition apparatuses.

3. The semiconductor chip manufacturing equipment as described in claim 1, characterized in that, The semiconductor chip manufacturing equipment also includes a protective ring, which is fixed on the frame, and the chemical vapor deposition apparatus is disposed within the protective ring.

4. The semiconductor chip manufacturing equipment as described in claim 1, characterized in that, The control interface includes a display screen and multiple buttons located on both sides of the display screen.

5. The semiconductor chip manufacturing equipment as described in claim 4, characterized in that, The display screen is an LED display screen.

6. The semiconductor chip manufacturing equipment as described in claim 1, characterized in that, The frame is also equipped with multiple adjusting columns for adjusting the level of the frame.

7. A method for repairing a semiconductor chip, characterized in that, The method, comprising the semiconductor chip manufacturing apparatus as described in any one of claims 1-6, includes the following steps: S1. Mounting components on a metal substrate: Place the finished metal substrate into a special carrier, and use an automatic die bonding device to mount the semiconductor inverter circuit chip onto the component mounting position reserved in the copper foil circuit layer of the finished metal substrate by brushing solder paste or applying silver glue. S2. Manufacturing semi-finished components: High-voltage power devices are mounted onto silver-plated copper heat sinks using a soft solder die bonder to form semi-finished components. S3. Automatic placement of components: Resistors, capacitors, and semi-finished components are placed into the component mounting positions using an automatic placement SMT equipment. S4. Component soldering: The lead frame is placed on the corresponding soldering position on the metal substrate by a robot or manually, and all components are soldered to the corresponding mounting position by a reflow oven. S5. Welding quality inspection: The welding quality of components is inspected using visual inspection AOI equipment; S6. Remove residual debris: Remove flux and aluminum shavings remaining on the metal substrate by spraying and ultrasonic cleaning. S7. Bonding line processing: The semiconductor chip manufacturing equipment is used to first bond lines to the chip surface, so that the semiconductor chip and the circuit wiring form an electrical connection. S8. Tensile test process: Select a specific batch or a specific number of semiconductor chips through the first guide rail and the second guide rail, transport them to the tensile test device, bind them with metal wires, and then perform tensile tests. S9. Chip Surface Inspection and Repair: The passivation layer on the surface of the semiconductor chip is inspected and repaired using a chemical vapor deposition device; S10. Packaging and Marking: The metal substrate is encapsulated using packaging equipment, and then the product is marked using laser marking. S11, Stress Relief Treatment: Post-curing stress relief treatment of the product is carried out in a high-temperature oven; S12. Cut off the lead connecting ribs: The connecting ribs and dummy leads of the lead are cut off and shaped into the required shape using a rib cutting and forming equipment. Finally, after electrical parameter testing, the final qualified product is formed. S13. Install the heat sink: Install the paper heat sink base onto the semiconductor circuit using screws to achieve a tight fit between the heat sink and the heat dissipation surface of the semiconductor circuit, forming the final product.

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