Semiconductor device

Abstract

Provided is a SiC semiconductor device capable of improving the detection accuracy of the current value of a main current of a current sensing portion by suppressing the escape of heat from the current sensing portion to a wiring material joined to a sensing side surface electrode. Provided is a semiconductor device (1) including a SiC semiconductor substrate, a source portion (27) including a main current side unit cell (34), a current sensing portion (26) including a sensing side unit cell (40), a source side surface electrode (5) disposed above the source portion (27), and a sensing side surface electrode (6) disposed above the current sensing portion (26) and having a sensing side pad (15) to which a sensing side wire is joined, the sensing side unit cell (40) being disposed at a position avoiding the directly lower portion of the sensing side pad (15).

Description

Technical Field

[0001] The present invention relates to a SiC semiconductor device having a current sensing element. Background Technology

[0002] Previously, semiconductor devices having a current sensing unit for detecting the current value of the main current of a device were known, for example, the semiconductor devices described in Patent Documents 1 and 2.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 8-46193;

[0006] Patent document 2: Japanese Patent Application Publication No. 11-74370. Summary of the Invention

[0007] The problem that the invention aims to solve

[0008] The current sensing section is typically formed with a smaller area than the source section where the main current flows. The area ratio of the current sensing section to the source section defines the sensing ratio when detecting the main current. Then, the value of the main current is calculated by multiplying the value of the current actually flowing in the current sensing section by this sensing ratio.

[0009] If all other conditions except area are identical, then considering only the sensing ratio, it might be possible to detect the main current value with high accuracy. However, in reality, there are differences in the conditions for placing the current sensing part and the source part, and these differences affect the detection accuracy.

[0010] For example, the source pad is relatively large while the bonding wire to that pad occupies a small area, while the current sensing pad is relatively small, thus the bonding wire to that pad occupies a large area. This results in a difference in the amount of heat escaped through the bonding wire, potentially increasing the error caused by the on-resistance between the source and the current sensing unit. This error in on-resistance affects the accuracy of the main current detection.

[0011] The purpose of this invention is to provide a SiC semiconductor device that can improve the detection accuracy of the main current value of the current sensing unit by suppressing the escape of heat from the current sensing unit to the wiring material bonded to the sensing side surface electrode.

[0012] Solution for solving the problem

[0013] A semiconductor device according to one embodiment of the present invention includes: a semiconductor layer made of SiC; a source portion formed in the semiconductor layer, including a first unit cell on the main current side; a current sensing portion formed in the semiconductor layer, including a second unit cell on the current detection side; a source-side surface electrode disposed above the source portion; and a sensing-side surface electrode disposed above the current sensing portion in at least a portion thereof, wherein the second unit cell is disposed below the sensing-side surface electrode and avoids a position directly below a bonding portion of the wiring material.

[0014] According to this structure, the second unit cell on the current sensing side is positioned directly below the bonding portion of the wiring material. This maintains a fixed distance between the second unit cell and the wiring material, thus suppressing the preferential transfer of heat generated by the second unit cell to the wiring material and its escape. Consequently, the error caused by the on-resistance between the first unit cell in the source portion and the second unit cell in the current sensing portion is minimized. Furthermore, since the second unit cell is not directly below the bonding portion of the wiring material, the impact of bonding the wiring material to the sensing side surface electrode is prevented from being directly transmitted to the second unit cell, and damage to the second unit cell is suppressed. As a result, the detection accuracy of the main current value of the current sensing portion is improved.

[0015] Furthermore, this arrangement of the second unit cell at a position directly below the junction of the wiring material can be achieved using a semiconductor layer made of SiC. In other words, in Si semiconductor devices, because the current flowing per unit area is small, a relatively large cell area is required for the sensing portion relative to the larger source area that carries a large current, in order to achieve an appropriate sensing ratio (around 1000-2000) for high detection accuracy. Therefore, it is difficult to form it at a position away from the direct bottom. In contrast, in SiC semiconductor devices, because the current flowing per unit area is large, even a smaller cell area of ​​the sensing portion relative to the source area can ensure an appropriate sensing ratio, thus allowing it to be formed at a position away from the direct bottom.

[0016] The semiconductor device includes: an interlayer insulating film disposed between the current sensing portion and the sensing-side surface electrode; and a gate insulating film formed below the interlayer insulating film, wherein the interlayer insulating film may be formed to be thicker than the gate insulating film.

[0017] This structure mitigates the impact transmitted to the second unit cell when bonding the wiring material to the sensing-side surface electrode. As a result, it ensures the reliability of the detection accuracy of the main current value.

[0018] In the semiconductor device, the current sensing portion may also be formed in the region surrounded by the source portion.

[0019] According to this structure, the heat generated by the current sensing part can be brought close to the source part, thus reducing the error in the on-resistance caused by the difference in heat generation.

[0020] The semiconductor device may also include a passivation film that selectively covers the upper part of the second unit cell of the sensing-side surface electrode and has an opening that exposes a portion of the sensing-side surface electrode as a sensing-side pad.

[0021] According to this structure, the top part of the second unit cell and the sensing side pad are clearly distinguishable when viewed from the outside of the semiconductor device. Therefore, it is possible to prevent the wiring material from being mistakenly bonded to the top part of the second unit cell. Thus, a fixed distance can be reliably maintained between the second unit cell and the wiring material.

[0022] In the semiconductor device, the first unit cell and the second unit cell may have the same unit structure.

[0023] Based on this structure, the sensing ratio when calculating the main current value can be estimated using the cell ratio of the first unit cell to the second unit cell, thus enabling easy current detection.

[0024] In the semiconductor device, the current sensing element may be formed at only one location in the in-plane direction of the semiconductor layer.

[0025] Based on this structure, space-saving measures can be achieved on the surface of the semiconductor layer.

[0026] In the semiconductor device, the interlayer insulating film may also have a thickness of 1 μm or more.

[0027] According to this structure, sufficient impact resistance (e.g., wire bonding resistance) can be provided to the interlayer insulating film.

[0028] The semiconductor device includes a gate-side surface electrode disposed on the semiconductor layer and having a gate-side bonding region to which wiring material is bonded. Alternatively, an interlayer insulating film may be disposed directly below the gate-side bonding region.

[0029] According to this structure, the interlayer insulating film covering the source and gate portions can be formed using the same process, thus shortening the manufacturing process.

[0030] In the semiconductor device, the interlayer insulating film may also comprise a SiO2 film, and the SiO2 film may contain P (phosphorus) or B (boron).

[0031] The SiO2 film is easy to fabricate. Furthermore, as long as the SiO2 film contains P (phosphorus) or B (boron), it can be reflowed after film formation. Reflow can easily planarize the interlayer insulating film (SiO2 film), thus making it easy to bond wiring materials that may affect the heat dissipation of the current sensing part as designed.

[0032] In the semiconductor device, the sensing side surface electrode may also include an electrode, which is composed of a stacked structure in the order of Ti, TiN and AlCu stacked from the bottom.

[0033] According to this structure, the outermost surface of the sensing side electrode is made of AlCu, thereby providing the electrode with sufficient impact resistance (e.g., wire bonding resistance).

[0034] The semiconductor device includes: a gate-side surface electrode disposed on the semiconductor layer; and a passivation film having an opening that exposes a portion of the sensing-side surface electrode as a sensing-side pad and an opening that exposes a portion of the gate-side surface electrode as a gate-side pad, wherein the sensing-side pad and the gate-side pad may be formed in a shape with an elongated dimension along the same direction as each other.

[0035] According to this structure, wiring material can be extended and joined in the same direction relative to the sensing side pad and the gate side pad, thus enabling easy wiring during package assembly. Attached Figure Description

[0036] Figure 1 This is a schematic plan view of a semiconductor device according to one embodiment of the present invention.

[0037] Figure 2 It is by Figure 1 An enlarged view of the area enclosed by the dashed line II.

[0038] Figure 3 It is by Figure 2 An enlarged view of the area enclosed by the dashed line III.

[0039] Figure 4 yes Figure 3 A cross-sectional view at section IV-IV.

[0040] Figure 5 yes Figure 1 Enlarged view of the area around the gate-side pads.

[0041] Figure 6 yes Figure 5 A cross-sectional view at section VI-VI.

[0042] Figure 7 yes Figure 5 A cross-sectional view at section VII-VII.

[0043] Figure 8 yes Figure 5 A cross-sectional view at section VIII-VIII.

[0044] Figure 9 This is a circuit diagram used to illustrate current detection in the aforementioned semiconductor device.

[0045] Figure 10 This is a flowchart illustrating the manufacturing process of the aforementioned semiconductor device.

[0046] Figure 11 This is a diagram showing a modified example of the gate structure of the aforementioned semiconductor device.

[0047] Figure 12 This is a diagram showing a modified example of the sense-side pad of the aforementioned semiconductor device. Detailed Implementation

[0048] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0049] Figure 1 This is a schematic plan view of a semiconductor device 1 according to one embodiment of the present invention.

[0050] Semiconductor device 1 includes a semiconductor substrate 2, which is an example of the semiconductor layer of the present invention having a planar quadrilateral shape. The semiconductor substrate 2 has quadrilaterals 3A, 3B, 3C, and 3D in planar view.

[0051] Multiple surface electrode films 4 are formed on a semiconductor substrate 2 in a manner that separates them from each other. The multiple surface electrode films 4 include a source-side surface electrode 5, a sensing-side surface electrode 6, and a gate-side surface electrode 7. The source-side surface electrode 5 is formed over a large portion of the region on the semiconductor substrate 2. Figure 1 The regions 8 and 9, after removing a portion of the source-side surface electrode 5 (the hatching area and the source-side pads 14A, 14B, 14B described later), are the formation areas of the sensing-side surface electrode 6 and the gate-side surface electrode 7. These removed regions 8 and 9 are formed by surrounding the source-side surface electrode 5.

[0052] A passivation film 10, which covers a plurality of surface electrode films 4, is formed on a semiconductor substrate 2. The passivation film 10 has a plurality of pad openings 11, 12, and 13. The source-side surface electrode 5, the sensing-side surface electrode 6, and the gate-side surface electrode 7 are exposed from the pad openings 11, 12, and 13 as source-side pads 14A and 14B, sensing-side pad 15, and gate-side pad 16, respectively.

[0053] Multiple source-side pads 14A and 14B are configured separately from each other. Figure 1 In this embodiment, three source-side pads 14A, 14B, and 14B are provided on the semiconductor substrate 2. One source-side pad 14A is disposed in the central portion of the semiconductor substrate 2 along a side 3A, and the remaining source-side pads 14B and 14B are disposed on each side of the source-side pad 14A. The source-side pads 14B and 14B on both sides have extensions 17 and 17 extending toward the opposite side 3C of the side 3A relative to the central source-side pad 14A. The extensions 17 are spaced apart from each other, and a region 18 for disposing of a gate-side pad 16 is defined in the portion adjacent to the central source-side pad 14A. Furthermore, the multiple source-side pads 14A and 14B are visually separated from each other, but are connected below the passivation film 10 via... Figure 1 The shadow areas are connected to each other to form a whole source-side surface electrode 5.

[0054] The sensing-side pad 15 is disposed at only one corner of the quadrilateral semiconductor substrate 2. This allows for space saving on the semiconductor substrate 2. The sensing-side pad 15 is formed in a shape that extends along the edges 3B and 3D of the semiconductor substrate 2, and is surrounded by one of the source-side pads 14B on each side. Regarding the sensing-side pad 15, as... Figure 1 As shown, a portion of its perimeter may be surrounded by source-side pads 14B, or the entire perimeter may be surrounded by source-side pads 14B (not shown).

[0055] Gate-side pad 16 is disposed in region 18 between source-side pads 14B, 14B facing each other. Gate-side pad 16 is similarly formed to sense-side pad 15 in shape along the length of edge 3B, 3D of semiconductor substrate 2.

[0056] The gate-side surface electrode 7 also includes a gate finger 19 extending from the gate-side pad 16. The gate finger 19 is covered by a passivation film 10. The gate finger 19 includes: a central portion 20 extending through the center of the source-side surface electrode 5 in a direction from one side 3C of the semiconductor substrate 2 toward its opposite side 3A, and a portion extending along the periphery of the semiconductor substrate 2 (in... Figure 1 The peripheral portion 21 extends from the edges 3B, 3C, and 3D and surrounds the source-side surface electrode 5.

[0057] Source-side pads 14A and 14B, sense-side pad 15, and gate-side pad 16 are respectively connected to source-side lines 22, sense-side lines 23, and gate-side lines 24. Lines 22-24 are, for example, aluminum wires. Aluminum wires are typically joined by thin wedge bonding rather than ball bonding. Therefore, as... Figure 1 As shown, by making the sensing-side pad 15 and the gate-side pad 16 have a length dimension along the same direction, lines 23 and 24 can be extended and joined relative to the sensing-side pad 15 and the gate-side pad 16 in the same direction. As a result, wiring can be easily performed during package assembly.

[0058] Furthermore, the diameters of lines 22 to 24 can be, for example, 300 μm to 500 μm for the source-side line 22, and 100 μm to 200 μm for the sensing-side line 23 and the gate-side line 24.

[0059] Furthermore, as the wiring material connecting the source-side pads 14A, 14B, the sensing-side pad 15, and the gate-side pad 16 to the outside, other wiring materials such as bonding plates or bonding ribbons can be used instead of bonding wires.

[0060] Figure 2 It is by Figure 1 An enlarged view of the area enclosed by the dashed line II.

[0061] like Figure 2 As shown, the sensing side surface electrode 6 is formed in a planar rectangular shape; however, in appearance, a portion (in) Figure 2 The sensing-side pad 15, which is approximately rectangular in shape when viewed from a planar perspective, is exposed in a state covered by a passivation film 10 (with one corner in the middle). The length L1 of the long side and the length L2 of the short side of the sensing-side pad 15 are preferably 1.2 mm or less and 0.6 mm or less, respectively. This allows the size of the sensing-side pad 15 to be limited to 0.72 mm. 2 Therefore, it is possible to suppress the increase in the on-resistance of the sensing side unit 40 (described later). In addition, the sensing side pad 15 is made so that the length L1 of the long side is about twice the length L2 of the short side that it is elongated, thereby making it easy to join the bonding line (sensing side line 23) using wedge soldering.

[0062] The area 25 covered by the passivation film 10 is formed into a planar rectangular shape, with a short side and a long side forming extensions of the short and long sides of the sensing-side pad 15, respectively. Furthermore, the covered area 25 does not need to be a planar rectangle; it can also be other shapes (e.g., square, circle, triangle, etc.). Of course, its location does not need to be at the corner of the sensing-side surface electrode 6; for example, it can be at the midpoint of the side of the sensing-side surface electrode 6.

[0063] A current sensing section 26, which is an assembly of a plurality of sensing-side unit units 40 (described later), is formed directly below the covering region 25. On the other hand, the current sensing section 26 is not formed directly below the sensing-side pad 15. That is, in this embodiment, the entire current sensing section 26 is formed at a position that avoids the direct lower part of the sensing-side pad 15.

[0064] On the other hand, a source portion 27, which is an assembly of a plurality of main current side unit units 34 (described later), is formed around the sensing-side surface electrode 6. The source portion 27 is formed directly below the source-side surface electrode 5 and is configured to surround the sensing-side surface electrode 6 in plan view. Furthermore, although not shown, it is generally understood that... Figure 1 The source electrode 5 shown can also be formed as a source portion 27 at its directly lower part.

[0065] Figure 3 It is by Figure 2 An enlarged view of the area enclosed by the dashed line III. Figure 4 yes Figure 3 A cross-sectional view at section IV-IV. Figure 5 yes Figure 1 Enlarged view of the area around gate-side pad 16. Figure 6 yes Figure 5 A cross-sectional view at section VI-VI. Figure 7 yes Figure 5 A cross-sectional view at section VII-VII. Figure 8 yes Figure 5 A cross-sectional view at section VIII-VIII. Furthermore, in Figure 4 (Part omitted) Figure 3 It is shown by the horizontal repeating part.

[0066] like Figure 4 and Figures 6-8 As shown, the semiconductor substrate 2 can also be a SiC epitaxial substrate comprising a base substrate 28 and an epitaxial layer 29 on the base substrate 28. In this embodiment, the semiconductor substrate 2 comprises: n + Substrate 28 made of SiC (e.g., with a concentration of 1×10⁻⁶) 17 cm -3 ~1×10 19 cm -3 ), and n - Epitaxial layer 29 composed of SiC (e.g., concentration of 1×10⁻⁶) 14 cm -3 ~1×10 17 cm -3 ).

[0067] In n -The surface portion of the epitaxial layer 29 has a p - Well 30 (e.g., concentration of 1×10⁻⁶) 14 cm -3 ~1×10 19 cm -3 p - Type 30 includes: main current side p - Body well 31, sensing side p - Body trap 32 and gate side p - Type 33. (e.g., trap 33) Figure 4 The main current side p is formed in a way that separates them from each other, as shown. - Shaped trap 31 and sensing side p - Body well 32. Gate side p - Type 33 such Figure 6 As shown, with the main current side p - The traps 31 are interconnected.

[0068] Main current side p - The body trap 31 includes: a unit forming portion 35 constituting a main current side unit unit 34, which is an example of the first unit unit of the present invention, and a field forming portion 36 covering a relatively wide area. That is, each unit forming portion 35 defines the main current side unit unit 34 as the smallest unit for the flow of main current.

[0069] like Figure 3 and Figure 5 As shown, a number of unit forming sections 35 are arranged in a matrix to form the source section 27.

[0070] The field forming section 36 is configured to surround a plurality of unit forming sections 35 and to connect them across the outer periphery of the source section 27 adjacent to the unit forming sections 35.

[0071] Main current side p - The shaped trap 31 also includes a connecting portion 37, which is formed at the intersection of the grid regions divided by the matrix-shaped cell forming portions 35. The connecting portion 37 connects adjacent cell forming portions 35 to each other inside the source portion 27.

[0072] In this way, the cell forming section 35 is electrically connected at the outer periphery and inside of the source section 27 using the field forming section 36 and the connecting section 37. As a result, a plurality of cell forming sections 35 are kept at the same potential.

[0073] n are formed in the internal region of the unit forming section 35 + Type source region 38, in this n + Type source region 38 (e.g., concentration of 1×10⁻⁶) 17cm -3 ~1×10 21 cm -3 The internal region of ) forms p + Type contact area 39 (e.g., concentration of 1×10) 17 cm -3 ~1×10 21 cm -3 ).

[0074] Sensing side p - The body trap 32 includes: a unit forming portion 41 constituting a sensing-side unit 40, which is an example of a second unit unit of the present invention, and a field forming portion 42 covering a relatively large area. That is, each unit forming portion 41 defines a sensing-side unit 40 as the smallest unit for the flow of main current.

[0075] like Figure 3 As shown, a number of cell formation portions 41 are arranged in a matrix at a position that avoids the lower part of the sensing side pad 15, thereby forming the current sensing portion 26. The cell formation portions 41 have the same cell structure (size and spacing) as the cell formation portions 35 on the main current side.

[0076] The field forming section 42 is configured to surround a plurality of unit forming sections 41 and to connect them across the outer periphery of the current sensing section 26 adjacent to the unit forming sections 41.

[0077] Sensing side p - The body trap 32 also includes a connecting portion 43, which is formed at the intersection of the grid regions divided by the matrix-shaped unit forming portions 41. The connecting portion 43 connects adjacent unit forming portions 41 to each other inside the current sensing portion 26.

[0078] In this way, the unit forming section 41 is electrically connected to the outer periphery and the interior of the current sensing section 26 by means of the field forming section 42 and the connection section 43. As a result, a plurality of unit forming sections 41 are kept at the same potential.

[0079] n are formed in the internal region of the unit forming section 41 + Type source region 44 (e.g., concentration of 1×10⁻⁶) 17 cm -3 ~1×10 21 cm -3 ), in the n + The internal region of the source pole region 44 has p + Contact area 45 (e.g., concentration of 1×10⁻⁶) 17 cm -3 ~1×10 21 cm -3 ).

[0080] Furthermore, the field forming portion 42 is formed to extend from the outer periphery of the cell forming portion 41 to the directly lower portion of the sensing-side pad 15. In this embodiment, the field forming portion 42 extends entirely across the directly lower portion of the sensing-side pad 15. That is, in Figure 2 In the middle, the lower part of the sensing side surface electrode 6, which is roughly rectangular in shape and covers the entire planar view except for the covered area 25, is formed.

[0081] Furthermore, a p is formed on the surface of the field-forming portion 42 directly below the sensing pad 15. + Type 46 (e.g., concentration of 1×10⁻⁶) 17 cm -3 ~1×10 21 cm -3 p + The p-shaped region 46 is directly connected to the sensing side surface electrode 6. By forming this p... + The type region 46 enables the potential of the area directly below the sensing pad 15 to be stabilized at the same potential.

[0082] like Figure 6 As shown, the gate side p - A trap 33 is formed directly below the gate-side pad 16. On the gate-side p... - The surface of the trap 33 is formed with p + Type 47 (e.g., concentration of 1×10⁻⁶) 17 cm -3 ~1×10 21 cm -3 ).

[0083] A gate insulating film 48 is formed on the semiconductor substrate 2, and a gate electrode 49 is formed on the gate insulating film 48. The gate insulating film 48 is made of, for example, silicon oxide (SiO2), and the gate electrode 49 is made of, for example, polysilicon.

[0084] A gate electrode 49 is formed in the current sensing section 26 and the source section 27 along a grid region divided by matrix-like unit cells 34, 40. The gate electrode 49 includes a functional section 52 spanning adjacent unit cells 34, 40. Thus, the gate electrode 49 is opposite to the channel regions 50, 51 of each unit cell 34, 40 via a gate insulating film 48. These channel regions 50, 51 are p - In the unit forming parts 35 and 41 of the body traps 31 and 32, n + The outer regions of source pole regions 38 and 44.

[0085] Gate electrode 49 Figure 4As shown, in addition to the functional portions 52 opposite to the channel regions 50 and 51 of each unit cell 34, 40, a connection portion 53 is also included. The connection portion 53 traverses the current sensing portion 26 and the source portion 27 below the surface electrode film 4, passing through the removed region 8 between the source-side surface electrode 5 and the sensing-side surface electrode 6. This connection portion 53 ensures the electrical connection between the functional portions 52 of the current sensing portion 26 and the source portion 27. In other words, the gate electrode 49 becomes a common electrode between the current sensing portion 26 and the source portion 27.

[0086] On the other hand, gate electrode 49 as Figure 7 and Figure 8 As shown, the gate electrode 49 is connected to the gate-side surface electrode 7 in the gate finger 19 of the semiconductor device 1. That is, the gate electrode 49 is formed to extend from the source portion 27 downwards from the gate finger 19, and has a contact portion 62 at the very bottom of the gate finger 19. Thus, the gate voltage supplied to the gate-side pad 16 is transmitted via the contact portion 62 (…). Figure 7 ) and connecting part 53 ( Figure 4 It is also applied to the gate electrode 49 of the current sensing section 26.

[0087] A gate insulating film 48 is disposed below the gate electrode 49 to ensure insulation between the gate electrode 49 and the semiconductor substrate 2; however, in this embodiment, it is also formed directly below the sensing-side pad 15 and the gate-side pad 16. This gate insulating film 48... Figure 4 and Figure 7 As shown, it is formed by the extension of the gate insulating film 48 directly below the functional part 52 of the gate electrode 49.

[0088] An interlayer insulating film 54 is formed on the semiconductor substrate 2 to cover the gate electrode 49. The interlayer insulating film 54 is made of, for example, silicon oxide (SiO2), and preferably contains P (phosphorus) or B (boron). That is, the interlayer insulating film 54 can also be BPSG (Boron Phosphorus Silicon Grass) or PSG (Phosphorus Silicon Grass). The SiO2 film is easy to fabricate, and as long as the SiO2 film contains P (phosphorus) or B (boron), reflow can be performed after film formation. Reflow can easily planarize the interlayer insulating film 54 (SiO2 film), so the sensing side line 23, which can affect the heat dissipation of the current sensing section 26, can be easily bonded as designed.

[0089] The interlayer insulating film 54 integrally comprises: a first portion 55 covering the gate electrode 49 in the current sensing portion 26 and the source portion 27, a second portion 56 disposed directly below the sensing-side pad 15, and a third portion 57 disposed directly below the gate-side pad 16. By making the interlayer insulating film 54 thicker at the directly below the sensing-side pad 15 and the gate-side pad 16, sufficient shock resistance (e.g., wire bonding resistance) can be provided to the interlayer insulating film 54.

[0090] A surface electrode film 4 (source-side surface electrode 5, sensing-side surface electrode 6, and gate-side surface electrode 7) is formed on the interlayer insulating film 54. The source-side surface electrode 5 penetrates the interlayer insulating film 54 and the gate insulating film 48 and is connected to n. + Type source pole region 38 and p + The contact area 39 is a sensing side surface electrode 6 that penetrates the interlayer insulating film 54 and the gate insulating film 48 and is connected to the n-type contact area. + Type source pole region 44 and p + The contact area 45 is a type. The gate-side surface electrode 7 (gate finger 19) is connected to the gate electrode 49 through the interlayer insulating film 54.

[0091] Furthermore, the surface electrode film 4 can also be an electrode film, which is constructed by a stacked structure in the order of Ti, TiN, and AlCu stacked from the bottom (semiconductor substrate 2 side). By making the outermost surface of the surface electrode film 4 AlCu, sufficient impact resistance (e.g., wire bonding resistance) can be provided to the electrode film 4 compared to the case where Al is used.

[0092] A passivation film 10 is formed on the surface electrode film 4. The passivation film 10 may be made of, for example, silicon nitride (SiN). Pad openings 11 to 13 are formed on the passivation film 10 as described above.

[0093] A drain electrode 58 is formed on the back side of the semiconductor substrate 2. The drain electrode 58 may also be an electrode film, which is composed of layers stacked from the semiconductor substrate 2 side in the order of Ti, Ni, Au, and Ag. Furthermore, the drain electrode 58 is a common electrode between the current sensing section 26 and the source section 27.

[0094] Next, refer to Figure 9 As an example, this illustrates the method of current detection in semiconductor device 1. Figure 9 This is a circuit diagram used to illustrate current detection in semiconductor device 1.

[0095] like Figure 9As shown, the semiconductor device 1 includes a source portion 27 on the main current side and a current sensing portion 26 on the current detection side within a single chip. A sensing resistor 59 is connected to the source S of the current sensing portion 26. The sensing resistor 59 can be assembled with the module when the semiconductor device 1 is assembled, for example, or it can be assembled inside the semiconductor device 1. As described above, the gate G and drain D are common electrodes in the current sensing portion 26 and the source portion 27.

[0096] When a voltage above a threshold is applied to the gate G while a voltage is applied between each source (S) and drain (D), current flows between the source (S) and drain (D), and the semiconductor device 1 becomes conductive. Consequently, a detection current I flows in the current sensing unit 26. SENSE On the other hand, the main current I flows in the source section 27. MAIN .

[0097] By monitoring the voltage V of the detection resistor 59 SENSE Whether the main current I exceeds a fixed threshold is used to determine the main current. MAIN Is it a short-circuit current? Check the resistor R of resistor 59. SENSE Since it is fixed, therefore, the voltage V SENSE Accompanied by the detection current I SENSE It increases with the increase of [something]. Therefore, the voltage V SENSE Exceeding the threshold indicates an excessive detection current I. SENSE The flow, and further, represents the current value I of the main current calculated based on the sensing ratio between the current sensing unit 26 and the source unit 27. MAIN This also becomes a surplus.

[0098] In the detection method described above, as long as the actual flowing main current I... MAIN With the detection current I SENSE The main current I calculated by multiplying by the sensing ratio MAIN If the signal is consistent, the short circuit detection can be performed with high precision, and the gate voltage can be cut off at the appropriate timing.

[0099] However, as Figure 1 As shown, the source-side pads 14A and 14B are relatively large, and the area occupied by the source-side line 22 corresponding to these pads 14A and 14B is small. On the other hand, the sensing pad 15 is relatively small, therefore, the area occupied by the sensing-side line 23 corresponding to this pad 15 is large. Consequently, a difference in the amount of heat escaped through lines 22 and 23 occurs, thus potentially increasing the error in the on-resistance between the source section 27 and the current sensing section 26. As a result, the actual main current I... MAIN Although it did not become a short-circuit current, there was an excess detection current I flowing on the current sensing side. SENSEIn this case, short-circuit detection is always based on the voltage V of the sensing resistor 59 on the current sensing side. SENSE Therefore, even if it is not needed, it is judged as a short circuit, and there is a possibility of cutting off the gate voltage.

[0100] Therefore, according to the semiconductor device 1, such as Figure 2 As shown, the current sensing unit 26 is positioned to avoid the area directly below the sensing-side pad 15. Therefore, in the sensing-side line 23 ( Figure 1 When the current sensing unit 26 is bonded to the sensing side pad 15, a fixed distance can be maintained between the current sensing unit 26 and the sensing side line 23. Therefore, the heat generated by the current sensing unit 26 can be prevented from preferentially being transferred to the sensing side line 23 and escaping. As a result, the error caused by the on-resistance between the main current side unit 34 of the source portion 27 and the sensing side unit 40 of the current sensing unit 26 can be minimized. Furthermore, since the current sensing unit 26 is not located directly below the sensing side pad 15, the impact when the sensing side line 23 is bonded to the sensing side pad 15 can be prevented from being directly transmitted to the current sensing unit 26, and damage to the current sensing unit 26 can also be suppressed. As a result, the detection accuracy of the main current value of the current sensing unit 26 can be improved.

[0101] Furthermore, this arrangement of the current sensing section 26, positioned directly below the sensing pad 15, can be achieved using a semiconductor substrate 2 made of SiC. In other words, in Si semiconductor devices, because the amount of current that can flow per unit area is small, a relatively large unit area of ​​the sensing section is required relative to the source portion, which has a larger area for flowing large currents, in order to achieve an appropriate sensing ratio (around 1000-2000) with high detection accuracy. Therefore, it is difficult to form it in an avoided location. In contrast, in SiC semiconductor devices, because the amount of current that can flow per unit area is large, even a smaller unit area of ​​the sensing section relative to the source portion can ensure an appropriate sensing ratio, thus allowing it to be formed in an avoided location.

[0102] Furthermore, in this embodiment, such as Figure 3 As shown, the current sensing section 26 is surrounded by the source section 27, so the heat generated by the current sensing section 26 can be made close to that of the source section 27. Therefore, the error in the on-resistance caused by the difference in heat generation can be reduced.

[0103] Furthermore, in this embodiment, such as Figure 2As shown, the entire current sensing section 26 is covered by the coating area 25 of the passivation film 10, clearly distinguishing the top portion of the current sensing section 26 from the outside of the semiconductor device 1, and the sensing side pad 15. Therefore, it is possible to prevent the sensing side line 23 from being mistakenly bonded to the top portion of the current sensing section 26. A fixed distance can be reliably maintained between the current sensing section 26 and the sensing side line 23.

[0104] Furthermore, in this embodiment, such as Figure 4 and Figure 5 As shown, the interlayer insulating film 54 has a relatively thick second portion 56 (e.g., more than 1 μm) directly below the sensing-side pad 15. This reduces the impact transmitted to the current sensing unit 26 when the sensing-side line 23 is bonded to the sensing-side pad 15. As a result, the reliability of the detection accuracy of the main current value can be ensured.

[0105] Next, refer to Figure 10 The manufacturing method of semiconductor device 1 will be described.

[0106] For example, firstly, using epitaxial growth on n + n is formed on the substrate 28 - A type epitaxial layer 29 is used to form a semiconductor substrate 2 (step S1).

[0107] Next, p-type impurity ions are selectively implanted into the surface portion of the semiconductor substrate 2, thereby forming p - Type 30 (step S2).

[0108] Next, n-type impurity ions are selectively implanted into each unit forming section 35, 41, thereby forming n + Type source regions 38 and 44 (step S3).

[0109] Next, to p - The trap 30 is selectively implanted with p-type impurity ions, thereby forming p + Contact areas 39, 45 and p + Type regions 46 and 47 (step S4).

[0110] Next, a gate insulating film 48 is formed on the surface of the semiconductor substrate 2 by means of, for example, thermal oxidation (step S5).

[0111] Next, polysilicon is deposited on semiconductor substrate 2 using, for example, CVD method to perform patterning, thereby forming gate electrode 49 (step S6).

[0112] Next, an interlayer insulating film 54 is formed on the semiconductor substrate 2 using, for example, CVD (step S7).

[0113] Next, after forming a contact hole that connects the interlayer insulating film 54 and the gate insulating film 48, a surface electrode film 4 is formed using, for example, sputtering (steps S8 and S9).

[0114] Next, a passivation film 10 covering the surface electrode film 4 is formed, and then, pad openings 11, 12, and 13 are formed by patterning (steps S10 and S11).

[0115] In doing so, the aforementioned semiconductor device 1 is obtained.

[0116] The embodiments of the present invention have been described above; however, the present invention can also be implemented in other ways.

[0117] For example, the gate structure of semiconductor device 1 is not limited to Figure 4 The planar grid structure shown can also be Figure 11 The trench gate structure is shown. In the trench gate structure, a gate trench 60 is formed in the semiconductor substrate 2, and a gate electrode 49 is buried inside it. In this case, the gate electrode 49 does not protrude from the semiconductor substrate 2, so the first portion 55 and the second portion 56 of the interlayer insulating film 54 can also be of the same thickness.

[0118] Furthermore, the current sensing unit 26 does not need to be entirely covered by the passivation film 10. Figure 2 The structure, such as Figure 12 It is also possible for only a portion of it to be covered by the passivation film 10, as shown. In this case, the current sensing part 26 overlaps with the lower part of the sensing side pad 15. However, it is sufficient to imagine setting the bonding area 61 of the sensing side line 23 in the sensing side pad 15 at a position that avoids the current sensing part 26. That is to say, the sensing side bonding area of ​​the present invention does not necessarily have to be consistent with the sensing side pad 15.

[0119] Furthermore, various design changes can be implemented within the scope of the claims.

[0120] This application corresponds to Japanese Patent Application No. 2015-247727 filed with the Japan Patent Office on December 18, 2015, the entire disclosure of which is incorporated herein by reference.

[0121] Explanation of reference numerals in the attached figures

[0122] 1. Semiconductor device

[0123] 2 Semiconductor substrate

[0124] 4 Surface electrode film

[0125] 5. Source-side surface electrode

[0126] 6. Sensing side surface electrodes

[0127] 7 Gate-side surface electrode

[0128] 10 Passivation film

[0129] 12 Pad Openings

[0130] 15 Sensing Side Pads

[0131] 23 Sensing side line

[0132] 26 Current sensing unit

[0133] 27 Source pole

[0134] 34 Main current side unit cells

[0135] 40 sensing-side unit cells

[0136] 54 interlayer insulating film

[0137] 55 Part 1

[0138] 56 Part Two

[0139] 57 Part Three

[0140] 61. Joint area.

Claims

1. A semiconductor device, wherein, Include: A semiconductor chip has a first side and a second side; The first element portion is formed on the first surface side of the semiconductor chip and includes a first unit cell on the main current side. A current sensing unit is formed on the first surface side of the semiconductor chip, and includes a second unit cell on the current sensing side; The first element side surface electrode is disposed above the first element portion; A sensing side surface electrode is configured to be located above at least a portion of the current sensing portion; The first element side line is connected to the first element side surface electrode; The sensing side line is coupled to the sensing side surface electrode and is thinner than the first element side line; A passivation film selectively covers the region directly above the second unit cell of the sensing-side surface electrode and has a first opening that exposes a portion of the sensing-side surface electrode as a sensing-side pad. as well as A well, formed on the first surface side of the semiconductor chip, includes a cell forming portion and a field forming portion constituting the first unit cell. The second unit is positioned below the sensing-side surface electrode and avoids the position directly below the bonding portion of the sensing-side line. Both the current sensing portion and the sensing-side pad are arranged along the first periphery of the semiconductor chip. The field forming portion is formed in such a way that it surrounds a plurality of the unit forming portions, and connects them by spanning the adjacent unit forming portions through the outer periphery of the first element portion. The semiconductor device is a SiC semiconductor device.

2. The semiconductor device according to claim 1, wherein, The current sensing part is smaller than the sensing side pad.

3. The semiconductor device according to claim 2, wherein, The sensing side line is shorter than the first element side line.

4. The semiconductor device according to claim 3, wherein, The sensing side line and the first element side line are arranged to extend in different directions relative to the semiconductor chip.

5. The semiconductor device according to claim 4, wherein, The semiconductor chip also includes a pair of second peripheries extending perpendicularly to the first periphery. The current sensing unit is located in the center of the part that is closer to the first periphery than the pair of second peripheries and away from the pair of second peripheries.

6. The semiconductor device according to any one of claims 1 to 5, wherein, Include: An interlayer insulating film is disposed between the current sensing portion and the sensing-side surface electrode; and A surface insulating film is formed beneath the interlayer insulating film. The interlayer insulating film is formed to be thicker than the surface insulating film.

7. The semiconductor device according to any one of claims 1 to 5, wherein, The current sensing part is formed in the region surrounded by the first element part.

8. The semiconductor device according to any one of claims 1 to 5, wherein, The first unit cell and the second unit cell have the same cell structure.

9. The semiconductor device according to any one of claims 1 to 5, wherein, The current sensing element is formed at only one location in the in-plane direction of the semiconductor chip.

10. The semiconductor device according to claim 6, wherein, The interlayer insulating film has a thickness of more than 1 μm.

11. The semiconductor device according to claim 6, wherein, The first element and the current sensing element are switching elements each having a control terminal. The semiconductor device includes a control terminal-side surface electrode disposed on the semiconductor chip and having a control terminal-side bonding region to which wiring material is bonded. The interlayer insulating film is also disposed directly below the control terminal side bonding area.

12. The semiconductor device according to claim 6, wherein, The interlayer insulating film comprises a SiO2 film.

13. The semiconductor device according to claim 12, wherein, The SiO2 film contains phosphorus (P).

14. The semiconductor device according to claim 12, wherein, The SiO2 film contains boron (B).

15. The semiconductor device according to any one of claims 1 to 5, wherein, The sensing side surface electrode includes an electrode, which is composed of a stacked structure formed from the bottom in the order of Ti, TiN and AlCu.

16. The semiconductor device according to any one of claims 1 to 5, wherein, The first element and the current sensing element are switching elements each having a control terminal. At least one of the first element portion and the current sensing portion includes a control terminal side surface electrode disposed on the semiconductor chip. The passivation film has a second opening that exposes a portion of the control terminal side surface electrode as a control terminal side pad. The sensing-side pad and the control terminal-side pad are formed in a shape with an elongated dimension along the same direction as each other.

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