A photolithography method based on double-layer photoresist

Abstract

The present invention relates to a photolithography method based on double-layer photoresist, which comprises the following steps: (1) applying a layer of positive photoresist on a substrate and drying; then applying a layer of negative photoresist on the positive photoresist and drying; (2) exposing the two layers of photoresist once through a photolithography mask carrying a template pattern or by direct writing with a focused light source under an exposure light source, and then drying; (3) developing the negative photoresist with a negative photoresist developer; (4) controllably developing the positive photoresist with a positive photoresist developer; (5) transferring the contour line pattern to a substrate material through a material deposition technique or an etching technique; and (6) removing the photoresist. Compared with the existing single-exposure photolithography technology, the method of the present invention is simple, and can achieve a higher and smaller line width than the traditional technology through pattern contouring. The method can be widely used in semiconductor processes and has extensive research and application value.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor microstructure processing, and in particular to a photolithography method based on double-layer photoresist. Background Art

[0002] The rapid development of integrated circuits depends on the development of related manufacturing processes - photolithography technology. Photolithography technology is the highest precision processing technology that can be achieved so far. Photolithography technology is a precise micro-processing technology. Conventional photolithography technology uses a wavelength of It uses ultraviolet light as the carrier of image information and photoresist as the intermediate or image recording medium to achieve graphic transformation, transfer and processing, and finally transmit the image information to the chip, mainly referring to silicon wafer, or a process on the dielectric layer.

[0003] In principle, photolithography refers to the technology of transferring the pattern on the mask to the substrate with the help of photoresist (also known as photoresist) under the action of light. The main process is: first, ultraviolet light is irradiated through the mask to the surface of the substrate with a layer of photoresist film, causing a chemical reaction in the photoresist in the exposed area; then the photoresist in the exposed area or unexposed area is dissolved and removed by the development technology, so that the pattern on the mask is copied to the photoresist film; finally, the pattern is transferred to the substrate using the etching technology.

[0004] Photolithography is the most important processing technology for integrated circuits. Its role is like that of a lathe in a metalworking workshop. In the entire chip manufacturing process, the implementation of almost every process is inseparable from the technology of photolithography. Photolithography is also the most critical technology for chip manufacturing, accounting for more than 35% of the chip manufacturing cost.

[0005] Photolithography technology is mainly divided into optical lithography according to the exposure light source. Common light sources include ultraviolet light source (UV), deep ultraviolet light source (DUV), extreme ultraviolet light source (EUV), and particle beam lithography. Common particle beam lithography mainly includes X-ray, electron beam and ion beam lithography.

[0006] Usually, in optical lithography, UV can only achieve a pattern resolution of about one micron. Although DUV and EUV can achieve higher resolution, they require the use of expensive machines that only industry giants can afford. In addition, in particle beam lithography, although EBL and FIB can also improve the resolution to a certain extent, they require a time-consuming and multi-cycle writing process, which greatly reduces work efficiency. Summary of the invention

[0007] The purpose of the present invention is to overcome the defects of the above-mentioned prior art and to provide a double-layer photoresist-based lithography method which is simple in method, has a smaller line width than the traditional technology, can be widely used in semiconductor processes, and has broad research and application value.

[0008] The purpose of the present invention can be achieved by the following technical solutions:

[0009] By utilizing the positive and negative photoresists, i.e., the difference in the response of the positive and negative photoresists to the light source and the difference in the exposure energy obtained in a single exposure, and utilizing the difference in the size of the patterns after the actual development of the matching positive and negative photoresists, a contour line pattern based on the characteristics of the original pattern is obtained, and the contour line width is smaller than the characteristic line width of the original pattern. In combination with the etching process for the substrate material or the deposited material, the pattern can be transferred to the target material. The specific scheme is as follows:

[0010] A photolithography method based on a double-layer photoresist, the method comprising the following steps:

[0011] (1) cleaning the substrate material, then applying a layer of positive photoresist on the substrate and drying it; then applying a layer of negative photoresist on the positive photoresist and drying it;

[0012] (2) Under the exposure light source, the two layers of photoresist are exposed once through a photolithography mask carrying a template pattern or by direct writing with a focused light source. After exposure, exposure patterns of different sizes are formed on the negative photoresist and the positive photoresist, respectively, and then dried;

[0013] (3) developing the negative photoresist with a negative photoresist developer;

[0014] (4) Controllably developing the positive photoresist with a positive photoresist developer to wash away only the edge of the exposed pattern on the positive photoresist and expose the substrate material, thereby converting the template pattern into a contour line pattern;

[0015] (5) transferring the contour pattern to the substrate material by material deposition technology or etching technology;

[0016] (6) Remove the photoresist.

[0017] Furthermore, the substrate material includes semiconductors, metals, insulators, polymers or composite materials, such as silicon wafers or silicon wafers with a layer of silicon oxide film attached to the surface.

[0018] Furthermore, the array of gold nanowires on a silicon wafer substrate specifically includes the following steps:

[0019] (1) Cleaning the silicon wafer: After ultrasonic cleaning with concentrated sulfuric acid, deionized water and ethanol in sequence, the silicon wafer substrate is blown dry with nitrogen, placed in a dry etcher, and cleaned with oxygen plasma etching;

[0020] (2) Spin coating positive photoresist: Place the cleaned silicon wafer on a spin coater and fix it under vacuum; use a dropper to apply 2-4 drops of positive photoresist, spin coat the photoresist, and then dry it;

[0021] (3) Spin coating negative photoresist: Place the cooled silicon wafer on a spin coater and fix it under vacuum; then use a dropper to apply 2-4 drops of negative photoresist, spin coat the negative photoresist, and then dry it;

[0022] (4) UV exposure: The silicon wafer substrate after the above steps is tightly fixed under the mask containing the line array, evacuated and placed directly under the UV light source, and the light source is turned on for photolithography. The exposure time is adjusted according to the type of photoresist pairing group and the thickness of the photoresist layer. After the exposure is completed, the mask is removed and the exposed silicon wafer is moved to a heating table for drying.

[0023] (5) Two-step development:

[0024] After the post-baking is completed, the silicon wafer is cooled to room temperature and then developed. The process is as follows: the silicon wafer after photolithography is placed in a negative photoresist developer to wash away the negative photoresist on the silicon wafer that has not been exposed; then the silicon wafer is taken out and washed with water and dried with a nitrogen flow;

[0025] The silicon wafer is then placed in a positive photoresist developer to wash away the exposed positive photoresist on the silicon wafer, while the unexposed negative photoresist under the exposed negative photoresist is not completely removed; the silicon wafer is then taken out and washed with water, and dried with a nitrogen flow to prepare a contour line pattern based on the template pattern;

[0026] (6) Material deposition: The developed silicon wafer is placed in an evaporation coating apparatus, and a 5-nanometer titanium film and a 50-nanometer gold film are thermally evaporated respectively. The 5-nanometer titanium film is used as an adhesion layer for the gold film.

[0027] (7) Removing the photoresist: After the chamber cools down, the vacuum is released and the coated silicon wafer is taken out. The silicon wafer is immersed in acetone and ultrasonically cleaned until the photoresist is completely removed, leaving a gold nanowire pattern with a line width of about 200 nm.

[0028] Furthermore, preparing a silicon oxide contour pattern on a silicon wafer surface having a thick silicon oxide film grown on the surface specifically includes the following steps:

[0029] (1) Spin coating positive photoresist: Spin coating positive photoresist on silicon oxide wafer and then bake;

[0030] (2) Spin coating negative photoresist: Place the cooled silicon wafer on a spin coater, fix it in vacuum, spin coat the negative photoresist, and then bake it;

[0031] (3) UV exposure: The silicon wafer substrate that has gone through the above steps is tightly fixed under the square pattern mask, evacuated and placed directly under the UV light source, and the light source is turned on for photolithography. The exposure time is adjusted according to the type of photoresist pairing group and the thickness of the photoresist layer. After the exposure is completed, the mask is removed, the exposed silicon wafer is moved to the heating table, and then baked;

[0032] (4) Two-step development:

[0033] After the post-baking is completed, the silicon wafer is cooled to room temperature and then developed. The process is as follows: the silicon wafer after photolithography is placed in a negative photoresist developer to wash away the negative photoresist on the silicon wafer that has not been exposed; then the silicon wafer is taken out and washed with water and dried with a nitrogen flow;

[0034] The silicon wafer is then placed in a positive photoresist developer to wash away the exposed positive photoresist on the silicon wafer, while the unexposed negative photoresist under the exposed negative photoresist is not completely removed; the silicon wafer is then taken out and washed with water and dried with a nitrogen stream, thereby preparing a square contour line pattern based on the template pattern.

[0035] (5) Dry etching: Place the silicon wafer in an ion etcher and use plasma gas to etch the silicon dioxide mask layer. This will remove the pre-deposited silicon dioxide layer at the square outline pattern, exposing the silicon base underneath.

[0036] (6) Removal of photoresist: The silicon wafer is immersed in acetone and ultrasonically cleaned until the photoresist is completely removed, thereby preparing a silicon dioxide square outline.

[0037] Furthermore, the spin coating process includes spin coating at a rotation speed of 500-8000 rpm; and the drying temperature after spin coating is 30° C.-300° C.

[0038] Furthermore, the spin coating process includes spin coating at a rotation speed of 2000-8000 rpm for 30-40 seconds; and drying after spin coating at a temperature of 90-100° C. for 30-90 seconds.

[0039] Furthermore, the exposure light source may be an ultraviolet light source, a deep ultraviolet light source, an extreme ultraviolet light source, an ion beam, an electron beam or an X-ray.

[0040] Furthermore, the wavelength of the light source for exposure is 10-400nm, and the exposure flux is 1-1000mJ / cm 2 The drying temperature after exposure is 30-300℃.

[0041] Furthermore, the wavelength of the light source for exposure is 350-400nm, and the exposure flux is 150-200mJ / cm 2The drying temperature after exposure is 95-105℃ and the time is 40-90s.

[0042] Further, the positive photoresist includes positive ultraviolet photoresist, positive deep ultraviolet photoresist, positive extreme ultraviolet photoresist, positive electron beam photoresist, positive ion beam photoresist or positive X-ray photoresist, including MICROPOSITS1800 series photoresist, BCI-3511 photoresist, AZ series photoresist (such as AZ111, AZ 1500, AZ 3300, AZ4999, AZ 6600, AZ 8112, AZ 3000, AZ 1075, AZ 700, AZ 900), HNR 500 series photoresist, OiR series photoresist, TDMR-AR80 HP 6CP, PR1 series photoresist, ma-P 1200 series photoresist, SPR series photoresist (such as SPR 220, SPR 660, SPR3000, etc.), PMMA series photoresist, etc.

[0043] The negative photoresist includes negative ultraviolet photoresist, negative deep ultraviolet photoresist, negative extreme ultraviolet photoresist, negative electron beam photoresist, negative ion beam photoresist or positive X-ray photoresist, including but not limited to NANO TM SU-8 Series, HSQ, AZ series photoresist (such as AZ N4000, AZ N6000), HNR series photoresist, SC series photoresist, ma-N series photoresist (such as ma-N 400, ma-N 1400), 2000 Series, 5500Photoresis, NR7-PY Series, NR9-PY Series, JSR WPR Series, NR71 Series NR9Series, etc.

[0044] Furthermore, the photoresist developer is generally a developer corresponding to the photoresist used. For example, the positive photoresist developer may be MF-26A, and the negative photoresist developer may be SU-8developer.

[0045] Furthermore, the characteristic line width or characteristic size of the template pattern is 2nm-1000μm.

[0046] Furthermore, the characteristic line width or characteristic size of the template pattern is 2nm-1μm.

[0047] Further, the material deposition technique includes electrochemical deposition, electroplating, CVD deposition, laser sputtering, magnetron sputtering, thermal evaporation, electron beam evaporation or atomic deposition;

[0048] The etching technology includes wet etching or dry etching; the wet etching includes electrochemical etching or selective liquid etching, and the dry etching includes ion etching or chemical reaction ion etching.

[0049] Furthermore, the focused light source direct writing includes ultraviolet light direct writing, deep ultraviolet light direct writing, extreme ultraviolet light direct writing, ion beam direct writing, electron beam direct writing or X-ray direct writing.

[0050] Furthermore, the substrate material includes semiconductor, metal, insulator, polymer or composite material.

[0051] Compared with the prior art, the present invention has the following advantages:

[0052] (1) The present invention continues the characteristics of high efficiency, low cost and simple operation of traditional photolithography, and makes up for the limitations of traditional photolithography in the preparation of sub-micron resolution patterns;

[0053] (2) The present invention achieves the miniaturization of the original mask pattern. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] Figure 1 It is a schematic diagram of the process in Example 1;

[0055] Figure 2 It is a schematic diagram of the process in Example 2;

[0056] Figure 3 This is the gold nanowire pattern prepared in Example 1. DETAILED DESCRIPTION

[0057] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. This embodiment is implemented based on the technical solution of the present invention, and provides a detailed implementation method and specific operation process, but the protection scope of the present invention is not limited to the following embodiments.

[0058] A photolithography method based on a double-layer photoresist, the method comprising the following steps:

[0059] (1) Apply a layer of positive photoresist on the substrate and dry it;

[0060] Then apply a layer of negative photoresist on the positive photoresist and dry it;

[0061] Positive photoresists include positive ultraviolet photoresists, positive deep ultraviolet photoresists, positive extreme ultraviolet photoresists, positive electron beam photoresists, positive ion beam photoresists or positive X-ray photoresists. Negative photoresists include negative ultraviolet photoresists, negative deep ultraviolet photoresists, negative extreme ultraviolet photoresists, negative electron beam photoresists, negative ion beam photoresists or positive X-ray photoresists.

[0062] In fact, the matching degree of different types of positive and negative photoresists needs to be confirmed in advance. The following is a positive and negative photoresist pairing group, the positive photoresist model is SPR 660, and the negative photoresist model is SU-8 2;

[0063] The process of spin coating positive photoresist SPR 660 is: first spin coating at a speed of 800-1000 rpm for 5-10 seconds (this step can be omitted), then spin coating at a speed of 2000-5000 rpm for 30-40 seconds, and baking at 90-100° C. for 30-50 seconds.

[0064] The process of spin coating negative photoresist SU-8 2 is: first spin coating at a speed of 800-1000 rpm for 5-10 seconds (this step can be omitted), then spin coating at a speed of 4000-8000 rpm for 30-40 seconds, and baking at 95-100° C. for 60-90 seconds.

[0065] Different rotation speeds determine the thickness of the photoresist film. According to the different film thicknesses, the temperature and time of the pre-bake, as well as the subsequent exposure amount, exposure time, and development time, etc., are adjusted.

[0066] The substrate material includes semiconductor, metal, insulator, polymer or composite material.

[0067] (2) Under an exposure light source, two layers of photoresist are exposed once through a photolithography mask carrying a template pattern or by direct writing with a focused light source. After exposure, exposure patterns of different sizes are formed on the negative photoresist and the positive photoresist, respectively, and then dried; wherein the exposure light source includes an ultraviolet light source, a deep ultraviolet light source, an extreme ultraviolet light source, an ion beam, an electron beam or an X-ray. Direct writing with a focused light source includes direct writing with ultraviolet light, direct writing with deep ultraviolet light, direct writing with extreme ultraviolet light, direct writing with ion beams, direct writing with electron beams or direct writing with X-rays. The characteristic line width or characteristic size of the template pattern is 2nm-1000μm.

[0068] Fix the pre-baked silicon wafer under the mask, then place it under the UV light source, turn on the UV light source for photolithography, and adjust the exposure time according to the positive and negative photoresist pairing used. Taking the pairing mentioned above as an example, 150-200mJ / cm at a wavelength of 350-400nm 2 The exposure flux is suitable for the photoresist pairing of SPR 660 and SU-8 2. The use of UV wavelength and exposure flux should take into account the absorption of UV light by SU-8 2 of different thicknesses to ensure that the SPR 660 layer below can obtain sufficient exposure flux. Because the photoresist pairing of SPR 660 and SU-8 2 responds differently to the exposure flux at a specific wavelength, patterns of different sizes based on the mask pattern can be obtained.

[0069] (3) developing the negative photoresist with a negative photoresist developer;

[0070] (4) Controllably developing the positive photoresist with a positive photoresist developer to wash away only the edge of the exposed pattern on the positive photoresist and expose the substrate material, thereby converting the template pattern into a contour line pattern;

[0071] Taking the pairing mentioned above as an example, after the exposure is completed, the mask is removed, and the exposed silicon wafer is moved to the heating table and baked at 95-105℃ for 40-90 seconds. After the post-baking is completed, the development is performed separately. The process is as follows: the photolithographic silicon wafer is placed in a negative photoresist developer (SU-8 developer), the main component of which is propylene glycol methyl ether acetate, so that the unexposed negative photoresist on the silicon wafer is washed away. Then the silicon wafer is taken out and washed with water, and dried with nitrogen gas; then the silicon wafer is placed in a positive photoresist developer (MF-26A), the main component of which is tetramethylammonium hydroxide, so that the unexposed positive photoresist exposed on the silicon wafer is washed away, and at the same time, the unexposed negative photoresist under the exposed negative photoresist is not completely removed; then the silicon wafer is taken out and washed with water, and dried with nitrogen gas. A hollow line pattern based on the template pattern is prepared.

[0072] When selecting a developer, if the main components of the selected developer are different, the negative photoresist developer will not act on the positive photoresist, ensuring that the development is carried out in steps to obtain the highest quality pattern. At the same time, it has been found that when the negative photoresist developer used will also develop the positive photoresist, the development time of the two steps can be superimposed together, so that after removing the unexposed negative photoresist, the partial development of the positive photoresist can be achieved. After confirmation by scanning electron microscopy, it will not have a significant impact on the patterning of the outer contour. In summary, before the experiment, cross-experiments should be conducted on the positive photoresist and the negative photoresist and the corresponding developer to formulate the most appropriate development process.

[0073] (5) Transferring the contour pattern to the substrate material by material deposition technology or etching technology; wherein the material deposition technology includes electrochemical deposition, electroplating, CVD deposition, laser sputtering, magnetron sputtering, thermal evaporation, electron beam evaporation or atomic deposition. The etching technology includes wet etching or dry etching; the wet etching includes electrochemical etching or selective etching liquid etching, and the dry etching includes ion etching or chemical reactive ion etching.

[0074] (6) Remove the photoresist.

[0075] Example 1

[0076] The preparation process of gold nanowire array based on positive and negative double-layer photoresist lithography technology is as follows Figure 1 As shown, the specific steps include:

[0077] (1) Cleaning silicon wafers:

[0078] Ultrasonic cleaning with concentrated sulfuric acid for 20-30 minutes;

[0079] Ultrasonic cleaning with deionized water for 20-30 minutes;

[0080] Ultrasonic cleaning with ethanol for 20-30 minutes;

[0081] The silicon wafer substrate is blown dry with nitrogen, placed in a dry etcher, and cleaned with oxygen plasma etching for 1-2 minutes.

[0082] (2) Spin coating positive photoresist

[0083] Place the cleaned silicon wafer on a spin coater and fix it under vacuum. Use a dropper to apply 2-4 drops of positive photoresist SPR660, spin coat the photoresist at 800 rpm × 5s + 2500 rpm × 30s, and bake at 95°C for 40 seconds.

[0084] (3) Spin coating negative photoresist

[0085] Place the cooled silicon wafer on a spin coater and fix it under vacuum. Use a dropper to apply 2-4 drops of negative photoresist SU-82, spin coat the photoresist at 1000rpm×5s+4000rpm×40s, and bake at 100℃ for 60 seconds.

[0086] (4) UV exposure

[0087] The silicon wafer substrate after the above steps is tightly fixed under the mask of the 5-micron line array, evacuated and placed directly under the ultraviolet light source, and the light source is turned on for photolithography. The exposure time is adjusted according to the type of photoresist pairing group and the thickness of the photoresist layer. After the exposure is completed, the mask is removed, and the exposed silicon wafer is moved to the heating table and baked at 100°C for 45 seconds.

[0088] (5) Two-step development

[0089] After the post-baking is completed, the silicon wafer is cooled to room temperature and then developed. The process is as follows: the silicon wafer after photolithography is placed in the negative photoresist developer SU-8developer to wash away the negative photoresist on the silicon wafer that has not been exposed; then the silicon wafer is taken out and washed with water and dried with nitrogen gas;

[0090] Then, the silicon wafer is placed in the positive photoresist developer MF-26A to clean the exposed positive photoresist on the silicon wafer, while the unexposed negative photoresist under the exposed negative photoresist is not completely removed; then, the silicon wafer is taken out and cleaned with water and dried with nitrogen gas flow, thereby preparing a contour line pattern based on the template pattern.

[0091] (6) Material deposition

[0092] Place the developed silicon wafer in the evaporation coating instrument and evacuate the vacuum to 10 -6 Pa, use and A 5-nm titanium film and a 50-nm gold film were thermally evaporated at a rate of . The 5-nm titanium film was used as an adhesion layer for the gold film.

[0093] (7) Removal of photoresist

[0094] After the chamber is cooled, the vacuum is released and the coated silicon wafer is taken out. The silicon wafer is immersed in acetone and ultrasonically cleaned until the photoresist is completely removed, leaving a gold nanowire pattern with a line width of ~200nm. Figure 3 As shown in the scanning electron microscope photograph of the metal nanowires obtained by this method, the characteristic line width is less than 200nm.

[0095] Example 2

[0096] Based on the positive and negative double-layer photoresist lithography technology, the process of preparing the silicon oxide contour pattern on the surface of a silicon wafer with a 100nm thick silicon oxide film grown on the surface is as follows Figure 2 As shown, the specific steps include:

[0097] (1) Spin coating positive photoresist

[0098] The silicon oxide wafer was spin-coated with positive photoresist SPR 660 at 2500 rpm for 30-40 seconds and baked at 95° C. for 40 seconds.

[0099] (2) Spin coating negative photoresist

[0100] The cooled silicon wafer was placed on a spin coater and fixed under vacuum. Negative photoresist SU-8 2 was spin-coated at 4000 rpm for 30-40 seconds and baked at 100°C for 60 seconds.

[0101] (3) UV exposure

[0102] The silicon wafer substrate after the above steps is tightly fixed under the 5-micron square pattern mask, evacuated and placed directly under the ultraviolet light source, and the light source is turned on for photolithography. The exposure time is adjusted according to the type of photoresist pairing group and the thickness of the photoresist layer. After the exposure is completed, the mask is removed, and the exposed silicon wafer is moved to the heating table and baked at 100°C for 45 seconds.

[0103] (4) Two-step development

[0104] After the post-baking is completed, the silicon wafer is cooled to room temperature and then developed. The process is as follows: the silicon wafer after photolithography is placed in the negative photoresist developer SU-8 developer to wash away the negative photoresist on the silicon wafer that has not been exposed; then the silicon wafer is taken out and washed with water and dried with nitrogen gas;

[0105] Then, the silicon wafer is placed in the positive photoresist developer MF-26A to clean the exposed positive photoresist on the silicon wafer, while the unexposed negative photoresist under the exposed negative photoresist is not completely removed; then, the silicon wafer is taken out and cleaned with water and dried with nitrogen gas flow, thereby preparing a square contour line pattern based on the template pattern.

[0106] (5) Dry etching

[0107] The silicon wafer is placed in an ion etcher and the silicon dioxide mask layer is etched by plasma gas. The pre-deposited silicon dioxide layer can be removed at the square contour line pattern to expose the silicon base underneath.

[0108] (6) Removal of photoresist

[0109] The silicon wafer was immersed in acetone and ultrasonically cleaned until the photoresist was completely removed, thereby producing a silicon dioxide square outline.

[0110] The above is only a preferred embodiment of the present invention, and does not limit the present invention in other forms. Any technician familiar with the profession may use the above disclosed technical content to change or modify it into an equivalent embodiment with equivalent changes. However, any simple modification, equivalent change and modification made to the above embodiment according to the technical essence of the present invention without departing from the technical solution of the present invention still belongs to the protection scope of the technical solution of the present invention.

Claims

1. A photolithography method based on a double-layer photoresist, characterized in that: The method comprises the following steps: (1) Spin-coating a layer of positive photoresist on the substrate and drying it; then spin-coating a layer of negative photoresist matching the positive photoresist on the positive photoresist and drying it; (2) Under the exposure light source, the two layers of photoresist are exposed once through a photolithography mask carrying a template pattern or by direct writing with a focused light source. After exposure, exposure patterns of different sizes are formed on the negative photoresist and the positive photoresist, respectively, and then dried; (3) Developing the negative photoresist with a negative photoresist developer; (4) Controllably developing the positive photoresist with a positive photoresist developer to wash away only the edge of the exposed pattern on the positive photoresist and expose the substrate material, thereby converting the template pattern into a contour line pattern; (5) Transferring the contour pattern to the substrate material through material deposition technology or etching technology; (6) Remove the photoresist.

2. A photolithography method based on a double-layer photoresist according to claim 1, characterized in that: The spin coating process includes spin coating at a rotation speed of 500-8000 rpm; the drying temperature after spin coating is 30-300°C.

3. A photolithography method based on a double-layer photoresist according to claim 1, characterized in that: The exposure light source includes an ultraviolet light source, an ion beam, an electron beam or an X-ray.

4. A photolithography method based on a double-layer photoresist according to claim 3, characterized in that: The ultraviolet light source includes a deep ultraviolet light source and an extreme ultraviolet light source.

5. A photolithography method based on a double-layer photoresist according to claim 1 or 3, characterized in that: The exposure light source wavelength is 10-400 nm, and the exposure flux is 1-1000 mJ / cm 2 The drying temperature after exposure is 30-300℃.

6. A photolithography method based on double-layer photoresist according to claim 1, characterized in that: The positive photoresist includes positive ultraviolet photoresist, positive electron beam photoresist, positive ion beam photoresist or positive X-ray photoresist; The negative photoresist includes negative ultraviolet photoresist, negative electron beam photoresist, negative ion beam photoresist or positive X-ray photoresist.

7. A photolithography method based on double-layer photoresist according to claim 6, characterized in that: The positive ultraviolet photoresist includes positive deep ultraviolet photoresist and positive extreme ultraviolet photoresist; The negative ultraviolet photoresist includes negative deep ultraviolet photoresist and negative extreme ultraviolet photoresist.

8. A photolithography method based on double-layer photoresist according to claim 1, characterized in that: The developer is the developer corresponding to the photoresist used.

9. A photolithography method based on double-layer photoresist according to claim 1, characterized in that: The characteristic size of the template pattern is 2 nm-1000 μm.

10. A photolithography method based on double-layer photoresist according to claim 1, characterized in that: The material deposition techniques include electrochemical deposition, laser sputtering, magnetron sputtering, thermal evaporation, electron beam evaporation or atomic deposition; The etching technology includes wet etching or dry etching; the wet etching includes electrochemical etching or selective liquid etching, and the dry etching includes ion etching or chemical reaction ion etching.

11. A photolithography method based on double-layer photoresist according to claim 1, characterized in that: The focused light source direct writing includes ultraviolet light direct writing, ion beam direct writing, electron beam direct writing or X-ray direct writing.

12. A photolithography method based on double-layer photoresist according to claim 11, characterized in that: The ultraviolet light direct writing includes deep ultraviolet light direct writing and extreme ultraviolet light direct writing.

13. A photolithography method based on double-layer photoresist according to claim 1, characterized in that: The substrate material includes semiconductor, metal, insulator, polymer or composite material.

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