Semiconductor devices and their manufacturing methods
By placing a grounding ring around the TSV via, the electrical interference problem caused by the increase in the number of vertical stacked layers and the reduction in size in semiconductor devices is solved, thereby improving the performance of the devices.
Patent Information
- Application Number
- CN202211074228.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-02
- Publication Date
- 2025-10-28
- Estimated Expiration
- 2042-09-02
AI Technical Summary
As the number of vertical stacked layers in semiconductor devices increases and their size shrinks, the electrical interference of TSV transmission lines to surrounding structures and circuits becomes increasingly serious, affecting device performance improvement.
A grounding ring is set around the TSV via and grounded through the substrate grounding terminal to shield the transmission line from electrical interference to the surrounding structure and circuit. The grounding ring structure reduces electrical interference and blocks stress effects.
It effectively reduces electrical interference from TSV vias and improves the overall performance of semiconductor devices.
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Figure CN115472584B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a semiconductor device and its manufacturing method. Background Technology
[0002] As the linewidth of integrated circuits continues to shrink and the functional density continues to increase, semiconductor processes that perform planar integration face many insurmountable obstacles. 3D integration technology is an effective way to overcome these barriers. In 3D integration technology, different wafers are first used to fabricate a portion of the circuit. Then, the wafers with the circuits are stacked vertically along the thickness direction, and the circuits on the wafers are interconnected to form a complete circuit system.
[0003] To interconnect circuits on vertically stacked wafers, vertical interconnection is often achieved by forming through-silicon vias (TSVs). During operation, the resulting semiconductor device can transmit signals of different frequency bands using these TSVs as needed. However, TSV transmission lines can cause electrical interference to surrounding devices and circuits (especially when transmitting high-frequency signals), leading to system instability. Therefore, it is necessary to control the minimum distance between the TSVs and surrounding structures and circuits. However, with the increase in the number of vertically stacked layers and the shrinking size of semiconductor devices, controlling this minimum distance becomes increasingly difficult, and the electrical interference caused by TSV transmission lines to surrounding structures and circuits becomes increasingly significant, impacting the performance improvement of semiconductor devices. Summary of the Invention
[0004] In order to reduce the electrical interference caused by TSV transmission lines to surrounding structures and circuits, the present invention provides a semiconductor device and a method for manufacturing a semiconductor device.
[0005] On one hand, the present invention provides a semiconductor device comprising at least two vertically stacked and electrically connected TSV conduction structures, each of the TSV conduction structures comprising a substrate and a TSV via penetrating the substrate, wherein at least one of the TSV conduction structures further comprises:
[0006] A substrate grounding terminal is disposed on the first surface of the corresponding substrate;
[0007] A first dielectric layer is formed on a first surface of the substrate, and the TSV via passes through at least a portion of the first dielectric layer; and
[0008] A grounding ring is provided corresponding to at least one of the TSV vias, the grounding ring at least surrounds a portion of the corresponding TSV via located in the first dielectric layer, and the grounding ring is grounded through the substrate grounding terminal.
[0009] Optionally, the grounding ring is disposed in the substrate and at least a portion of the first dielectric layer; or, the grounding ring is disposed in at least a portion of the first dielectric layer.
[0010] Optionally, a first conductive structure is provided in the first dielectric layer, and the TSV via passes through a portion of the first dielectric layer and is connected to the first conductive structure.
[0011] Optionally, the first conductive structure is connected to both the substrate grounding terminal and the grounding ring, and the grounding ring is grounded by connecting to the substrate grounding terminal through the first conductive structure.
[0012] Optionally, the first conductive structure includes:
[0013] A first conductive layer is disposed within the first dielectric layer. The first conductive layer includes an electrically isolated first metal region and a second metal region. The TSV via is connected to the first metal region, and the grounding ring is connected to the second metal region.
[0014] The first connector connects the second metal region and the substrate grounding terminal, thereby the grounding ring is connected to the substrate grounding terminal through the second metal region and the first connector.
[0015] Optionally, an electronic component is formed on the first surface of the substrate, and the TSV via is connected to the electronic component through the first conductive structure.
[0016] Optionally, the at least one of the TSV conduction structures further includes:
[0017] A second dielectric layer is formed on a second surface of the substrate, the second surface being opposite to the first surface. A second conductive structure is disposed in the second dielectric layer, and the TSV via passes through a portion of the second dielectric layer and is connected to the second conductive structure.
[0018] Optionally, in two adjacent TSV conduction structures, at least one pair of TSV conduction holes located in the two adjacent TSV conduction structures are connected, and a corresponding grounding ring is provided around each of the at least one pair of TSV conduction holes located in the two adjacent TSV conduction structures.
[0019] On one hand, the present invention provides a method for manufacturing a semiconductor device, comprising:
[0020] A substrate is provided, the substrate including a first side and a second side opposite to each other, and a substrate ground terminal is provided on the first side, and a first dielectric layer is formed on the first side of the substrate;
[0021] A TSV via is formed on the second side of the substrate to form a first TSV conduction structure. The TSV via passes through the substrate and at least a portion of the first dielectric layer. Before or after forming the TSV via, or during the formation of the TSV via, a grounding ring is formed corresponding to at least one of the TSV vias. The grounding ring at least surrounds the portion of the corresponding TSV via located in the first dielectric layer, and the grounding ring is grounded through a grounding terminal of the substrate.
[0022] At least one other substrate is stacked sequentially on the second side of the substrate, and a corresponding TSV via is formed in the other substrate to form a second TSV conductive structure, wherein the second TSV conductive structure is electrically connected to the first TSV conductive structure.
[0023] Optionally, a first conductive structure is formed in the first dielectric layer, and the TSV via formed on the second side of the substrate passes through a portion of the first dielectric layer and is connected to the first conductive structure.
[0024] Optionally, before fabricating the TSV via on the second side of the substrate, the fabrication method further includes: forming the ground ring in a portion of the first dielectric layer, such that the ground ring is connected to the ground terminal of the substrate through the first conductive structure; and bonding the substrate to a carrier substrate such that the first side of the substrate faces the carrier substrate, exposing the second side of the substrate.
[0025] Optionally, before fabricating the TSV via on the second side of the substrate, the substrate is bonded to a carrier substrate such that the first side of the substrate faces the carrier substrate, exposing the second side of the substrate; after bonding the substrate to the carrier substrate, the TSV via and the grounding ring are fabricated simultaneously or asynchronously on the second side of the substrate, the grounding ring passing through the substrate and a portion of the first dielectric layer, and connected to the grounding terminal of the substrate through the first conductive structure.
[0026] Optionally, a corresponding grounding ring may also be formed around at least one TSV via in the other substrate.
[0027] The semiconductor device provided by the present invention includes at least two vertically stacked and electrically connected TSV via structures, wherein at least one of the TSV via structures further includes a substrate ground terminal disposed on a first surface of a corresponding substrate, a first dielectric layer formed on the first surface of the substrate, and a ground ring disposed corresponding to at least one of the TSV vias. The ground ring at least surrounds a portion of the corresponding TSV via located in the first dielectric layer. The ground ring is grounded through the substrate ground terminal. The ground ring has the function of shielding the transmission lines of the surrounding TSV vias from electrical interference to surrounding structures and circuits, thereby helping to improve the performance of the semiconductor device.
[0028] In the semiconductor device fabrication method provided by the present invention, before or after forming a TSV via through the substrate and at least a portion of the first dielectric layer on the second surface of the substrate, or during the formation of the TSV via, a grounding ring is formed corresponding to at least one of the TSV vias. The grounding ring at least surrounds a portion of the corresponding TSV via located in the first dielectric layer. The grounding ring is grounded through a substrate grounding end located on the first surface of the substrate. The grounding ring has the function of shielding the transmission lines of the surrounding TSV vias from electrical interference to the surrounding structures and circuits, thereby helping to improve the performance of the semiconductor device. Attached Figure Description
[0029] Figure 1 This is a cross-sectional schematic diagram of the TSV conduction structure in one embodiment of the present invention.
[0030] Figure 2 This is a cross-sectional schematic diagram of the TSV conduction structure in another embodiment of the present invention.
[0031] Figure 3 yes Figure 2 A schematic diagram of the cross-section of the TSV via and the grounding ring in the TSV conduction structure shown.
[0032] Figure 4 This is a schematic flowchart of a method for manufacturing a semiconductor device according to an embodiment of the present invention.
[0033] Figure 5A This is a cross-sectional schematic diagram of the substrate before bonding to the carrier substrate in a method for manufacturing a semiconductor device according to an embodiment of the present invention.
[0034] Figure 5B yes Figure 5A Top view of the central region W.
[0035] Figure 6 This is a cross-sectional schematic diagram of the substrate and the carrier substrate after bonding in a method for manufacturing a semiconductor device according to an embodiment of the present invention.
[0036] Figure 7 This is a cross-sectional schematic diagram of a semiconductor device fabrication method according to an embodiment of the present invention after forming a grounding ring.
[0037] Figure 8A This is a cross-sectional schematic diagram of the semiconductor device fabrication method according to an embodiment of the present invention after forming a grounding ring and a TSV via.
[0038] Figure 8B yes Figure 8A Top view of the central region W.
[0039] Figure 9A This is a cross-sectional schematic diagram of a semiconductor device fabrication method according to an embodiment of the present invention, after a second conductive structure is formed on the second surface of a substrate.
[0040] Figure 9B yes Figure 9A Top view of the central region W.
[0041] Explanation of reference numerals in the attached figures:
[0042] 100 - Substrate; 100a - First surface; 100b - Second surface; 110 - TSV via; 120 - Substrate ground terminal; 130 - First dielectric layer; 140 - Grounding ring; 151 - First conductive layer; 151a - First metal region; 151b - Second metal region; 151c - Third metal region; 152 - First connector; 153 - Second connector; 154 - First metal pad; 160 - Second dielectric layer; 161 - First and second surface dielectric layer; 162 - Second and second surface dielectric layer; 171 - Second metal pad; 200 - Supporting substrate; 10 - Electronic components. Detailed Implementation
[0043] The semiconductor device and its fabrication method of the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be understood that the accompanying drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention. It should be noted that the terms "first," "second," etc., used below are used to distinguish between similar elements and are not necessarily used to describe a specific order or chronological sequence. It should be understood that these terms, as used, can be replaced where appropriate, for example, to allow the embodiments of the present invention described herein to operate in a different order than those described or shown herein. While components in the drawings are easily identifiable in all figures if they are identical to those already labeled, not all identical components will be labeled and described below or in the drawings for clarity of explanation.
[0044] This invention first relates to a semiconductor device comprising at least two vertically stacked and electrically connected TSV (Transient Voltage Spectrometer) structures, such as 5 or even 10 or more TSV structures, with adjacent TSV structures connected by bonding. Each TSV structure includes a substrate and a TSV via penetrating the substrate, and may include one or more TSV vias penetrating the same substrate. The substrate may be, for example, a silicon substrate, a germanium (Ge) substrate, a germanium-silicon substrate, an SOI (silicon-on-insulator) substrate, a GOI (germanium-on-insulator) substrate, or other suitable substrates. The substrate may be implanted with dopant ions to change electrical parameters according to design requirements. One or more electronic components may be formed on the substrate, which may be active or passive circuit elements, such as memory cells and / or logic circuits, or MOS devices, sensors, or memory devices, and may also include other suitable components. The surface on which the electronic components are formed is typically referred to as the front side of the substrate, and the opposite surface is referred to as the back side of the substrate.
[0045] Reference Figures 1 to 3 In the semiconductor device of this embodiment of the invention, at least one of the TSV conduction structures includes a substrate 100 and a TSV via 110 penetrating the substrate 100, and also includes a substrate ground terminal 120, a first dielectric layer 130 and a ground ring 140.
[0046] Specifically, the substrate ground terminal 120 is used to ground the substrate 100. The substrate ground terminal 120 may include a doped region surface of the substrate 100 or a lead-out terminal connected to a doped region in the substrate 100. The substrate ground terminal 120 may be disposed on the front side and / or the back side of the substrate 100. Here, the surface of the substrate 100 on which the substrate ground terminal 120 is disposed is referred to as the first surface 100a of the substrate 120. The first surface 100a may be the front side of the substrate 100 on which the electronic components 10 are formed or the back side of the substrate 100 away from the electronic components 10. Figure 1 and Figure 2 The cross-sectional view shown exemplarily uses the front side of the substrate 100 as the first surface 100a, and the substrate 100 also has a second surface 100b opposite to the first surface 100a.
[0047] A first dielectric layer 130 is formed on a first surface 100a of a substrate 100. A TSV via 110 not only penetrates the substrate 100 but also passes through at least a portion of the first dielectric layer 130. In this embodiment, a first conductive structure is provided in the first dielectric layer 130. The TSV via 110 is located at the end of the first dielectric layer 130 and connected to the first conductive structure. The first conductive structure can be used to connect the TSV via structure to other TSV via structures. The invention is not limited thereto. In another embodiment, the TSV via 110 can penetrate the entire first dielectric layer 130 and can be directly used to connect to other TSV via structures.
[0048] A grounding ring 140 is provided corresponding to at least one TSV via 110, meaning that a grounding ring 140 is provided around at least a portion of the TSV via 110. The grounding ring 140 may include an annular groove formed around the corresponding TSV via 110 and a conductive material filling the annular groove, the conductive material being the same as the conductive material in the corresponding TSV via 110. One or more grounding rings 140 may be provided in the same TSV conduction structure. The height direction of the grounding ring 140 is along the thickness direction of the substrate, i.e., the same as the height direction of the TSV via 110. In this embodiment, the grounding ring 140 at least surrounds a portion of the corresponding TSV via 110 located in the first dielectric layer 130, meaning that the grounding ring 140 and the portion of the corresponding TSV via 110 located in the first dielectric layer 130 have an overlapping space in the height direction.
[0049] Specifically, refer to Figure 1 In one embodiment, the grounding ring 140 is entirely disposed within at least a portion of the first dielectric layer 130, and the grounding ring 140 surrounds at least a portion of the corresponding TSV via 110 located within the first dielectric layer 130. In this case, the grounding ring 140 does not extend into the substrate 100 and therefore does not surround the portion of the corresponding TSV via 110 disposed within the substrate 100. When the semiconductor device is operating, signals of different frequency bands can be transmitted using the TSV via 110. Due to the shielding effect of the grounding ring 140, electrical interference caused by the transmission lines of the TSV via 110 to surrounding structures and circuits can be reduced.
[0050] Reference Figure 2 In one embodiment, the grounding ring 140 passes through the substrate 100 and at least a portion of the first dielectric layer 130, and the grounding ring 140 surrounds at least a portion of the corresponding TSV via 110 passing through the substrate 100 and at least a portion of the first dielectric layer 130, relative to... Figure 1As shown in the diagram, this grounding ring 140 has an increased shielding range, resulting in better shielding performance. In practice, the structure of the grounding ring 140 can be selected based on application requirements and manufacturing processes.
[0051] The grounding ring 140 is grounded through the substrate grounding terminal 120. For example, the grounding ring 140 can be grounded directly by contacting the surface of the corresponding doped region of the substrate. However, it is not limited to this; see also [reference needed]. Figure 2 In this embodiment, the first conductive structure disposed in the first dielectric layer 130 is connected to the substrate grounding terminal 120 and the grounding ring 140 respectively, so that the grounding ring 140 is grounded by connecting to the substrate grounding terminal 120 through the first conductive structure.
[0052] Specifically, the first conductive structure may include a first conductive layer 151 disposed within the first dielectric layer 130. The first conductive layer 151 includes an electrically isolated first metal region 151a and a second metal region 151b. A TSV via 110 is connected to the first metal region 151a, and the grounding ring 140 is connected to the second metal region 151b. The first conductive structure may also include a first connector 152, which connects the second metal region 151b and the aforementioned substrate grounding terminal 120, thereby connecting the grounding ring 140 to the substrate grounding terminal 120. Depending on the relative position of the second metal region 151b and the substrate grounding terminal 120, and according to process requirements, the first connector 152 may be formed using a conductive plug or a combination of a conductive plug and a conductive layer. In this grounding method, the shape and extent of the second metal region 151b can be adjusted as needed, thus allowing for flexible adjustment of the connection position between the second metal region 151b and the grounding ring 120. This ensures that the grounding ring 140 is grounded without increasing the complexity of the manufacturing process.
[0053] Reference Figures 1 to 3 A plurality of TSV vias 110 may be formed in the substrate 100, and at least some of the TSV vias 110 are surrounded by grounding rings 140. Electronic components 10 formed on the front side of the substrate 100 may be located between the plurality of TSV vias 110. The electronic components 10 may be interconnected with at least one surrounding TSV via 110 on the front side of the substrate 100.
[0054] In this embodiment, the first dielectric layer 130, the first conductive structure in the first dielectric layer 130, and the ground ring 140 are exemplary formed on the front side of the substrate 100 (as the first surface 100a). The electronic component 10 can then be interconnected with at least one surrounding TSV via through the first conductive structure in the first dielectric layer 130. Specifically, refer to... Figure 1 and Figure 2In this embodiment, the first conductive layer 151 of the first conductive structure may further include a third metal region 151c. The third metal region 151c can be connected to the electronic component 10 through a second connector 153. For example, the third metal region 151c bypasses the second metal region 151b and is connected to the first metal region 151a, thereby enabling the TSV via 110 to be connected to the electronic component 10. However, this is not the only possibility. Refer to [reference needed]. Figure 1 and Figure 2 The first metal region 151a, the second metal region 151b, and the third metal region 151c in the first conductive layer 151 are electrically isolated from each other, for example. The first conductive structure may also include a first metal pad 154, which is further away from the first surface 100a of the substrate 100 than the first conductive layer 151. The first metal region 151a and the third metal region 151c are connected through the first metal pad 154, so that the TSV via 110 and the electronic component 10 are interconnected without affecting the grounding ring 140.
[0055] Reference Figure 1 and Figure 2 The TSV conductive structure with grounding ring 140 in this embodiment of the invention may further include a second dielectric layer 160 formed on the second surface 100b of the substrate 100. Furthermore, a second conductive structure may be formed in the second dielectric layer 160, which is used to connect the TSV conductive structure to other TSV conductive structures or external structures on the second surface side. The aforementioned TSV via 110 penetrating the substrate 100 may pass through a portion of the second dielectric layer 160 and connect to the second conductive structure. Exemplarily, the second conductive structure is located on the back side of the substrate 100 and includes a second metal pad 171, through which the TSV conductive structure is bonded to other TSV conductive structures on the second surface side.
[0056] Optionally, in two adjacent TSV conduction structures of the semiconductor device, at least one pair of TSV vias 110 located in the two TSV conduction structures are conductive, and a corresponding grounding ring 140 is provided around each of the at least one pair of TSV vias 110 located in the two TSV conduction structures. The grounding rings 140 provided around the conductive TSV vias 110 can be electrically isolated or interconnected within the semiconductor device.
[0057] The semiconductor device provided by the present invention includes at least two vertically stacked and electrically connected TSV conduction structures, wherein at least one of the TSV conduction structures further includes a substrate ground terminal 120 disposed on a first surface 100a of a corresponding substrate 100, a first dielectric layer 130 formed on the first surface 100a of the substrate 100, and a ground ring 140 disposed corresponding to at least one TSV via 110. The ground ring 140 at least surrounds a portion of the corresponding TSV via 110 located in the first dielectric layer 130, and the ground ring 140 is grounded through the substrate ground terminal 120. The ground ring 140 has the function of shielding the transmission lines of the surrounding TSV via 110 from electrical interference to surrounding structures and circuits; in addition, the ground ring 140 is disposed around the corresponding TSV via 110, which has a blocking effect on the stress generated by the TSV via 110, thereby helping to reduce the stress influence of the TSV via 110 on the surrounding structure and helping to improve the performance of the semiconductor device.
[0058] This invention also relates to a method for manufacturing a semiconductor device, which can be used to manufacture the semiconductor device described in the above embodiments. (Refer to...) Figure 4 The manufacturing method includes:
[0059] S1: A substrate is provided, the substrate including a first side and a second side opposite to each other, and a substrate ground terminal is provided on the first side, and a first dielectric layer is formed on the first side of the substrate;
[0060] S2: A TSV via is formed on the second side of the substrate to form a first TSV conduction structure. The TSV via passes through the substrate and at least a portion of the first dielectric layer. Before or after forming the TSV via, or during the formation of the TSV via, a grounding ring is formed corresponding to at least one of the TSV vias. The grounding ring at least surrounds a portion of the corresponding TSV via located in the first dielectric layer. The grounding ring is grounded through a grounding terminal of the substrate.
[0061] S3: At least one other substrate is stacked sequentially on the second side of the substrate, and a corresponding TSV via is provided in the other substrate to form a second TSV conductive structure, wherein the second TSV conductive structure is electrically connected to the first TSV conductive structure.
[0062] The manufacturing method is further explained below with reference to other accompanying drawings.
[0063] Reference Figure 5AIn the first step S1, a substrate 100 is provided. The substrate 100 includes a first surface 100a and a second surface 100b, and a substrate ground terminal 120 is provided on the first surface 100a. The first surface 100a can be the front or back surface of the substrate 100. This embodiment uses the first surface 100a as the front surface of the substrate 100 as an example for explanation. Electronic components 10 can be formed on the first surface 100a. The substrate ground terminal 120 can be separate from or shared with the ground terminal of the electronic components 10 formed on the first surface 100a of the substrate 100. In addition, a first dielectric layer 130 is formed on the first surface 100a of the substrate 100, and the first dielectric layer 130 covers the first surface 100a of the substrate 100 and the substrate ground terminal 120. Optionally, a first conductive structure is formed in the first dielectric layer 130, and the substrate ground terminal 120 can be connected to the first conductive structure. It is understood that... Figure 5A Only a portion of the substrate 100 and the area above it is shown.
[0064] Reference Figure 5A The first conductive structure may include a first conductive layer 151 and a first metal pad 154. The first conductive layer 151 includes an electrically isolated first metal region 151a, a second metal region 151b, and a third metal region 151c. The second metal region 151b is connected to the substrate ground terminal 120 via a first connector 152, and the third metal region 151c is connected to the electronic component 10 via a second connector 153. The first metal pad 154 is further away from the first surface 100a of the substrate 100 than the first conductive layer 151 and is connected to the first conductive layer 151. The first metal region 151a and the third metal region 151c can be connected through the first metal pad 154, thereby connecting the first metal region 151a to the electronic component 10. Subsequently, the first metal region 151a is connected to a TSV via, allowing the TSV via to connect to the electronic component 10. (Refer to...) Figure 5B From the top view, the first metal pad 154 is exposed from the first dielectric layer 130, and the remaining part of the first surface 100a of the substrate 100 is covered by the first dielectric layer 130; the cross-sectional shape of the second metal region 151b is, for example, annular, and each second metal region 151b is arranged around a first metal region 151a.
[0065] Next, step S2 is performed, in which a TSV via is formed on the second surface 100b of the substrate 100 to form a first TSV conductive structure. Before or after forming the TSV via, or during the formation of the TSV via, a grounding ring is formed corresponding to at least one of the TSV vias. The grounding ring at least surrounds a portion of the corresponding TSV via located in the first dielectric layer 130, and is grounded through the substrate grounding terminal 120. Furthermore, both the TSV via 110 and the grounding ring 140 can be connected to the first conductive structure in the first dielectric layer 130, and the grounding ring 140 can be connected to the substrate grounding terminal 120 through the first conductive structure.
[0066] In one embodiment, the grounding ring is formed in the first dielectric layer 130 by a semiconductor process on the first surface 100a of the substrate 100 (see reference). Figure 1 Therefore, the grounding ring is formed before the TSV via is formed on the second surface 100b of the substrate 100. Specifically, in this embodiment, before the TSV via is formed on the second surface 100b of the substrate 100, the following process may be included: First, a grounding ring 140 is formed in a portion of the first dielectric layer 130, such that the grounding ring 140 is connected to the substrate ground terminal 120 through the first conductive structure; then, the substrate 100 is bonded to a carrier wafer, such that the first surface 100a of the substrate 100 faces the carrier wafer, exposing the second surface 100b of the substrate 100 to facilitate the formation of the TSV via. In this embodiment, the grounding ring 140 surrounds at least a portion of the corresponding TSV via 110 located in the first dielectric layer 130, but does not surround the portion of the corresponding TSV via 110 that penetrates into the substrate 100.
[0067] In this embodiment, the grounding ring is formed through a semiconductor process on the second surface 100b of the substrate 100. Furthermore, the grounding ring is formed after bonding the substrate 100 to a carrier substrate and exposing the second surface 100b of the substrate 100. During the semiconductor process on the second surface 100b after bonding the substrate 100 to the carrier substrate, the TSV via and the grounding ring can be fabricated simultaneously or asynchronously. This process is described in detail below.
[0068] Reference Figure 6In this embodiment, before fabricating the TSV via and the grounding ring on the second surface 100b of the substrate 100, the substrate 100 is first bonded to a carrier substrate 200. The carrier substrate 200 can be a wafer or other type of substrate. In this embodiment, no circuit structure is provided on the carrier substrate 200, or the provided circuit structure is not connected to the first conductive structure. The carrier substrate 200 can be bonded to the first dielectric layer 130 and the first metal pad 154 on the substrate 100 by adhesive bonding or fusion bonding. After bonding the carrier substrate 200, the second surface 100b is exposed. Then, the substrate 100 can be thinned first, and the thinned surface is still referred to as the second surface 100b. Then, a dielectric material is deposited to form a first second surface dielectric layer 161 on the second surface 100b of the substrate 100. The first second surface dielectric layer 161 can include one or a combination of dielectric materials such as silicon oxide, silicon nitride, silicon oxynitride, and NDC.
[0069] Taking the fabrication of a grounding ring 140 on the second surface 100b of substrate 100 followed by the fabrication of a TSV via 110 as an example, refer to... Figure 7 Fabricating the grounding ring 140 may include the following process: performing photolithography and etching processes on the second surface 100b of the substrate 100 to form an annular groove penetrating the first and second surface dielectric layer 161, the substrate 100, and a portion of the first dielectric layer 130, the annular groove exposing the second metal region 151b in the aforementioned first conductive layer 151; then, covering the inner surface of the annular groove with a barrier material (such as silicon oxide) and filling it with a metal material (such as copper or tungsten), to obtain the grounding ring 140. The end of the grounding ring 140 is connected to the second metal region 151b. Since the second metal region 151b is connected to the substrate grounding terminal 120, the grounding ring 140 is connected to the substrate grounding terminal 120, thereby enabling grounding through the substrate grounding terminal 120 and the substrate 100. (Refer to...) Figure 8A Fabricating the TSV via may include the following process: performing photolithography and etching on the second surface 100b of the substrate 100 to form an opening penetrating the first and second surface dielectric layer 161, the substrate 100, and a portion of the first dielectric layer 130, the opening exposing the first metal region 151a in the first conductive layer 151; then, covering the inner surface of the opening with a barrier material (such as silicon oxide) and filling it with a metal material (such as copper or tungsten) to obtain the TSV via 110. In this embodiment, both the TSV via 110 and the grounding ring 140 pass through the substrate 110 and a portion of the first dielectric layer 130, and the grounding ring 140 surrounds the corresponding TSV via 110, passing through at least a portion of the substrate 100 and located in at least a portion of the first dielectric layer 130.
[0070] Reference Figure 8AThe TSV via 110 is connected to the first metal region 151a, and the TSV via 110 can connect to the electronic component 10 through the first metal region 151a, the first contact pad 154, and the third metal region 151c. Thus, the electrical connection of the input and / or output terminals of the electronic component 10 can be led to the second surface 100b of the substrate 100 through the TSV via 110. In another embodiment, a ground ring 140 and the TSV via 110 can be simultaneously fabricated on the second surface 100b of the substrate 100, wherein the aforementioned annular groove and opening are formed in the same etching process, and the annular groove and opening are filled in the same metal deposition process. The fabrication sequence of the ground ring 140 and the TSV via 110 can be specifically selected according to the design dimensions and process capabilities of the ground ring 140 and the TSV via 110. In this embodiment, the linewidth of the ground ring 140 is set, for example, according to the minimum size allowed by the process, to reduce the stress generated by copper on the surrounding structure during thermal expansion.
[0071] Figure 8B yes Figure 8A Top view of the central region W. (Refer to...) Figure 8B In this embodiment, the grounding ring 140 is arranged around the TSV via 110. The outer cross-section of the grounding ring 140 is, for example, circular, and the TSV via 110 surrounded by the grounding ring 140 is located at the center of the grounding ring 140. However, it is not limited to this. The outer cross-section of the grounding ring 140 can also be elliptical, square, pentagonal, or hexagonal, or it can be an irregular shape.
[0072] Reference Figure 9A Furthermore, in the second step S2, a second second-side dielectric layer 162 can be deposited on one side of the second surface 100b of the substrate 100, and a second conductive structure can be formed in the second second-side dielectric layer 162, so that the second conductive structure is connected to the TSV via 110. The first second-side dielectric layer 161 and the second second-side dielectric layer 162 are collectively referred to as the second dielectric layer 160. In this embodiment, the second conductive structure includes a second metal pad 171, and the second metal pad 171 is connected to the corresponding TSV via 110.
[0073] Reference Figure 9B After the second dielectric layer 162 and the second metal pad 171 are formed, the grounding ring 140 and the TSV via 110 are covered, and the second metal pad 171 is exposed.
[0074] It should be noted that the construction of the second conductive structure is not limited to the second metal pad 171 described above. In some other embodiments, the second conductive structure may also include a conductive layer formed on the surface of the first second dielectric layer 161 and connected to the top of the TSV via 110, wherein the TSV via 110 is connected to the second metal pad 171 through the conductive layer.
[0075] Through the first step S1 and the second step S2 described above, a TSV conductive structure stacked on the carrier substrate 200 is formed, denoted as the first TSV conductive structure. Further, the semiconductor device fabrication method of this embodiment of the invention also includes a third step S3, in which at least one other substrate is sequentially stacked on the second surface 100b of the substrate 100, and corresponding TSV vias are formed in the other substrate according to the above method to form a second TSV conductive structure. Furthermore, by interconnecting the second TSV conductive structure and the first TSV conductive structure, the second TSV conductive structure is electrically connected to the first TSV conductive structure. During the stacking of the other substrate, a corresponding grounding ring can be formed around at least one TSV via in the other substrate according to the above method. In this embodiment, at least a pair of TSV vias 110 located in two adjacent TSV conductive structures can be conductive in the vertical direction between the substrate 100 and the other substrate, and each pair of TSV vias 110 has a grounding ring formed around it. Optionally, the grounding rings 140 formed around the TSV vias 110 can be separately disposed (i.e. electrically isolated) within the semiconductor device, or they can be connected in the vertical direction of the substrate 100. When two adjacent grounding rings 140 are connected, they can also be grounded through the same substrate grounding terminal 120.
[0076] After the process on the second side 100b of the substrate 100 is completed, the above-mentioned carrier substrate 200 can be removed. Optionally, a pad for connection with external circuitry can be formed on the first side 100a of the substrate 100.
[0077] In the semiconductor device fabrication method of this invention, before or after forming a TSV via 110 passing through the substrate 100 and at least a portion of the first dielectric layer 130 on the second surface 100b of the substrate 100, or during the formation of the TSV via 110, a grounding ring 140 is formed corresponding to at least one of the TSV vias 110, such that the grounding ring 140 at least surrounds a portion of the corresponding TSV via 110 located in the first dielectric layer 130. The grounding ring 140 is grounded through a substrate grounding terminal 120 located on the first surface 100a of the substrate 100. The grounding ring 140 has the function of shielding the transmission lines of the surrounding TSV via 110 from electrical interference to surrounding structures and circuits; in addition, the grounding ring 140 is disposed around the corresponding TSV via 110, which has a blocking effect on the stress generated by the TSV via 110, thereby helping to reduce the stress influence of the TSV via 110 on the surrounding structure and helping to improve the performance of the semiconductor device.
[0078] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other.
[0079] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present invention by utilizing the methods and techniques disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention shall fall within the protection scope of the technical solutions of the present invention.
Claims
1. A semiconductor device, characterized in that, The system includes at least two vertically stacked and electrically connected TSV conductive structures, each of the TSV conductive structures including a substrate and a TSV via penetrating the substrate, wherein at least one of the TSV conductive structures further includes: A substrate ground terminal and electronic components are disposed on the first surface of the corresponding substrate; A first dielectric layer is formed on a first surface of the substrate, and the TSV via passes through at least a portion of the first dielectric layer; A grounding ring, corresponding to at least one of the TSV vias, the grounding ring at least surrounds a portion of the corresponding TSV via located in the first dielectric layer, the grounding ring being grounded through the substrate grounding terminal, and the electronic components located outside the grounding ring; and A first conductive structure is formed in the first dielectric layer. The first conductive structure includes a first conductive layer and a first metal pad further away from the first surface of the substrate than the first conductive layer. The first conductive layer includes a first metal region electrically isolated from the TSV via, a second metal region connecting the ground ring and the substrate ground terminal, and a third metal region connecting the electronic components. The first metal region and the third metal region are connected through the first metal pad. The first conductive structure also includes a first connector that connects the second metal region and the substrate ground terminal. Thus, the ground ring is connected to the substrate ground terminal through the second metal region and the first connector.
2. The semiconductor device as claimed in claim 1, characterized in that, The grounding ring is disposed in the substrate and at least a portion of the first dielectric layer; or, the grounding ring is disposed in at least a portion of the first dielectric layer.
3. The semiconductor device as claimed in claim 1, characterized in that, The at least one of the TSV conduction structures further includes: A second dielectric layer is formed on a second surface of the substrate, the second surface being opposite to the first surface. A second conductive structure is disposed in the second dielectric layer, and the TSV via passes through a portion of the second dielectric layer and is connected to the second conductive structure.
4. The semiconductor device as claimed in claim 1, characterized in that, At least one pair of TSV vias located in two adjacent TSV conduction structures are connected, and each of the at least one pair of TSV vias located in two adjacent TSV conduction structures is provided with a corresponding grounding ring around its periphery.
5. A method for manufacturing a semiconductor device, characterized in that, include: A substrate is provided, the substrate including a first side and a second side opposite to each other, and a substrate ground terminal and electronic components are disposed on the first side, a first dielectric layer is formed on the first side of the substrate, and a first conductive structure is formed in the first dielectric layer; A TSV via is formed on the second side of the substrate to form a first TSV conductive structure. The TSV via passes through the substrate and at least a portion of the first dielectric layer. Before or after forming the TSV via, or during the formation of the TSV via, a ground ring is formed corresponding to at least one of the TSV vias. The ground ring at least surrounds a portion of the corresponding TSV via located in the first dielectric layer. The ground ring is grounded through a substrate ground terminal. The electronic component is located outside the ground ring. The first conductive structure includes a first conductive layer and a first metal pad further away from the first side of the substrate than the first conductive layer. The first conductive layer includes a first metal region electrically isolated from the TSV via, a second metal region connecting the ground ring and the substrate ground terminal, and a third metal region connecting the electronic component. The first metal region and the third metal region are connected through the first metal pad. The first conductive structure also includes a first connector connecting the second metal region and the substrate ground terminal, thereby connecting the ground ring to the substrate ground terminal through the second metal region and the first connector. At least one other substrate is stacked sequentially on the second side of the substrate, and a corresponding TSV via is formed in the other substrate to form a second TSV conductive structure, wherein the second TSV conductive structure is electrically connected to the first TSV conductive structure.
6. The manufacturing method as described in claim 5, characterized in that, Before fabricating the TSV via on the second surface of the substrate, the method further includes: The grounding ring is formed in a portion of the first dielectric layer, such that the grounding ring is connected to the substrate grounding terminal via the first conductive structure; and The substrate is bonded to a carrier substrate such that the first surface of the substrate faces the carrier substrate, exposing the second surface of the substrate.
7. The manufacturing method as described in claim 5, characterized in that, Before fabricating the TSV via on the second side of the substrate, the substrate is bonded to a carrier substrate such that the first side of the substrate faces the carrier substrate, exposing the second side of the substrate; after bonding the substrate to the carrier substrate, the TSV via and the grounding ring are fabricated simultaneously or asynchronously on the second side of the substrate, the grounding ring passing through the substrate and a portion of the first dielectric layer, and connected to the grounding terminal of the substrate through the first conductive structure.
8. The manufacturing method as described in claim 5, characterized in that, A corresponding grounding ring is also formed around at least one TSV via in the other substrate.
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