Variable step-size dual-mode parallel equalization method, device, computer equipment and storage medium

Abstract

The present application relates to a variable step-size dual-mode parallel equalization method, device, computer equipment and storage medium. The method comprises: obtaining a high-order QAM input signal of an equalization system; obtaining an equalizer coefficient according to an improved slice multimode algorithm equalizer coefficient, an improved decision-directed algorithm equalizer coefficient and a weighted error function; iteratively updating the equalizer coefficient using the error cost function of the improved slice multimode algorithm and the error cost function of the improved decision-directed algorithm, and equalizing the high-order QAM input signal using the updated equalizer coefficient. The use of this method can reduce the inter-symbol interference of the signal and improve the convergence speed of the algorithm.

Description

Technical Field

[0001] The present application relates to the field of signal processing technology, and in particular to a variable step-size dual-mode parallel equalization method, device, computer equipment and storage medium. Background Art

[0002] The rapid development of Internet technology has greatly increased the demand for bandwidth in communication systems. High-speed network access technology allows people to experience the convenience of life brought by computers and various communication devices at home. The demand for communication services to increase the capacity of communication systems has grown rapidly. However, due to limited spectrum resources, it is difficult to increase system capacity by increasing the number of channels. In addition, in actual communication systems, the transmission environment of wireless communication is a very complex environment, and the wireless channel is an open environment. Due to the influence of multipath propagation, serious inter-symbol interference will be generated when symbol judgment is made at the receiving end. In order to prevent a large probability of false detection when performing symbol detection at the receiving end, it is necessary to use a filter (i.e., an equalizer) to eliminate inter-symbol interference before making a judgment.

[0003] Traditional equalization methods require the introduction of training sequences, which will reduce the frequency band utilization of the system. Some communication systems cannot provide training sequences. If adaptive equalization technology is used, when a single user repeatedly sends training sequences for some reason, it will not only occupy a large amount of bandwidth, but also cause frequent interruptions to the normal communication of other users, violating the effectiveness principle of the communication system. Due to the shortcomings brought by the training sequence, the application of traditional adaptive equalization in modern digital communication systems is limited. The research on blind equalization technology has become an inevitable trend for the development of modern digital communication systems towards high speed and broadband.

[0004] When the traditional Constant Modulus Algorithm (CMA) algorithm is applied to multi-mode signals, such as high-order Quadrature Amplitude Modul (QAM) signals, due to the single modulus value problem, there will be problems such as misadjustment and misjudgment, as well as large residual inter-code crosstalk. In 2005, S Abrar proposed a multi-mode equalization algorithm (Sliced ​​Multimodulus Algorithm, SMMA) related to symbol decision, which introduced the exponential power of the decision value of the equalized output signal into the original cost function of the MMA algorithm, so that the equalized output signals with different decision values ​​converge to the corresponding exponentially weighted modulus value, thereby obtaining better steady-state performance than MMA. However, due to the exponential power problem of the signal decision value in the algorithm, when the algorithm converges, its error function cannot be zero, and the steady-state error cannot be lowered. Therefore, in order to further improve the convergence speed of the equalizer and reduce the steady-state error, some scholars have proposed a dual-mode blind equalization algorithm that combines the blind equalization algorithm and the decision-guided least mean square (DDLMS) algorithm. The implementation method is to initially use a blind equalization algorithm with good cold start characteristics to perform initial convergence of the constellation diagram, and then switch to the DDLMS algorithm for equalization to achieve the optimal effect. However, this dual-mode switching method generally relies on a pre-set mean square error (MSE) threshold. For different signals, a large number of experiments are required, and the equalization efficiency is low. Summary of the invention

[0005] Based on this, it is necessary to provide a variable step-size dual-mode parallel equalization method, device, computer equipment and storage medium to address the above technical problems.

[0006] A variable step-size dual-mode parallel equalization method, the method comprising:

[0007] Get the high-order QAM input signal of the equalization system;

[0008] The equalizer coefficients are obtained according to the equalizer coefficients of the improved slice multimode algorithm, the equalizer coefficients of the improved decision-directed algorithm, and the weighted error function;

[0009] The equalizer coefficients are iteratively updated using the error cost function of the improved sliced ​​multimode algorithm and the error cost function of the improved decision-directed algorithm, and the high-order QAM input signal is equalized using the updated equalizer coefficients.

[0010] In one embodiment, the method further includes: obtaining a weight control function according to an error signal of the equalization system and an error cost function of the improved decision-directed algorithm:

[0011]

[0012] Among them, ξ(n) is the weight control function under the nth iteration, parameter a is used to adjust the size of the value function, parameters b and m are used to control the shape of the weight control function, and e DD (n) is the error cost function of the improved decision-directed algorithm under the nth iteration; according to the equalizer coefficient of the improved sliced ​​multi-mode algorithm, the equalizer coefficient of the improved decision-directed algorithm and the weighted error function, the equalizer coefficient is obtained as follows:

[0013] w=ξw s +w d

[0014] Where w is the equalizer coefficient, w s is the equalizer coefficient of the improved sliced ​​multimode algorithm, w d Equalizer coefficients for the improved decision-directed algorithm.

[0015] In one embodiment, the method further includes: decomposing the obtained blind equalization output signal into a real part and an imaginary part, and decomposing the obtained decision error signal into a real part and an imaginary part; subtracting the square of the real part of the blind equalization output signal from the square of the real part of the decision error signal to obtain a first error correction signal; subtracting the square of the imaginary part of the blind equalization output signal from the square of the imaginary part of the decision error signal to obtain a second error correction signal; obtaining the real part of the error signal according to the first error correction signal, and obtaining the imaginary part of the error signal according to the second error correction signal; obtaining the error cost function of the improved decision-directed algorithm according to the real part of the error signal and the imaginary part of the error signal;

[0016]

[0017] Among them, e DD (n) is the error function of the improved decision-directed algorithm, y R (n) is the real part of the blind equalization output signal, y I (n) is the imaginary part of the blind equalization output signal, is the real part of the decision error signal, is the imaginary part of the decision error signal.

[0018] In one of the embodiments, the iterative step size of the improved slice multi-mode algorithm is a normalized first variable step size function; the normalized first variable step size function is:

[0019]

[0020] Among them, μ SMMA (n) is the step size of the improved slice multimode algorithm at the nth iteration, Re(·) is the real part, e SMMA * (n-1) is the error function of the improved slice multi-mode algorithm at the n-1th iteration, e SMMA (n) is the error function of the improved slice multi-mode algorithm at the nth iteration, x H (n) is the conjugate transpose, and x(n-1) is the input signal at the n-1th iteration.

[0021] In one embodiment, the iterative step size of the improved decision-directed algorithm is a second variable step size function; the second variable step size function is:

[0022]

[0023] Among them, μ DD is the step size of the improved decision-guided algorithm, β* is the parameter that controls the range of the Sigmoid function, α* is the gradient parameter, and e DD is the error cost function of the improved decision-guided algorithm.

[0024] In one embodiment, the improved sliced ​​multi-mode algorithm further includes: after the output of the equalizer is updated by the improved sliced ​​multi-mode algorithm, the update formula of the improved decision-directed algorithm is:

[0025]

[0026] Where Q[.] is the quantization function, μ is the iteration step size of the improved decision-directed algorithm, is the output of the updated equalizer of the improved sliced ​​multimode algorithm, x(n) is the high-order QAM input signal, x is the independent variable in δ(x) and j is the imaginary part.

[0027] In one embodiment, the method further includes: evaluating the performance of the dual-mode algorithm according to the residual inter-symbol crosstalk after equalization, and obtaining a residual inter-symbol crosstalk index as follows:

[0028]

[0029] Among them, ISI is the residual inter-symbol interference index, w is the equalizer tap coefficient vector, h is the channel vector, is the joint impulse response of the equalizer and the channel.

[0030] A variable step-size dual-mode parallel equalization device, the device comprising:

[0031] A signal acquisition module, used to acquire a high-order QAM input signal of an equalization system;

[0032] An equalizer coefficient building module, used for obtaining equalizer coefficients according to the equalizer coefficients of the improved slice multi-mode algorithm, the equalizer coefficients of the improved decision-directed algorithm and the weighted error function;

[0033] The dual-mode parallel equalization module is used to iteratively update the equalizer coefficients using the error cost function of the improved sliced ​​multi-mode algorithm and the error cost function of the improved decision-directed algorithm, and to equalize the high-order QAM input signal using the updated equalizer coefficients.

[0034] A computer device comprises a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0035] Get the high-order QAM input signal of the equalization system;

[0036] The equalizer coefficients are obtained according to the equalizer coefficients of the improved slice multimode algorithm, the equalizer coefficients of the improved decision-directed algorithm, and the weighted error function;

[0037] The equalizer coefficients are iteratively updated using the error cost function of the improved sliced ​​multimode algorithm and the error cost function of the improved decision-directed algorithm, and the high-order QAM input signal is equalized using the updated equalizer coefficients.

[0038] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the following steps:

[0039] Get the high-order QAM input signal of the equalization system;

[0040] The equalizer coefficients are obtained according to the equalizer coefficients of the improved slice multimode algorithm, the equalizer coefficients of the improved decision-directed algorithm, and the weighted error function;

[0041] The equalizer coefficients are iteratively updated using the error cost function of the improved sliced ​​multimode algorithm and the error cost function of the improved decision-directed algorithm, and the high-order QAM input signal is equalized using the updated equalizer coefficients.

[0042] The variable step-size dual-mode parallel equalization method, device, computer equipment and storage medium obtain the high-order QAM input signal of the equalization system, obtain the equalizer coefficient according to the equalizer coefficient of the improved slicing multi-mode algorithm, the equalizer coefficient of the improved decision-directed algorithm and the weighted error function, iteratively update the equalizer coefficient using the error cost function of the improved slicing multi-mode algorithm and the error cost function of the improved decision-directed algorithm, and use the updated equalizer coefficient to equalize the high-order QAM input signal. In the embodiment of the present invention, the high-order QAM signal is equalized by a parallel dual-mode algorithm of the improved slicing multi-mode algorithm with weights and the improved decision-directed algorithm, without establishing a switching threshold, and according to the error situation, the weight of the SMMA algorithm is adjusted to make the steady-state error lower and the equalization effect better. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 A schematic diagram of a flow chart of a variable step-size dual-mode parallel equalization method in an embodiment;

[0044] Figure 2 A schematic diagram of the structure of a composite baseband model for signal equalization in one embodiment;

[0045] Figure 3 A schematic diagram of a parallel dual-mode structure of a variable step-size dual-mode parallel equalization algorithm in one embodiment;

[0046] Figure 4 A schematic diagram of a flow chart of a variable step-size dual-mode parallel equalization method in a specific embodiment;

[0047] Figure 5 A schematic diagram of a simulation flow of a variable step-size dual-mode parallel equalization method in an embodiment;

[0048] Figure 6 Schematic diagram of the simulation constellation of the variable step size dual-mode parallel equalization method in an embodiment, wherein (a) is the constellation diagram of the input 16QAM signal, (b) is the constellation diagram after passing through the channel, (c) is the constellation diagram after CMA equalization, (d) is the constellation diagram after MMA equalization, (e) is the constellation diagram after SMMA, and (f) is the constellation diagram after the algorithm of the present invention.

[0049] Figure 7 It is a schematic diagram of an ISI convergence curve when 16QAM is equalized in a channel in one embodiment;

[0050] Figure 8 It is a structural block diagram of a variable step-size dual-mode parallel equalization device in one embodiment;

[0051] Fig. 9 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0053] In one embodiment, Figure 1 As shown, a variable step-size dual-mode parallel equalization method is provided, comprising the following steps:

[0054] Step 102: Obtain a high-order QAM input signal of the equalization system.

[0055] like Figure 2 The schematic diagram of the composite baseband model structure of signal equalization is shown in FIG. Figure 2 In the nth iteration, the received signal is x(n), the sequence x(n) is input into the equalization system, and the output y(n) = x T (n)w(n), w(n) is the weight of the equalizer.

[0056] Input signal: x(n)=a(n)*h(n)+r(n),

[0057] Output signal:

[0058] Where W represents the filter tap coefficient, and H represents the conjugate transpose. QAM signal is a quadrature amplitude modulation signal. In the QAM system, the amplitude and phase of the signal are modulated as two independent parameters at the same time. According to the different base numbers, QAM signals are divided into 16QAM, 64QAM and 256QAM signals. The vector diagrams corresponding to various QAM signals are constellation diagrams.

[0059] Step 104, obtaining equalizer coefficients according to the equalizer coefficients of the improved slice multi-mode algorithm, the equalizer coefficients of the improved decision-directed algorithm, and the weighted error function.

[0060] The cost function of SMMA is:

[0061]

[0062] in, is the real part statistical modulus information, is the imaginary part statistical modulus information, c is a constant, and the value of c is generally 1. The SMMA algorithm weights the modulus value of the cost function by introducing the exponential power of the decision output signal into the cost function, thereby achieving different cost function modulus values ​​corresponding to different decision output signals.

[0063]

[0064] Among them, a R (n) is the real part of the input signal, and the iterative update formula of the equalizer coefficient of SMMA is:

[0065] w(n+1)=w(n)-μ*e SMMA *x * (n)

[0066] Among them, μ* is the iteration step size, e SMMA * is the error function of the SMMA algorithm, x * (n) is the signal after passing through the channel,

[0067]

[0068]

[0069] Step 106, iteratively update the equalizer coefficients using the error cost function of the improved sliced ​​multimode algorithm and the error cost function of the improved decision-directed algorithm, and use the updated equalizer coefficients to equalize the high-order QAM input signal.

[0070] like Figure 3 The schematic diagram of the parallel dual-mode structure of the variable step-size dual-mode parallel equalization algorithm shown in the figure, in the parallel dual-mode scheme, the tap coefficients of the two equalizers are adjusted by using the SMMA and the improved DD algorithms. In each iterative update, the two algorithms are calculated simultaneously, and finally one of the SMMA or improved DD algorithms is selected based on the reliability of the data. In the early stage of the algorithm, it mainly works in the SMMA mode, but some reliable data still works under the improved DD algorithm. Since the steady-state error function of the SMMA algorithm is not zero, its equalization performance is not as good as that of the improved DD algorithm when the algorithm converges in the later constellation diagram. Therefore, an error cost function determined by the error value is added to the coefficient of the equalizer to adjust the proportion of the two algorithms in the equalization process, which can play a role in accelerating the processing time of the equalization algorithm.

[0071] In the above variable step-size dual-mode parallel equalization method, by obtaining the high-order QAM input signal of the equalization system, the equalizer coefficient is obtained according to the equalizer coefficient of the improved slicing multi-mode algorithm, the equalizer coefficient of the improved decision-guided algorithm and the weighted error function, the equalizer coefficient is iteratively updated using the error cost function of the improved slicing multi-mode algorithm and the error cost function of the improved decision-guided algorithm, and the high-order QAM input signal is equalized using the updated equalizer coefficient. In the embodiment of the present invention, the high-order QAM signal is equalized by a parallel dual-mode algorithm of the improved slicing multi-mode algorithm with weights and the improved decision-guided algorithm, without establishing a switching threshold, and the weight of the SMMA algorithm is adjusted according to the error situation to make the steady-state error lower and the equalization effect better.

[0072] In one embodiment, according to the equalizer coefficient of the improved slice multimode algorithm, the equalizer coefficient of the improved decision-directed algorithm, and the weighted error function, obtaining the equalizer coefficient includes: according to the error signal of the equalization system and the error cost function of the improved decision-directed algorithm, obtaining the weighted control function as follows:

[0073]

[0074] Among them, ξ(n) is the weight control function under the nth iteration, the parameter a (a>0) is used to adjust the size of the value function, and the parameters b (b>0) and m (m>1) are used to control the shape of the weight control function. DD (n) is the error cost function of the improved decision-directed algorithm under the nth iteration; according to the equalizer coefficient of the improved sliced ​​multi-mode algorithm, the equalizer coefficient of the improved decision-directed algorithm and the weighted error function, the equalizer coefficient is obtained as follows:

[0075] w=ξw s +w d

[0076] Where w is the equalizer coefficient, w s is the equalizer coefficient of the improved sliced ​​multimode algorithm, w d Equalizer coefficients for the improved decision-directed algorithm.

[0077] In this embodiment, a piecewise function is used to adjust the weight of the SMMA algorithm. When the error is greater than 0.4, the SMMA algorithm is always running. When the error is less than 0.4, the weight of the SMMA is reduced, and the improved DD algorithm with better performance is used for equalization. After equalization, the output of the equalizer is:

[0078]

[0079] After updating using SMMA, the output of the equalizer is:

[0080]

[0081] In one embodiment, the method further includes: after the SMMA algorithm updates the output of the equalizer, the update formula of the improved DD algorithm is:

[0082]

[0083] Among them, Q[.] is the quantization function, μ is the iterative step size of the improved DD algorithm, is the output of the equalizer after the SMMA algorithm updates, x(n) is the high-order QAM input signal, x is the independent variable in δ(x) and j is the imaginary part.

[0084] In one embodiment, the step of obtaining the error cost function of the improved decision-directed algorithm includes: decomposing the obtained blind equalization output signal into a real part and an imaginary part, and decomposing the obtained decision error signal into a real part and an imaginary part; subtracting the square of the real part of the blind equalization output signal from the square of the real part of the decision error signal to obtain a first error correction signal; subtracting the square of the imaginary part of the blind equalization output signal from the square of the imaginary part of the decision error signal to obtain a second error correction signal; obtaining the real part of the error signal according to the first error correction signal, and obtaining the imaginary part of the error signal according to the second error correction signal; according to the real part of the error signal and the imaginary part of the error signal, obtaining the error cost function of the improved decision-directed algorithm;

[0085]

[0086] Among them, e DD (n) is the error function of the improved decision-directed algorithm, y R (n) is the real part of the blind equalization output signal, y I (n) is the imaginary part of the blind equalization output signal, is the real part of the decision error signal, In this embodiment, since the data may still have phase rotation during switching, the traditional DDLMS algorithm only uses the data itself and cannot correct the phase offset that still exists. At this time, the update of the tap coefficient will be wrong. In order to solve this problem, the DDLMS algorithm is modified to separate the real and imaginary parts of the signal, and the information of the signal is more fully utilized to further accelerate the convergence speed and reduce the steady-state error.

[0087] The step size in the dual-mode algorithm uses different variable step size functions. For SMMA, since SMMA is used as an initial acquisition algorithm, there is a large inter-code interference in the signal at this time, so the step size change should be relatively stable, and it is hoped that the coefficient change of the filter from the last time to the next time is as small as possible, and the convergence is subject to the constraints imposed by the update filter output. Therefore, the arctan function is used as the basis of the variable step size to speed up the convergence, and the first variable step size function is normalized to reduce disturbances. The first variable step size function is:

[0088] μ SMMA =σ*|arctan(e SMMA )-0.1|

[0089] Among them, σ* is the control parameter of the value range. For the improved DD algorithm, it is used as a late convergence algorithm. At this time, the signal is relatively ideal, and the step size should change rapidly with the error. Therefore, the sigmoid function with a larger gradient than the arctan function is used to speed up convergence.

[0090] In one embodiment, the method further includes: the iteration step size of the improved slice multi-mode algorithm is a normalized first variable step size function; the normalized first variable step size function is:

[0091]

[0092] Among them, μ SMMA (n) is the step size of the improved slice multimode algorithm at the nth iteration, Re(·) is the real part, e SMMA * (n-1) is the error function of the improved slice multi-mode algorithm at the n-1th iteration, e SMMA (n) is the error function of the improved slice multi-mode algorithm at the nth iteration, x H (n) is the conjugate transpose, x(n-1) is the input signal at the n-1th iteration; the iteration step of the improved decision-directed algorithm is the second variable step function; the second variable step function is:

[0093]

[0094] Among them, μ DD is the step size of the improved decision-guided algorithm, β* is the parameter that controls the range of the Sigmoid function, α* is the gradient parameter, and e dd is the error cost function of the improved decision-guided algorithm. In this embodiment, the variable step size algorithm is added to the SMMA and the improved DD parallel algorithm to solve the problems of slow convergence speed and large steady-state error of the traditional algorithm. The parallel algorithm avoids the problem of data waste and makes full use of the data of each iteration.

[0095] In a specific embodiment, Figure 4 As shown, a flow chart of a variable step-size dual-mode parallel equalization method is provided. After inputting the modulation signal, the tap coefficient w is set. s and w d , and calculate the decision error signal of the improved decision-guided algorithm, adjust the weight coefficient ξ according to the decision error signal of the improved decision-guided algorithm, use SMMA for equalization, and then judge whether the input signal and the output signal are in the same constellation point area, that is, whether the decision values ​​of the two are equal. If they are in the same area, it means that the signal is reliable. At this time, the improved DD algorithm is updated. The updated improved DD algorithm and the SMMA algorithm work at the same time. If they are not in the same area, it means that the data is unreliable, then the improved DD algorithm is not updated. At this time, the tap coefficient still uses the equalizer coefficient w=ξw s +w d , but the improved DD algorithm is not updated at this time, because if the improved DD algorithm is updated, it will go in the wrong direction. Parallel means that each iteration uses the tap coefficients updated by the error function corresponding to the improved DD algorithm and the SMMA algorithm. The error coefficient is not updated in every iteration, but when the two are judged as the same area, they are updated at the same time. If they are not judged to be the same area, then one of them is updated and the other is not updated, but the tap coefficient is still the equalizer coefficient w = ξw s +w d .

[0096] like Figure 5 As shown, a simulation flow diagram of a variable step-size dual-mode parallel equalization method is provided, and a blind equalization processing method for high-order QAM signals is designed and optimized. The high-order QAM vector signal generated by the signal source Signal Hound VSG60A is used, and the signal is equalized using Matlab. By analyzing the constellation diagram, ISI, and error vector (Error Vector Magnitude, EVM) of the signal, the inter-symbol interference of the signal is reduced, and the high convergence speed of the algorithm is improved. The error vector results of the algorithm of the present invention and other algorithms are shown in the following table:

[0097]

[0098] EVM refers to the difference between a theoretical waveform and an actual waveform received. In order to verify the improvement of the equalization algorithm on EVM in the simulated signal, the EVM measurement results of the measured signal are listed in the above table: after the CMA equalization is completed, the EVM measurement value at this time loses its meaning because its phase rotation still exists; when the MMA equalization is added, the EVM is greatly improved because the phase rotation is corrected, but the EVM value is still large because the steady-state error of the MMA algorithm is large; when the SMMA equalization is added, the EVM value is significantly reduced; after adding the equalization algorithm of the present invention, the EVM value drops to about 2% due to the variable step size and the parallel improved DD.

[0099] In one embodiment, Figure 6 As shown, a simulation constellation diagram of a variable step-size dual-mode parallel equalization method is provided, wherein (a) is the constellation diagram of the input 16QAM signal, (b) is the constellation diagram after the channel, (c) is the constellation diagram after CMA equalization, (d) is the constellation diagram after MMA equalization, (e) is the constellation diagram after SMMA, and (f) is the constellation diagram after the algorithm of the present invention. In (a)-(f), Quadrature means orthogonal, and In-Phase means in-phase. The algorithm is simulated through a simulated communication channel to verify its performance in the communication system. The simulation uses a 16QAM signal, the input signal-to-noise ratio is 30 dB, the channel is a typical voice impact channel h = [-0.005-0.004j, 0.009+0.03j, -0.024-0.104j, 0.854+0.520j, -0.218+0.273j, 0.049-0.074j, -0.016+0.020j], and the symbol length is 5 000, the cosine roll-off coefficient is 0.75, the truncated symbols are 10, the output sampling points of each symbol are 4, the equalizer order is 13, the center tap coefficient is initialized to 1, the initial iteration step of CMA is 0.01, and the initial iteration step of MMA and SMMA algorithms is 0.001; in the weight control function, m=2, b=10, a=1, the coefficient α in the variable step size is 0.1, β is 0.001, and σ is 0.001; 100 Monte Carlo simulations are performed and the average value is taken. Figure 6In the figure, (a) is the input 16QAM signal, (b) is the constellation diagram after passing through the channel. It can be seen that the constellation becomes very blurred due to the influence of the channel and there is no way to make a direct judgment; (c) after CMA equalization, the constellation diagram becomes clearer, but due to the characteristics of CMA, the constellation diagram still has a certain phase rotation; (d) after MMA equalization, it can be seen that the phase rotation of the signal is corrected and the divergence of the constellation diagram is reduced compared with CMA, but at this time, because the error function is still single-mode, there is a large ISI, and the constellation points are not converged enough; (e) after SMMA, the convergence of the constellation diagram is significantly improved compared with MMA, but due to the slow convergence speed of the SMMA algorithm in the early stage, there are a large number of scattered points around the constellation points; (f) is the constellation diagram after the algorithm in this paper. It can be seen that due to the effect of variable step size and parallel improved DD algorithm, the steady-state error becomes smaller, the scattered points around the constellation diagram are significantly reduced, and the constellation diagram is more converged.

[0100] In one embodiment, Figure 7 As shown, a schematic diagram of an ISI convergence curve when equalizing 16QAM under a channel is provided, and the method further includes: evaluating the performance of the dual-mode algorithm according to the residual inter-symbol interference after equalization, and obtaining the residual inter-symbol interference index as follows:

[0101]

[0102] Among them, ISI is the residual inter-symbol interference index, w is the equalizer tap coefficient vector, h is the channel vector, is the joint impulse response of the equalizer and the channel. In this embodiment, Figure 7 It can be seen that the convergence speed of the MMA algorithm is significantly faster than that of the SMMA, but the steady-state ISI value of the SMMA is lower than that of the MMA. This is because the SMMA introduces the decision value at the beginning of the algorithm, but the constellation diagram is very scattered at this time, and there is a high probability of misjudgment, which will cause mispropagation; and when it converges, the decision is already quite accurate, so the ISI value of the SMMA is lower than that of the MMA during convergence; when the SMMA adds a variable step size, it can be observed that the convergence speed is accelerated, but the ISI is deteriorated; and the algorithm proposed in this paper, because of the use of variable step size and parallel algorithm at the same time, can accelerate the convergence speed while utilizing the characteristics of the improved DD algorithm to make the ISI value lower. It can be seen from the ISI convergence curve that the variable step size algorithm has a convergence speed that is approximately 600 symbol points higher than the fixed step size.

[0103] The present invention proposes an improved dual-mode equalization algorithm, the purpose of which is to use the statistical characteristics of the signal and the decision signal each time during equalization, adopt an improved slice multi-mode algorithm and an improved decision-guided algorithm for equalization, and improve the original DD algorithm so that it can better solve the phase rotation and obtain a faster convergence speed, and at the same time, weight the tap coefficient update of the dual-mode algorithm to make it more suitable for SMMA and the improved DD algorithm. The present invention can obtain better steady-state error and faster convergence speed for QAM signals, so that in the case of low signal-to-noise ratio, the method can be used to equalize high-order QAM signals, and faster convergence speed and smaller residual inter-code crosstalk can be obtained.

[0104] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0105] In one embodiment, Figure 8 As shown, a variable step-size dual-mode parallel equalization device is provided, comprising: a signal acquisition module 802, an equalizer coefficient construction module 804 and a dual-mode parallel equalization module 806, wherein:

[0106] A signal acquisition module 802 is used to acquire a high-order QAM input signal of an equalization system;

[0107] An equalizer coefficient construction module 804 is used to obtain equalizer coefficients according to the equalizer coefficients of the improved slice multi-mode algorithm, the equalizer coefficients of the improved decision-directed algorithm, and the weighted error function;

[0108] The dual-mode parallel equalization module 806 is used to iteratively update the equalizer coefficients using the error cost function of the improved sliced ​​multi-mode algorithm and the error cost function of the improved decision-directed algorithm, and use the updated equalizer coefficients to equalize the high-order QAM input signal.

[0109] In one embodiment, it is also used to obtain the weight control function according to the error signal of the equalization system and the error cost function of the improved decision-directed algorithm:

[0110]

[0111] Among them, ξ(n) is the weight control function under the nth iteration, parameter a is used to adjust the size of the value function, parameters b and m are used to control the shape of the weight control function, and e DD (n) is the error cost function of the improved decision-directed algorithm under the nth iteration; according to the equalizer coefficient of the improved sliced ​​multi-mode algorithm, the equalizer coefficient of the improved decision-directed algorithm and the weighted error function, the equalizer coefficient is obtained as follows:

[0112] w=ξw s +w d

[0113] Where w is the equalizer coefficient, w s is the equalizer coefficient of the improved sliced ​​multimode algorithm, w d Equalizer coefficients for the improved decision-directed algorithm.

[0114] In one of the embodiments, it is also used to decompose the obtained blind equalization output signal into a real part and an imaginary part, and decompose the obtained decision error signal into a real part and an imaginary part; subtract the square of the real part of the blind equalization output signal from the square of the real part of the decision error signal to obtain a first error correction signal; subtract the square of the imaginary part of the blind equalization output signal from the square of the imaginary part of the decision error signal to obtain a second error correction signal; obtain the real part of the error signal according to the first error correction signal, and obtain the imaginary part of the error signal according to the second error correction signal; obtain the error cost function of the improved decision-directed algorithm according to the real part of the error signal and the imaginary part of the error signal;

[0115]

[0116] Among them, e DD (n) is the error function of the improved decision-directed algorithm, y R (n) is the real part of the blind equalization output signal, y I (n) is the imaginary part of the blind equalization output signal, is the real part of the decision error signal, is the imaginary part of the decision error signal.

[0117] In one embodiment, the iteration step size of the improved slice multi-mode algorithm is a normalized first variable step size function; the normalized first variable step size function is:

[0118]

[0119] Among them, μ SMMA (n) is the step size of the improved slice multimode algorithm at the nth iteration, Re(·) is the real part, e SMMA *(n-1) is the error function of the improved slice multi-mode algorithm at the n-1th iteration, e SMMA (n) is the error function of the improved slice multi-mode algorithm at the nth iteration, x H (n) is the conjugate transpose, and x(n-1) is the input signal at the n-1th iteration.

[0120] In one embodiment, the iteration step size of the improved decision-directed algorithm is a second variable step size function; the second variable step size function is:

[0121]

[0122] Among them, μ DD is the step size of the improved decision-guided algorithm, β* is the parameter that controls the range of the Sigmoid function, α* is the gradient parameter, and e DD is the error cost function of the improved decision-guided algorithm.

[0123] In one of the embodiments, after the SMMA algorithm updates the output of the equalizer, the update formula of the improved DD algorithm is:

[0124]

[0125] Among them, Q[.] is the quantization function, μ is the iterative step size of the improved DD algorithm, is the output of the equalizer after the SMMA algorithm updates, x(n) is the high-order QAM input signal, x is the independent variable in δ(x) and j is the imaginary part.

[0126] In one embodiment, it is also used to evaluate the performance of the dual-mode algorithm according to the residual inter-symbol interference after equalization, and the residual inter-symbol interference index is obtained as follows:

[0127]

[0128] Among them, ISI is the residual inter-symbol interference index, w is the equalizer tap coefficient vector, h is the channel vector, is the joint impulse response of the equalizer and the channel.

[0129] For the specific definition of the variable step-size dual-mode parallel balancing device, please refer to the definition of the variable step-size dual-mode parallel balancing method above, which will not be repeated here. Each module in the above-mentioned variable step-size dual-mode parallel balancing device can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory in the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0130] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Fig. 9 As shown. The computer device includes a processor, a memory, a network interface, a display screen and an input device connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a variable step-size dual-mode parallel equalization method is implemented. The display screen of the computer device can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covered on the display screen, or a key, trackball or touchpad set on the computer device housing, or an external keyboard, touchpad or mouse, etc.

[0131] Those skilled in the art will understand that Fig. 9 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0132] In one embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method in the above embodiment when executing the computer program.

[0133] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the method in the above embodiment are implemented.

[0134] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0135] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0136] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A variable step-size dual-mode parallel equalization method, characterized in that: The method comprises: Get the high-order QAM input signal of the equalization system; The equalizer coefficients are obtained according to the equalizer coefficients of the improved slice multimode algorithm, the equalizer coefficients of the improved decision-directed algorithm, and the weight control function; Iteratively updating the equalizer coefficients using the error cost function of the improved sliced ​​multimode algorithm and the error cost function of the improved decision-directed algorithm, and equalizing the high-order QAM input signal using the updated equalizer coefficients; The equalizer coefficients obtained according to the improved slice multimode algorithm, the improved decision-directed algorithm, and the weight control function include: According to the error signal of the equalization system and the error cost function of the improved decision-directed algorithm, the weight control function is obtained as follows: Among them, ξ(n) is the weight control function under the nth iteration, parameter a is used to adjust the size of the value function, parameters b and m are used to control the shape of the weight control function, and e DD (n) is the error cost function of the improved decision-directed algorithm at the nth iteration; According to the equalizer coefficients of the improved slice multimode algorithm, the equalizer coefficients of the improved decision-directed algorithm and the weight control function, the equalizer coefficients are obtained as follows: w=ξ(n)w s +w d Where w is the equalizer coefficient, w s is the equalizer coefficient of the improved sliced ​​multimode algorithm, w d Equalizer coefficients for an improved decision-directed algorithm; The step of obtaining the error cost function of the improved decision-directed algorithm comprises: Decomposing the obtained blind equalization output signal into a real part and an imaginary part, and decomposing the obtained decision error signal into a real part and an imaginary part; Subtracting the square of the real part of the blind equalization output signal from the square of the real part of the decision error signal to obtain a first error correction signal; Subtracting the square of the imaginary part of the blind equalization output signal from the square of the imaginary part of the decision error signal to obtain a second error correction signal; Obtaining a real part of an error signal according to the first error correction signal, and obtaining an imaginary part of the error signal according to the second error correction signal; According to the real part of the error signal and the imaginary part of the error signal, the error cost function of the improved decision-directed algorithm is obtained as follows: Among them, e DD (n) is the error cost function of the improved decision-directed algorithm, y R (n) is the real part of the blind equalization output signal, y I (n) is the imaginary part of the blind equalization output signal, is the real part of the decision error signal, is the imaginary part of the decision error signal.

2. The method according to claim 1, characterized in that The method further comprises: The iterative step size of the improved slice multimode algorithm is a normalized first variable step size function; the normalized first variable step size function is: Among them, μ SMMA (n) is the step size of the improved slice multimode algorithm at the nth iteration, Re(·) is the real part, e SMMA (n-1) is the error cost function of the improved slice multi-mode algorithm at the n-1th iteration, e SMMA (n) is the error cost function of the improved slice multi-mode algorithm at the nth iteration, x H (n) is the conjugate transpose of x(n), and x(n-1) is the input signal at the n-1th iteration.

3. The method according to claim 1, characterized in that The method further comprises: The iteration step size of the improved decision-directed algorithm is a second variable step size function; the second variable step size function is: Among them, μ DD is the step size of the improved decision-guided algorithm, β* is the parameter that controls the range of the Sigmoid function, α* is the gradient parameter, and e DD is the error cost function of the improved decision-guided algorithm.

4. The method according to claim 1, characterized in that: The method further comprises: After the improved sliced ​​multimode algorithm updates the output of the equalizer, the update formula of the improved decision-directed algorithm is: Among them, Q[.] is the quantization function, μ DD is the step size of the improved decision-guided algorithm, is the output of the updated equalizer of the improved sliced ​​multimode algorithm, x(n) is the high-order QAM input signal, x is the independent variable in δ(x) and j is the imaginary part.

5. The method according to claim 1, characterized in that The method further comprises: The performance of the dual-mode algorithm is evaluated based on the residual inter-symbol interference after equalization, and the residual inter-symbol interference index is obtained as follows: Among them, ISI is the residual inter-symbol interference index, w is the equalizer tap coefficient vector, h is the channel vector, is the joint impulse response of the equalizer and the channel.

6. A variable step-size dual-mode parallel equalization device, characterized in that: The device comprises: A signal acquisition module, used to acquire a high-order QAM input signal of an equalization system; An equalizer coefficient building module, used for obtaining equalizer coefficients according to the equalizer coefficients of the improved slice multi-mode algorithm, the equalizer coefficients of the improved decision-directed algorithm and the weight control function; A dual-mode parallel equalization module, used to iteratively update the equalizer coefficients using the error cost function of the improved sliced ​​multimode algorithm and the error cost function of the improved decision-directed algorithm, and equalize the high-order QAM input signal using the updated equalizer coefficients; The equalizer coefficient construction module is also used to obtain the weight control function according to the error signal of the equalization system and the error cost function of the improved decision-directed algorithm: Among them, ξ(n) is the weight control function under the nth iteration, parameter a is used to adjust the size of the value function, parameters b and m are used to control the shape of the weight control function, and e DD (n) is the error cost function of the improved decision-directed algorithm under the nth iteration; according to the equalizer coefficient of the improved slice multi-mode algorithm, the equalizer coefficient of the improved decision-directed algorithm and the weight control function, the equalizer coefficient is obtained as follows: w=ξ(n)w s +w d Where w is the equalizer coefficient, w s is the equalizer coefficient of the improved sliced ​​multimode algorithm, w d Equalizer coefficients for an improved decision-directed algorithm; The step of obtaining the error cost function of the improved decision-directed algorithm includes: decomposing the obtained blind equalization output signal into a real part and an imaginary part, and decomposing the obtained decision error signal into a real part and an imaginary part; subtracting the square of the real part of the blind equalization output signal from the square of the real part of the decision error signal to obtain a first error correction signal; subtracting the square of the imaginary part of the blind equalization output signal from the square of the imaginary part of the decision error signal to obtain a second error correction signal; obtaining the real part of the error signal according to the first error correction signal, and obtaining the imaginary part of the error signal according to the second error correction signal; obtaining the error cost function of the improved decision-directed algorithm according to the real part of the error signal and the imaginary part of the error signal; Among them, e DD (n) is the error cost function of the improved decision-directed algorithm, y R (n) is the real part of the blind equalization output signal, y I (n) is the imaginary part of the blind equalization output signal, is the real part of the decision error signal, is the imaginary part of the decision error signal.

7. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 5 are implemented.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

Images