Data conversion method and apparatus for multi-party secure computation

Abstract

The application provides a data conversion method and device for multi-party secure computation. The method comprises the following steps: obtaining an initial encoding type of initial encrypted data to be converted; determining a logic circuit corresponding to the initial encoding type, the logic circuit being used for converting the initial encrypted data of the initial encoding type into target encrypted data of a target encoding type; and converting the initial encrypted data by using the logic circuit to obtain the target encrypted data with the encoding type being the target encoding type. The application provides a data conversion method applied to multi-party secure computation.

Description

Technical Field

[0001] This application relates to the field of data conversion, and in particular to a data conversion method and apparatus for secure multi-party computation. Background Technology

[0002] Multi-party computation (MPC) is a technology that allows multiple parties to perform joint computations without revealing their individual input information or intermediate computation results. The data used in MPC is often either floating-point encoded or fixed-point encoded, meaning only one encoding type is used. While floating-point encoding offers advantages such as wide range and high precision, its corresponding arithmetic circuits are complex. Fixed-point encoding, on the other hand, has the advantage of simpler circuitry but limited application range and lower precision. Therefore, to optimize data processing efficiency in MPC, a mixed computation approach using data of different encoding types can be employed. To enable computation between data of different encoding types, they need to be converted to the same encoding type.

[0003] However, existing methods for converting between floating-point and fixed-point codes rely on plaintext data, while data in multi-party secure computation is encrypted. This makes existing methods unsuitable for multi-party secure computation. Therefore, there is an urgent need for a data conversion method and apparatus for multi-party secure computation. Summary of the Invention

[0004] In view of this, this application provides a data conversion method and apparatus for multi-party secure computation, and provides a data conversion method applied to multi-party secure computation.

[0005] To achieve the above objectives, this application mainly provides the following technical solutions:

[0006] In a first aspect, this application provides a data transformation method for multi-party secure computation, the method comprising:

[0007] Obtain the initial encoding type of the initial encrypted data to be converted;

[0008] Determine the logic circuit corresponding to the initial encoding type, the logic circuit being used to convert the initial encrypted data of the initial encoding type into target encrypted data of the target encoding type;

[0009] The logic circuit is used to convert the initial encrypted data to obtain target encrypted data with the target encoding type.

[0010] Secondly, this application provides a data conversion apparatus for multi-party secure computation, the apparatus comprising:

[0011] The acquisition unit is used to acquire the initial encoding type of the initial encrypted data to be converted;

[0012] A determining unit is used to determine the logic circuit corresponding to the initial encoding type obtained by the obtaining unit, wherein the logic circuit is used to convert the initial encrypted data of the initial encoding type into target encrypted data of the target encoding type;

[0013] A conversion unit is used to convert the initial encrypted data using the logic circuit determined by the determining unit to obtain target encrypted data with the target encoding type.

[0014] Thirdly, this application provides an electronic device, which includes at least one processor, at least one memory and a bus connected to the processor; wherein the processor and the memory communicate with each other through the bus; the processor is used to call program instructions in the memory to execute the above-mentioned data conversion method for multi-party secure computation.

[0015] Fourthly, this application provides a storage medium for storing a computer program, wherein the computer program, when running, controls the device where the storage medium is located to execute the aforementioned data conversion method for multi-party secure computation.

[0016] By employing the above technical solution, this application provides a data conversion method and apparatus for multi-party secure computation. The method involves obtaining the initial encoding type of initial encrypted data to be converted; determining the logic circuit corresponding to the initial encoding type, wherein the logic circuit is used to convert the initial encrypted data of the initial encoding type into target encrypted data of the target encoding type; and using the logic circuit to convert the initial encrypted data to obtain target encrypted data with the target encoding type. Therefore, this application provides a data conversion method applied to multi-party secure computation.

[0017] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a flowchart illustrating a data conversion method for secure multi-party computation disclosed in this application;

[0020] Figure 2 This is a schematic diagram of the structure of a first logic circuit disclosed in this application;

[0021] Figure 3 This is a flowchart illustrating a method of using a first logic circuit disclosed in this application;

[0022] Figure 4 This is a schematic diagram of the structure of a second logic circuit disclosed in this application;

[0023] Figure 5 This is a flowchart illustrating a method of using a second logic circuit disclosed in this application;

[0024] Figure 6 This is a schematic diagram of the structure of a data conversion device for multi-party secure computation disclosed in this application;

[0025] Figure 7 This is a schematic diagram of another data conversion device for multi-party secure computation disclosed in this application;

[0026] Figure 8 This is a structural block diagram of a device disclosed in this application. Detailed Implementation

[0027] Exemplary embodiments of the present application will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this application will be thorough and complete, and will fully convey the scope of the present application to those skilled in the art.

[0028] To enable those skilled in the art to accurately understand this application, the following provides explanations of the technical terms used in this application and the parameters used thereafter:

[0029] 1) Floating-point encoding

[0030] In the IEEE 754 floating-point system standard, the data 'a' in floating-point encoding is represented as: a = (-1) s *2 e-m *1.f. Where s represents the symbolic data, which is set in the highest bit of data a. When s == 1, it means that data a is a positive number; when s == 0, it means that data a is a negative number.

[0031] 'e' represents the exponent code, which is an unsigned integer. When the data 'a' is encoded as a single-precision floating-point number, the exponent code occupies 8 bits after the signed data, with a fixed offset value 'm' of 127, and the actual value of the exponent code is equal to 'e-127'. When the data 'a' is encoded as a double-precision floating-point number, the exponent code occupies 11 bits, with an offset value 'm' of 1023, and the actual value of the exponent code is equal to 'e-1023'.

[0032] f represents the mantissa. When the encoding type of data 'a' is single-precision floating-point encoding, the mantissa occupies 24 bits after the exponent, and the first significant bit is omitted by default, so the actual significant bits of the data are 1.f. When the encoding type of data 'a' is double-precision floating-point encoding, the mantissa occupies 53 bits.

[0033] It should be noted that when data 'a' is encoded as single-precision floating-point, it needs to be stored in a 32-bit memory block. When data 'a' is encoded as double-precision floating-point, it needs to be stored in a 64-bit memory block.

[0034] Furthermore, when the data 'a' is 0, both the exponent and the mantissa are equal to 0, that is, e == 0 && f == 0. To avoid repetition, the following sets the length of the exponent e to α, the length of the mantissa f to β, and the offset value to m.

[0035] 2) Fixed point coding

[0036] Data b with fixed-point symbol encoding requires l bits, and the length of the decimal places is k. Based on l, k, and a pre-set encoding formula b = [c * 2...], ... k The original data c is encoded to obtain fixed-point encoded data b. Here, k represents the number of decimal places. If b is positive, the highest bit is 0; otherwise, the highest bit is 1.

[0037] This application provides a data conversion method for multi-party secure computation, applicable to multi-party secure computation, and executed by any terminal equipped with logic circuitry corresponding to the initial encoding type. The specific execution steps are as follows: Figure 1 As shown, it includes:

[0038] Step 101: Obtain the initial encoding type of the initial encrypted data to be converted.

[0039] The initial encrypted data is the encrypted data to be converted. The initial encoding type of the initial encrypted data can be either floating-point encoding or fixed-point encoding.

[0040] Step 102: Determine the logic circuit corresponding to the initial encoding type.

[0041] Specifically, the logic circuit is used to convert initial encrypted data of the initial encoding type into target encrypted data of the target encoding type. When the initial encoding type is floating-point encoding, this logic circuit is used to convert floating-point encoded data into fixed-point encoded data. When the initial encoding type is fixed-point encoding, this logic circuit is used to convert fixed-point encoded data into floating-point encoded data.

[0042] In the specific implementation of this step, the logic circuit corresponding to the initial encoding type is selected according to the initial encoding type, or the target encoding type is determined according to the initial encoding type, and the logic circuit used is selected according to the initial encoding type and the target encoding type.

[0043] Step 103: Use logic circuits to transform the initial encrypted data to obtain target encrypted data with the target encoding type.

[0044] The target encoding type can be either fixed-point encoding or floating-point encoding. When the initial encoding type is floating-point encoding, the target encoding type is fixed-point encoding.

[0045] In this embodiment, the initial encoding type of the initial encrypted data to be converted is obtained; the logic circuit corresponding to the initial encoding type is determined, and the logic circuit is used to convert the initial encrypted data of the initial encoding type into target encrypted data of the target encoding type; the logic circuit is used to convert the initial encrypted data to obtain target encrypted data with the target encoding type. Therefore, this application provides a data conversion method applied to multi-party secure computation.

[0046] Furthermore, when Figure 1 In the illustrated embodiment, when the initial encoding type is fixed-point encoding and the target encoding type is floating-point encoding, during implementation... Figure 1 Before implementing the illustrated embodiment, a first logic circuit corresponding to the fixed-point encoding needs to be constructed and then installed on the terminal participating in multi-party secure computation. Specifically, the first logic circuit is as follows: Figure 2 As shown, it specifically includes an exponent code operation unit, a tail code operation unit, and a combination unit. The exponent code operation unit, the tail code operation unit, and the combination unit are all connected. The tail code unit and the combination unit are also connected. The exponent code operation unit is used to determine the exponent code based on the initial encrypted data. The tail code operation unit is used to obtain the tail code based on the initial encrypted data. The combination unit is used to obtain the target encrypted data based on the exponent code and the tail code.

[0047] Furthermore, embodiments of this application provide a method for using a first logic circuit, such as... Figure 3 As shown, the specific steps include:

[0048] Step 301: Using the exponential code arithmetic unit, determine the first vector based on the initial encrypted data; determine the position of the first 1 in the first vector; calculate the exponential code based on the position, the fixed offset value of the floating-point code, and the number of decimal places in the fixed-point code.

[0049] In the specific implementation of this step, since the data with fixed-point symbol encoding already provided above requires l bits, the initial encrypted data b is set to {b[l-1],...b[0]}, where b[i] represents the data corresponding to the (i+1)th bit in the initial encrypted data, i is less than or equal to l-1 and greater than or equal to 0. Since the symbol data is the first bit in the initial data, b[l-1] is used to represent the symbol data, and {b[l-2],...b[0]} is used to represent the data other than the symbol data. Then, the first vector can be determined based on the symbol data and the data other than the symbol data. The position of the first 1 in the first vector is determined. The exponent code is calculated based on the position, the fixed offset value of the floating-point encoding, and the number of decimal places in the fixed-point encoding.

[0050] First, the specific steps for determining the first vector based on the symbolic data and the data other than the symbolic data include: using the exponential code arithmetic unit to determine the symbolic data and the data other than the symbolic data in the initial encrypted data, and determining whether the symbolic data is 0; when the symbolic data is 0, the data is determined as the first vector; when the symbolic data is not 0, that is, the symbolic data is 1, the complement of the data is determined as the first vector.

[0051] Specifically, when b[l-1] = 0, {b[l-2], ..., b[0]} is determined as the first vector. When b[l-1] = 1, the integer formed by inverting each data in {b[l-2], ..., b[0]} is incremented by 1 to obtain the first vector. The inversion operation is a bitwise AND operation with bit 1.

[0052] Secondly, in this application, the method for determining the position of the first 1 in the first vector is as follows: the first vector b1 is represented by {b1[l-2],...b1[0]}. The second vector pre-or is obtained by performing a pre-or operation on each data in the first vector b1. The third vector P is calculated based on the second vector pre-or, and then the position of the first 1 in the first vector b1 is determined by the third vector P. The specific steps include: performing a pre-or operation on each data in the first vector b1 to obtain the second vector pre-or, wherein the second vector pre-or is represented by {pre-or[l-2],...pre-or[0]}, and pre-or[i] is the OR value of all data from b1[l-2] to b1[i], where i is less than or equal to l-2 and greater than or equal to 0. Specifically, pre-or[i] = b1[l-2] OR b1[l-3]...b1[i]. After obtaining the second vector pre-or, the XOR value of pre-or[i] and pre-or[i+1] is calculated to obtain the data P[i] of the i-th bit in the third vector P, thus obtaining the third vector P. Here, the data corresponding to the first 1 position in the first vector b1 in the third vector P is 1, and all other positions are 0.

[0053] It should be noted that when calculating P[l-2], since there is no pre-or[l-1] in the second vector pre-or, pre-or[l-1] can be set to 0, that is, P[l-2] = pre-or[l-2]OXR pre-or[l-1] = pre-or[l-2]OXR 0.

[0054] Finally, before calculating the exponent code based on the position, the fixed offset value of the floating-point code, and the number of decimal places in the fixed-point code, a second data sequence v = {v[l-2], ..., v[0]} needs to be pre-set, where v[i] = i, i ∈ [0, l-2]. This second data sequence includes l-1 elements of length α, i.e., v[i] is an element of length α, where α is the length of the floating-point exponent code. Then, based on the position n of the first occurrence of 1 in the third vector P, the variable v[n] corresponding to position n is determined in this second data sequence. The exponent code e is calculated based on this variable v[n], the fixed offset value m of the floating-point code, and the number of decimal places k in the fixed-point code.

[0055] The specific process is as follows: calculate the inner product of the third vector P and the second data sequence v to obtain the variable v[n]. Then, calculate the exponent code e according to e = v[n] + mk. Here, m is the fixed offset value of the floating-point code, and k is the number of decimal places in the fixed-point code.

[0056] Step 302: Using the tail code operation unit, the tail code is obtained based on the position of the first 1 in the first vector and the preset first data sequence.

[0057] In this application, the position of the first 1 in the first vector can be calculated based on the initial encrypted data according to the method described in step 301, or the position of the first 1 in the first vector can be obtained directly in step 301.

[0058] In the specific implementation of this step, the tail code operation unit is used to construct a tail code f of length β based on the position of the first possible 1 in the first vector b1. The specific process is as follows: when it is necessary to construct the i-th possible tail code q[i] in the first data sequence, start from the data corresponding to the (i-1)-th bit in the first vector b1, take the data corresponding to the β bits, and fill the low bits with 0 if necessary, and then construct q[i] in the first data sequence. In this way, the first data sequence q = {q[1-2],...q[0]} can be constructed based on the first vector b1.

[0059] For example, assuming l = 30, β = 9, and the first vector b1 = {b1

[28] , ... b1[0]}, then based on the above method, q

[28] = {b1

[27] , b1

[26] ... b1

[19] }, q[0] = 0…00, are constructed and filled with 9 zeros.

[0060] After determining the first data sequence q, the third vector P in step 301 can be directly obtained, and the inner product of the third vector P and the first data sequence q can be calculated to obtain the last digit f. The specific calculation formula is: f = p[l-2] * q[l-2] + ... + p[0] * q[0].

[0061] Step 303: Using the combination unit, obtain the target data based on the exponent code and the tail code.

[0062] If the initial data is 0, then the exponent and the last digit are directly assigned the value 0.

[0063] In the specific implementation of this step, the symbolic data, exponent code, and tail code are combined sequentially to obtain the target encrypted data.

[0064] Furthermore, when Figure 1 In the illustrated embodiment, when the initial encoding type is floating-point encoding and the target encoding type is fixed-point encoding, during implementation... Figure 1 Before the illustrated embodiment, it is also necessary to construct the second logic circuit corresponding to the floating-point code, specifically as follows: Figure 4As shown, it is then installed on a terminal participating in multi-party secure computation. A second logic circuit corresponding to the floating-point encoding is constructed, wherein the first logic circuit includes a construction unit, a shift unit, and a calculation unit. The construction unit is connected to the shift unit, and the shift unit is connected to the calculation unit. The construction unit is used to construct a vector with the same data length as the fixed-point encoding based on the initial encrypted data. The shift unit is used to determine a shift vector based on the vector, the offset of the floating-point encoding, the length of the mantissa, and the decimal length of the fixed-point encoding. The calculation unit is used to determine the target encrypted data based on the shift vector and the symbol data in the initial encrypted data.

[0065] Furthermore, embodiments of this application provide a method for using a second logic circuit, such as... Figure 5 As shown, the specific steps include:

[0066] Step 501: Using the construction unit, construct a vector with the same length as the fixed-point encoded data based on the initial encrypted data.

[0067] In the specific implementation of this step, a 1 is added to the highest bit of the initial encrypted data f1 to obtain data f2 = 1f1. Then, data f2 is padded with l-β zeros to obtain a vector g = 0...0f1 = 0...01f2 with the same length as the fixed-point encoded data, where l is the length of the fixed-point code and β is the length of the floating-point code's mantissa.

[0068] Step 502: Using a shift unit, determine the shift vector based on the vector, the offset of the floating-point code, the length of the mantissa, and the decimal length of the fixed-point code.

[0069] In this specific implementation, a shift unit is used to determine whether the offset of the floating-point code is less than that of the exponent code. When the offset of the floating-point code is less than that of the exponent code, a first difference between the offset and the exponent code, a second difference between the length of the floating-point code's mantissa and the length of the fixed-point code's decimal places, and a third difference between the first and second differences are calculated. It is then determined whether the first difference is greater than the second difference; if so, the vector constructed by the construction unit is shifted according to the third difference and a preset left-bucket shift algorithm to obtain a shifted vector; if not, the vector constructed by the construction unit is shifted according to the third difference and a preset right-bucket shift algorithm to obtain a shifted vector.

[0070] When the offset of the floating-point code's exponent code is greater than or equal to the exponent code, the first difference between the offset and the exponent code is calculated. The sum of the first difference, the length of the last digit in the floating-point code, and the length of the decimal places in the fixed-point code is then calculated. Based on this sum and the preset right-bucket shift algorithm, the vector constructed by the construction unit is shifted to obtain the shift vector.

[0071] The above calculation process is expressed as h = gt(e, m) * gt(em, β-k) * BarrelLeftShift(g, em-β+k) + gt(e, m) * gt(β-k, em) * BarrelRightShift(g, β-k-e+m) + gt(e, m) * BarrelRightShift(g, m-e+β+k).

[0072] Where gt(a0, a1) is a comparison operation; when a0 > a1, gt(a0, a1) = 1, otherwise gt(a0, a1) = 0. e represents the floating-point code exponent, m represents the offset of the floating-point code exponent, β represents the length of the floating-point code mantissa, k represents the length of the fixed-point code decimal places, and g represents the vector constructed in step 501. BarrelLeftShift(A, a3) represents shifting vector A to the left by a3 bits, and BarrelRightShift(A, a3) represents shifting vector A to the right by a3 bits. BarrelLeftShift and BarrelRightShift are existing left and right shift algorithms that do not depend on data; overflow is padded with 0s.

[0073] Step 503: Using the computing unit, determine the target encrypted data based on the shift vector and the symbol data in the initial encrypted data.

[0074] In this specific implementation, when the symbol data in the initial encrypted data is 1, the two's complement of the shift vector is calculated, and the two's complement and the symbol data are arranged in a preset order to obtain the target encrypted data. When the symbol data in the initial encrypted data is 0, the shift vector and the symbol data are arranged in a preset order to obtain the target encrypted data.

[0075] It should be noted that both the fixed-point encoding and floating-point encoding involved in this application are signed encoding methods.

[0076] Furthermore, as a response to the above Figure 1-5 The implementation of the method embodiment shown in this application provides a data conversion device for multi-party secure computation, which can convert encrypted data in multi-party secure computation. The embodiment of this device corresponds to the foregoing method embodiment. For ease of reading, this embodiment will not repeat the details of the foregoing method embodiment, but it should be understood that the device in this embodiment can implement all the contents of the foregoing method embodiment. Specifically, as shown... Figure 6 As shown, the device includes:

[0077] The acquisition unit 601 is used to acquire the initial encoding type of the initial encrypted data to be converted;

[0078] The determining unit 602 is used to determine the logic circuit corresponding to the initial encoding type obtained by the obtaining unit 601. The logic circuit is used to convert the initial encrypted data of the initial encoding type into target encrypted data of the target encoding type.

[0079] The conversion unit 603 is used to convert the initial encrypted data using the logic circuit determined by the determining unit 602 to obtain target encrypted data with the target encoding type.

[0080] Furthermore, such as Figure 7 As shown, the initial encoding type is fixed-point encoding, the target encoding type is floating-point encoding, and the device further includes:

[0081] The first construction unit 604 is used to construct the first logic circuit corresponding to the fixed point code. The first logic circuit includes an exponent code operation unit, a tail code operation unit, and a combination unit. The exponent code operation unit is connected to the tail code operation unit and the combination unit. The tail code unit is connected to the combination unit.

[0082] The exponential code arithmetic unit is used to determine the exponential code based on the initial encrypted data;

[0083] The tail code calculation unit is used to obtain the tail code based on the initial encrypted data;

[0084] The combining unit is used to obtain target encrypted data based on the index code and the tail code.

[0085] Furthermore, such as Figure 7 As shown, the conversion unit 603 is also used for:

[0086] Using the exponential code arithmetic unit, a first vector is determined based on the initial encrypted data; the position of the first 1 in the first vector is determined; and the exponential code is calculated based on the position, the fixed offset value of the floating-point code, and the number of decimal places in the fixed-point code.

[0087] Using the tail code calculation unit, the tail code is obtained based on the position of the first 1 in the first vector and the preset first data sequence;

[0088] Using the combined unit, the target encrypted data is obtained based on the exponent code and the tail code.

[0089] Furthermore, such as Figure 7 As shown, the conversion unit 603 is also used for:

[0090] Using the exponential code arithmetic unit, the symbol data and other data in the initial encrypted data are determined, and it is determined whether the symbol data is 0; when the symbol data is 0, the data is determined as the first vector; when the symbol data is not 0, the complement of the data is determined as the first vector.

[0091] Furthermore, such as Figure 7 As shown, the initial encoding type is floating-point encoding, the target encoding type is fixed-point encoding, and the device further includes:

[0092] The second construction unit 605 is used to construct a second logic circuit corresponding to the floating-point code. The second logic circuit includes a construction unit, a shift unit, and a calculation unit. The construction unit is connected to the shift unit, and the shift unit is connected to the calculation unit. The construction unit is used to construct a vector with the same data length as the fixed-point code based on the initial encrypted data. The shift unit is used to determine a shift vector based on the vector, the offset of the floating-point code, the length of the mantissa, and the decimal length of the fixed-point code. The calculation unit is used to determine the target encrypted data based on the shift vector and the symbol data in the initial encrypted data.

[0093] Furthermore, such as Figure 7 As shown, the conversion unit 603 is also used for:

[0094] Using the construction unit, a vector with the same length as the fixed-point encoded data is constructed based on the initial encrypted data;

[0095] Using the shift unit, the shift vector is determined based on the vector, the offset of the floating-point code, the length of the mantissa, and the decimal length of the fixed-point code;

[0096] Using the computing unit, the target encrypted data is determined based on the shift vector and the symbol data in the initial encrypted data.

[0097] Furthermore, such as Figure 7 As shown, the conversion unit 603 is also used for:

[0098] Using the shift unit, it is determined whether the offset of the floating-point code is less than the exponent code. When the offset of the floating-point code is less than the exponent code, a first difference between the offset and the exponent code, a second difference between the length of the floating-point code's mantissa and the length of the fixed-point code's decimal places, and a third difference between the first and second differences are calculated. It is then determined whether the first difference is greater than the second difference. If so, the vector constructed by the construction unit is shifted according to the third difference and a preset left-bucket shift algorithm to obtain the shifted vector. If not, the vector constructed by the construction unit is shifted according to the third difference and a preset right-bucket shift algorithm to obtain the shifted vector. When the offset of the floating-point code is greater than or equal to the exponent code, the first difference between the offset and the exponent code is calculated, and the sum of the first difference, the length of the floating-point code's mantissa, and the length of the fixed-point code's decimal places is calculated. Based on this sum and a preset right-bucket shift algorithm, the vector constructed by the construction unit is shifted to obtain the shifted vector.

[0099] Furthermore, embodiments of this application also provide an electronic device, which includes at least one processor, and at least one memory and bus connected to the processor; wherein the processor and memory communicate with each other via the bus; the processor is used to call program instructions in the memory to execute the above-mentioned... Figure 1-5 The data transformation method for multi-party secure computation described herein.

[0100] Furthermore, embodiments of this application also provide a storage medium for storing a computer program, wherein the computer program, when running, controls the device where the storage medium is located to execute the above-described... Figure 1-5 The data transformation method for multi-party secure computation described herein.

[0101] Figure 8 This is a block diagram of a device 80 provided in an embodiment of this application. The device 80 includes at least one processor 801, at least one memory 802 connected to the processor 801, and a bus 803; wherein the processor 801 and the memory 802 communicate with each other via the bus 803. The processor 801 is used to call program instructions in the memory 802 to execute the aforementioned data sharing method. The device described herein can be a server (e.g., a local server or a cloud server), a smartphone, tablet computer, PDA, portable computer, or a fixed terminal such as a desktop computer.

[0102] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0103] It is understood that the relevant features in the above methods and apparatus can be referenced interchangeably. Furthermore, the terms "first," "second," etc., in the above embodiments are used to distinguish between embodiments and do not represent the superiority or inferiority of any particular embodiment.

[0104] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0105] The algorithms and displays provided herein are not inherently related to any particular computer, virtual system, or other device. Various general-purpose systems can also be used in conjunction with the teachings herein. The required structure for constructing such systems is apparent from the above description. Furthermore, this application is not directed to any particular programming language. It should be understood that the content of this application described herein can be implemented using various programming languages, and the above description of specific languages ​​is for the purpose of disclosing the best mode of implementation of this application.

[0106] In addition, the memory may include non-permanent memory in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM, and the memory includes at least one memory chip.

[0107] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0108] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0109] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0110] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0111] Memory may include non-persistent memory in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0112] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0113] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0114] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0115] The above are merely embodiments of this application and are not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A data conversion method for secure multi-party computation, characterized in that, The method includes: Obtain the initial encoding type of the initial encrypted data to be converted; Determine the logic circuit corresponding to the initial encoding type, the logic circuit being used to convert the initial encrypted data of the initial encoding type into target encrypted data of the target encoding type; The logic circuit is used to convert the initial encrypted data to obtain target encrypted data with the target encoding type. The initial encoding type is fixed-point encoding, the target encoding type is floating-point encoding, and the method further includes: Construct a first logic circuit corresponding to the fixed-point code, wherein the first logic circuit includes an exponent code operation unit, a tail code operation unit, and a combination unit, wherein the exponent code operation unit is connected to the tail code operation unit and the combination unit, and the tail code operation unit is connected to the combination unit; The exponential code arithmetic unit is used to determine the exponential code based on the initial encrypted data; The tail code calculation unit is used to obtain the tail code based on the initial encrypted data; The combining unit is used to obtain the target encrypted data based on the index code and the tail code; The initial encoding type is floating-point encoding, the target encoding type is fixed-point encoding, and the method further includes: A second logic circuit corresponding to the floating-point code is constructed, wherein the second logic circuit includes a construction unit, a shift unit, and a calculation unit. The construction unit is connected to the shift unit, and the shift unit is connected to the calculation unit. The construction unit is used to construct a vector with the same data length as the fixed-point code based on the initial encrypted data. The shift unit is used to determine a shift vector based on the vector, the offset of the floating-point code, the length of the mantissa, and the decimal length of the fixed-point code. The calculation unit is used to determine the target encrypted data based on the shift vector and the symbol data in the initial encrypted data.

2. The method according to claim 1, characterized in that, The initial encoding type is fixed-point encoding, and the target encoding type is floating-point encoding; the step of using the logic circuit to convert the initial encrypted data to obtain target encrypted data with the target encoding type includes: Using the exponential code arithmetic unit, a first vector is determined based on the initial encrypted data; the position of the first 1 in the first vector is determined; and the exponential code is calculated based on the position, the fixed offset value of the floating-point code, and the number of decimal places in the fixed-point code. Using the tail code calculation unit, the tail code is obtained based on the position of the first 1 in the first vector and the preset first data sequence; Using the combined unit, the target encrypted data is obtained based on the exponent code and the tail code.

3. The method according to claim 2, characterized in that, The step of using the exponential code arithmetic unit to determine the first vector based on the initial encrypted data includes: Using the exponential code arithmetic unit, the symbol data and other data in the initial encrypted data are determined, and it is determined whether the symbol data is 0; when the symbol data is 0, the data is determined as the first vector; when the symbol data is not 0, the complement of the data is determined as the first vector.

4. The method according to claim 1, characterized in that, The initial encoding type is floating-point encoding, and the target encoding type is fixed-point encoding; the step of using the logic circuit to convert the initial encrypted data to obtain target encrypted data with the target encoding type includes: Using the construction unit, a vector with the same length as the fixed-point encoded data is constructed based on the initial encrypted data; Using the shift unit, the shift vector is determined based on the vector, the offset of the floating-point code, the length of the mantissa, and the decimal length of the fixed-point code; Using the computing unit, the target encrypted data is determined based on the shift vector and the symbol data in the initial encrypted data.

5. The method according to claim 4, characterized in that, The step of using the shift unit to determine the shift vector based on the vector, the offset of the floating-point code, the length of the mantissa, and the decimal length of the fixed-point code includes: Using the shift unit, it is determined whether the offset of the floating-point code is less than the exponent code. If the offset of the floating-point code is less than the exponent code, a first difference between the offset and the exponent code, a second difference between the length of the mantissa of the floating-point code and the decimal length of the fixed-point code, and a third difference between the first difference and the second difference are calculated. It is then determined whether the first difference is greater than the second difference. If so, the vector constructed by the construction unit is shifted according to the third difference and a preset left-bucket shift algorithm to obtain the shifted vector. If not, the vector constructed by the construction unit is shifted according to the third difference and a preset right-bucket shift algorithm to obtain the shifted vector. When the offset of the floating-point code is greater than or equal to the exponent code, the first difference between the offset and the exponent code is calculated, and the sum of the first difference, the length of the mantissa in the floating-point code, and the decimal length of the fixed-point code is calculated. Based on the sum and a preset right-bucket shift algorithm, the vector constructed by the construction unit is shifted to obtain the shifted vector.

6. A data conversion device for multi-party secure computation, characterized in that, The device includes: The acquisition unit is used to acquire the initial encoding type of the initial encrypted data to be converted; A determining unit is used to determine the logic circuit corresponding to the initial encoding type obtained by the obtaining unit, wherein the logic circuit is used to convert the initial encrypted data of the initial encoding type into target encrypted data of the target encoding type; A conversion unit is used to convert the initial encrypted data using the logic circuit determined by the determining unit to obtain target encrypted data with the target encoding type. The initial encoding type is fixed-point encoding, the target encoding type is floating-point encoding, and the device further includes: The first construction unit is used to construct the first logic circuit corresponding to the fixed point code. The first logic circuit includes an exponent code operation unit, a tail code operation unit, and a combination unit. The exponent code operation unit is connected to the tail code operation unit and the combination unit. The tail code operation unit is connected to the combination unit. The exponential code arithmetic unit is used to determine the exponential code based on the initial encrypted data; The tail code calculation unit is used to obtain the tail code based on the initial encrypted data; The combining unit is used to obtain the target encrypted data based on the index code and the tail code; The initial encoding type is floating-point encoding, the target encoding type is fixed-point encoding, and the device further includes: The second construction unit is used to construct the second logic circuit corresponding to the floating-point code. The second logic circuit includes a construction unit, a shift unit, and a calculation unit. The construction unit is connected to the shift unit, and the shift unit is connected to the calculation unit. The construction unit is used to construct a vector with the same data length as the fixed-point code based on the initial encrypted data. The shift unit is used to determine a shift vector based on the vector, the offset of the floating-point code, the length of the mantissa, and the decimal length of the fixed-point code. The calculation unit is used to determine the target encrypted data based on the shift vector and the symbol data in the initial encrypted data.

7. An electronic device, characterized in that, The electronic device includes at least one processor, and at least one memory and bus connected to the processor; wherein the processor and memory communicate with each other through the bus; the processor is used to call program instructions in the memory to execute the data conversion method for multi-party secure computation as described in any one of claims 1-5.

8. A storage medium, characterized in that, The storage medium is used to store a computer program, wherein when the computer program is executed, it controls the device where the storage medium is located to perform the data conversion method for multi-party secure computation as described in any one of claims 1-5.

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