Enhanced architecture for high performance detection devices

Abstract

A detector includes a set of sense elements, first section circuitry communicatively coupling a first set of sense elements to an input of first signal processing circuitry, second section circuitry communicatively coupling a second set of sense elements to an input of second signal processing circuitry, and interconnect circuitry communicatively coupling an output of the first signal processing circuitry to an output of the second signal processing circuitry. The interconnect circuitry can include an interconnect layer having an interconnect switch element communicatively coupled to an output of an analog signal path of the detector. The interconnect switch element can communicatively couple the output of an adjacent analog signal path. The detector can further include signal processing circuitry including a plurality of converters. The interconnect circuitry can be configured to selectively couple outputs of the first and second signal processing circuitry to the converters.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to U.S. Application 63 / 019,179, filed May 1, 2020, which is incorporated herein by reference in its entirety. Technical Field

[0003] The description in this article relates to detectors, and more particularly to detectors that can be applied to the detection of charged particles. Background Technology

[0004] In the manufacturing process of integrated circuits (ICs), incomplete or finished circuit components are inspected to ensure they are manufactured according to the design and free of defects. Inspection systems using optical microscopes typically have a resolution as low as a few hundred nanometers, and this resolution is limited by the wavelength of light. As the physical size of IC components continues to shrink to below 100 nanometers and even below 10 nanometers, inspection systems with higher resolution than those using optical microscopes are needed.

[0005] Charged particle (e.g., electron) beam microscopy (such as scanning electron microscopy (SEM) or transmission electron microscopy (TEM)) can reduce resolution to sub-nanometer levels, serving as a practical tool for inspecting IC components with feature sizes smaller than 100 nanometers. Using SEM, electrons from a single primary charged particle beam or multiple primary charged particle beams can be focused on a location of interest on the wafer being inspected. The primary electrons interact with the wafer and may be backscattered or cause the wafer to emit secondary electrons. The intensity of the electron beam, including both backscattered and secondary electrons, can vary based on the characteristics of the wafer's internal and external structures, thereby indicating the presence of defects in the wafer. Summary of the Invention

[0006] Embodiments conforming to this disclosure include apparatus, systems, and methods for beam detection in charged particle inspection systems, such as ultrafast beam current detection. In some embodiments, a detector may include a set of sensing elements, the set of sensing elements including a first set of sensing elements and a second set of sensing elements. The detector may also include a first segment circuit system configured to communicatively couple the first set of sensing elements to an input of a first signal processing circuit system. The detector may further include a second segment circuit system configured to communicatively couple the second set of sensing elements to an input of a second signal processing circuit system. The detector may also include interconnect circuitry configured to communicatively couple the output of the first signal processing circuit system to the output of the second signal processing circuit system. In some embodiments, the detection system may also include an interface configured to control image signal processing of the detection system.

[0007] In some embodiments, the charged particle inspection system may include a charged particle beam source configured to generate a primary charged particle beam for scanning a sample. The charged particle inspection system may also include a detector configured to receive a secondary charged particle beam exiting from the incident point of the primary charged particle beam. The detector may include multiple sets of sensing elements, including a first set of sensing elements and a second set of sensing elements. The detector may also include a first segment circuit system configured to communicatively couple the first set of sensing elements to an input of a first signal processing circuit system. The detector may further include a second segment circuit system configured to communicatively couple the second set of sensing elements to an input of a second signal processing circuit system. The detector may further include interconnect circuitry configured to communicatively couple the output of the first signal processing circuit system to the output of the second signal processing circuit system.

[0008] In some embodiments, the first signal processing circuit system may include a first amplifier, and the second signal processing circuit system may include a second amplifier. At least one of the first amplifier or the second amplifier may be configured to receive a current signal and output an amplified current signal, or receive a charge signal and output an amplified charge signal.

[0009] In some embodiments, the computer-implemented method may include determining a group of sensing elements comprising sensing elements projected by a beam spot of a charged particle beam in a charged particle detector. The computer-implemented method may further include determining whether a total analog signal bandwidth for processing an output signal of the group of sensing elements at a predetermined pixel rate satisfies a condition. The computer-implemented method may further include, based on the determination that the total analog signal bandwidth satisfies the condition, dividing the group of sensing elements into a plurality of subgroups of sensing elements, each subgroup comprising at least one sensing element of the group of sensing elements. The computer-implemented method may further include communicatively coupling the plurality of subgroups of sensing elements to a plurality of signal processing circuitry systems of a charged particle detector. The computer-implemented method may further include using the output signals of the plurality of signal processing circuitry systems at a first output of an interconnect layer communicatively coupled to the plurality of signal processing circuitry systems to determine a combined signal. The computer-implemented method may further include a first analog-to-digital converter (ADC) that outputs the combined signal to a first output of the interconnect layer. Attached Figure Description

[0010] Figure 1 This is a schematic diagram illustrating an exemplary charged particle beam inspection system conforming to an embodiment of the present disclosure.

[0011] Figure 2 This is a schematic diagram illustrating an exemplary multi-beam beaming tool conforming to an embodiment of this disclosure. The multi-beam beaming tool may be... Figure 1 This is part of an exemplary charged particle beam inspection system.

[0012] Figure 3A This is a schematic diagram of an exemplary structure of a detector conforming to an embodiment of this disclosure.

[0013] Figure 3B This is a diagram illustrating an exemplary surface of a detector array conforming to an embodiment of the present disclosure.

[0014] Figures 4A to 4C This is a diagram illustrating an exemplary detector array with switching elements conforming to an embodiment of the present disclosure.

[0015] Figure 5 This is a cross-sectional view illustrating the layer structure of a detector conforming to an embodiment of the present disclosure.

[0016] Figure 6 This is a cross-sectional view of the sensing element of a detector conforming to an embodiment of the present disclosure.

[0017] Figure 7 This is a diagram illustrating an exemplary cross-sectional arrangement of a detector conforming to an embodiment of this disclosure.

[0018] Figure 8 This is a diagram illustrating another exemplary cross-sectional arrangement of a detector conforming to an embodiment of this disclosure.

[0019] Figure 9 This is a diagram illustrating a detection system conforming to an embodiment of the present disclosure.

[0020] Figure 10 This is a diagram illustrating a detector array with an exemplary architecture conforming to an embodiment of the present disclosure.

[0021] Figure 11 This is a diagram illustrating an exemplary amplifier operating in current mode according to an embodiment of the present disclosure.

[0022] Figure 12 This is a schematic diagram illustrating an exemplary analog-to-digital converter operating in current mode according to an embodiment of the present disclosure.

[0023] Figure 13 This indicates that the embodiments conforming to this disclosure have Figure 10 A diagram showing an exemplary cross-sectional arrangement of the detector in an exemplary architecture.

[0024] Figure 14 This is a diagram illustrating a detector array with another exemplary architecture that conforms to an embodiment of this disclosure.

[0025] Figure 15 This is a flowchart of an exemplary method for detecting a charged particle beam that conforms to embodiments of this disclosure.

[0026] Figure 16 This is a schematic representation of a sensing element conforming to an embodiment of the present disclosure. Detailed Implementation

[0027] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings, wherein the same reference numerals in different drawings denote the same or similar elements unless otherwise stated. The implementations set forth in the following description of the exemplary embodiments do not represent all implementations conforming to this disclosure. Rather, they are merely examples of apparatuses and methods conforming to aspects relevant to the subject matter recited in the appended claims. For example, although some embodiments have been described in the context of utilizing charged particle beams (e.g., electron beams), this disclosure is not limited thereto. Other types of charged particle beams can be similarly applied. Furthermore, other imaging systems, such as optical imaging, photoelectric detection, X-ray detection, etc., can be used.

[0028] Electronic devices are made up of circuits formed on a piece of semiconductor material called a substrate. Semiconductor materials can include, for example, silicon, gallium arsenide, indium phosphide, or silicon germanium. Many circuits can be formed together on the same piece of silicon, called an integrated circuit or IC. The size of these circuits has drastically decreased, so more circuits can be mounted on the substrate. For example, the IC chip in a smartphone can be as small as a thumbnail, yet may contain more than 2 billion transistors, each less than 1 / 1000th the size of a human hair.

[0029] Manufacturing these ICs, which have extremely small structures or components, is a complex, time-consuming, and expensive process, typically involving hundreds of individual steps. Even an error in one step can lead to a defect in the finished IC, rendering it useless. Therefore, one goal of the manufacturing process is to avoid such defects in order to maximize the number of functional ICs manufactured in the process; that is, to increase the overall yield of the process.

[0030] A component of increasing yield is monitoring the chip manufacturing process to ensure that a sufficient number of functional integrated circuits are produced. One way to monitor this process is to examine the chip's circuit structure at different stages of chip formation. This can be done using a scanning charged particle microscope (“SCPM”). For example, an SCPM could be a scanning electron microscope (SEM). SCPM can be used to image these extremely small structures, essentially taking “pictures” of the wafer's structure. This image can be used to determine if the structure is correctly formed in the correct location. If there are defects in the structure, the process can be adjusted so that the defects are less likely to recur.

[0031] A Sequencing Electron Microscope (SEM) works similarly to a camera. A camera takes pictures by receiving and recording the intensity of light reflected or emitted from a person or subject. A Sequencing Electron Microscope (SEM) takes "pictures" by receiving and recording the energy or quantity of electrons reflected or emitted from a wafer structure. Before taking such "pictures," an electron beam can be projected onto the structure, and as electrons are reflected or emitted ("emitted") from that structure (e.g., from the wafer surface, from a structure beneath the wafer surface, or from both), the SEM's detectors can receive and record the energy or quantity of these electrons to generate an inspection image. To take such "pictures," the electron beam can scan across the wafer (e.g., in a row-by-row or zigzag pattern), and the detectors can receive emitted electrons from the area projected by the electron beam (called a "beam spot"). The beam projected onto the wafer can be called the "primary beam." The detector can receive emitted electrons from a secondary beam spot on the detector's surface and can record the intensity of the secondary beam spot. By correlating the intensity of the secondary beam over time with the scan path of the primary beam, an SEM image of the wafer can be constructed. Some SEMs use a single electron beam (called "single-beam SEM") to capture a single "image" to generate an inspection image, while others use multiple electron beams (called "multi-beam SEM") to capture multiple "sub-images" of the wafer in parallel and stitch them together to generate an inspection image. By using multiple electron beams, the SEM can deliver more electron beams to the structure to obtain these multiple "sub-images," resulting in more electrons escaping from the structure. Therefore, the detector can receive more emitted electrons simultaneously and generate inspection images of the wafer structure with greater efficiency and faster speed.

[0032] The emitted electrons received by the detector in a SEM can cause the detector to generate an electrical signal (e.g., a current signal or a voltage signal) commensurate with the energy of the emitted electrons and the intensity of the electron beam. For example, the amplitude of the electrical signal can be commensurate with the charge of the received emitted electrons. The detector can output the electrical signal to an image processor, and the image processor can process the electrical signal to form an image of the wafer structure. Multi-beam SEM systems use multiple electron beams for inspection, and the detectors in multi-beam SEM systems can have multiple segments to receive them. Each segment can have multiple sensing elements and can be used to form an "image" of a sub-region of the wafer. The "images" generated based on the signals from each segment of the detector can be merged to form a complete image of the wafer under inspection.

[0033] The detector segments can be communicatively interconnected. Each segment of the detector can have a corresponding signal processing circuitry system for processing the electrical signals generated by the detector. When an electron beam strikes a segment, its signal processing circuitry system can be activated for signal processing. When an electron beam strikes multiple adjacent segments, their signal processing circuitry systems can be activated in a coordinated manner for signal processing. When no electron beam strikes a segment, its signal processing circuitry system may be deactivated. When an electron beam strikes a faulty segment, the signal processing circuitry systems of adjacent segments can be activated for signal processing. Through this design of interconnected segments, the SEM detector can provide flexibility and fault tolerance for signal processing.

[0034] Detectors have many performance metrics. One metric is the "pixel rate," which is the rate at which pixels are generated to produce an inspected image. Pixel rate can indicate the digital data processing bandwidth of a digital system, and the detector's maximum pixel rate indicates its maximum digital data processing speed. Another metric is the "analog signal bandwidth," which is the range of frequencies between the lowest and highest frequencies achievable by an analog signal. High-frequency analog signals can reflect the "details" of the inspected structure. Analog signal bandwidth indicates the detector's detection capability and the fineness of the detection results, which is a different performance metric from pixel rate. For example, even with a high pixel rate, if the analog signal bandwidth is low, the inspected image may still be blurry because some details of the structure may be lost due to the low analog signal bandwidth and may not be reflected in the inspected image.

[0035] Pixel rate and analog signal bandwidth are prone to generating "parasitic parameters," which are undesirable or unexpected electromagnetic effects introduced by the detector's operating components. Parasitic parameters can include parasitic capacitance (e.g., stray capacitance), parasitic resistance, or parasitic inductance. Parasitic parameters can occur even when some components are not operating. They can alter component design specifications and potentially adversely affect detector performance, such as reducing analog signal bandwidth and data processing bandwidth. For example, stray capacitance can impede charge movement. Parasitic resistance can increase internal detection signal loss. Parasitic inductance can impede the flow of dynamic current. Furthermore, parasitic parameters can introduce noise and interference into the inspected image. Ideally, detectors should be designed to minimize the generation of parasitic parameters.

[0036] Pixel rate and analog signal bandwidth can have a critical impact on other detector performance metrics, such as signal-to-noise ratio (“SNR”) or detector performance capacity (e.g., maximum detection speed or maximum detection throughput). To increase pixel rate and analog signal bandwidth, detectors can be designed to shorten the distance between the electrical connections of the individual sensing elements and their signal processing circuitry, which can suppress the generation of parasitic parameters (e.g., series resistance, parasitic capacitance, or series inductance). Alternatively, the architecture of the signal processing circuitry can be enhanced or redesigned to make the detector less sensitive to parasitic parameters.

[0037] However, existing interconnect design for detectors still faces several challenges related to analog signal bandwidth and pixel rate. For example, there is still room for further suppression of parasitic parameter generation to reduce the impact of parasitic parameters on analog signal bandwidth without incurring significant costs, to increase the processing bandwidth of analog or digital signal processing, or to increase pixel rate and detector performance adaptability.

[0038] This disclosure provides a detector with an improved architecture for improving analog signal bandwidth and pixel rate. In some embodiments of the detector, an interconnect layer is provided between the detector's analog signal processing circuitry and a current- or charge-based analog-to-digital converter (ADC) corresponding to the analog signal processing circuitry. Compared to equivalent voltage-based analog processing circuitry, this architecture has the advantage of reducing the sensitivity of the current- or charge-based analog processing circuitry, which allows for a relative increase in analog signal bandwidth. The interconnect layer can communicatively couple the outputs of the analog signal processing circuitry to each other via interconnect switching elements. Switching elements can be provided at the inputs and outputs of the analog signal processing circuitry. By controlling the switching elements, different analog signal processing circuitry systems can be communicatively activated or deactivated in the detector. By coupling the outputs of different analog signal processing circuitry systems via interconnect switching elements in the interconnect layer, multiple analog signal processing circuitry systems can be associated with a single current- or charge-based ADC via the interconnect layer, thereby achieving high analog signal bandwidth without requiring additional digital output capacity. By coupling the ADC via the interconnect layer, the ADC can be controlled to operate in an interleaved mode, which can provide a higher pixel rate than the specifications of a single ADC. In summary, by using the provided architecture, the limits of the performance adaptability and capabilities of existing detectors can be pushed further.

[0039] For clarity, the relative dimensions of the parts in the accompanying drawings may be enlarged. In the following description of the drawings, the same or similar reference numerals refer to the same or similar parts or entities, and only the differences with respect to the corresponding embodiments are described.

[0040] The purposes and advantages of this disclosure can be achieved by the elements and combinations set forth in the embodiments discussed herein. However, embodiments of this disclosure are not necessarily required to achieve such exemplary purposes or advantages, and some embodiments may not achieve any of such purposes or advantages.

[0041] Some embodiments are described within the context of providing detection systems and methods in systems utilizing electron beams (“electron beams”) without limiting the scope of this disclosure. However, this disclosure is not limited thereto. Other types of charged particle beams can be similarly applied. Furthermore, the systems and methods used for detection can be used in other imaging systems (such as optical imaging, photon detection, X-ray detection, ion detection, etc.).

[0042] As used herein, unless otherwise expressly stated, the term "or" covers all possible combinations unless impractical. For example, if a statement declares that a component may include A or B, then unless otherwise expressly stated or impractical, the component may include A or B, or A and B. As a second example, if a statement declares that a component may include A, B, or C, then unless otherwise expressly stated or impractical, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0043] Figure 1 An exemplary electron beam inspection (EBI) system 100 conforming to an embodiment of this disclosure is illustrated. The EBI system 100 can be used for imaging. Figure 1 As shown, the EBI system 100 includes a main chamber 101, a loading / locking chamber 102, a beam tool 104, and an equipment front-end module (EFEM) 106. The beam tool 104 is located within the main chamber 101. The EFEM 106 includes a first loading port 106a and a second loading port 106b. The EFEM 106 may include additional loading ports. The first loading port 106a and the second loading port 106b receive a front-opening wafer cassette (FOUP) containing a wafer to be inspected (e.g., a semiconductor wafer or a wafer made of other materials) or a sample (wafers and samples can be used interchangeably). A "lot" is a group of wafers that can be loaded as a batch for processing.

[0044] One or more robotic arms (not shown) in EFEM 106 can transfer the wafer to loading / locking chamber 102. Loading / locking chamber 102 is connected to a loading / locking vacuum pump system (not shown), which removes gas molecules from loading / locking chamber 102 to achieve a first pressure below atmospheric pressure. After reaching the first pressure, one or more robotic arms (not shown) can transfer the wafer from loading / locking chamber 102 to main chamber 101. Main chamber 101 is connected to a main chamber vacuum pump system (not shown), which removes gas molecules from main chamber 101 to achieve a second pressure below the first pressure. After reaching the second pressure, the wafer is inspected by beam tool 104. Beam tool 104 can be a single-beam system or a multi-beam system.

[0045] Controller 109 is electrically connected to beam tool 104. Controller 109 may be a computer configured to perform various controls of EBI system 100. Although controller 109 is... Figure 1 The controller 109 is shown outside the structure including the main chamber 101, the loading / locking chamber 102 and the EFEM 106, but it should be understood that the controller 109 may be part of the structure.

[0046] In some embodiments, controller 109 may include one or more processors (not shown). A processor may be a general-purpose or specialized electronic device capable of manipulating or processing information. For example, a processor may include any number of central processing units (or “CPU”), graphics processing units (or “GPU”), optical processors, programmable logic controllers, microcontrollers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logic (PALs), general-purpose array logic (GALs), complex programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), system-on-a-chip (SoCs), application-specific integrated circuits (ASICs), and any combination of any type of circuitry capable of data processing. A processor may also be a virtual processor, comprising one or more processors distributed across multiple machines or devices coupled via a network.

[0047] In some embodiments, controller 109 may also include one or more memories (not shown). The memory can be a general-purpose or specific electronic device capable of storing processor-accessible code and data (e.g., via a bus). For example, the memory may include any number of random access memory (RAM), read-only memory (ROM), optical disc, magnetic disk, hard disk, solid-state drive, flash drive, secure digital card (SD) card, memory stick, compressed flash memory (CF) card, or any combination of any type of storage device. The code and data may include an operating system (OS) and one or more applications (or "applications") for a specific task. The memory may also be virtual memory, comprising one or more memories distributed across multiple machines or devices coupled via a network.

[0048] Figure 2 The illustration shows a schematic diagram of an exemplary multi-beam beam tool 104 (also referred to herein as apparatus 104) and an image processing system 290 according to an embodiment of the present disclosure, which image processing system 290 can be configured for use in EBI system 100 ( Figure 1 )middle.

[0049] The beam-emitting tool 104 includes a charged particle source 202, a bore 204, a converging lens 206, a primary charged particle beam 210 emitted from the charged particle source 202, a source conversion unit 212, multiple sub-beams 214, 216, and 218 of the primary charged particle beam 210, a primary projection optics system 220, a motorized wafer stage 280, a wafer holder 282, multiple secondary charged particle beams 236, 238, and 240, a secondary optics system 242, and a charged particle detection device 244. The primary projection optics system 220 may include a beam splitter 222, a deflection scanning unit 226, and an objective lens 228. The charged particle detection device 244 may include detection sub-regions 246, 248, and 250.

[0050] The charged particle source 202, the gun hole 204, the converging lens 206, the source conversion unit 212, the beam splitter 222, the deflection scanning unit 226, and the objective lens 228 can be aligned with the primary optical axis 260 of the device 104. The secondary optical system 242 and the charged particle detection device 244 can be aligned with the secondary optical axis 252 of the device 104.

[0051] Charged particle source 202 can emit one or more charged particles, such as electrons, protons, ions, muons, or any other charged particles. In some embodiments, charged particle source 202 can be an electron source. For example, charged particle source 202 can include a cathode, extractor, or anode, wherein primary electrons can be emitted from the cathode and extracted or accelerated to form a primary charged particle beam 210 (in this case, a primary electron beam) having a cross (virtual or real) 208. For ease of explanation and without ambiguity, electrons are used as examples in some descriptions herein. However, it should be noted that any charged particle can be used in any embodiment of this disclosure, not limited to electrons. The primary charged particle beam 210 can be considered to be emitted from the cross 208. The aperture 204 can block peripheral charged particles of the primary charged particle beam 210 to reduce the Coulomb effect. The Coulomb effect may lead to an increase in the probe point size.

[0052] Source conversion unit 212 may include an imaging element array and a beam-limiting aperture array. The imaging element array may include a micro-deflector or microlens array. The image-forming element array can utilize multiple sub-beams 214, 216, and 218 of the primary charged particle beam 210 to form multiple (virtual or real) parallel images crossing 208. The beam-limiting aperture array can limit the multiple sub-beams 214, 216, and 218. Although Figure 2 Three sub-beams 214, 216, and 218 are shown, but embodiments of this disclosure are not limited thereto. For example, in some embodiments, device 104 may be configured to generate a first number of sub-beams. In some embodiments, the first number of sub-beams may be in the range of 1 to 1000. In some embodiments, the first number of sub-beams may be in the range of 200-500. In an exemplary embodiment, device 104 may generate 400 sub-beams.

[0053] The converging lens 206 can focus the primary charged particle beam 210. The currents of the sub-beams 214, 216, and 218 downstream of the source conversion unit 212 can be changed by adjusting the focusing capability of the converging lens 206 or by changing the radial dimensions of the corresponding beam-limiting apertures in the beam-limiting aperture array. The objective lens 228 can focus the sub-beams 214, 216, and 218 onto the wafer 230 for imaging, and can form multiple probe points 270, 272, and 274 on the surface of the wafer 230.

[0054] Beam splitter 222 can be a Wien filter-type beam splitter that generates electrostatic dipole fields and magnetic dipole fields. In some embodiments, if an electrostatic dipole field is applied, the force exerted by the electrostatic dipole field on the charged particles (e.g., electrons) of sub-beams 214, 216, and 218 on the sub-beams 214, 216, and 218 on the sub-beams 214, 216, and 218 on the sub-beams 214, 216, and 218 on the sub-beams 216, 218 on the sub-beams 214, 216, and 218 on the sub-beams 216, 218 on the sub-beams 214, 216, and 218 on the sub-beams 222 can also be non-zero. Beam splitter 222 can separate secondary charged particle beams 236, 238, and 240 from sub-beams 214, 216, and 218 and guide secondary charged particle beams 236, 238, and 240 on the secondary optical system 242.

[0055] The deflection scanning unit 226 can deflect sub-beams 214, 216, and 218 to scan probe points 270, 272, and 274 on the surface region of wafer 230. In response to the incident of sub-beams 214, 216, and 218 at probe points 270, 272, and 274, secondary charged particle beams 236, 238, and 240 can be emitted from wafer 230. The secondary charged particle beams 236, 238, and 240 can include charged particles (e.g., electrons) with an energy distribution. For example, the secondary charged particle beams 236, 238, and 240 can be secondary electron beams comprising secondary electrons (energy ≤ 50 eV) and backscattered electrons (energy between 50 eV and the landing energy of sub-beams 214, 216, and 218). The secondary optical system 242 can focus secondary charged particle beams 236, 238, and 240 onto detection sub-regions 246, 248, and 250 of the charged particle detection device 244. Detection sub-regions 246, 248, and 250 can be configured to detect the corresponding secondary charged particle beams 236, 238, and 240 and generate corresponding signals (e.g., voltage, current, etc.) for reconstructing SCPM images of structures above or below the surface region of the wafer 230.

[0056] The generated signals can represent the intensity of the secondary charged particle beams 236, 238, and 240 and can be provided to an image processing system 290, which communicates with the charged particle detection device 244, the primary projection optics system 220, and the motorized wafer stage 280. The movement speed of the motorized wafer stage 280 can be synchronized and coordinated with the beam deflection controlled by the deflection scanning unit 226, so that the movement of the scanning probe points (e.g., scanning probe points 270, 272, and 274) can orderly cover the region of interest on the wafer 230. Such synchronization and coordination parameters can be adjusted to accommodate different materials of the wafer 230. For example, different materials of the wafer 230 may have different resistivity and capacitance characteristics, which may result in different signal sensitivities to the movement of the scanning probe points.

[0057] The intensities of the secondary charged particle beams 236, 238, and 240 can vary depending on the external or internal structure of the wafer 230, and thus can indicate whether the wafer 230 contains defects. Furthermore, as discussed above, sub-beams 214, 216, and 218 can be projected onto different locations on the top surface of the wafer 230, or different sides of a local structure of the wafer 230, to generate secondary charged particle beams 236, 238, and 240 with varying intensities. Therefore, by mapping the intensities of the secondary charged particle beams 236, 238, and 240 to regions of the wafer 230, the image processing system 290 can reconstruct an image reflecting the internal or external structural features of the wafer 230.

[0058] In some embodiments, the image processing system 290 may include an image acquirer 292, a memory 294, and a controller 296. The image acquirer 292 may include one or more processors. For example, the image acquirer 292 may include a computer, server, mainframe, terminal, personal computer, any kind of mobile computing device, or a combination thereof. The image acquirer 292 may be communicatively coupled to the charged particle detection device 244 of the beam tool 104 via a medium such as an electrical conductor, fiber optic cable, portable storage medium, IR, Bluetooth, the Internet, wireless network, radio, or a combination thereof. In some embodiments, the image acquirer 292 may receive signals from the charged particle detection device 244 and may construct an image. The image acquirer 292 may thus acquire an SCPM image of the wafer 230. The image acquirer 292 may also perform various post-processing functions, such as generating contours, overlaying indicators on the acquired image, etc. The image acquirer 292 may be configured to perform adjustments to the brightness and contrast of the acquired image. In some embodiments, the memory 294 may be a storage medium such as a hard disk, flash drive, cloud storage, random access memory (RAM), other types of computer-readable storage, etc. The memory 294 can be coupled to the image acquirer 292 and can be used to save scanned raw image data as raw images and post-processed images. The image acquirer 292 and the memory 294 can be connected to the controller 296. In some embodiments, the image acquirer 292, the memory 294, and the controller 296 can be integrated together as a single control unit.

[0059] In some embodiments, image acquisition unit 292 may acquire one or more SCPM images of a wafer based on imaging signals received from charged particle detection device 244. The imaging signals may correspond to a scanning operation for performing charged particle imaging. The acquired image may be a single image comprising multiple imaging regions. The single image may be stored in memory 294. The single image may be an original image that can be divided into multiple regions. Each region may include an imaging region containing features of wafer 230. The acquired images may include multiple images of a single imaging region of wafer 230 sampled multiple times over a time series. Multiple images may be stored in memory 294. In some embodiments, image processing system 290 may be configured to perform image processing steps on multiple images of the same location on wafer 230.

[0060] In some embodiments, the image processing system 290 may include measurement circuitry (e.g., an analog-to-digital converter) to obtain the distribution of detected secondary charged particles (e.g., secondary electrons). The charged particle distribution data collected during the detection time window, combined with corresponding scan path data of the sub-beams 214, 216, and 218 incident on the wafer surface, can be used to reconstruct an image of the inspected wafer structure. The reconstructed image can be used to reveal various features of the internal or external structure of the wafer 230, and thereby can be used to reveal any defects that may be present in the wafer.

[0061] In some embodiments, the charged particles may be electrons. When electrons from the primary charged particle beam 210 are projected onto the surface of the wafer 230 (e.g., probe points 270, 272, and 274), the electrons of the primary charged particle beam 210 can penetrate to a certain depth into the surface of the wafer 230 and interact with the particles of the wafer 230. Some electrons of the primary charged particle beam 210 may elastically interact with the material of the wafer 230 (e.g., in the form of elastic scattering or collision) and may be reflected or bounced off the surface of the wafer 230. Elastic interactions preserve the total kinetic energy of the interacting subjects (e.g., electrons from the primary charged particle beam 210), where the kinetic energy of the interacting subjects is not converted into other forms of energy (e.g., heat, electromagnetic energy, etc.). Such reflected electrons generated by elastic interactions may be referred to as backscattered electrons (BSE). Some electrons of the primary charged particle beam 210 may interact inelastically with the material of the wafer 230 (e.g., in the form of inelastic scattering or collision). Inelastic interactions do not conserve the total kinetic energy of the interacting subjects, where some or all of the kinetic energy of the interacting subjects is converted into other forms of energy. For example, through inelastic interactions, the kinetic energy of some electrons in the primary charged particle beam 210 can lead to electronic excitation and atomic transitions in the material. Such inelastic interactions can also generate electrons exiting the surface of wafer 230, which can be referred to as secondary electrons (SEs). The yield or emission rate of BSEs and SEs depends in particular on, for example, the material being examined and the landing energy of the electrons of the primary charged particle beam 210 landing on the surface of the material. The electron energy of the primary charged particle beam 210 can be partially determined by its accelerating voltage (e.g., Figure 2 The accelerating voltage between the anode and cathode of the intermediate charged particle source 202 is applied. The number of BSE and SE can be more or less (or even the same) than the injected electrons of the primary charged particle beam 210.

[0062] Images generated by SEM can be used for defect inspection. For example, a generated image capturing a test equipment area of ​​a wafer can be compared with a reference image capturing the same test equipment area. The reference image can be predetermined (e.g., by simulation) and does not include known defects. If the difference between the generated image and the reference image exceeds a tolerance level, a potential defect can be identified. As another example, SEM can scan multiple areas of a wafer, each including a test equipment area designed identically, and generate multiple images capturing these manufactured test equipment areas. These multiple images can be compared with each other. If the differences between the multiple images exceed a tolerance level, a potential defect can be identified.

[0063] Figure 3A A schematic diagram of an exemplary structure of a detector 300A conforming to an embodiment of the present disclosure is illustrated. The detector 300A can be provided as a charged particle detection device 244. Figure 3A In this configuration, detector 300A includes a sensor layer 301, a segment layer 302, and a readout layer 303. Sensor layer 301 may include a sensor die composed of multiple sensing elements, including sensing elements 311, 312, 313, and 314. In some embodiments, multiple sensing elements may be provided in a sensing element array, each of which may have a uniform size, shape, and arrangement.

[0064] Segment layer 302 may include multiple segments, including segments 321, 322, 323, and 324. Each segment may include interconnects (e.g., wiring paths) configured to communicatively couple multiple sensing elements. These segments may also include switching elements that control the communicative coupling between the sensing elements. Each segment may further include connection mechanisms (e.g., wiring paths and switching elements) between the sensing elements and one or more common nodes in the segment layer. For example, as... Figure 3AAs shown, segment 323 can be configured to communicatively couple the outputs of sensing elements 311, 312, 313, and 314, as indicated by the four dashed lines between sensor layer 301 and segment layer 302. In some embodiments, segment 323 can be configured to output a combined signal collected from sensing elements 311, 312, 313, and 314 as a common output. In some embodiments, the segment (e.g., segment 323) can be communicatively coupled to sensing elements (e.g., sensing elements 311, 312, 313, and 314) placed directly above the segment. For example, segment 323 can have a grid of terminals configured to connect to the outputs of sensing elements 311, 312, 313, and 314. In some embodiments, segments 321, 322, 323, and 324 can be provided in an array structure, such that they have a uniform size and shape and a uniform arrangement. For example, segments 321, 322, 323, and 324 can be square. In some embodiments, isolation zones may be provided between adjacent segments to electrically insulate them from each other. In some embodiments, the segments may be arranged in an offset pattern, such as a tiled layout.

[0065] The readout layer 303 may include a signal processing circuitry system for processing the output of a sensing element. In some embodiments, a signal processing circuitry system may be provided, which may correspond to each of the segments in the segment layer 302. In some embodiments, a plurality of individual signal processing circuitry system segments may be provided, including signal processing circuitry system segments 331, 332, 333, and 334. In some embodiments, the signal processing circuitry system segments may be provided as an array of segments having uniform size and shape and uniform arrangement. In some embodiments, the signal processing circuitry system segments may be configured to connect to the output of a corresponding segment from the segment layer 302. For example, as... Figure 3A As shown, the signal processing circuit system segment 333 can be configured to be communicatively coupled to the output of segment 323, as indicated by the dashed line between segment layer 302 and readout layer 303.

[0066] In some embodiments, the readout layer 303 may include input terminals and output terminals. The output of the readout layer 303 may be connected to a component used for reading and interpreting the output of the detector 300A. For example, the readout layer 303 may be directly connected to a digital multiplexer, a digital logic block, a controller, a computer, etc.

[0067] The size of the segment and the number of sensing elements associated with the segment can vary. For example, although Figure 3A Four sensing elements are illustrated in one section, but the embodiments of this disclosure are not limited thereto.

[0068] although Figure 3AThe sensor layer 301, segment layer 302, and readout layer 303 are illustrated as multiple discrete layers; however, it should be noted that the sensor layer 301, segment layer 302, and readout layer 303 do not need to be provided as separate substrates. For example, the wiring paths of segment layer 302 can be disposed within a sensor die including multiple sensing elements, or they can be disposed outside the sensor die. The wiring paths can be patterned on sensor layer 301. Furthermore, segment layer 302 can be combined with readout layer 303. For example, a semiconductor die including the wiring paths of segment layer 302 and the readout layer 303 can be provided. Therefore, the structures and functions of the individual layers can be combined or divided.

[0069] In some embodiments, the detector may be provided in a dual-die configuration. However, embodiments of this disclosure are not limited thereto. For example, the functionality of the sensor layer, segment layer, and readout layer may be implemented in a single die or in a package that may contain one or more dies.

[0070] In some embodiments, the sensor layer 301, segment layer 302, and readout layer 303 can be arranged in a stacked relationship. For example, segment layer 302 can be directly mounted on top of readout layer 303, and sensor layer 301 can be directly mounted on top of segment layer 302. The layers can be stacked such that segments within segment layer 302 are aligned with signal processing circuitry system segments (e.g., segments 331, 332, 333, and 334) of readout layer 303. Furthermore, the layers can be stacked such that one or more sensing elements within sensor layer 301 are aligned with segments in segment layer 302. In some embodiments, sensing elements to be associated with a segment can be contained within that segment. For example, in a plan view of detector 300A, sensing elements (e.g., sensing elements 311, 312, 313, and 314) of a segment (e.g., segment 323) can be mounted within the boundary of that segment. Furthermore, each segment of segment layer 302 can overlap with the signal processing circuitry segment of readout layer 303. In this way, a predetermined region can be established for associating sensing elements with segments and signal processing circuitry systems.

[0071] Figure 3B An exemplary structure of a sensor surface 300B conforming to an embodiment of the present disclosure is illustrated. This sensor surface can form the surface of a charged particle detection device 244. The sensor surface 300B may be provided with multiple segments of sensing elements, including segments 340, 350, 360, and 370, indicated by dashed lines. For example, the sensor surface 300B may be... Figure 3A The surface of sensor layer 301 in the chip. Each segment may be able to receive at least a portion of a beam spot emitted from a specific location on the wafer 230, such as Figure 2One of the secondary charged particle beams 236, 238 and 240 shown.

[0072] like Figure 3B As shown, sensor surface 300B may include an array of sensing elements, including sensing elements 315, 316, and 317. In some embodiments, each of segments 340, 350, 360, and 370 may include one or more sensing elements. For example, segment 340 may include a first plurality of sensing elements, and segment 350 may include a second plurality of sensing elements, etc. The first plurality of sensing elements and the second plurality of sensing elements may be mutually exclusive. In some embodiments, the sensing element may be a diode or any diode-like component that converts incident energy into a measurable signal. For example, the sensing element may include a PIN diode, an avalanche diode, an electron multiplier tube (EMT), or other components.

[0073] exist Figure 3B In this embodiment, a region 380 may be provided between adjacent sensing elements. Region 380 may be an isolation region to isolate the sides or corners of adjacent sensing elements from each other. In some embodiments, region 380 may include an insulating material different from that of the sensing element on sensor surface 300B. In some embodiments, region 380 may be provided as a square. In some embodiments, region 380 may not be provided between adjacent sides of the sensing elements.

[0074] In some embodiments, the field-programmable detector array may be provided with sensing elements having switching regions integrated between the sensing elements. For example, detectors such as some of the examples discussed in PCT application No. PCT / EP2018 / 074833, filed September 14, 2018, the contents of which are incorporated herein by reference in their entirety. In some embodiments, switching regions may be provided between the sensing elements so that some or more sensing elements can be grouped together when covered by the same charged particle beam. Circuitry for controlling the switching regions may be included in the readout layer (e.g., Figure 3A In the signal processing circuitry system of the readout layer 303. As used throughout this disclosure, the expression "set of sensing elements" will mean a set of a first number of sensing elements. The first set of sensing elements in this set of sensing elements may refer to a subset of the sensing elements within that set. The second set of sensing elements may refer to another subset of the sensing elements within that set. The first set and the second set may or may not be mutually exclusive. A "set" of sensing elements may refer to sensing elements associated with a beam spot projected onto the surface of the detector (e.g., within the boundary of the beam spot). The first set of sensing elements and the second set of sensing elements may refer to different sets of sensing elements associated with different beam spots. The set of sensing elements is not necessarily limited to a specific "segment" of the detector.

[0075] Figure 4A This is a diagram illustrating an exemplary detector array 400 with switching elements conforming to an embodiment of the present disclosure. The detector array 400 may be... Figure 3A An example embodiment of the detector 300A. For example, the detector array 400 may include a sensor layer (e.g., similar to...). Figure 3A In the sensor layer 301), the segment layer (e.g., similar to...) Figure 3A The section layer 302) and the readout layer (e.g., similar to the ... 302) Figure 3A (Readout layer 303 in the middle). Region 401 can correspond to a segment (e.g., such as...). Figure 3A (Segment 323 shown). The sensor layer of detector array 400 may include multiple sensing elements, including sensing elements 311, 312, 313, and 314. In some embodiments, each of the sensing elements of detector array 400 may have a uniform size, shape, and arrangement. The sensing elements of detector array 400 may generate a current signal commensurate with the charged particles (e.g., emitted electrons) received in the active region of the sensing element. The term "active region" herein may refer to a region where the radiation sensitivity of the sensing element is above a predetermined threshold.

[0076] The segment layers of the detector array 400 may include a base substrate (e.g., a semiconductor substrate) containing one or more wiring paths 402. Figure 4A (Not shown in the diagram). Wiring path 402 can be configured to communicatively couple the sensing elements of detector array 400. (e.g.) Figure 4A As shown, the detector array 400 includes a 4×4 array of sensing elements in region 401, including sensing elements 311, 312, 313, and 314. Figure 4A In this configuration, the segment layer of detector array 400 may include inter-element switching elements between any two adjacent sensing elements. The segment layer of detector array 400 may also include inter-element switching elements communicatively coupled to the edges of adjacent sensing elements. Wiring path 402 may be configured to communicatively couple to the outputs of sensing elements (e.g., sensing elements 311, 312, 313, and 314) in region 401. For example, a grid of terminals (shown as circular black dots at the center of the sensing elements) may be provided, and wiring path 402 may be configured to connect to the outputs of sensing elements 311, 312, 313, and 314 via such terminals. In some embodiments, wiring path 402 may be provided within the segment layer of detector array 400. Figure 4A In this configuration, wiring path 402 is communicatively coupled to the aforementioned sensing elements (e.g., sensing elements 311, 312, 313, and 314). Figure 4AIn this configuration, a component bus switch element may be provided between the output of the sensing element and the wiring path 402. In some embodiments, the component bus switch element may be disposed in a segment layer of the detector array 400.

[0077] In some embodiments, multiple segments may be provided, and the sensing elements of one segment may be connected via wiring paths. For example... Figure 4B As shown, the detector array 400 includes segments 421, 422, 423, and 424 that can be arranged in rows. Figure 4C As shown, the detector array 400 includes a segment 323 with 2×2 sensing elements, including sensing elements 311, 312, 313 and 314.

[0078] In some embodiments, wiring path 402 may include conductive material lines, flexible lines, bonding lines, etc., printed on a substrate. In some embodiments, switching elements may be provided such that the output of each sensing element can be connected to or disconnected from a common output of a segment (e.g., segment 323). In some embodiments, the segment layer of detector array 400 may also include corresponding circuitry for controlling the switching elements. In some embodiments, switching elements may be provided in a separate switching element matrix, which itself may contain circuitry for controlling the switching elements.

[0079] The readout layer of the detector array 400 may include signal conditioning circuitry for processing the output of the sensing element. In some embodiments, the signal conditioning circuitry may convert the generated current signal into a voltage that can represent the intensity of the received beam spot, or it may amplify the generated current signal into an amplified current signal. The signal conditioning circuitry may include, for example, an amplifier 404 and one or more analog switching elements (…). Figure 4A (Not shown in the image). Amplifier 404 can be a high-speed transimpedance amplifier, current amplifier, etc. Figure 4A In this configuration, amplifier 404 can be communicatively coupled to the common output of segment 321 for amplifying the output signal of the sensing element of segment 321. In some embodiments, amplifier 404 can be a single-stage or multi-stage amplifier. For example, if amplifier 404 is a multi-stage amplifier, it can include preamplifiers and post-amplifiers, or include front-end stages and post-amplifier stages, etc. In some embodiments, amplifier 404 can be a variable gain amplifier, such as a variable gain transimpedance amplifier (VGTIA), a variable gain charge transfer amplifier (VGCTA), etc. Signal conditioning circuitry can be coupled to a signal path, which may include, for example, an analog-to-digital converter (ADC) 406. Figure 4AIn this configuration, the ADC 406 can be communicatively coupled to the output of a signal conditioning circuit (e.g., including amplifier 404) to convert the analog output signal of the signal conditioning circuit into a digital signal. The readout layer of the detector array 400 may also include additional circuitry for other functions. For example, the readout layer of the detector array 400 may include switching element drive circuitry that controls the switching of sensing elements. For ease of explanation and to avoid ambiguity, the signal path between the sensing elements and the ADC 406 may be referred to as the "analog signal path." For example, Figure 4A The analog signal path includes the aforementioned signal conditioning circuitry (e.g., amplifier 404). The input of the analog signal path is communicatively coupled to the sensing element, and the output of the analog signal path is communicatively coupled to the ADC 406.

[0080] In some embodiments, the ADC 406 may include an output terminal communicatively coupled to components for reading and interpreting the digital signal converted by the ADC 406 (e.g., components inside or outside the readout layer of the detector array 400). Figure 4A In this configuration, ADC 406 is communicatively coupled to digital multiplexer 408. In some embodiments, digital multiplexer 408 may be arranged in the readout layer of detector array 400. Digital multiplexer 408 can receive multiple input signals and convert them into output signals. The output signal of digital multiplexer 408 can be converted back into multiple input signals. The output signal of digital multiplexer 408 can also be transmitted to a data processing stage (e.g., ...). Figure 2 Image processing system 290 (in the image processing system).

[0081] Figure 5 This is a cross-sectional view illustrating the layer structure of a detector 500 conforming to an embodiment of the present disclosure. Figure 2 As shown, detector 500 can serve as charged particle detection device 244 in charged particle beam tool 104. Detector 500 can be configured to have multiple layers stacked in a thickness direction substantially parallel to the incident direction of the charged particle beam. In some embodiments, detector 500 may be provided as some of the examples discussed in PCT application No. PCT / EP2018 / 074834, filed September 14, 2018, the contents of which are incorporated herein by reference in their entirety.

[0082] exist Figure 5 In this configuration, detector 500 may include a sensor layer 510 and a circuit layer 520. In some embodiments, sensor layer 510 may represent... Figure 3A The sensor layer 301 and the circuit layer 520 can represent Figure 3AThe section layer 520 and the readout layer 303 are located within the sensor layer 510. For example, the circuit layer 520 may include interconnects (e.g., metal wires) and various electronic circuit components. As another example, the circuit layer 520 may include a processing system. The circuit layer 520 may also be configured to receive an output current detected in the sensor layer 510. In some embodiments, the sensor layer 510 may represent... Figure 3A The sensor layer 301 and segment layer 302, and the circuit layer 520 can represent Figure 3A The readout layer 303 is located in the sensor layer 301, the segment layer 302, and the readout layer 303. In some embodiments, the detector 500 may include layers other than the sensor layer 301, the segment layer 302, and the readout layer 303.

[0083] In some embodiments, the sensor layer 510 may be provided with a sensor surface 501 for receiving incident charged particles. Sensing elements, including sensing elements 511, 512, and 513 (distinguished by dashed lines), may be provided in the sensor layer 510. For example, the sensor surface 501 may be similar to... Figure 3B The sensor surface 300B is located within this area. Figure 5 In this configuration, switching elements 519 and 521 can be arranged horizontally between adjacent sensing elements in a cross-sectional view. Switching elements 519 and 521 can be embedded in the sensor layer 510. In some embodiments, sensing elements 511, 512, and 513 can be... Figure 4A The detector array 400 contains sensing elements (e.g., sensing elements 311, 312, 313, and 314), and switching elements 519 and 521 can be located within them. Figure 4A The detector array 400 is located among the switching elements between the sensing elements.

[0084] In some embodiments, sensing elements 511, 512, and 513 may be separated by an isolation region (indicated by dashed lines) extending in the thickness direction. For example, the sides of sensing elements 511, 512, and 513 parallel to the thickness direction may be separated by the isolation region (e.g., Figure 3B The regions 380 in the middle are isolated from each other.

[0085] In some embodiments, the sensor layer 510 may be configured as one or more diodes, wherein the sensing elements 511, 512, and 513 are similar to... Figure 3B Sensing elements 315, 316, and 317. Switching elements 519 and 521 may be configured as transistors (e.g., MOSFETs). Each of sensing elements 511, 512, and 513 may include an output for electrical connection to circuit layer 520. For example, the output may be integrated with switching elements 519 and 521, or it may be provided separately. In some embodiments, the output may be integrated in the bottom layer (e.g., a metal layer) of sensor layer 510.

[0086] although Figure 5 Sensing elements 511, 512, and 513 are depicted as discrete units when viewed in cross-section, but such division may not actually be physical. For example, the sensing elements of detector 500 may be formed from a semiconductor device constituting a PIN diode device, which may be fabricated as a substrate having multiple layers including P-type regions, intrinsic regions, and N-type regions. In such examples, sensing elements 511, 512, and 513 may be continuous in a cross-sectional view. In some embodiments, switching elements (e.g., switching elements 519 and 521) may be integrated with the sensing elements.

[0087] In some embodiments, the switching element may be integrated within the sensor layer, within other layers, or may be partially or wholly disposed within existing layers. For example, in some embodiments, the sensor layer may include a well, trench, or other structure in which the switching element is formed.

[0088] In some embodiments, the switching elements of the detector 500 (e.g., switching elements 519 and 521) may be disposed outside the sensor layer 510. For example, the switching elements may be embedded in the circuit layer 520. Figure 5 (Not shown in the image). In some embodiments, the switching elements of detector 500 (e.g., switching elements 519 and 521) may be formed in a separate die (e.g., a switching die). For example, the switching die ( Figure 5 (Not shown) can be sandwiched between sensor layer 510 and circuit layer 520, and can be communicatively connected to sensor layer 510 and circuit layer 520.

[0089] Figure 6 This is a cross-sectional view illustrating the sensing element 512 of a detector 500 conforming to an embodiment of the present disclosure. Figure 6 In this process, the sensing element 512 may include P-wells and N-wells for forming switching elements and other active or passive elements that can be communicatively coupled to other components of the sensor layer 510 or circuit layer 520. Although Figure 6 Only one complete sensing element 512 is shown, but it should be understood that the sensor layer 510 may consist of multiple sensing elements (e.g., sensing elements 511 and 513) similar to sensing element 512, which may be continuous in cross-sectional view.

[0090] In some embodiments, the sensing element 512 may include a diode device having a surface layer 601, a P-type region 610, a P-epipolar region 620, an N-type region 630, and other components. The surface layer 601 may form a detection surface (e.g., an active region) of a detector that receives incident charged particles. For example, the surface layer 601 may be a metal layer (e.g., formed of aluminum or other conductive materials). On the opposite side of the surface layer 601, an electrode 650 may be provided as a charge collector. The electrode 650 may be configured to output a current signal representing the number of charged particles received in the active region of the sensing element 512.

[0091] like Figure 6 As shown, in some embodiments, switching elements 519 and 521 may be formed of metal-oxide-semiconductor (MOS) devices. For example, multiple MOS devices may be formed in... Figure 6 The back side of the N-type region 630, and the back side of the N-type region 630 can be with Figure 5 The sensor layer 510 is contacted. As an example of a MOS device, a deep P-well 641, an N-well 642, and a P-well 643 may be provided. In some embodiments, the MOS device may be fabricated by etching, patterning, and other processes and techniques. It should be understood that various other devices (such as bipolar semiconductor devices) may be used, and the devices may be fabricated by various processes.

[0092] In the operation of sensing element 512, when charged particles (e.g., Figure 2 When the secondary charged particle beams (236, 238, and 240) strike the surface layer 601, the body of the sensing element 512, including, for example, a depletion region, may be flooded with charge carriers generated by the striking charged particles. Such depletion regions may extend through at least a portion of the volume of the sensing element. For example, the charged particles may be electrons, and striking electrons can generate and excite electron-hole pairs in the depletion region of the sensing element. The electrons excited in the electron-hole pairs may have further energy, allowing them to also generate new electron-hole pairs. Electrons generated from the striking charged particles may contribute to the signal generated in each sensing element.

[0093] refer to Figure 6The depletion region in sensing element 512 may include an electric field between P-type region 610 and N-type region 630, and electrons and holes may be attracted accordingly by P-type region 610 and N-type region 630. A detection signal may be generated when an electron reaches P-type region 610 or when a hole reaches N-type region 630. Therefore, when a charged particle beam is incident on sensing element 512, sensing element 512 may generate an output signal, such as current. Multiple sensing elements may be connected, and a set of sensing elements may be used to detect the intensity of the charged particle beam spot. When the charged particle beam spot covers multiple adjacent sensing elements (e.g., sensing elements 511, 512, and 513), the sensing elements may be grouped together (“merged”) to collect current. For example, sensing elements may be merged by turning on switching elements (e.g., switching elements 519 and 521) between the sensing elements. Signals from the sensing elements in the group may be collected and sent to a signal conditioning circuit connected to the group. The number of sensing elements in a group may be any number related to the size and shape of the beam spot. This quantity can be 1 or greater than 1.

[0094] In some embodiments, the detector can be configured such that the individual sensing elements can communicate with external components via, for example, signal or data lines and address signals. The detector can be configured to activate switching elements such that two or more sensing elements can be combined, and their output currents or voltages can be combined. Figures 5 to 6 As can be seen, by utilizing the switching element design between sensing elements, the sensing elements may not have a physically isolated area (e.g., Figure 3B (Region 380 in the image). Therefore, when sensing element 512 is activated, all areas beneath surface layer 601 can become active. When no physical isolation region is provided between adjacent sensing elements, the dead zone between them can be minimized or eliminated.

[0095] Figure 7 This is a diagram illustrating an exemplary cross-sectional arrangement of a detector 700 conforming to an embodiment of the present disclosure. For example, the detector 700 may be... Figure 3A Detector 300A in Figure 4A Detector array 400 or Figure 5 An embodiment of detector 500. For example... Figure 7 As shown, detector 700 may include a plurality of sensing elements, including sensing elements 701, 702, 703, 704, 705, and 706. In some embodiments, the plurality of sensing elements may be part of a sensor layer, which may be formed Figure 2 The detection surface of the charged particle detection device 244 in the middle (e.g., Figure 3B The sensor layer may include switching elements between adjacent sensing elements (e.g., similar to sensor surface 300B). Figure 6 The switching elements 519 and 521 in the figure include inter-element switching elements 711, 712 and 713. In some embodiments, when turned on, the switching elements can be configured to group two or more adjacent sensing elements together.

[0096] exist Figure 7 In this context, detector 700 may include multiple segments (e.g., similar to...). Figure 3A Sections 321, 322, 323, and 324 in the document. Each of these sections may include one or more sensing elements and wiring paths between the sensing elements (e.g., similar to...). Figure 4A The wiring path (402) and the common output terminal are specified. In some embodiments, the wiring path may include a common line or a shared signal path. For example, such as... Figure 7 As shown, wiring path 721 can be communicatively connected to sensing elements 701, 702, and 703, and connected to a common output terminal 728. Wiring path 721, sensing elements 701-703, and common output terminal 728 may belong to a first segment. Wiring path 722 can be communicatively connected to sensing elements 704, 705, and 706, and connected to a common output terminal 729. Wiring path 722, sensing elements 704-706, and common output terminal 729 may belong to a second segment. The output terminal (e.g., output terminal 719) of a sensing element (e.g., sensing element 706) can be communicatively coupled to the corresponding wiring path (e.g., wiring path 722) via a component-bus switching element (e.g., component-bus switching element 720). In some embodiments, the component-bus switching element 720 may use a similar... Figure 6 The switching elements 519 and 521 described herein are implemented using the techniques described herein. In some embodiments, when the sensing element 706 is not used, the element bus switching element 720 may be disconnected to reduce noise, parasitic capacitance or other technical effects from the sensing element 706.

[0097] exist Figure 7 In this configuration, these sections (e.g., a first section including sensing elements 701-703 or a second section including sensing elements 704-706) can be configured to output electrical signals to the signal processing circuitry system and other circuitry elements. For example, wiring path 722 can output electrical signals to the signal processing circuitry system 730 via a common output terminal 729.

[0098] Signal processing circuit system 730 may include one or more signal processing circuit systems for processing electrical signals output from wiring path 722. For example, signal processing circuit system 730 may include a preamplifier 731, a postamplifier 732, and a data converter 733. For example, preamplifier 731 may be a transimpedance amplifier (TIA), charge transfer amplifier (CTA), current amplifier, etc. Postamplifier 732 may be a variable gain amplifier (VGA), etc. Data converter 733 may be an analog-to-digital converter (ADC) that converts analog voltage or analog current into digital values. In some embodiments, preamplifier 731 and postamplifier 732 may be combined into a single amplifier (e.g., Figure 4A The amplifier 404 in the middle, and the data converter 733 may include Figure 4A The ADC 406 in the middle.

[0099] Detector 700 may include digital switch 740. In some embodiments, digital switch 740 may include a matrix of switching elements. In some embodiments, digital switch 740 may include a multiplexer (e.g., Figure 4A (Digital multiplexer 408 in the example). For example, the multiplexer can be configured to receive a first number of inputs and generate a second number of outputs, wherein the first number and the second number can be the same or different. The first number may correspond to parameters of detector 700 (e.g., the total number of segments), and the second number may correspond to... Figures 1 to 2 The parameters of the beam tool 104 (e.g., from...) Figure 2 The number of sub-beams generated by the charged particle source 202 in the system. Digital switch 740 can communicate with external components via data lines and address signals. In some embodiments, digital switch 740 can control data read / write. Digital switch 740 may also include circuitry for controlling inter-element switching elements (e.g., inter-element switching elements 711, 712, and 713). Figure 7 In this embodiment, the digital switch 740 can generate output signals via multiple data channels (including data channels 751, 752, and 753). In some embodiments, the data channels of the digital switch 740 can be further connected to other components, such as the image processing system 290. Therefore, multiple segments of the detector 700 can serve as independent data channels for detector signals.

[0100] It should be noted that, in Figure 7 In the representation, different components can be inserted at different stages. In some embodiments, one or more of the aforementioned components of the detector 700 can be omitted. In some embodiments, other circuits can be provided for other functions. For example, a switching element drive circuit can be provided ( Figure 7(Not shown) to control inter-element switching elements (e.g., inter-element switching elements 711, 712, and 713) to connect the sensing element. In some embodiments, an analog output line ( Figure 7 (Not shown in the image), this analog output line can be read by an analog path. For example, the analog output line can be parallel to the data converter 733 to receive the output of the post-amplifier 732. In another example, the analog output line can replace the data converter 733.

[0101] Figure 8 This is a diagram illustrating another exemplary cross-sectional arrangement of detector 800 conforming to an embodiment of the present disclosure. Detector 800 may be similar to detector 700, except that sensing elements associated with a segment (e.g., sensing elements 704, 705, and 706) may be communicatively coupled to an associated wiring path (e.g., wiring path 722) via a common wiring path (e.g., common wiring path 819) and a common switching element (e.g., common switching element 820). In some embodiments, common switching element 820 may use a similar... Figure 6 The switching elements 519 and 521 described herein are implemented using techniques. For example, as... Figure 8 As shown, if a beam of charged particles is incident on sensing elements 704, 705, and 706, sensing elements 704, 705, and 706 can generate detection signals. Sensing element 705 can directly output its detection signal to a common wiring path 819. Sensing elements 704 and 706 can correspondingly route their detection signals to sensing element 705 via inter-element switching elements 712 and 713, which can then be further routed to the common wiring path 819. This design simplifies detector fabrication. In contrast, designs using multiple wiring paths and switching elements between sensing elements and segments (e.g., Figure 7 The design of detector 700 in the section can provide configuration flexibility for grouped sensing elements because the output of a segment is not fixed to any particular sensing element in that segment (e.g., Figure 8 At the sensing element 705 in the middle. Furthermore, such as Figure 7 The design of the detector 700 in the middle can enhance the simplicity of reading the output of each sensing element. In order to obtain the beam projection of the secondary electron beam, it may be advantageous to read out the output of each sensing element so that an image of the projected pattern can be obtained.

[0102] Figure 9 This is a diagram illustrating a detection system 900 conforming to an embodiment of the present disclosure. In some embodiments, the detection system 900 may be... Figure 2 An embodiment of the detection device 244. The detection system 900 may include a sensing element 902 (e.g., similar to...). Figures 3A to 8The sensing element described herein) and the processing circuitry 940 (e.g., similar to...) Figures 7 to 8 The signal processing circuitry system 730 in the system. The processing circuitry 940 can be communicatively coupled to the digital interface 950 (e.g., similar to...). Figures 7 to 8 (Digital switch 740 in the middle). Sensing element 902 can form a sensor surface (e.g., Figure 3B The sensor surface (300B) can be divided into multiple segments (e.g., similar to...). Figures 3A to 3B or Figures 7 to 8 (The section described in the text). Processing circuitry 940 may include a first processing circuit array 910 (e.g., including...) for processing the output of sensing element 902. Figures 7 to 8 The preamplifier 731 in the middle), and the second processing circuit array 920 for providing gain and offset control (e.g., including the ... Figures 7 to 8 The post-amplifier 732 in the image), and the ADC array 930 for converting analog signals into digital signals (e.g., including...) Figures 7 to 8 (Data converter 733 in the middle). The first processing circuit array 910 and the second processing circuit array 920 can form the signal conditioning circuit in the processing circuit 940. Each segment of the processing circuit 940 can be communicatively coupled to a portion of the sensing element 902, which can be sequentially and communicatively coupled to the units of the first processing circuit array 910, the units of the second processing circuit array 920, and the units of the ADC array 930, forming a signal path (e.g., signal path 960). Such a signal path can receive the output signal from the segment of the sensing element 902 and generate a charged particle detection current representing the intensity of at least a portion of the charged particle beam incident on the segment 902 of the sensing element. The charged particle detection data can be output to the digital interface 950. Figure 9 In the process, signal path 960 includes analog signal path 970, which includes units of the first processing circuit array 910 and units of the second processing circuit array 920.

[0103] Digital interface 950 may include controller 904. Controller 904 can communicate with ADC array 930, second processing circuit array 920, and sensing element 902. Digital interface 950 can also send and receive data from deflection and image control unit (e.g., via a transceiver). Figure 9 (Not shown in the image) Communication. The transceiver may include a transmitter 906 and a receiver 908. In some embodiments, the controller 904 may control the image signal processing of the detection system 900.

[0104] Further additions, such as references Figures 3A to 9There are several challenges regarding the performance, capabilities, and adaptability of the described detector. Typically, these challenges may be related to one or more of the following: processing bandwidth, which represents how many signals (e.g., analog or digital signals) the detector can process in parallel; digital signal bandwidth represents the maximum speed of data communication and the processing power of a digital system; analog signal bandwidth represents the detector's detection capability and the fineness of the inspection results; or pixel rate represents how quickly the detector can process digital signals.

[0105] The analog signal bandwidth of the detector may be limited by parasitic parameters. For example, when an impact occurs on the sensor surface of the detection device (e.g., detection device 244), (e.g., Figure 3B The beam (e.g., on the sensor surface 300B) in the sensor (e.g., Figure 2 When the secondary charged particle beams (236, 238, or 240) in the detection device have an extremely large beam spot size, the numerous sensing elements (e.g., Figures 3A to 8 The sensing element described herein may involve detecting a beam. In some cases, if the beam strikes multiple segments of the sensor surface, these segments (e.g., Figures 3A to 3B , Figures 4B to 4C or Figures 7 to 8 The sensing elements (as described in the section) can be involved in the detection beam. As another example, when sensing elements are hardwired together in a detection device, all hardwired sensing elements can be activated for detection even when the beam only strikes one sensing element on the sensor surface. However, the more components involved in the detection beam, the more parasitic parameters (e.g., stray capacitance) may be introduced into the signal conditioning circuitry, which can significantly reduce the analog signal path of the detection device (e.g., ...). Figure 9 The analog signal bandwidth of the amplifier (analog signal path 970) is limited. In some cases, when multiple sensing elements are involved for detection, the stray capacitance associated with the interconnects (e.g., switching elements) between the sensing elements and the inputs of the signal conditioning circuit can also be large, which may reduce the analog signal bandwidth of the amplifier. Furthermore, such a sharp reduction in analog signal bandwidth can degrade imaging performance. For example, it may result in blurred images, and the detector may not be able to meet the requirements of high pixel rates.

[0106] In some applications, the data processing bandwidth of a detector may be limited by the performance of its components or its circuit design. Many existing detection devices may have only one ADC in each signal path, which may not meet the requirements of some applications. For example, some applications involve high-density beams, which may not require high pixel rates for data processing. In such cases, the detection device may need a large number of signal paths for a small area. However, even if a high data rate ADC is not required to detect high-density beams, the signal paths of the detection device may easily be exhausted. As another example, some applications involve slat beams, each of which may generate a large number of detection signals and may require high pixel rates for data processing. In these cases, the detection device may require high data rate ADCs for its signal paths and high-bandwidth data channels. To provide a high pixel rate for each large slat beam, the detection device may use multiple signal paths for the large slat beam. However, in such cases, the signal paths of the detection device may still easily be exhausted, and even if the signal paths are sufficient, the data processing bandwidth of the data channels may still be easily exhausted due to the large amount of data. As yet another example, some applications involve low-density beams, but each beam requires a high pixel rate for detection. In these cases, the detection equipment may require a high pixel rate ADC, which could lead to higher design and manufacturing costs. In some applications, some or all of the challenges mentioned above may coexist. Existing designs of detection equipment may lack the adaptability to address these challenges.

[0107] The pixel rate of a detector can be limited by many factors, including analog signal bandwidth and the specifications of the detector components. For example, the ADC in the readout circuit may have a maximum sampling rate that may not support the required pixel rate. Upgrading limiting components to more advanced ones can incur significant costs in research, development, and manufacturing. Therefore, low-cost solutions to increase detector pixel rates have been a long-term goal.

[0108] The performance adaptability of a detector may be limited by unidirectional optimization. The design of the detector (e.g., Figure 3A The sensor layer 301, segment layer 302, and readout layer 303 in the detector can be optimized for some applications, but such optimizations may reduce the performance of the detector in some other applications.

[0109] This disclosure provides an exemplary architecture for detector arrays that can help mitigate some or all of the problems described above. Figure 10 This is a diagram illustrating a detector array 1000 with an exemplary architecture conforming to an embodiment of this disclosure. Figure 10 The architecture can be used for single-beam inspection tools or multi-beam inspection tools (e.g., Figure 2(Beam tool 104 in the image). Detector array 1000 may include [missing information - likely related to a specific component or component]. Figure 4A Similar to the detector array 400 in the image, some components include region 401, sensing elements 311, 312, 313 and 314, wiring path 402, and digital multiplexer 408. Similar to... Figure 4A The detector array 1000 may include multiple segments, including those corresponding to Figure 10 Segment 1002 of region 401. Segment 1002 includes 4×4 sensing elements, including sensing elements 311, 312, 313, and 314. Detector array 1000 also includes an analog signal path 1004 associated with segment 1002, which begins at the output of segment 1002 and ends at the input of interconnect layer 1006. Analog signal path 1004 includes amplifier 1022. In some embodiments, similar to... Figure 9 Analog signal paths 970 and 1004 may additionally or alternatively include other components. For example... Figure 10 As shown, segment 1002 is associated with analog signal path 1004 (including amplifier 1022) and ADC 1024. The detection signal generated by the sensing element of segment 1002 can be processed by analog signal path 1004 and ADC 1024 and output to digital multiplexer 408. Digital multiplexer 408 can receive the outputs of different ADCs associated with different segments of detector array 1000.

[0110] The detector array 1000 includes an interconnect layer 1006 that communicatively couples the outputs of the signal processing circuitry system to each other. The signal processing circuitry system may include analog signal paths (including analog signal path 1004). Figure 10 As shown, interconnect layer 1006 includes interconnect switching elements that are communicatively coupled to the output of the analog signal path of detector array 1000. For example, interconnect switching elements 1014, 1016, 1018, and 1020 may communicatively couple to the output of adjacent analog signal paths (including analog signal path 1004).

[0111] exist Figure 10In this configuration, switching element 1008 can communicatively couple the output of segment 1002 to the input of analog signal path 1004. Switching element 1010 can communicatively couple the output of analog signal path 1004 to the input of interconnect layer 1006 (e.g., input / output point 1026 or "I / O point" 1026). If no analog signal path 1004 is selected for use, switching elements 1008 and 1010 can be configured to be communicatively disconnected. For example, a charged particle beam can strike some or all of the sensing elements in segment 1002, but the detection signal of segment 1002 can be redirected to another analog signal path corresponding to another segment of detector array 1000. In such cases, analog signal path 1004 may be disconnected because it has not been selected. In some embodiments, if the sensing element of segment 1002 is not struck by any charged particles and analog signal path 1004 is not selected for use (e.g., processing signals from other segments), amplifier 1022 can be disabled to reduce power consumption, in addition to communicatively disconnecting switching elements 1008 and 1010. When switching elements 1008 and 1010 are communicatively disconnected, analog signal path 1004 (including amplifier 1022) can be effectively deactivated from detector array 1000.

[0112] exist Figure 10 In this embodiment, switching element 1012 can communicatively couple the output of interconnect layer 1006 (e.g., I / O point 1026) to the input of ADC 1024. In some embodiments, the output of interconnect layer 1006 can also be an input. For example, I / O point 1026 can serve as both an input (communically coupled to the output of analog signal path 1004) and an output (communically coupled to the input of ADC 1024) of interconnect layer 1006. In some embodiments, the output of analog signal path 1004 can be equivalent to I / O point 1026. In some embodiments, the input of ADC 1024 can be equivalent to I / O point 1026. In some embodiments, I / O point 1026 can be implemented as a separate component ( Figure 10 (Not shown in the diagram). When switching element 1012 is communicatively disconnected, ADC 1024 can be communicatively coupled from segment 1002 and any other segment of ADC 1024 via interconnecting switching elements 1014, 1016, 1018, or 1020. Figure 10(Not shown in the diagram) Effectively deactivated. In some embodiments, if ADC 1024 is not selected for use, switching element 1012 can be configured to be communicatively disconnected. For example, a signal output from analog signal path 1004 can be redirected to another ADC corresponding to another analog signal path in detector array 1000. In some embodiments, if the sensing element of segment 1002 is not struck by any charged particles, and neither analog signal path 1004 nor ADC 1024 is selected for use (e.g., processing signals from other segments), ADC 1024 can also be disabled to reduce power consumption in addition to communicatively disconnecting switching element 1012.

[0113] In some embodiments, the detector array 1000 can transmit charged particle detection signals in various ways based on various factors, such as the size and shape of the beam spot, or the pixel rate to be achieved. The detector array 1000 can route the detection signals by controlling the connection and disconnection of switching elements between sensing elements, switching elements 1008, 1010, 1012, and interconnecting switching elements 1014, 1016, 1018, 1020. For example, the detector array 1000 can route the signal output from segment 1002 (e.g., via switching elements between sensing elements) to another analog signal path different from analog signal path 1004. In another example, the detector array 1000 can route the signal from a segment different from segment 1002 to analog signal path 1004 via switching element 1008. In another example, detector array 1000 can route the signal output from analog signal path 1004 (e.g., via interconnecting switching elements 1014, 1016, 1018, or 1020) to another ADC besides ADC 1024. In another example, detector array 1000 can route the signal from an analog signal path different from analog signal path 1004 (e.g., via switching element 1012) to ADC 1024. In some embodiments, if segment 1002 does not generate a detection signal, and neither analog signal path 1004 nor ADC 1024 is selected for use, and if an analog signal path or ADC of an adjacent segment is selected for use, the interconnecting switching elements (e.g., interconnecting switching elements 1014, 1016, 1018, or 1020) between segment 1002 and adjacent segments can be communicatively disconnected. This can help reduce crosstalk and parasitic parameters incurred by amplifier 1022 and ADC 1024 when powered on.

[0114] In some embodiments, if the sensing element of segment 1002 (e.g., sensing element 311) is not in use and is not included in any group of sensing elements used to detect any secondary electron beams, it can be communicatively decoupled from wiring path 402 to reduce parasitic parameters (e.g., stray capacitance), which can further help increase the performance of detector array 1000. For example, sensing element 311 can be disconnected from wiring path 402 by communicatively disconnecting the switching elements between sensing element 311 and wiring path 402. When sensing element 311 is disconnected from wiring path 402, all switching elements between sensing element 311 and its adjacent sensing elements can also be communicatively disconnected.

[0115] In some embodiments, interconnect layer 1006, interconnect switching elements 1014, 1016, 1018, and 1020, and switching elements 1008, 1010, and 1012 may be included in the readout layer of detector array 1000 (e.g., similar to...). Figure 3A In the readout layer 303). In some embodiments, the interconnecting switching elements 1014, 1016, 1018, 1020 and switching elements 1008, 1010, 1012 can use similar methods. Figure 6 The switching elements 519 and 521 described herein are implemented using the techniques described herein.

[0116] In some embodiments, components such as amplifiers (e.g., amplifier 1022) in the analog signal path of detector array 1000 or ADCs (e.g., ADC 1024) at the end of the signal path of detector array 1000 can be configured to operate in current mode, wherein the inputs and outputs of the amplifier and ADC are current. In some embodiments, components (e.g., amplifier 1022 or ADC 1024) can be configured to operate in charge mode, wherein the inputs and outputs of the amplifier and ADC are charge signals. Both amplifier 1022 and ADC 1024 can operate in current mode or charge mode, or a mixed mode. A mixed mode can be a combination of current mode and charge mode. In a mixed mode, the inputs and outputs of the amplifier and ADC can be configured to operate in either current mode or charge mode.

[0117] Compared to amplifiers operating in voltage mode, amplifiers operating in charge mode or current mode may have lower input impedance and higher output impedance. Lower input impedance reduces the amplifier's sensitivity to ambient noise (e.g., interference from adjacent digital components) and its sensitivity to parasitic parameters (e.g., stray capacitance). Such advantages can also be achieved in components other than amplifiers, such as ADCs. With lower input impedance, components can have high analog signal bandwidth even with some stray capacitance at their inputs, and hardware-based analog signal processing can be implemented, where the hardware involves interconnects between different signal paths (e.g., interconnect layer 1006). Increased output impedance can facilitate increased output signals from different analog signal paths. For example, output signals from different analog signal paths can be added by communicatively connecting the outputs of the analog signal paths at a common point. Current-mode or charge-mode designs for amplifiers and ADCs can simplify the design and implementation of hardware-based analog signal processing.

[0118] Figure 11 This is a diagram illustrating an exemplary amplifier 1100 operating in current mode according to an embodiment of the present disclosure. In some embodiments, amplifier 1100 may be amplifier 1022 in detector array 1000. Amplifier 1100 includes controller 1102, first amplifier 1104, and second amplifier 1106. First amplifier 1104 and second amplifier 1106 may be communicatively coupled in series, wherein the output of first amplifier 1104 may be communicatively coupled to the input of second amplifier 1106. The input of first amplifier 1104 may receive signals from sensing elements (e.g., Figure 10 The current signal generated by the sensing element in section 1002 of the amplifier. The output of the second amplifier 1106 can transmit the amplified current signal to the ADC (e.g., Figure 10 (ADC 1024 in the example). Controller 1102 can be communicatively coupled to the first amplifier 1104 and the second amplifier 1106 and control their operation. In some embodiments, the first amplifier 1104 can be a charge transfer amplifier (CTA), a transimpedance amplifier (TIA), or a combination of CTA and TIA (CTIA), which can operate in either TIA or CTA mode. In some embodiments, the second amplifier 1106 can be a transconductance amplifier (TCA). It should be noted that, although in Figure 11Amplifier 1100 is shown as including two amplification stages (i.e., first amplifier 1104 and second amplifier 1106), but it can be implemented with only one or more amplification stages. For example, if amplifier 1100 is a single-stage amplifier, it can include a current amplifier whose input and output can both be current. In another example, if amplifier 1100 is a multi-stage amplifier, it can include more amplifiers in addition to first amplifier 1104 and second amplifier 1106. This disclosure does not limit embodiments of amplifier 1100 to the examples described above. In some embodiments, the amplifier can include a two-mode charge transfer and transimpedance amplifier. The amplifier can also include a transconductance amplifier. The amplifier can be configured to receive a current signal and output a charge signal, or vice versa.

[0119] Figure 12 This is a diagram illustrating an exemplary ADC 1200 operating in current mode or charge mode according to embodiments of the present disclosure. The ADC 1200 may be... Figure 10 The detector array 1000 includes an ADC 1024. In current mode or charge mode, the input of the ADC 1200 can be a current signal or a charge signal, and the output of the ADC 1200 can be a current signal or a voltage signal. The ADC 1200 includes a controller 1202, a converter 1204, and a voltage input ADC 1206. The converter 1204 can be a current-to-voltage (IV) converter or a charge-to-voltage (CV) converter, etc. The converter 1204 can be configured to convert signals such as current or charge into digital information such as voltage. The converter 1204 and the voltage input ADC 1206 can be communicatively coupled in series, wherein the output of the converter 1204 can be communicatively coupled to the input of the voltage input ADC 1206. The input of the converter 1204 can receive the current signal output from the amplifier 1100. The output of the voltage input ADC 1206 can transmit the digital signal to other processing circuitry (e.g., ...). Figure 10 The digital multiplexer 408 is included. The controller 1202 can be communicatively coupled to the converter 1204 and the voltage input ADC 1206 and control the operation of the converter and the voltage input ADC. It should be noted that, although in... Figure 12 The ADC 1200 is shown as comprising two stages (i.e., converter 1204 and voltage input ADC 1206), but it can be implemented with only one stage and still be capable of operating in current mode or charge mode. For example, if the ADC 1200 is a single-stage ADC, it can be a charge redistribution ADC or a charge-sharing ADC. This disclosure does not limit embodiments of the ADC 1200 to the examples described above.

[0120] Figure 13This indicates that the embodiments conforming to this disclosure have Figure 10 A diagram illustrating an exemplary segment arrangement of the detector 1300, an exemplary architecture. The detector 1300 may have a similar... Figure 7 The detector 700 comprises components including sensing elements 701, 702, 703, 704, 705, and 706; inter-element switching elements 711, 712, and 713; an output terminal 719; an element bus switching element 720; wiring paths 721, 722, and 723; common output terminals 728 and 729; a digital switch 740; and data channels 751, 752, and 753. In some embodiments, the digital switch 740 may include, for example, Figure 10 The digital multiplexer 408 shown is illustrated.

[0121] exist Figure 13 In a configuration similar to detector array 1000, amplifiers (including amplifiers 1302, 1306, and 1310) of detector 1300 can be communicatively coupled to a segment via switching elements (e.g., switching elements 1314, 1320, and 1326). In some embodiments, the amplifiers can be similar to... Figure 10 Amplifier 1022 or Figure 11 The amplifier 1100 in the example. The switching element can be similar to... Figure 10 The switching element 1008 in the middle.

[0122] exist Figure 13 In the image, detector 1300 includes an ADC (including ADCs 1304, 1308, and 1312) and an interconnect layer 1006 (indicated by a dashed box), which is disposed between the amplifier and the ADC. The ADC can be similar to... Figure 10 ADC 1024 or Figure 12 The ADC 1200 is described above. The amplifier can be communicatively coupled to the interconnect layer 1006 via switching elements (including switching elements 1316, 1322, and 1328), which can be similar to... Figure 10 The switching element 1010 is included. The interconnect layer 1006 can be communicatively coupled to the ADC via switching elements (including switching elements 1318, 1324, and 1330), which can be similar to... Figure 10 Switching element 1012 in the middle. In some embodiments, switching elements 1314-1332 and 1340 may use similar to Figure 6 The switching elements 519 and 521 described herein are implemented using the techniques described herein.

[0123] exist Figure 13 In this configuration, interconnect layer 1006 may include multiple output terminals, including I / O points 1334, 1336, and 1338. In some embodiments, I / O points 1334, 1336, and 1338 may be similar to... Figure 10 I / O point 1026 in the image. In some embodiments, each of the amplifiers of the detector 1300 (e.g., including amplifiers 1302, 1306, and 1310) may be communicatively coupled to the input of the interconnect layer 1006 (e.g., I / O points 1334, 1336, and 1338, respectively) via switching elements (e.g., switching elements 1316, 1322, and 1328, respectively). In some embodiments, each of the ADCs of the detector 1300 (e.g., including ADCs 1304, 1308, and 1312) may be communicatively coupled to the output of the interconnect layer 1006 (e.g., I / O points 1334, 1336, and 1338, respectively) via switching elements (e.g., switching elements 1318, 1324, and 1330, respectively).

[0124] exist Figure 13 In this layer, interconnect layer 1006 includes interconnect switching elements (e.g., interconnect switching element 1332) communicatively coupled to the output of the amplifier. These interconnect switching elements may be similar to... Figure 10 The interconnecting switching elements 1014, 1016, 1018, and 1020 are used in the interconnecting layer 1006. In some embodiments, the interconnecting switching elements in the interconnecting layer 1006 may use similar... Figure 6 The switching elements 519 and 521 described herein are implemented using the techniques described herein.

[0125] In some embodiments, to increase the pixel rate, the ADC of detector 1300 can be configured to operate in interleaved mode. Typically, when the ADC operates in interleaved mode, two or more ADCs can be communicatively coupled to a clock circuit. The clocks of the ADCs can be set to have a predetermined relationship. When operating, the ADCs can alternately sample (“interleave”) the input signals and generate a combined output signal. The pixel rate of the combined output signal can be higher than the pixel rate achieved by each individual ADC. For example, when m (m is an integer) ADCs are configured to operate in interleaved mode, where each ADC has a pixel rate of n (n is a quantity) pixels per second, the combined pixel rate of the m ADCs can be m × n pixels per second.

[0126] For example, a clock circuit can be provided in the digital switch 740. Figure 13 (not shown in the image) and control circuit ( Figure 13 (Not shown in the image). Clock control circuitry can be provided in each of the ADCs including ADC 1304, 1308, and 1312 (e.g., it could be...). Figure 12(As part of controller 1202). The clock control circuitry can be communicatively coupled to the clock circuitry and references the clock signal generated by the clock circuitry to set different timing offsets for each ADC. The inputs of the ADCs can be communicatively coupled to each other via switching elements in interconnect layer 1006, and the control circuitry can control them to operate in interleaved mode. In some embodiments, the amplifier of detector 1300, which operates in current mode, can provide greater flexibility for the ADC to be configured to operate in interleaved mode.

[0127] In some embodiments, for applications requiring a pixel rate higher than the pixel rate supported by the maximum sampling rate of the ADC of detector 1300, the ADC can be configured to operate in an interleaved mode. For example, ADCs 1304 and 1308 can have the same maximum sampling rate. When wiring path 721 is activated (e.g., due to charged particle beams striking sensing elements 701-703), switching elements 1314 and 1316 can be communicatively connected so that the signal output from wiring path 721 can be processed and amplified by amplifier 1302. Interconnecting switching elements 1332 and switching elements 1318 and 1324 can be coordinated to alternately transfer the amplified signal output from amplifier 1302 to ADCs 1304 and 1308. For example, by communicatively connecting switching element 1318 and communicatively disconnecting interconnecting switching elements 1332 and 1324, the amplified signal output from amplifier 1302 can be transferred to ADC 1304. By communicatively disconnecting switch element 1318 and communicatively connecting interconnecting switch elements 1332 and 1324, the amplified signal output from amplifier 1302 can be transferred to ADC 1308. Control and clock circuitry can control the timing of this transfer, as well as the sampling timing for ADCs 1304 and 1308. The combined output signal of ADCs 1304 and 1308 can have an effective sampling rate twice the maximum sampling rate of any single ADC.

[0128] It should be noted that two or more ADCs of detector 1300 can be configured to operate in an interleaved mode in a similar manner, and this disclosure does not limit the embodiments of the interleaved mode to the examples described above. In some embodiments, the communicatively coupled ADCs of detector 1300 operating in interleaved mode may be adjacent to each other or not adjacent to each other. For example, ADCs 1304, 1308, and 1312 can be configured to operate in an interleaved mode, wherein the interconnect switching elements (e.g., including interconnect switching element 1332) and switching elements 1318, 1324, and 1330 of the interconnect layer 1006 between them can be coordinated to alternately transfer the amplified signal output from amplifier 1306 to ADCs 1304, 1308, and 1312. For example, by communicatively connecting switching element 1318 and interconnect switching element 1332, and communicatively disconnecting switching element 1324, switching element 1330, and one or more interconnect switching elements between ADCs 1308 and 1312, the amplified signal output from amplifier 1306 can be transferred to ADC 1304. By communicatively connecting switch element 1324 and communicatively disconnecting switch element 1318, switch element 1330, interconnecting switch element 1332, and one or more interconnecting switch elements between ADCs 1308 and 1312, the amplified signal output from amplifier 1306 can be transferred to ADC 1308. Similarly, by communicatively connecting switch element 1330 and all interconnecting switch elements between ADCs 1308 and 1312, and communicatively disconnecting switch element 1318, switch element 1324, and interconnecting switch element 1332, the amplified signal output from amplifier 1306 can be transferred to ADC 1312.

[0129] In some embodiments, when the beam striking detector 1300 has a large beam spot, multiple analog signal paths of detector 1300 can be configured to be communicatively coupled to a single ADC via interconnect layer 1006. For example, analog signals from different analog signal paths can be summed or combined in hardware (e.g., in interconnect layer 1006) before being input to any ADC. The summed analog signals can be converted by a single ADC. Such a design can reduce the required digital output bandwidth and increase configuration flexibility. In contrast, existing detector designs may lack the ability to sum analog signals in hardware before signal digitization (e.g., because analog signal paths do not have the ability to output their signals to ADCs in other signal paths) and may require multiple digital output channels or bandwidth to process signals from the same large beam spot. Compared to existing designs, the design of detector 1300 can provide higher analog signal bandwidth without requiring additional digital output capacity or resulting in a significant increase in readout circuit size, because a single ADC may be sufficient to handle analog signals added to analog signals from multiple analog signal paths before their input.

[0130] Figure 14 This is a diagram illustrating segment 1401 of a detector array 1400 having an exemplary architecture that conforms to an embodiment of the present disclosure. Figure 14 The architecture can be used for single-beam inspection tools or multi-beam inspection tools (e.g., Figure 2 (Beam-emitting tool 104 in the middle). Section 1401 and Figure 10 Segment 1002 shares some similar components, including sensing elements 311, 312, 313, and 314, ADC 1024, and digital multiplexer 408. Figure 14 In this configuration, segment 1401 includes four sub-segments 1420, 1422, 1424, and 1426, each of which includes 2×2 sensing elements. Sub-segment 1424 includes sensing elements 311, 312, 313, and 314. Sub-segments 1420, 1422, 1424, and 1426 are communicatively coupled to wiring paths 1421, 1423, 1425, and 1427, respectively. Figure 14 Four analog signal paths 1402, 1404, 1406, and 1408, respectively, are communicatively coupled to wiring paths 1421, 1423, 1425, and 1427. Analog signal paths 1402, 1404, 1406, and 1408 can be respectively similar to... Figure 10 The analog signal path 1004 includes amplifiers 1410, 1412, 1414, and 1416, respectively. Each of the analog signal paths 1402, 1404, 1406, and 1408 has an upstream switching element (e.g., similar to...) between itself and its wiring path. Figure 10 The switching element 1008 in the middle, and also has a downstream switching element (e.g., similar to the one in the interconnect layer 1006) between it and the interconnect layer 1006. Figure 10 (Switching element 1010 in the middle). For example... Figure 14 As shown, analog signal paths 1402, 1404, 1406, and 1408 are communicatively coupled to summing point 1418 via interconnect layer 1006, wherein switching elements 1403, 1405, 1407, and 1409 (e.g., each similar to...) Figure 10 A switching element 1012 is arranged between the summing point 1418 and the interconnect layer 1006. The summing point 1418 is communicatively coupled to the ADC 1024, which is also communicatively coupled to the digital multiplexer 408. The summing point 1418 can operate as an analog multiplexer and can output a multiplexed analog signal to the ADC 1024 to convert it into a digital signal. This digital signal can be output to the digital multiplexer 408 for further processing.

[0131] exist Figure 14In this section, sub-segments 1420, 1422, 1424, and 1426 are correspondingly associated with analog signal paths 1402, 1404, 1406, and 1408. Analog signal paths 1402, 1404, 1406, and 1408 are associated with ADC 1024. In some embodiments, the number of analog signal paths associated with one ADC in segment 1401 can be arbitrary. In some embodiments, a different number of analog signal paths can be associated with one ADC in segment 1401. Figure 10 Compared to the analog signal path 1004 of the detector array 1000, Figure 14 Each analog signal path 1402, 1404, 1406, and 1408 can process signals detected from fewer sensing elements, which increases analog signal bandwidth and configuration flexibility. Segment 1401 can route the signals output from analog signal paths 1402, 1404, 1406, and 1408 to summing point 1418 in various ways by controlling the opening and closing of interconnecting switching elements 1428, 1430, 1432, and 1434, as well as switching elements 1403, 1405, 1407, and 1409.

[0132] In some embodiments, if the signals output from analog signal paths 1402, 1404, 1406, and 1408 originate from the same beam, these signals can be added at interconnect layer 1006 before being output to summing point 1418 (e.g., by hardware-based analog signal summation). For example, in such a case, interconnect switching elements 1428, 1430, and 1432 can be communicatively connected, switching elements 1403, 1405, and 1407 can be communicatively disconnected, and switching element 1409 can be communicatively connected, thereby allowing the signals output from analog signal paths 1402, 1404, 1406, and 1408 to be added at interconnect layer 1006 and output to summing point 1418 via switching element 1409.

[0133] In some embodiments, if the signals output from analog signal paths 1402, 1404, 1406, and 1408 all originate from different beams, these signals can be multiplexed to summing point 1418 without hardware-based analog signal summation. For example, in such a case, switching elements 1403, 1405, 1407, and 1409 can all be communicatively connected. If the highest sampling rate of ADC 1024 is sufficient to support the required pixel rate, interconnecting switching elements 1428, 1430, 1432, and 1434 can all be communicatively disconnected, and the signals output from analog signal paths 1402, 1404, 1406, and 1408 can be multiplexed to summing point 1418, which can then output the multiplexed signal to ADC 1024 for signal digitization. If the highest sampling rate of ADC1024 is insufficient to support the required pixel rate, the signals output from analog signal paths 1402, 1404, 1406, and 1408 can be routed via the outputs of one or more interconnect switching elements in interconnect layer 1006 to multiple summing points (e.g., including summing point 1418 or others), and these multiple summing points can output signals to multiple ADCs (e.g., including ADC1024 or others) for signal digitization. In such cases, the multiple ADCs can operate in interleaved mode.

[0134] In some embodiments, some signals output from analog signal paths 1402, 1404, 1406, and 1408 may originate from the same beam spot, and some signals may originate from different beam spots. In these cases, signals from the same beam spot can be summed at interconnect layer 1006 to generate an analog signal summation, and signals from different beam spots can be kept as separate signals at interconnect layer 1006 (e.g., no hardware-based analog signal summation is performed). Depending on whether the highest sampling rate of ADC 1024 is sufficient to support the required pixel rate, the summed analog signal and the individual signals can be multiplexed to summation point 1418 or multiple summation points, as described above.

[0135] In some embodiments, by communicatively coupling multiple analog signal paths (e.g., including analog signal paths 1402, 1404, 1406, and 1408) to multiple summing points (e.g., including summing point 1418) via switching elements of interconnect layer 1006, further enhancements can be achieved, such as... Figure 14 The architecture shown offers configuration flexibility and performance adaptability. By doing so, segment 1401 can be configured to have analog signal paths in the data channel with various ratios to the ADC for different applications. Depending on the application and detector setup, the number of analog signal paths (e.g., the number of amplifiers) may be greater than, less than, or equal to the number of ADCs in the data channel. By doing so, as... Figure 11 , Figure 13 and Figure 14 The architecture shown can provide signal processing with high configuration flexibility, high fault tolerance, and low power consumption without incurring significant costs.

[0136] High configuration flexibility avoids one-way optimization problems. For example, several ADCs can interleave signals from multiple analog signal paths, such as in applications involving large beamwidths and requiring high pixel rates. In another example, one ADC can be assigned to one beam (e.g., requiring an analog signal path) for signal processing. In yet another example, one ADC can be shared by several beams (e.g., via several analog signal paths) for signal processing, such as in applications involving high-density beamwidths and not requiring high pixel rates. High fault tolerance increases the robustness of the detection system. For example, if some amplifiers or ADCs in the detector fail, the faulty components can be bypassed, and signals that should be processed by them can be redirected to other components for processing. Low power consumption can be achieved by powering (and communicatively disconnecting) unnecessary components of the detector (e.g., analog signal paths or ADCs) without affecting the performance required for a particular application. It should be noted that the specific amplifier-to-ADC ratio and the specific methods of signal routing and processing are not limited to the examples above, and embodiments of this disclosure provide other implementations depending on the specific application.

[0137] Figure 15 This is a flowchart of an exemplary method 1500 for detecting a charged particle beam according to embodiments of this disclosure. Method 1500 can be controlled by a controller of a charged particle inspection system (e.g., Figure 1 Controller 109 or Figure 9 The controller (904) in the system executes the method. The controller may include circuitry (e.g., memory and processor) programmed to implement method 1500. For example, the controller may be an internal controller coupled to the charged particle inspection system or an external controller (e.g., ...). Figure 1 Controller 109 or Figure 9 (Controller 904 in the middle). Method 1500 can be connected to about Figures 3A to 14 The components, operations, and procedures are shown and described.

[0138] like Figure 15As shown, method 1500 may begin with step 1502, which involves acquiring a detection image. The detection image may be an image of a charged particle beam spot (e.g., a secondary electron beam spot) formed on the surface of a detector. The detection image may include a projection pattern of the secondary beam spot on the detector surface. When multiple charged particle beams are incident on the detector, the detection image may include multiple beam spots. Step 1502 may include reading the respective outputs of sensing elements that may be included in the detector. In step 1502, it may be determined that charged particles exiting the wafer are incident on the detector and therefore image processing should begin. Step 1502 may include image acquisition processing performed at a relatively low rate compared to the target pixel rate for a particular application.

[0139] Next, as Figure 15 As shown, method 1500 can proceed to step 1504, which determines a boundary. This boundary may correspond to the boundary of a charged particle beam spot projected onto the detector surface. The boundary can be determined based on information collected in step 1502. Step 1504 may include determining multiple boundaries corresponding to multiple beam spots. As discussed below, the boundaries can be used to assign sensing elements to groups.

[0140] Next, as Figure 15 As shown, method 1500 can proceed to step 1506, which involves grouping sensing elements together. Sensing elements within a boundary can be grouped together. Step 1506 may include actuating a switch. The switch between sensing elements can be actuated such that, for example, two adjacent sensing elements within the same group are electrically connected.

[0141] Next, as Figure 15 As shown, method 1500 can proceed to step 1508, which involves determining whether the beam spot is large. Step 1508 can be based on predetermined criteria. Step 1508 may include determining the size of the beam spot and comparing it to a threshold. Step 1508 may include determining whether a target analog bandwidth corresponding to a target pixel rate is achievable for the set of sensing elements. Determining whether the target analog bandwidth is achievable can be based on the characteristics of the sensing elements and signal processing circuitry included in the set. For example, a large beam spot can be determined when the size of the beam spot makes it impossible to achieve the target bandwidth for the application based on the number of sensing elements included in the set.

[0142] In response to determining in step 1508 that the beam spot is not large, method 1500 may proceed to step 1522, which involves grounding unused sensing elements, as will be discussed below. When the beam spot is determined to be small, it can be treated as a single group and processed accordingly.

[0143] In response to determining in step 1508 that the beam spot is large, method 1500 may proceed to step 1520 of subdividing the group corresponding to the large beam spot into subgroups. Step 1520 may include determining the size of the subgroups. The size of the subgroups may be based on the target analog bandwidth. The subgroups may be considered as a single group of sensing elements and may be associated with an analog signal path, as will be discussed below.

[0144] Next, as Figure 15 As shown, method 1500 can proceed from step 1508 or step 1520 to step 1522, which involves grounding an unused sensing element. The unused sensing element can be grounded using a grounding switch or other component. The grounding switch can be located in the sensing element layer of the circuit. An example of a grounding switch is shown below. Figure 16 As shown in the diagram. For example, it can be determined that a sensing element is not in use based on whether it is included in a group or subgroup. In some embodiments, unused sensing elements can be identified as those that do not output a detection signal, or those that are excluded from the group or subgroup for some reason (e.g., to reduce crosstalk).

[0145] Next, as Figure 15 As shown, method 1500 can proceed to step 1524, which involves determining a signal output path. Step 1524 may include determining a signal output path for each beam spot and its corresponding group or subgroup of sensing elements. The signal output path may be an analog signal path. In some embodiments, the location of the output endpoint for each group or subgroup may be determined in a region of the geometric center or centroid of each group or subgroup of sensing elements. Determining the output location based on the centroid may involve using the intensity distribution of the beam spot within the group or subgroup.

[0146] Next, as Figure 15As shown, method 1500 can proceed to step 1526, actuating a switch to connect a group or subgroup of sensing elements to its signal output path. The signal output path assigned to the group or subgroup of sensing elements may be the path determined in step 1524. The switch actuated in step 1526 may be a switch provided at the output of the sensing element (e.g., opposite to a switch between adjacent sensing elements). Step 1526 may include connecting the sensing elements to an analog signal path having the shortest distance to the geometric center or centroid of the group or subgroup. The input of the analog signal path may be connected to the group or subgroup of sensing elements via a sensing output at the geometric or mass center of the group or subgroup, or via the output of a sensing element near the geometric or mass center. Switches at the outputs of the sensing elements may be closed, and these sensing elements may be connected to a common line in the segment to which the analog signal path belongs. In some embodiments, the number of switches at the outputs of the sensing elements may be one or more. When the number of switches is greater than one, the impedance from the group or subgroup of sensing elements to the input of the analog signal path may be reduced. This can result in improved analog signal bandwidth.

[0147] Next, as Figure 15 As shown, method 1500 can proceed to signal processing step 1528. Step 1528 may include digitizing the beam spot signal via an ADC. The signal digitized by the ADC may be an amplified signal amplified through an analog signal path of a set of sensing elements. When the beam spot is large ("Yes" in step 1508), step 1528 may include summing the signals from the subgroup of sensing elements together. These signals may be summed together in hardware, for example, by connecting corresponding switches between the outputs of the analog signal paths (e.g., in a...). Figure 10 , Figure 13 and Figure 14 (As shown in interconnect layer 1006). Step 1528 may include determining whether the target pixel rate is greater than the maximum sampling rate of an ADC. If the target pixel rate is not greater than the maximum sampling rate of an ADC, then an ADC can be assigned to each output signal path of the beam spot. If the target pixel rate is much smaller than the maximum sampling rate of an ADC, then an ADC can pass through the interconnect layer (e.g., as shown in interconnect layer 1006). Figure 10 , Figure 13 and Figure 14 The interconnect layer 1006 shown is shared by multiple analog signals. The target pixel rate may be much smaller than (<<) the highest sampling rate of an ADC, for example, when they differ by at least an order of magnitude (e.g., the highest sampling rate is 10 times or more greater than the target pixel rate). If the target pixel rate is higher than the highest sampling rate of an ADC, multiple ADCs can be interleaved through the interconnect layer, and multiple ADCs can be used to process the analog signal of a single beam.

[0148] Next, as Figure 15 As shown, method 1500 can proceed to step 1530, which determines the signal route. The signal route for the ADC output can be determined based on the ADC's position in the detector and the digital output channel used to transmit data.

[0149] Next, as Figure 15 As shown, method 1500 can proceed to step 1532, which configures the detector. The detector can be configured based on various other determinations performed in method 1500. For example, the detector can be configured to operate in a normal beam intensity detection mode that operates at the pixel rate required for a particular application. This setting can be maintained until SEM imaging conditions change, which may result in a change in the secondary electron beam projection.

[0150] Modifications and changes to Method 1500 will be readily apparent. For example, in Figure 15 In step 1502, the controller may determine a group of sensing elements, wherein the group of sensing elements may include a charged particle detector (e.g., Figure 13 Detector 1300 or Figure 14 The sensing element projects the beam spot of the charged particle beam in the detector array 1400. For example, the charged particle beam can be... Figure 2 Any of the secondary charged particle beams 236, 238, and 240. The sensing element can be located on the surface of the charged particle detector (e.g., Figure 3B On the sensor surface 300B, such as Figure 10 Any of the sensing elements 311-314 in the middle Figure 13 Any of the sensing elements 701-706 in the middle or Figure 14 Any of the sensing elements 311-314 in the array. The array of sensing elements may correspond to the contour or shape of the beam spot. For example, the boundary sensing element in the array of sensing elements may represent the boundary of the beam spot.

[0151] In some embodiments, the charged particle detector may be a scanning electron microscope (SEM). In some embodiments, the charged particle detector may be in a single-beam inspection apparatus (e.g., a single-beam SEM). In some embodiments, the charged particle detector may be in a multi-beam inspection apparatus (e.g., a multi-beam inspection apparatus). Figure 2 The method is described in beam inspection tool 104. It should be noted that the method can be implemented using a single-beam inspection device or a multi-beam inspection device, and this disclosure does not impose any limitations on such implementations.

[0152] In some embodiments, the sensing element group may include multiple sensing elements. In these cases, the controller may receive the output signals of multiple sensing elements of the charged particle detector. The controller may collect information to, for example, detect or form an image of the secondary charged particle beam spot projected onto the detector. The controller may read the output of each individual sensing element. Any switching between adjacent sensing elements (e.g., as...) Figure 13 The inter-element switching elements 711, 712, and 713 shown can be in an open (e.g., open) state. For example, if the charged particle detector is Figure 13 If the detector 1300 is used, the controller can receive the output signal of the sensing element 706 through output 719. The controller can use the collected information to determine the boundary of the incident charged particle beam spot on the detector surface.

[0153] like Figure 15 The determination of whether the beam spot is large in step 1508 can be based on conditions. These conditions may relate to the capabilities of the signal processing circuitry system in the detector. For example, the controller can determine whether the signal processing circuitry system associated with the sensing element group can or cannot handle a specific situation (e.g., based on the target application). This may be related to the target analog signal bandwidth used for the application. The bandwidth can be determined by the characteristics of the sensing element group, including its associated components. For example, the bandwidth of the sensing element group can be determined by the dimensions of the sensing element group and the amplifier associated with it. The total analog signal bandwidth used to process the output signal of the sensing element group at a predetermined pixel rate may or may not meet the requirements of the application.

[0154] For example, when the beam spot of the charged particle beam detected in step 1502 is large and covers a large number of sensing elements, the sensing elements may be grouped together into a sensing element group, and the analog signal bandwidth may be reduced, so that the signal processing circuitry system of the sensing element group cannot achieve the analog signal bandwidth expected by the desired application. As an example, the beam spot of the charged particle beam may cover the sensing elements in segment 1401 (see...). Figure 14The sensor element in segment 1401 can be grouped together with covered sensor elements in other segments. An input of one of the analog signal paths associated with segment 1401 can be communicatively coupled to the group of sensor elements. In some embodiments, if the required analog signal bandwidth corresponding to the target pixel rate for processing the output signal of the group cannot be met, the controller can divide the group into smaller subgroups, each of which can be communicatively coupled to an input of the analog signal path in segment 1401 or to an analog signal path in another segment that can be (at least partially) covered by the beam spot. In this way, signals can be transmitted through different subgroups and different signal processing circuitry systems. The signals of the subgroups can be summed to represent the total signal of the original group.

[0155] Now refer to Figure 16 , Figure 16 This is an illustration of a sensing element conforming to an embodiment of the present disclosure. Figure 16 A sensing element 1606 is shown, which can be a single sensing element within a detector array comprising multiple sensing elements. The sensing element 1606 can be similar to... Figure 3A , 4A to Figure 4C , Figure 10 and Figure 14 Any sensing element 312 to 314, Figures 5 to 6 Any sensing element 511-513, or Figure 7 , Figure 8 and Figure 13 Any sensing element 701-706).

[0156] The sensing element of a detector array can generate a signal in response to the incidence of an incoming charged particle. Therefore, the sensing element can act as a diode, as it can convert incident energy into a measurable signal and can do so in a predetermined direction. The sensing element of a detector array can be conceptualized as including diodes or other electronic components. Figure 16 As shown, sensing element 1606 includes diode 1624, grounding switch element 1626, grounding circuit 1627, component bus switch element 1628, and component-to-component switch elements 1630 and 1632. In sensing element 1606, diode 1624 can convert the energy of incident charged particles into a measurable electrical signal (e.g., current).

[0157] A grounding circuit can be used to discharge charge from an unused sensing element. In some cases, such as when a sensing element is disconnected to reduce crosstalk, noise, or parasitic parameters, an unused sensing element can still receive charged particles from the emitted wafer. If the sensing element is used for charged particle beam detection, the grounding switch at the sensing element stage circuitry (e.g., grounding switch element 1626) can remain communicatively disconnected (e.g., open). If the sensing element is not in use, the grounding switch can be configured to be communicatively connected (e.g., closed). Element bus switch element 1628 can communicatively couple diode 1614 to output bus 1608 for detecting signal output.

[0158] In some embodiments, the sensing element can be grounded without a grounding switch element. For example, in some embodiments, the sensing element can be provided without a grounding switch element. To ground such a sensing element, it can be connected to other unused sensing elements. Unused sensing elements can be grouped into one or more groups. One or more groups can be connected to one or more inputs of an analog signal path that can be turned on. Although the analog signal paths can be turned on, their outputs can be disconnected from the interconnect layer (e.g., interconnect layer 1006). That is, the output can flow through the analog signal path connected to the unused sensing element, and such outputs can be discarded. This method eliminates the need for a dedicated grounding switch element for each sensing element. Using a grounding switch element can increase flexibility (e.g., by allowing analog signal paths to be allocated for other purposes) and reduce power consumption. On another front, omitting the grounding switch element can reduce manufacturing complexity.

[0159] The aspects of this disclosure are set forth in the following numbers, as described in the terms:

[0160] 1. A detector, comprising:

[0161] The set of sensing elements, including a first set of sensing elements and a second set of sensing elements;

[0162] The first segment circuit system is configured to communicatively couple a first set of sensing elements to the input of a first signal processing circuit system.

[0163] The second segment circuit system is configured to communicatively couple a second set of sensing elements to the input of the second signal processing circuit system; and

[0164] An interconnecting circuit configured to communicatively couple the output of a first signal processing circuit system to the output of a second signal processing circuit system.

[0165] 2. The detector according to Clause 1, wherein the interconnecting circuitry includes interconnecting switching elements configured to communicatively couple the output of the first signal processing circuitry system to the output of the second signal processing circuitry system.

[0166] 3. The detector according to any one of clauses 1 to 2 further comprises:

[0167] A first switching element is configured to communicatively couple a first segment circuit system to the input of a first signal processing circuit system.

[0168] 4. The detector according to any one of clauses 1 to 3 further comprises:

[0169] A second switching element is configured to communicatively couple the output of the first signal processing circuit system to an interconnect circuit.

[0170] 5. The detector according to any one of clauses 1 to 4 further comprises:

[0171] The third signal processing circuit system is communicatively coupled to the interconnect circuit via a third switching element; and

[0172] The fourth signal processing circuit system is communicatively coupled to the interconnect circuit via a fourth switching element.

[0173] 6. The detector according to Clause 5 further includes:

[0174] A control circuit is communicatively coupled to the third signal processing circuit system, the fourth signal processing circuit system, the interconnecting switching element, the third switching element, and the fourth switching element, wherein the control circuit is configured as follows:

[0175] The third and fourth signal processing circuit systems are controlled to operate in an interleaved mode by communicatingly coordinating interconnected switching elements, a third switching element, and a fourth switching element, wherein the third and fourth signal processing circuit systems receive signals from at least one of a first or second signal processing circuit system.

[0176] 7. The detector according to any one of clauses 5 to 6, further comprising:

[0177] A multiplexer is configured to communicatively couple interconnect circuitry to a third signal processing circuitry system, and to receive signals from at least one of a first or second signal processing circuitry system, and to output a multiplexed signal to the third signal processing circuitry system.

[0178] 8. The detector as described in Clause 7, wherein the multiplexer is an analog multiplexer.

[0179] 9. The detector according to any one of clauses 5 to 8, wherein the third signal processing circuit system includes a first analog-to-digital converter (ADC), and the fourth signal processing circuit system includes a second analog-to-digital converter (ADC).

[0180] 10. The detector according to Clause 9, wherein at least one of the first ADC or the second ADC is configured to receive a current signal.

[0181] 11. The detector according to Clause 9, wherein at least one of the first ADC or the second ADC is configured to receive a charge signal.

[0182] 12. The detector according to any one of Clauses 10 to 11, wherein at least one of the first ADC or the second ADC includes a converter that is communicatively coupled in series to the voltage input ADC.

[0183] 13. The detector according to any one of clauses 1 to 12, wherein the first signal processing circuit system and the second signal processing circuit system are configured to process analog signals.

[0184] 14. The detector according to Clause 13, wherein the first signal processing circuit system includes a first amplifier, and the second signal processing circuit system includes a second amplifier.

[0185] 15. The detector according to Clause 14, wherein at least one of the first amplifier or the second amplifier is configured to receive a current signal and output an amplified current signal.

[0186] 16. The detector according to Clause 14, wherein at least one of the first amplifier or the second amplifier is configured to receive a charge signal and output an amplified charge signal.

[0187] 17. The detector according to Clause 14, wherein at least one of the first amplifier or the second amplifier is a single-stage amplifier.

[0188] 18. The detector according to Clause 14, wherein at least one of the first amplifier or the second amplifier is a multi-stage amplifier.

[0189] 19. The detector according to Clause 18, wherein at least one of the first amplifier or the second amplifier includes a third amplifier communicatively coupled to a fourth amplifier in series, and wherein the third amplifier includes one of a charge transfer amplifier, a transimpedance amplifier, or a dual-mode charge transfer and transimpedance amplifier, and the fourth amplifier includes a transconductance amplifier.

[0190] 20. The detector according to any one of clauses 1 to 19, wherein the first segment circuit system includes a first wiring path and the second segment circuit system includes a second wiring path.

[0191] 21. A detection system, comprising:

[0192] The set of sensing elements, including a first set of sensing elements and a second set of sensing elements;

[0193] The first segment circuit system is configured to communicatively couple a first set of sensing elements to the input of a first signal processing circuit system.

[0194] The second segment circuit system is configured to communicatively couple a second set of sensing elements to the input of the second signal processing circuit system.

[0195] Interconnect circuitry is configured to communicatively couple the output of a first signal processing circuit system to the output of a second signal processing circuit system; and

[0196] The interface is configured to control the image signal processing of the detection system.

[0197] 22. The detection system according to Clause 21, wherein the interconnecting circuit includes an interconnecting switching element configured to communicatively couple the output of the first signal processing circuit system to the output of the second signal processing circuit system.

[0198] 23. The detection system according to any one of clauses 21 to 22 further includes:

[0199] A first switching element is configured to communicatively couple a first segment circuit system to the input of a first signal processing circuit system.

[0200] 24. The detection system according to any one of clauses 21 to 23 further includes:

[0201] The second switching element is configured to communicatively couple the output of the first signal processing circuit system to the interconnect circuit.

[0202] 25. The detection system according to any one of clauses 21 to 24 further includes:

[0203] The third signal processing circuit system is communicatively coupled to the interconnect circuit via a third switching element; and

[0204] The fourth signal processing circuit system is communicatively coupled to the interconnect circuit via a fourth switching element.

[0205] 26. The detection system according to Clause 25 further includes:

[0206] A control circuit is communicatively coupled to the third signal processing circuit system, the fourth signal processing circuit system, the interconnecting switching element, the third switching element, and the fourth switching element, wherein the control circuit is configured as follows:

[0207] The third and fourth signal processing circuit systems are controlled to operate in an interleaved mode by coordinating interconnected switching elements, a third switching element, and a fourth switching element, wherein the third and fourth signal processing circuit systems receive signals from at least one of the first or second signal processing circuit systems.

[0208] 27. The detection system according to any one of Clauses 25 to 26, further comprising:

[0209] A multiplexer is configured to communicatively couple interconnect circuitry to a third signal processing circuitry system, and to receive signals from at least one of a first or second signal processing circuitry system, and to output a multiplexed signal to the third signal processing circuitry system.

[0210] 28. The detection system according to Clause 27, wherein the multiplexer is an analog multiplexer.

[0211] 29. The detection system according to any one of clauses 25 to 28, wherein the third signal processing circuit system includes a first analog-to-digital converter (ADC), and the fourth signal processing circuit system includes a second analog-to-digital converter (ADC).

[0212] 30. The detection system according to Clause 29, wherein at least one of the first ADC or the second ADC is configured to receive a current signal.

[0213] 31. The detection system according to Clause 29, wherein at least one of the first ADC or the second ADC is configured to receive a charge signal.

[0214] 32. The detection system according to any one of Clauses 30 to 31, wherein at least one of the first ADC or the second ADC includes a converter that is communicatively coupled in series to the voltage input ADC.

[0215] 33. The detection system according to clauses 25 to 32, wherein the interface includes a digital multiplexer communicatively coupled to the third signal processing circuit system and the fourth signal processing circuit system.

[0216] 34. The detection system according to any one of clauses 21 to 33, wherein the first signal processing circuit system and the second signal processing circuit system are configured to process analog signals.

[0217] 35. The detection system according to Clause 34, wherein the first signal processing circuit system includes a first amplifier, and the second signal processing circuit system includes a second amplifier.

[0218] 36. The detection system according to Clause 35, wherein at least one of the first amplifier or the second amplifier is configured to receive a current signal and output an amplified current signal.

[0219] 37. The detection system according to Clause 35, wherein at least one of the first amplifier or the second amplifier is configured to receive a charge signal and output an amplified charge signal.

[0220] 38. The detection system according to Clause 35, wherein at least one of the first amplifier or the second amplifier is a single-stage amplifier.

[0221] 39. The detection system according to Clause 35, wherein at least one of the first amplifier or the second amplifier is a multi-stage amplifier.

[0222] 40. The detection system according to Clause 39, wherein at least one of the first amplifier or the second amplifier includes a third amplifier communicatively coupled to a fourth amplifier in series, and wherein the third amplifier includes one of a charge transfer amplifier, a transimpedance amplifier, or a dual-mode charge transfer and transimpedance amplifier, and the fourth amplifier includes a transconductance amplifier.

[0223] 41. The detection system according to any one of clauses 21 to 40, wherein the first segment circuit system includes a first wiring path, and the second segment circuit system includes a second wiring path.

[0224] 42. A charged particle inspection system, comprising:

[0225] A charged particle beam source is configured to generate a primary charged particle beam for sample scanning;

[0226] A detector is configured to receive a secondary charged particle beam exiting from the incident point of a primary charged particle beam, wherein the detector includes:

[0227] The set of sensing elements, including a first set of sensing elements and a second set of sensing elements;

[0228] The first segment circuit system is configured to communicatively couple a first set of sensing elements to the input of a first signal processing circuit system.

[0229] The second segment circuit system is configured to communicatively couple a second set of sensing elements to the input of the second signal processing circuit system; and

[0230] Interconnect circuitry is configured to communicatively couple the output of a first signal processing circuit system to the output of a second signal processing circuit system.

[0231] 43. The charged particle inspection system according to Clause 42, wherein the interconnecting circuit includes an interconnecting switching element configured to communicatively couple the output of the first signal processing circuit system to the output of the second signal processing circuit system.

[0232] 44. The charged particle inspection system according to any one of clauses 42 to 43 further comprises:

[0233] A first switching element is configured to communicatively couple a first segment circuit system to the input of a first signal processing circuit system.

[0234] 45. The charged particle inspection system according to any one of clauses 42 to 44 further comprises:

[0235] The second switching element is configured to communicatively couple the output of the first signal processing circuit system to the interconnect circuit.

[0236] 46. ​​The charged particle inspection system according to any one of clauses 42 to 45 further comprises:

[0237] The third signal processing circuit system is communicatively coupled to the interconnect circuit via a third switching element; and

[0238] The fourth signal processing circuit system is communicatively coupled to the interconnect circuit via a fourth switching element.

[0239] 47. The charged particle inspection system according to Clause 46 further includes:

[0240] A control circuit is communicatively coupled to the third signal processing circuit system, the fourth signal processing circuit system, the interconnecting switching element, the third switching element, and the fourth switching element, wherein the control circuit is configured as follows:

[0241] The third and fourth signal processing circuit systems are controlled to operate in an interleaved mode by coordinating interconnected switching elements, a third switching element, and a fourth switching element, wherein the third and fourth signal processing circuit systems receive signals from at least one of the first or second signal processing circuit systems.

[0242] 48. The charged particle inspection system according to any one of clauses 46 to 47, further comprising:

[0243] A multiplexer is configured to communicatively couple interconnect circuitry to a third signal processing circuitry system, and to receive signals from at least one of a first or second signal processing circuitry system, and to output a multiplexed signal to the third signal processing circuitry system.

[0244] 49. The charged particle inspection system as described in Clause 48, wherein the multiplexer is an analog multiplexer.

[0245] 50. The charged particle inspection system according to any one of clauses 46 to 49, wherein the third signal processing circuit system includes a first analog-to-digital converter (ADC), and the fourth signal processing circuit system includes a second analog-to-digital converter (ADC).

[0246] 51. The charged particle inspection system according to Clause 50, wherein at least one of the first ADC or the second ADC is configured to receive a current signal.

[0247] 52. The charged particle inspection system according to Clause 50, wherein at least one of the first ADC or the second ADC is configured to receive a charge signal.

[0248] 53. The charged particle inspection system according to any one of clauses 51 to 52, wherein at least one of the first ADC or the second ADC includes a converter that is communicatively coupled in series to the voltage input ADC.

[0249] 54. The charged particle inspection system according to any one of clauses 42 to 53, wherein the first signal processing circuit system and the second signal processing circuit system are configured to process analog signals.

[0250] 55. The charged particle inspection system according to Clause 54, wherein the first signal processing circuit system includes a first amplifier, and the second signal processing circuit system includes a second amplifier.

[0251] 56. The charged particle inspection system according to Clause 55, wherein at least one of the first amplifier or the second amplifier is configured to receive a current signal and output an amplified current signal.

[0252] 57. The charged particle inspection system according to Clause 55, wherein at least one of the first amplifier or the second amplifier is configured to receive a charge signal and output an amplified charge signal.

[0253] 58. The charged particle inspection system according to Clause 55, wherein at least one of the first amplifier or the second amplifier is a single-stage amplifier.

[0254] 59. The charged particle inspection system according to Clause 55, wherein at least one of the first amplifier or the second amplifier is a multi-stage amplifier.

[0255] 60. The charged particle inspection system according to Clause 59, wherein at least one of the first amplifier or the second amplifier includes a third amplifier, the third amplifier being series-communicated to a fourth amplifier, and wherein the third amplifier includes one of a charge transfer amplifier, a transimpedance amplifier, or a dual-mode charge transfer and transimpedance amplifier, and the fourth amplifier includes a transconductance amplifier.

[0256] 61. The charged particle inspection system according to any one of clauses 42 to 60, wherein the first segment circuit system includes a first wiring path, and the second segment circuit system includes a second wiring path.

[0257] 62. A detector comprising:

[0258] Multiple sensing elements, including a first set of sensing elements and a second set of sensing elements;

[0259] A first segment circuit system is configured to communicatively couple a first set of sensing elements to the input of a first signal processing circuit system; and

[0260] The second segment circuit system is configured to communicatively couple the second set of sensing elements to the input of the second signal processing circuit system, wherein

[0261] The first signal processing circuit system includes a first amplifier, and the second signal processing circuit system includes a second amplifier.

[0262] At least one of the first amplifier or the second amplifier is configured to perform one of receiving a current signal and outputting an amplified current signal, receiving a current signal and outputting a charge signal, receiving a charge signal and outputting a current signal, or receiving a charge signal and outputting an amplified charge signal.

[0263] 63. The detector according to clause 62, further comprising:

[0264] Interconnect circuitry is configured to communicatively couple the output of a first signal processing circuit system to the output of a second signal processing circuit system.

[0265] 64. The detector according to Clause 63, wherein the interconnecting circuitry includes interconnecting switching elements configured to communicatively couple the output of a first signal processing circuitry system to the output of a second signal processing circuitry system.

[0266] 65. The detector according to any one of clauses 63 to 64 further comprises:

[0267] The second switching element is configured to communicatively couple the output of the first signal processing circuit system to the interconnect circuit.

[0268] 66. The detector according to any one of clauses 63 to 65 further comprises:

[0269] A third signal processing circuit system, communicatively coupled to an interconnect circuit via a third switching element; and

[0270] The fourth signal processing circuit system is communicatively coupled to the interconnect circuit via a fourth switching element.

[0271] 67. The detector according to clause 66 further includes:

[0272] A control circuit is communicatively coupled to the third signal processing circuit system, the fourth signal processing circuit system, the interconnecting switching element, the third switching element, and the fourth switching element, wherein the control circuit is configured as follows:

[0273] The third and fourth signal processing circuit systems are controlled to operate in an interleaved mode by coordinating interconnected switching elements, a third switching element, and a fourth switching element, wherein the third and fourth signal processing circuit systems receive signals from at least one of the first or second signal processing circuit systems.

[0274] 68. The detector according to any one of clauses 66 to 67, further comprising:

[0275] A multiplexer is configured to communicatively couple interconnect circuitry to a third signal processing circuitry system, and to receive signals from at least one of a first or second signal processing circuitry system, and to output a multiplexed signal to the third signal processing circuitry system.

[0276] 69. The detector as described in Clause 68, wherein the multiplexer is an analog multiplexer.

[0277] 70. The detector according to any one of clauses 66 to 69, wherein the third signal processing circuit system includes a first analog-to-digital converter (ADC), and the fourth signal processing circuit system includes a second analog-to-digital converter (ADC).

[0278] 71. The detector according to Clause 70, wherein at least one of the first ADC or the second ADC is configured to receive a current signal.

[0279] 72. The detector according to Clause 70, wherein at least one of the first ADC or the second ADC is configured to receive a charge signal.

[0280] 73. The detector according to any one of clauses 71 to 72, wherein at least one of the first ADC or the second ADC includes a converter that is serially and communicatively coupled to the voltage input ADC.

[0281] 74. The detector according to any one of clauses 62 to 73 further comprises:

[0282] A first switching element is configured to communicatively couple a first segment circuit system to the input of a first signal processing circuit system.

[0283] 75. The detector according to any one of clauses 62 to 74, wherein the first signal processing circuit system and the second signal processing circuit system are configured to process analog signals.

[0284] 76. The detector according to any one of clauses 62 to 75, wherein at least one of the first amplifier or the second amplifier includes a third amplifier communicatively coupled to a fourth amplifier in series, and wherein the third amplifier includes one of a charge transfer amplifier, a transimpedance amplifier, or a dual-mode charge transfer and transimpedance amplifier, and the fourth amplifier includes a transconductance amplifier.

[0285] 77. The detector according to any one of clauses 62 to 76, wherein the first segment circuit system includes a first wiring path, and the second segment circuit system includes a second wiring path.

[0286] 78. A computer-implemented method, comprising:

[0287] In a charged particle detector, a group of sensing elements is identified, including a sensing element, onto which a beam spot of a charged particle beam is projected.

[0288] Determine whether the beam spot meets the conditions;

[0289] Determine the output path of the sensing element group; and

[0290] The signal is transmitted from the interconnect layer to a first analog-to-digital converter (ADC), which is communicatively coupled to a first output of the interconnect layer.

[0291] 79. The computer-implemented method according to Clause 78, wherein the sensing element group comprises a plurality of sensing elements.

[0292] 80. The computer-implemented method according to clause 78 or 79, wherein determining whether the beam spot satisfies the conditions includes:

[0293] Determine the size of the beam spot; and

[0294] Compare this size with the threshold.

[0295] 81. The computer-implemented method according to clause 78 or 79, wherein determining whether the beam spot satisfies the conditions includes:

[0296] Determine whether the target analog bandwidth corresponding to the target pixel rate is achievable for this group of sensing elements.

[0297] 82. The computer-implemented method according to any one of clauses 79 to 81, further comprising:

[0298] Two adjacent sensing elements in the sensing element group are communicatively coupled.

[0299] 83. The computer-implemented method according to clause 82, wherein communicatively coupling two adjacent sensing elements comprises:

[0300] A communication-connecting inter-element switching element between two adjacent sensing elements.

[0301] 84. The computer-implemented method according to any one of clauses 78 to 83, further comprising:

[0302] Based on the determination that the beam spot satisfies the condition, a plurality of sensing element subgroups are determined, each of the plurality of sensing element subgroups including at least one sensing element of the sensing element group, and

[0303] Based on the total analog bandwidth of the output of the sensing element group used to process the target pixel rate, the sensing element group is divided into multiple sensing element subgroups.

[0304] 85. The computer-implemented method according to any one of clauses 78 to 84, wherein determining the output path includes:

[0305] The output of the sensing element in the sensing element group is communicatively coupled to the signal processing circuitry of the charged particle detector.

[0306] 86. The computer-implemented method according to clause 84 further includes: communicatively coupling a plurality of sensing element subgroups to a signal processing circuit system; and

[0307] The switching element is communicatively connected between the sensing element of the sensing element subgroup and the wiring path of the signal processing circuit system.

[0308] 87. The computer-implemented method according to Clause 86 further includes:

[0309] Determine the common output terminal for the sensing element subgroup.

[0310] 88. The computer-implemented method according to Clause 87, wherein determining the common output terminal includes:

[0311] Determine the geometric center of the sensing element subgroup; and

[0312] The common output terminal is determined as the output terminal of the sensing element that is closest to the geometric center.

[0313] 89. The computer-implemented method according to Clause 87, wherein determining the common output terminal includes:

[0314] Determine the centroid of the intensity distribution in the sensing element subgroup; and

[0315] The common output terminal is determined as the output terminal of the sensing element closest to the centroid.

[0316] 90. The computer-implemented method according to any one of claims 87 to 89, wherein communicatively coupling a plurality of sensing element subgroups to a signal processing circuit system comprises:

[0317] The common output terminal is communicatively coupled to the signal processing circuit system.

[0318] 91. The computer-implemented method according to Clause 90, wherein communicatively coupling a common output to a signal processing circuit system comprises:

[0319] A switching element is communicatively connected between the common output terminal and the wiring path of the signal processing circuit system.

[0320] 92. The computer-implemented method according to any one of clauses 87 to 91, wherein in the plurality of signal processing circuitry systems of the charged particle detector, the distance from the signal processing circuitry system to the common output terminal is minimized.

[0321] 93. The computer-implemented method according to Clause 78 further includes:

[0322] The combined signal is determined using the output signals of multiple signal processing circuitry systems of a charged particle detector at a first output of the interconnect layer, which is communicatively coupled to the multiple signal processing circuitry systems.

[0323] 94. The computer-implemented method according to Clause 93, wherein the combined signals are determined:

[0324] Switching elements are communicatively connected between the interconnect layer and the outputs of multiple signal processing circuit systems;

[0325] A communication-grounded interconnect switching element is provided, which is communicationally coupled to a first output of the interconnect layer and the outputs of multiple signal processing circuit systems; and

[0326] The combined signal is determined by summing the output signals at the first output terminal of the interconnect layer.

[0327] 95. The computer-implemented method according to Clause 94, wherein transmitting the signal to the first ADC comprises:

[0328] The switching element is communicatively connected between the first output of the interconnect layer and the first ADC.

[0329] 96. The computer-implemented method according to any one of clauses 78 to 95 further includes:

[0330] Acquire a detection image of the projection pattern of the indicator beam spot onto the charged particle detector.

[0331] 97. The computer-implemented method according to clause 96, wherein acquiring the detected image comprises:

[0332] Read the individual outputs of the sensing element of the charged particle detector.

[0333] 98. The computer-implemented method according to any one of clauses 78 to 97 further includes:

[0334] Determine the boundary of the beam spot.

[0335] Determining the sensing element group includes grouping the sensing elements within the boundary together.

[0336] 99. The computer-implemented method according to clause 98, wherein grouping sensing elements within a boundary together comprises:

[0337] Actuate the switch to communicatively couple the sensing elements in the sensing element group.

[0338] 100. The computer-implemented method according to any one of clauses 78 to 99 further includes:

[0339] Based on whether unused sensing elements are included in the sensing element group, ground unused sensing elements.

[0340] 101. The computer-implemented method according to Clause 100, wherein grounding an unused sensing element includes actuating a grounding switch.

[0341] 102. The computer-implemented method according to Clause 100, wherein grounding an unused sensing element includes connecting the unused sensing element to a signal path disconnected from the interconnect layer.

[0342] 103. The computer-implemented method according to Clause 78 further includes:

[0343] Actuate the switch to connect the sensing element group to the output path.

[0344] 104. The computer-implemented method according to clause 84 further includes:

[0345] Actuate the switch to connect the multiple sensing element subgroups to the corresponding output paths.

[0346] 105. The computer-implemented method according to any one of clauses 78 to 104 further includes performing signal processing.

[0347] 106. The computer-implemented method according to Clause 105, wherein signal processing includes:

[0348] Amplify the signal transmitted through the output path;

[0349] Use an ADC to digitize the signal.

[0350] 107. The computer-implemented method according to clause 84 further includes performing signal processing, the signal processing comprising:

[0351] The signals from multiple subgroups are added together.

[0352] 108. The computer-implemented method according to any one of clauses 78 to 107 further includes:

[0353] The target pixel rate is compared with the highest sampling rate of the first ADC.

[0354] 109. The computer-implemented method according to Clause 108, further comprising:

[0355] If the target pixel rate is greater than the highest sampling rate of the first ADC, then interleaving is performed;

[0356] If the target pixel rate is less than or equal to the highest sampling rate of the first ADC, then connect the output paths of multiple subgroups to the first ADC; and

[0357] If the target pixel rate is much lower than the highest sampling rate of the first ADC, then the output paths of the other sensing element groups are connected to the first ADC.

[0358] 110. The computer-implemented method according to clause 109, wherein the interleaving includes:

[0359] The switching elements of the excitation interconnect layer are used to alternately connect the output path to the first ADC and the second ADC.

[0360] 111. The computer-implemented method according to any one of clauses 78 to 110, wherein the charged particle detector is a component of a scanning electron microscope (SEM).

[0361] 112. The computer-implemented method according to any one of clauses 78 to 111, wherein the charged particle detector is included in a single-beam inspection apparatus.

[0362] 113. The computer-implemented method according to any one of clauses 78 to 111, wherein the charged particle detector is included in a multi-beam inspection apparatus.

[0363] 114. The computer-implemented method according to any one of clauses 78 to 113 further includes using a first ADC to convert current into digital information.

[0364] 115. The computer-implemented method according to any one of clauses 78 to 113 further includes using a first ADC to convert charge into digital information.

[0365] 116. The detector according to Clause 12, wherein the converter includes a current-voltage converter.

[0366] 117. The detector according to Clause 12, wherein the converter includes a charge-voltage converter.

[0367] 118. The detector according to Clause 14, wherein the first amplifier is configured to receive a current signal or a charge signal, and the first amplifier is configured to output a current signal or a charge signal.

[0368] The second amplifier is configured to receive a current signal or a charge signal, and the second amplifier is configured to output a current signal or a charge signal.

[0369] 119. The detector according to Clause 14, wherein the first amplifier is configured to receive a current signal and output a charge signal, or vice versa, and

[0370] The second amplifier is configured to receive a current signal and output a charge signal, or vice versa.

[0371] 120. The detection system according to Clause 32, wherein the converter includes a current-voltage converter.

[0372] 121. The detection system according to Clause 32, wherein the converter includes a charge-voltage converter.

[0373] 122. The detection system according to Clause 35, wherein the first amplifier is configured to receive a current signal or a charge signal, and the first amplifier is configured to output a current signal or a charge signal.

[0374] The second amplifier is configured to receive a current signal or a charge signal, and the second amplifier is configured to output a current signal or a charge signal.

[0375] 123. The detection system according to Clause 35, wherein the first amplifier is configured to receive a current signal and output a charge signal, or vice versa, and

[0376] The second amplifier is configured to receive a current signal and output a charge signal, or vice versa.

[0377] 124. The detection system according to Clause 53, wherein the converter includes a current-voltage converter.

[0378] 125. The detection system according to Clause 53, wherein the converter includes a charge-voltage converter.

[0379] 126. The detection system according to Clause 56, wherein the first amplifier is configured to receive a current signal or a charge signal, and the first amplifier is configured to output a current signal or a charge signal.

[0380] The second amplifier is configured to receive a current signal or a charge signal, and the second amplifier is configured to output a current signal or a charge signal.

[0381] 127. The detection system according to Clause 56, wherein the first amplifier is configured to receive a current signal and output a charge signal, or vice versa, and

[0382] The second amplifier is configured to receive a current signal and output a charge signal, or vice versa.

[0383] 128. The detection system according to Clause 73, wherein the converter includes a current-voltage converter.

[0384] 129. The detection system according to Clause 73, wherein the converter includes a charge-voltage converter.

[0385] A non-transitory computer-readable medium may be provided, which stores information for the controller (e.g., Figure 1 Controller 109 or Figure 9 Instructions of the processor of the controller 904 in the above-mentioned controller are used to... Figure 15An exemplary flowchart for detecting charged particle beams is consistent with embodiments in this disclosure. For example, instructions stored in a non-transitory computer-readable medium can be executed by circuitry of a controller to perform part or all of method 1500. Common forms of non-transitory media include, for example, floppy disks, flexible disks, hard disks, solid-state drives, magnetic tape or any other magnetic data storage media, optical disc read-only memory (CD-ROM), any other optical data storage media, any physical media with a perforated pattern, random access memory (RAM), programmable read-only memory (PROM) and erasable programmable read-only memory (EPROM), flash memory-EPROM or any other flash memory, non-volatile random access memory (NVRAM), cache, registers, any other memory chip or cassette memory, and the same network version.

[0386] With significantly increased configuration flexibility and performance adaptability, such as Figure 10 , Figure 13 and Figure 14 The architecture shown and described herein can further push the performance capabilities of the inspection device 244 to higher limits without incurring significant costs, which in turn enables the construction of more capable single-beam or multi-beam inspection tools.

[0387] It should be understood that the embodiments of this disclosure are not limited to the exact structures described above and illustrated in the accompanying drawings, and various modifications and changes can be made without departing from its scope. This disclosure has been described in conjunction with various practices, but other practices of this disclosure will be apparent to those skilled in the art in light of the specification and practice disclosed herein. The specification and examples are to be considered exemplary only.

Claims

1. A detector, comprising: The set of sensing elements, including a first set of sensing elements and a second set of sensing elements; A first segment circuit system is configured to communicatively couple a first set of sensing elements to the input of a first signal processing circuit system. The second segment circuit system is configured to communicatively couple the second set of the sensing elements to the input of the second signal processing circuit system. An interconnect circuit is configured to communicatively couple the output of the first signal processing circuit system to the output of the second signal processing circuit system; as well as A second switching element is configured to communicatively couple the output of the first signal processing circuit system to the interconnect circuit.

2. The detector of claim 1, wherein the interconnect circuitry includes interconnect switching elements configured to communicatively couple the output of the first signal processing circuitry system to the output of the second signal processing circuitry system.

3. The detector according to claim 1, further comprising: A first switching element is configured to communicatively couple the first segment circuit system to the input terminal of the first signal processing circuit system.

4. The detector according to claim 2, further comprising: The third signal processing circuit system is communicatively coupled to the interconnect circuit via a third switching element; as well as The fourth signal processing circuit system is communicatively coupled to the interconnect circuit via a fourth switching element.

5. The detector according to claim 4, further comprising: A control circuit is communicatively coupled to the third signal processing circuit system, the fourth signal processing circuit system, the interconnecting switching element, the third switching element, and the fourth switching element, wherein the control circuit is configured to: The third and fourth signal processing circuit systems are controlled to operate in an interleaved mode by communicatively coordinating the interconnecting switching elements, the third switching element, and the fourth switching element, wherein the third and fourth signal processing circuit systems receive signals from at least one of the first or second signal processing circuit systems.

6. The detector according to claim 4, further comprising: A multiplexer is configured to communicatively couple the interconnect circuitry to the third signal processing circuitry system, and to receive signals from at least one of the first or second signal processing circuitry system, and to output a multiplexed signal to the third signal processing circuitry system.

7. The detector according to claim 6, wherein the multiplexer is an analog multiplexer.

8. The detector of claim 4, wherein the third signal processing circuit system includes a first analog-to-digital converter (ADC), and the fourth signal processing circuit system includes a second analog-to-digital converter (ADC).

9. The detector of claim 8, wherein at least one of the first ADC or the second ADC is configured to receive a current signal.

10. The detector of claim 8, wherein at least one of the first ADC or the second ADC is configured to receive a charge signal.

11. The detector of claim 9, wherein at least one of the first ADC or the second ADC includes a converter, the converter being serially and communicatively coupled to the voltage input ADC.

12. The detector of claim 1, wherein the first signal processing circuit system and the second signal processing circuit system are configured to process analog signals.

13. The detector of claim 12, wherein the first signal processing circuit system includes a first amplifier, and the second signal processing circuit system includes a second amplifier.

14. The detector of claim 11, wherein the converter comprises a current-voltage converter.

15. The detector of claim 11, wherein the converter comprises a charge-voltage converter.

16. The detector of claim 13, wherein the first amplifier is configured to receive a current signal or a charge signal, and the first amplifier is configured to output a current signal or a charge signal, and The second amplifier is configured to receive a current signal or a charge signal, and the second amplifier is configured to output a current signal or a charge signal.

17. The detector of claim 13, wherein the first amplifier is configured to receive a current signal and output a charge signal, or the first amplifier is configured to receive a charge signal and output a current signal, and The second amplifier is configured to receive a current signal and output a charge signal, or the second amplifier is configured to receive a charge signal and output a current signal.

18. A computer-implemented method, comprising: In a charged particle detector, a group of sensing elements is identified, including sensing elements, onto which a beam spot of a charged particle beam is projected. Determine whether the beam spot meets the conditions; Determine the output path of the sensing element group; as well as The signal is transmitted from the interconnect layer to a first analog-to-digital converter (ADC), which is communicatively coupled to a first output of the interconnect layer. A switching element is disposed between the first analog-to-digital converter and the interconnect layer to communicatively couple the output of the first analog-to-digital converter to the interconnect layer.

19. The computer-implemented method of claim 18, wherein determining whether the beam spot satisfies the condition comprises: Determine the size of the beam spot; and The size is compared with the threshold.

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