Fabrication of semiconductor structures
By selectively replacing the first material with the second material in the photonic crystal structure, the problems of low electroactuation efficiency and difficulty in placement of the active material are solved, and efficient photo-matter interaction and carrier injection are achieved.
Patent Information
- Application Number
- CN202180032583.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-05-04
- Filing Date
- 2021-04-20
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2041-04-20
AI Technical Summary
In photon cavity-based devices, electrical actuation (i.e., the efficiency of carrier injection into the active region) is low, and precise placement of the active material in the center of the photon cavity is difficult, resulting in low photo-matter interaction efficiency.
By fabricating the photonic crystal structure and selectively removing the first material within its predefined portion and replacing it with a second material (such as a Group III-V material), the second material is ensured to grow in the central part of the photonic crystal structure, thereby improving carrier injection efficiency.
It realizes effective injection of carriers without damaging the optical cavity, improves the efficiency of light-matter interaction and enhances the performance of the device.
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Figure CN115485860B_ABST
Abstract
Description
Background Art
[0001] Embodiments of the present invention generally relate to methods for fabricating semiconductor structures, particularly for optical applications such as laser applications. Embodiments of the present invention also relate to semiconductor devices, particularly resonators, or more specifically lasers, that can be fabricated using such methods.
[0002] Optical interconnects for next-generation computing require semiconductor light sources. Photonic crystal nanocavities are an ideal platform for such semiconductor light sources because they can provide strong light-matter interactions, high Q / V ratios, threshold-free lasing behavior, and high-speed modulation rates.
[0003] A challenge in photonic cavity-based devices is electrical actuation, i.e., efficient injection of carriers into the active region without damaging the optical cavity.
[0004] If a photonic cavity is implemented in an active material, excessive absorption losses may occur because light is absorbed outside the cavity.
[0005] On the other hand, precise placement of the active material within the central portion of the cavity remains a difficult challenge. Summary of the invention
[0006] According to a first aspect, the present invention is embodied in a method for manufacturing a semiconductor structure. The method comprises manufacturing a photonic crystal structure of a first material, and selectively removing the first material in a predefined portion of the photonic crystal structure, the first material being in particular a first semiconductor material. The method further comprises replacing the first material in the predefined portion of the photonic crystal structure with one or more second materials by selective epitaxy. The one or more second materials may in particular be semiconductor materials.
[0007] This method according to an embodiment of the present invention provides an efficient way to manufacture a photonic crystal structure comprising two different materials in an efficient manner.
[0008] According to an embodiment, the properties of the first material and the second material may be independently improved or optimized to increase the efficiency of the device.
[0009] According to an embodiment, the predefined portion of the photonic crystal structure is a central portion of the photonic crystal structure. According to such an embodiment, the second material may be placed in the central portion of the photonic crystal structure. This may allow carriers to be effectively confined to the central portion or center of the photonic crystal structure, thereby improving device performance.
[0010] The first material may in particular be silicon, while the second material may in particular be an optically active material. This may allow, for example, using current photonic crystal cavity designs, in particular Si-photonic designs, with suitable or compatible geometries, and replacing silicon with optically active materials, for example with III-V materials. Embodiments of the invention in particular allow placing optically active materials as gain materials in efficiency-enhancing portions of a photonic crystal structure.
[0011] According to an embodiment, manufacturing a photonic crystal structure comprises providing a wafer comprising a first material layer, and patterning the first material layer, thereby manufacturing a photonic crystal structure of the first material. This allows efficient manufacturing.
[0012] According to an embodiment, the wafer is a silicon-on-insulator wafer comprising a silicon layer on an insulating layer, and the method further comprises patterning the silicon layer, thereby manufacturing a photonic crystal structure comprising silicon as the first material. This allows efficient manufacturing.
[0013] According to one embodiment, replacing the first material with one or more second materials comprises growing the one or more second materials in a lateral direction of the wafer. This allows for advantageous device designs.
[0014] According to one embodiment, the method further comprises growing one or more second materials with a predefined doping profile in the lateral direction of the wafer. This allows for further advantageous device designs. In particular, the method according to an embodiment of the present invention can allow for epitaxial in-plane lateral doping, i.e., the manufacture of a pin structure arranged parallel to the substrate of the wafer.
[0015] According to an embodiment, the method further comprises growing two different second materials in a lateral direction of the wafer, thereby forming a lateral heterojunction. According to such an embodiment, in a first step, a first of the second materials, for example a first III-V material such as AlGaAs or InP, is epitaxially grown. In a second step, another of the second materials, for example another III-V material such as InGaAs, is epitaxially grown, thereby producing a lateral heterojunction.
[0016] According to an embodiment, the method further comprises providing an electrical contact to the one or more second materials. According to an embodiment, in particular for embodiments having a lateral doping profile, providing such an electrical contact may be facilitated.
[0017] According to an embodiment, several different material combinations of a first material and a plurality of second materials may be implemented on the same wafer by repeating growth runs. This is possible due to the local integration of the gain material.
[0018] According to an embodiment, selectively removing the first material within the predefined portion of the photonic crystal structure includes encapsulating the photonic crystal structure of the first material with a third material, the third material being in particular an oxide material. A further step includes selectively removing a portion of the third material in the predefined portion of the photonic crystal structure to provide a window to the first material, and selectively removing a portion of the first material through the window. This creates a template structure of the third material. The template structure may also be represented as a cavity structure. To facilitate the growth of one or more second materials in the template structure, the remaining portion of the first material forms a seed structure of the one or more second materials.
[0019] According to an embodiment, selectively removing the portion of the first material through the window includes performing a selective etch on the first material. In other words, the etching is performed such that only the first material is etched without etching the third material of the template structure.
[0020] According to an embodiment, replacing the first material with one or more second materials comprises growing the one or more second materials from a seed structure within a template structure of a third material. This is an efficient and precise way of arranging the second material within a photonic crystal structure.
[0021] According to an embodiment, the method further comprises removing the seed structure of the first material after growing the one or more second materials within the template structure. This is particularly advantageous for electrical contacts of the second material(s).
[0022] According to an embodiment, the growth of the one or more second materials is performed by a metal organic chemical vapor deposition (MOCVD), atmospheric pressure CVD, low or reduced pressure CVD, ultra-high vacuum CVD, molecular beam epitaxy (MBE), atomic layer deposition (ALD) or hydride vapor phase epitaxy.
[0023] According to an embodiment of another aspect of the present invention, there is provided a semiconductor device obtainable by the method of the first aspect.
[0024] According to an embodiment of another aspect of the present invention, a semiconductor device is provided, which includes a semiconductor substrate, an insulating layer on the semiconductor substrate, and a photonic crystal structure on the insulating layer. The photonic crystal structure includes a first material in an outer portion of the photonic crystal structure and one or more second materials in a central portion or region, wherein the one or more second materials are epitaxially grown semiconductor materials, which form a gain structure extending in a lateral direction of the substrate.
[0025] According to an embodiment, the photonic crystal structure is a 1-dimensional, 2-dimensional or 3-dimensional photonic crystal lattice.
[0026] According to another embodiment, the semiconductor device may be embodied as an optical resonator or a laser.According to an embodiment, the gain structure may include one or more quantum wells.
[0027] The steps of different aspects of the present invention may be performed in different orders as appropriate. In addition, these steps may also be appropriately combined, that is, for example, two or more steps may be performed together.
[0028] Advantages of features of one aspect of the invention may apply to corresponding features of another aspect of the invention.
[0029] Embodiments of the invention will be described in more detail below by way of illustrative and non-limiting examples with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1a shows a three-dimensional view of an initial structure including a first material layer, Figure 2a The corresponding top view is shown;
[0031] Figure 1b shows a three-dimensional view of a photonic crystal structure formed by patterning a first material layer, Figure 2b The corresponding top view is shown;
[0032] Figure 1c shows a three-dimensional view of the structure after encapsulating the photonic crystal structure with a third material (eg, oxide), Figure 2c The corresponding top view is shown;
[0033] Figure 1d shows a 3D view of the structure after forming windows in the oxide, Figure 2d The corresponding top view is shown;
[0034] Figure 1e showing a three-dimensional view of the structure after selectively removing a portion of the first material through the window, Figure 2e The corresponding top view is shown;
[0035] Figure 1f shows a three-dimensional view of a second material grown from a seed structure of a first material, Figure 2f A corresponding top view is shown; and
[0036] Figure 1g shows a three-dimensional view of the structure after the second material has been electrically contacted, Figure 2g The corresponding top view is shown;
[0037] Figure 3 An exemplary top view of a semiconductor device according to an embodiment of the present invention is shown;
[0038] Figure 4 A scanning electron microscope image showing an exemplary device structure manufactured using a method according to an embodiment of the present invention; and
[0039] Figure 5 A flow chart showing method steps of a method for manufacturing a semiconductor structure according to an embodiment of the present invention. DETAILED DESCRIPTION
[0040] Figure 1a-1g Shown are enlarged three-dimensional views of initial, intermediate, and final structures formed during various stages of a manufacturing method according to an embodiment of the present invention. Figure 2a-2g Shows the corresponding Figure 1a-1g The corresponding enlarged top view of the structure.
[0041] In any or all of the drawings, dimensions may not be drawn to scale and may be shown in simplified and schematic form to illustrate the features and principles of embodiments of the present invention.
[0042] In this document, the terms "on" and "over" are used by convention to indicate an orientation or relative position in a direction perpendicular or normal to a substrate surface (especially the vertical z-direction).
[0043] In this document, the terms "lateral" or "laterally" are used by convention to indicate an orientation generally parallel to the plane of a substrate, as opposed to generally perpendicular or outward from a substrate surface.
[0044] The term "arranged on a semiconductor substrate" should be understood in a broad sense and should include specific embodiments according to which an intermediate layer, such as an insulating layer, is arranged between the substrate and the photonic crystal structure. Therefore, the term "arranged on a substrate" will include the meaning of "located above the substrate".
[0045] Figure 1a is a three-dimensional view of the initial structure 100, Figure 2a 1 is a corresponding top view. The initial structure 100 includes a substrate 110. The substrate 110 is shown by the stripes diagonally upward, which includes semiconductor material and can be, for example, a bulk semiconductor substrate. The substrate 110 can be embodied as a large diameter crystalline semiconductor or compound semiconductor wafer. The substrate can include, for example, a material from Group IV of the periodic table as a semiconductor material. Group IV materials include, for example, silicon, germanium, mixed silicon and germanium, mixed silicon and carbon, mixed silicon germanium and carbon, etc. For example, the substrate 110 can be a crystalline silicon wafer used in the semiconductor industry.
[0046] The structure 100 also includes an insulating layer 111 on the substrate 110, represented by stripes diagonally downward. The insulating layer 111 can be embodied as a dielectric layer, for example. The insulating layer 111 can be formed by known methods, such as thermal oxidation, chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition, chemical solution deposition, MOCVD, evaporation, sputtering and other deposition processes. Examples of such dielectric materials include, but are not limited to: SiO2, Si3N4, Al2O3, AION, Ta2O5, TiO2, La2O3, SrTiO3, LaA103, ZrO2, Y2O3, Gd2O3, MgO, MgNO, Hf-based materials and combinations thereof.
[0047] The structure 100 further comprises a first material layer 112 embodied as a semiconductor material on the insulating layer 111. The first material may in particular be silicon. The first material layer 112 is shown in a 30% dashed pattern.
[0048] The thicknesses of substrate 110 , insulating layer 111 , and layer 112 may be any suitable thicknesses.
[0049] The structure 100 may be embodied in particular as a silicon-on-insulator wafer.
[0050] Figure 1b illustrates a three-dimensional view of structure 101, Figure 2b The corresponding top view is illustrated. The structure 101 includes a photonic crystal structure 113 of a first material (e.g., silicon). The structure 101 is formed by patterning a first material layer 112. This can be performed, for example, by photolithography and subsequent etching. According to an embodiment, the patterning of the layer 112 can be performed by etching based on HBr chemistry. The photonic crystal structure 113 includes a plurality of rods 114 of the first material. The rods 114 are arranged continuously adjacent to each other at a predefined regular distance d. The rods extend in the lateral direction of the substrate 110, more specifically parallel to the xy plane of the substrate 110. Figure 1c illustrates a three-dimensional view of structure 102, Figure 2c The corresponding top view is illustrated. The structure 102 comprises an encapsulation layer 115 encapsulating a photonic crystal structure 113 of a first material. The encapsulation layer 115 comprises a third material, in particular a dielectric material, in particular an oxide. The encapsulation layer 115 will be used as a template structure, which will be further described below. The encapsulation layer 115 completely covers the rod 114. For ease of explanation, in Figure 1c In FIG. 1 h , the encapsulation layer 115 is shown in a transparent manner.
[0051] Figure 1d illustrates a three-dimensional view of structure 103, Figure 2dThe structure 103 includes a window 116 formed by selectively removing a portion of the third material of the encapsulation layer 115 in a predefined portion 120 of the photonic crystal structure 113, such as Figure 2d As shown. Window 116 establishes a window of the first material of photonic crystal structure 113. In other words, window 116 provides an opening to photonic crystal structure 113 within predefined portion 120. Predefined portion 120 is arranged in the central portion of photonic crystal structure 113. More specifically, predefined portion 120 is arranged symmetrically with respect to symmetry axis 121 of the photonic crystal structure, as shown in FIG. Figure 2d The window 116 can be manufactured, for example, by photolithography and etching. The central portion 120 of the photonic crystal structure is surrounded or enclosed by the outer portion 122 of the photonic crystal structure 113, as shown. Figure 2d shown.
[0052] It should be noted that the rods 114 can generally have any desired shape and geometry suitable for the respective application. The rods 114 can also be represented as bars. According to embodiments, the geometry of the rods 114 in the outer portion 122 can be different from the geometry of the rods 114 in the central portion 120. As an example, the rods 114 in the outer portion 122 can have a different length and width than the rods 114 in the central portion 120.
[0053] Figure 1e illustrates a three-dimensional view of structure 104, Figure 2e The corresponding top view is illustrated. In the structure 104, the portion of the first material of the rod 114 in the central portion 120 has been removed through the window 116. The rod 114 has created a cavity or template structure 117 in the third material. However, the rod 114 is not completely removed, and the remaining portion of the rod 114 forms a seed structure 118 for the subsequent growth of one or more second materials in the template structure 117. The selective removal of the first material through the window 116 can be performed by selective etching of the first material, that is, etching the first material but not etching the third material. The appropriate etching technique may depend on the respective first and third materials. Typically, the etching technique is selected so that it etches only the first material and does not etch the third material of the encapsulation layer. In particular, the selective removal can be performed by dry or wet etching of the first material.
[0054] Figure 1f illustrates a three-dimensional view of structure 105, Figure 2fThe corresponding top view is illustrated. In the structure 105, the first material that was removed has been replaced by one or more second materials in a predefined portion 120 of the photonic crystal structure 113 by selective epitaxy. More specifically, the one or more second materials have been grown from a seed structure 118 in a template structure 117 of a third material. The growth of the one or more second materials has been performed in a lateral direction of the substrate 110. The one or more second materials form rods 119 of the second material, which replace the previous rods 114 of the first material in the central portion 120 of the photonic crystal structure 113. The rods 119 of the second material are shown in a 70% dashed pattern.
[0055] The growth of the rods 119 of the second material may be performed by, for example, metal organic chemical vapor deposition (MOCVD), atmospheric pressure CVD, low or reduced pressure CVD, ultra-high vacuum CVD, molecular beam epitaxy (MBE), atomic layer deposition (ALD), or hydride vapor phase epitaxy.
[0056] The second material of the rod 119 may in particular be an optically active material. The second material may be, for example, InP, InGaAs, AlGaAs, GaAs, GaN, InGaN, AlGaN, any other ternary or quaternary alloy thereof, a II-VI semiconductor or a IV semiconductor.
[0057] In general, the versatility of methods according to embodiments of the present invention may allow for any combination of III-V semiconductor materials in the template structure 117, including embedded quantum wells, quantum dots, quantum wires, doped or intrinsic semiconductor layers, and heterojunctions.
[0058] Figure 1g illustrates a three-dimensional view of structure 106, Figure 2g A corresponding top view is illustrated. In the structure 106, electrical contacts 130 have been provided which are in contact with the second material or materials of the rods 119. The rods 119 are illustrated as having a wavy pattern.
[0059] According to further embodiments, depending on the respective application and post-processing, there may be an additional step of removing the seed structure 118 of the first material before the step of providing the electrical contacts.
[0060] The rods 114 (described above) and the corresponding rods 119 can generally have any desired shape and geometry suitable for the corresponding application. Thus, depending on the embodiment, the geometry of the structure of the first material and the geometry of the structure of the second material can be different. For example, the rods 119 of the second material can have a different length and width than the rods 114 of the first material.
[0061] Figure 3An exemplary top view of a semiconductor device 300 according to an embodiment of the present invention is shown. It comprises a photonic crystal structure 313 arranged on an insulating layer 311 of, for example, an SOI wafer. The semiconductor device 300 can be manufactured using the method according to an embodiment of the present invention as described above.
[0062] The photonic crystal structure 313 includes a plurality of Si rods 314 arranged in an outer region 322 of the photonic crystal structure 313 and a plurality of rods 319 of one or more second materials (particularly III-V materials) located in a central region 320 of the photonic crystal structure 313 .
[0063] The plurality of rods 319 in the central region 320 form a gain structure. The rods 319 are embodied as pin structures. The rods 319 have been epitaxially grown and extend in the lateral direction of the substrate and the photonic crystal structure, more specifically, in the y direction of the xy plane. The xy plane is parallel to the underlying substrate ( Figure 3 Thus, rod 319 has an exemplary pin doping profile. Rod 319 is laterally contacted by electrical contacts 330, which are located at Figure 3 The photonic crystal structure 313 is embodied as a 1-dimensional photonic crystal lattice, and a photonic mirror having a gain structure is established in the central portion or in other words in the central region 320 .
[0064] Thus, an embodied gain structure may include a doping profile forming a pin structure. This may facilitate electrical pumping. A pin structure is a structure having an intrinsic region arranged between a p-doped region and an n-doped region.
[0065] In this context, doping is understood as the intentional introduction of impurities into an intrinsic semiconductor in order to adjust its electrical, optical and structural properties. Doping a semiconductor introduces allowed energy states within the band gap, but very close to the energy band corresponding to the type of dopant. Positive or p-type doping introduces free holes in the valence band, while negative or n-type doping introduces free electrons in the conduction band.
[0066] The introduction of dopants has the effect of shifting the energy band relative to the Fermi level. In n-type semiconductors, the Fermi level is close to the conduction band, or within the conduction band in degenerate n-type semiconductors. For p-type, the Fermi level is close to the valence band or within the valence band. Depending on the material and the density of states, the doping density of a typical doped semiconductor ranges from 5×10 18 cm -3 Up to 10 20 cm -3 Although semiconductors are rarely completely intrinsic, they are electrically intrinsic in the sense that they do not conduct electricity. Typically, doping levels of 10 15 -10 16 cm-3 about.
[0067] The pin structure can be grown in a template structure formed by an encapsulating oxide as shown below:
[0068] In the first sub-step, an n-type doped semiconductor layer 351 of a second semiconductor material has been grown in the template structure. In the second sub-step, an intrinsic layer 352 of a second semiconductor material has been grown. And in the third sub-step, a p-doped semiconductor layer 353 of a second semiconductor material has been grown. Semiconductor layers 351, 352 and 353 together form a gain structure of the photonic crystal structure 313.
[0069] According to other embodiments, multiple quantum wells may be grown in the central portion of the photonic crystal structure by sequentially growing multiple semiconductor layers of different semiconductor materials in an alternating manner in the template structure. Different semiconductor materials may have different band gaps to facilitate the formation of quantum wells.
[0070] Figure 4 is a scanning electron microscope image showing an exemplary device structure 400 fabricated using a method according to an embodiment of the present invention. The device structure 400 includes a photonic crystal structure 413, which includes a plurality of Si rods 414 in an outer region 422 of the photonic crystal structure 413 and a plurality of InP rods 419 in a central region 420 of the photonic crystal structure 413. The plurality of InP rods 419 have been fabricated by replacing the Si rods in the central region 420 of the photonic crystal structure 413.
[0071] Since the oxide layer covers the photonic crystal structure 413, the rods 414 and 419 are only visible in shadow.
[0072] Figure 5 A flow chart showing method steps of a method for manufacturing a semiconductor structure according to an embodiment of the present invention.
[0073] At step 510 , a wafer including a first material layer is provided, in particular a silicon-on-insulator wafer.
[0074] At step 520 , the first material layer is patterned, such as by photolithography and etching, to form a photonic crystal structure.
[0075] At step 530, the photonic crystal structure of the first material is encapsulated with a third material, in particular an oxide.
[0076] At step 540, portions of the third material are selectively removed in the central portion of the photonic crystal structure. This provides a window or in other words an opening through the oxide to the first material.
[0077] At step 550, the first material is partially and selectively removed through a window in the central portion or in other words the central region of the photonic crystal structure. This creates a hollow template structure or cavity structure of a third material. However, the first material is not completely removed, but rather is performed so that a portion of the first material remains in the template structure and provides a seed structure for the subsequent growth of one or more second materials.
[0078] At step 560, one or more second materials are grown from the seeds of the first material within the template structure by selective epitaxy. As a result, the first material within the central portion of the photonic crystal structure is replaced by the one or more second materials.
[0079] In step 570, the seed structure of the first material may be removed, for example by etching. Whether this step is useful depends on the respective design of the semiconductor structure and the respective post-processing.
[0080] At step 580, electrical contacts are provided to the structures of the second material that have been formed within the template structure of the third material.
[0081] It should be noted that further processing steps may be performed after step 580 as needed to obtain the desired final device structure.
[0082] Although illustrative examples are given above, it should be understood that the above basic manufacturing steps can be used to produce semiconductor structures of other materials, shapes and sizes. For a given embodiment, suitable materials and processing techniques can be selected, and suitable selections are obvious to those skilled in the art.
[0083] Although specific examples are described above, many other embodiments are contemplated. The seed surface for growing the semiconductor structure may preferably be a crystalline seed surface, but according to other embodiments, may also be provided by an amorphous surface. If the seed has a well-defined crystal orientation, and if the crystal structure of the seed is reasonably matched to the crystal structure of the growing crystal (e.g., a III-V compound semiconductor), the growing crystal may adapt to this orientation. If the seed is amorphous or has an undefined crystal orientation, the growing crystal will be single crystalline, but its crystal orientation will be random.
[0084] The disclosed semiconductor structures and circuits may be used as part of a semiconductor chip. The resulting integrated circuit chip may be distributed by the manufacturer in raw wafer form (i.e., as a single wafer with multiple unpackaged chips), bare die, or packaged form. In the latter case, the chip is mounted in a single-chip package (such as a plastic carrier with leads fixed to a motherboard or other higher-level carrier) or in a multi-chip package (such as a ceramic carrier with one or both of surface interconnects or buried interconnects). In any case, the chip may be integrated with other chips, discrete circuit elements, and / or other signal processing devices as part of an intermediate product such as a motherboard or a final product. The final product may be any product that includes an integrated circuit chip.
[0085] The following definitions and abbreviations are used to interpret the claims and specification. As used herein, the terms "comprises," "comprising," "include," "including," "has," "having," "contain," or "containing," or any other variation thereof, are intended to cover a non-exclusive inclusion. For example, a composition, mixture, process, method, article, or apparatus that includes a list of elements is not necessarily limited to only those elements but may include other elements not expressly listed or inherent to such composition, mixture, process, method, article, or apparatus.
[0086] As used herein, the articles "a" and "an" before an element or component are intended to have no limitation on the number of instances (i.e., the number of occurrences) of the element or component. Therefore, "a" or "an" should be understood to include one or at least one, and the singular form of the element or component also includes the plural form, unless the number obviously means the singular.
[0087] As used herein, the term "quantum well" is a non-limiting term and does not refer only to quantum well embodiments, but may encompass all possible quantum emitting systems, such as quantum dots and quantum wires.
[0088] The term "invention" or "present invention" as used herein is a non-limiting term and does not refer to any single aspect of the particular invention, but encompasses all possible aspects described in the specification and claims.
[0089] The description of various embodiments of the present invention is for illustrative purposes only and is not intended to be exhaustive or to limit the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terms used herein are selected to best explain the principles of the embodiments, practical applications, or technical improvements to technologies found on the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.
Claims
1. A method for manufacturing a semiconductor structure, the method comprising: fabricating a photonic crystal structure of a first material; encapsulating the photonic crystal structure of the first material with a third material; selectively removing portions of the third material within predefined portions of the photonic crystal structure to form windows; selectively removing a first material within a predefined portion of the photonic crystal structure through the window; as well as The first material within the removed predefined portion of the photonic crystal structure is replaced with one or more second materials by selective epitaxy.
2. The method according to claim 1, wherein: The predefined portion of the photonic crystal structure is a central portion of the photonic crystal structure.
3. The method according to claim 1, wherein: Manufacturing the photonic crystal structure comprises: providing a wafer including a first material layer; and The first material layer is patterned to produce the photonic crystal structure of the first material.
4. The method according to claim 3, wherein: The wafer is a silicon-on-insulator wafer, comprising a silicon layer on an insulating layer.
5. The method according to claim 3, wherein: Replacing the first material with one or more second materials includes growing the one or more second materials in a lateral direction of the wafer. 6 . The method of claim 5 , further comprising growing the one or more second materials with a predefined doping profile in a lateral direction of the wafer. 7 . The method of claim 5 , further comprising growing two different second materials in a lateral direction of the wafer to form one or more lateral heterojunctions.
8. The method according to claim 1, wherein: Selectively removing the first material within predefined portions of the photonic crystal structure results in a template structure of the third material, wherein remaining portions of the first material form a seed structure of the one or more second materials.
9. The method according to claim 8, wherein: Selectively removing the predefined portion of the first material through the window includes performing a selective etch of the first material.
10. The method according to claim 8, wherein: Replacing the first material with the one or more second materials includes growing the one or more second materials from the seed structure within the template structure of the third material.
11. The method according to claim 1, wherein: The photonic crystal structure of the first material comprises a plurality of rods of the first material.
12. The method of claim 8, further comprising removing the seed structure of the first material after growing the one or more second materials within the template structure.
13. The method of claim 1, further comprising providing an electrical contact to the one or more second materials.
14. The method according to claim 1, wherein: Patterning the first material includes performing an etch based on HBr chemistry.
15. The method according to claim 1, wherein: The growth of the one or more second materials is performed by one of: metal organic chemical vapor deposition MOCVD, atmospheric pressure CVD, low pressure or reduced pressure CVD, ultra-high vacuum CVD, molecular beam epitaxy MBE, atomic layer deposition ALD, and hydride vapor phase epitaxy.
16. The method according to claim 1, wherein: The one or more second materials are optically active materials.
17. The method according to claim 1, wherein: The one or more second materials are selected from the group consisting of InP, InGaAs, AlGaAs, GaAs, GaN, InGaN, AlGaN, ternary or quaternary alloys thereof, Group II-VI semiconductors, and Group IV semiconductors.
18. The method according to claim 1, wherein: The first material is silicon.
19. The method according to claim 8, wherein: The third material from the seed structure is a dielectric material.
20. The method according to claim 19, wherein: The third material is an oxide.
21. A semiconductor device obtainable by the method according to claim 1.
22. A semiconductor device comprising: Semiconductor substrate; An insulating layer on the semiconductor substrate; as well as A semiconductor structure is formed on the insulating layer by the method according to claim 1.
23. The semiconductor device according to claim 22, wherein: The first material is silicon, and the one or more second materials are selected from the group consisting of: InP, InGaAs, AlGaAs, GaAs, GaN, InGaN, AlGaN, ternary or quaternary alloys thereof, II-VI semiconductors, and IV semiconductors.
24. The semiconductor device according to claim 22, wherein: The one or more second materials include a predefined doping profile in a lateral direction of the substrate.
25. The semiconductor device according to claim 22, wherein: The predefined portion of the photonic crystal structure is a central portion of the photonic crystal structure, the central portion comprising two different semiconductor materials forming a heterojunction in a lateral direction of the substrate.
26. The semiconductor device according to claim 22, wherein: The photonic crystal structure is a one-dimensional, two-dimensional or three-dimensional photonic crystal lattice.
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