System and method for improving pin test coverage of boundary scan test

Abstract

The present invention discloses a system and method for improving the pin test coverage of boundary scan test. A boundary scan interconnection test workstation is electrically connected to a first test pin board and a second test pin board respectively. The boundary scan interconnection test workstation obtains a detection signal corresponding to a test point to be detected from the first test pin board, and determines whether it is turned on according to the detection signal. The boundary scan interconnection test workstation obtains a boundary scan interconnection test result of a boundary scan component of a circuit board to be detected through the second test pin board. The boundary scan interconnection test workstation integrates the conduction determination result of the detection signal with the boundary scan interconnection test result and generates a detection result, thereby achieving the technical effect of improving the pin test coverage of the boundary scan test.

Description

Technical Field

[0001] A testing system and method, in particular, refers to a system and method for improving the pin test coverage of boundary scan testing by using different test pin boards to test pins that can be subjected to boundary scan testing and have power supply and pins that cannot be subjected to boundary scan testing and have no power supply. Background Art

[0002] The existing boundary scan interconnect test workstation is used to test the boundary scan components on the circuit board to be tested. The boundary scan chain established by the boundary scan test program is used to perform data analysis and processing in the boundary scan test program, and finally form a fault judgment criterion for the pin interconnect status.

[0003] The existing boundary scan interconnection test workstation can perform interconnection tests between each connector and the boundary scan chip on the circuit board to be tested, and can detect structural faults, such as faults, short circuits, open circuits, etc.

[0004] The core technology of the existing boundary scan interconnect test workstation is to utilize the boundary scan test technology. However, the boundary scan test technology requires that both ends of the circuit to be tested have boundary scan chips and the boundary scan chips have controllable shift registers (cells). However, if there is no boundary scan chip at one end of the circuit to be tested or the boundary scan chip does not have a controllable shift register, the test cannot be performed according to the existing boundary scan test technology.

[0005] In addition, when the boundary scan interconnect test workstation tests the circuit board to be tested, the circuit board to be tested needs to be tested when there is power supply. The boundary scan interconnect test workstation still has the problem of being unable to test the circuit board to be tested when there is no power supply.

[0006] In summary, it can be seen that the prior art has long had the problem that the boundary scan test of the existing circuit board to be tested can only test the pins of the boundary scan chip with power supply and controllable shift register, so it is necessary to propose improved technical means to solve this problem. Summary of the invention

[0007] In view of the problem in the prior art that the boundary scan test of the existing circuit board to be tested can only detect the pins of the boundary scan chip with power supply and controllable shift register, the present invention discloses a system and method for improving the pin test coverage of the boundary scan test, wherein:

[0008] The pin test coverage rate improving system of boundary scan test disclosed by the present invention is suitable for the detection of boundary scan interconnection test workstation, and comprises: a circuit board to be detected, a first test pin board and a second test pin board.

[0009] The circuit board to be tested is set with multiple test points to be tested by the boundary scan interconnection test workstation, and the test points to be tested cannot be tested by the boundary scan interconnection test; the first test pin board has multiple first test pins, and the first test pins respectively correspond to the positions of the test points to be tested, and the first test pins are respectively electrically connected to the corresponding test points to be tested through the clamp pressing of the boundary scan interconnection test workstation; and the second test pin board provides the boundary scan interconnection test workstation to perform boundary scan interconnection test on the boundary scan components of the circuit board to be tested.

[0010] Among them, the boundary scan interconnection test workstation forms an electrical connection with the first test pin board and the second test pin board respectively, the boundary scan interconnection test workstation obtains the detection signal corresponding to the test point to be detected from the first test pin board, and determines whether it is conductive based on the detection signal, the boundary scan interconnection test workstation obtains the boundary scan interconnection test result of the boundary scan component of the circuit board to be detected through the second test pin board, and the boundary scan interconnection test workstation integrates the conductive determination result of the detection signal with the boundary scan interconnection test result and generates a detection result.

[0011] The method for improving the pin test coverage of boundary scan test disclosed in the present invention comprises the following steps:

[0012] First, a boundary scan interconnect test station sets a plurality of test points to be tested on a circuit board to be tested, and the test points to be tested cannot be tested by a boundary scan interconnect test; then, a first test pin board with a plurality of first test pins is provided, and the first test pin board has a plurality of first test pins, and the first test pins correspond to the positions of the test points to be tested respectively; then, the test pin board is pressed by a clamp of the boundary scan interconnect test station so that the first test pins are respectively electrically connected to the corresponding test points to be tested; then, a second test pin board is provided to the boundary scan interconnect test station to perform a boundary scan interconnect test on the boundary scan element of the circuit board to be tested; then, the boundary scan interconnect test station is electrically connected to the first test pin board and the second test pin board respectively; then, the boundary scan interconnect test station obtains a detection signal corresponding to the test point to be tested from the first test pin board, and determines whether it is conductive according to the detection signal; then, the boundary scan interconnect test station obtains a boundary scan interconnect test result of the boundary scan element of the circuit board to be tested through the second test pin board; finally, the boundary scan interconnect test station integrates the conductive determination result of the detection signal with the boundary scan interconnect test result and generates a detection result.

[0013] The system and method disclosed in the present invention are as described above. The difference between them and the prior art is that the boundary scan interconnection test workstation is electrically connected to the first test pin board and the second test pin board respectively. The boundary scan interconnection test workstation obtains the detection signal corresponding to the test point to be detected from the first test pin board, and determines whether it is conductive based on the detection signal. The boundary scan interconnection test workstation obtains the boundary scan interconnection test result of the boundary scan component of the circuit board to be detected through the second test pin board. The boundary scan interconnection test workstation integrates the conductive determination result of the detection signal with the boundary scan interconnection test result and generates a detection result.

[0014] Through the above technical means, the present invention can achieve the technical effect of improving the pin test coverage of the boundary scan test. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A system block diagram of a system for improving the pin test coverage of boundary scan testing according to the present invention.

[0016] Figure 2 A schematic diagram of a connection structure for improving the pin test coverage of a boundary scan test according to the present invention.

[0017] Figure 3A as well as Figure 3B The present invention is a flow chart of a method for improving the pin test coverage of boundary scan testing.

[0018] Wherein, the reference numerals are:

[0019] 100 Boundary Scan Interconnect Test Station

[0020] 10 Circuit board to be tested

[0021] 11 points to be tested

[0022] 12 Boundary Scan Components

[0023] 13 boundary scan pins

[0024] 20 First test needle board

[0025] 21 First test pin

[0026] 30 Second test needle board

[0027] 31 Second test pin

[0028] Step 101: The boundary scan interconnect test workstation sets a plurality of test points to be tested on the circuit board to be tested, and the test points to be tested cannot be tested by the boundary scan interconnect test.

[0029] Step 102 provides a first test pin board having a plurality of first test pins, wherein the first test pin board has a plurality of first test pins, and the first test pins correspond to the positions of the test points to be tested respectively.

[0030] Step 103: The test pin board is pressed by a fixture of a boundary scan interconnection test workstation so that the first test pins are electrically connected to the corresponding test points to be tested.

[0031] Step 104: The second test needle board provides a boundary scan interconnect test workstation to perform boundary scan interconnect tests on the boundary scan components of the circuit board to be tested.

[0032] Step 105: The boundary scan interconnection test workstation is electrically connected to the first test pin board and the second test pin board respectively.

[0033] Step 106: The boundary scan interconnect test station obtains the detection signal corresponding to the test point to be tested from the first test pin board, and determines whether it is conductive according to the detection signal.

[0034] Step 107: The boundary scan interconnect test workstation obtains the boundary scan interconnect test result of the boundary scan component of the circuit board to be tested through the second test needle board.

[0035] Step 108: The boundary scan interconnect test workstation integrates the conduction determination result of the test signal with the boundary scan interconnect test result and generates a test result. DETAILED DESCRIPTION

[0036] The following will describe the implementation methods of the present invention in detail with reference to the accompanying drawings and examples, so that the implementation process of how the present invention applies technical means to solve technical problems and achieve technical effects can be fully understood and implemented accordingly.

[0037] The following first describes the disclosed system for improving the pin test coverage of the boundary scan test, and then refers to Figure 1 As shown, Figure 1 A system block diagram of a system for improving the pin test coverage of boundary scan testing according to the present invention.

[0038] The present invention discloses a system for improving the pin test coverage of boundary scan testing, which includes: a detection workstation 100 suitable for boundary scan interconnection testing, which includes: a circuit board to be detected 10, a first test pin board 20 and a second test pin board 30.

[0039] Please refer to Figure 2 As shown, Figure 2 A schematic diagram of a connection structure for improving the pin test coverage of a boundary scan test according to the present invention.

[0040] The circuit board 10 to be tested is set with multiple test points 11 to be tested by the boundary scan interconnect test workstation 100. The boundary scan interconnect test workstation 100 sets the test points 11 to be tested in the electronic circuits that cannot be tested by the boundary scan interconnect test. The set test points 11 to be tested are used to detect the conduction of the electronic circuits.

[0041] The first test pin board 20 has a plurality of first test pins 21, and the first test pins 21 correspond to the positions of the test points 11 to be tested, respectively. That is to say, the setting positions of the plurality of first test pins 21 in the first test pin board 20 for different models of circuit boards 10 to be tested may be different, may be partially the same and partially different, or may be completely the same.

[0042] After the boundary scan interconnect test workstation 100 selects the corresponding first test pin board 20 according to the circuit board 10 to be tested, the boundary scan interconnect test workstation 100 uses the pressing of the clamp to make the first test pins 21 of the first test pin board 20 form electrical connections with the corresponding test points 11 to be tested in the circuit board 10 to be tested.

[0043] Since different types of circuit boards 10 to be tested have different locations of boundary scan chips, connectors, etc., the boundary scan interconnect test workstation 100 also needs to select a second test pin board 30 corresponding to the circuit board 10 to be tested, so that the second test pin board 30 provides the boundary scan interconnect test workstation 100 with a boundary scan interconnect test on the boundary scan components of the circuit board 10 to be tested. For the test process of the boundary scan interconnect test workstation 100 performing a boundary scan interconnect test on the boundary scan components of the circuit board 10 to be tested through the second test pin board 30, please refer to the description of the prior art, which will not be repeated in the present invention.

[0044] The boundary scan interconnect test station 100 is electrically connected to the first test pin board 20 and the second test pin board 30 respectively. The boundary scan interconnect test station 100 can be electrically connected through a wire extending from the first test pin 21 of the first test pin board 20, or the first test pin 21 of the first test pin board 20 is connected to a connector through the circuit design of the first test pin board 20, and then the boundary scan interconnect test station 100 is electrically connected to the first test pin board 20 through the connection of the connecting wire and the connector. The second test pin board 30 is connected to each other through the connector and the connecting wire to form an electrical connection between the boundary scan interconnect test station 100 and the second test pin board 30.

[0045] When the boundary scan interconnect test workstation 100 electrically connects the first test pins 21 of the first test pin board 20 with the corresponding test points 11 to be tested in the circuit board 10 to be tested by pressing the fixture, the boundary scan interconnect test workstation 100 can receive the electronic signal of the test point 11 to be tested from the first test pin board 10, and convert the received electronic signal of the test point 11 to be tested into a detection signal corresponding to the test point 11 to be tested, so that the boundary scan interconnect test workstation 100 can determine whether it is conductive based on the detection signal corresponding to the test point 11 to be tested obtained from the first test pin board 20.

[0046] It is worth noting that when the boundary scan interconnect test workstation 100 electrically connects the first test pins 21 of the first test pin board 20 with the corresponding test points 11 in the circuit board 10 to be tested by pressing the clamp, the circuit board 10 to be tested is not powered at this time.

[0047] Next, the boundary scan interconnect test workstation 100 replaces the first test pin board 20 with the second test pin board 30. The second test pin 31 of the second test pin board 30 forms an electrical connection with the boundary scan pin 13 of the boundary scan element 12, so that the boundary scan interconnect test workstation 100 obtains the boundary scan interconnect test result of the boundary scan element 12 of the circuit board 10 to be tested through the second test pin board 30. It is worth noting that when the boundary scan interconnect test workstation 100 obtains the boundary scan interconnect test result of the boundary scan element of the circuit board 10 to be tested through the second test pin board 30, the circuit board 10 to be tested is now powered.

[0048] Then, the boundary scan interconnect test workstation 100 can integrate the conduction determination result of the test signal with the boundary scan interconnect test result to generate a test result.

[0049] Next, the first embodiment will be used to illustrate the operating system and method of the first embodiment of the present invention, and please also refer to Figure 1 as well as Figure 2 As shown, Figure 2 FIG. 4 is a flow chart of a method for improving the pin test coverage of a boundary scan test according to the present invention.

[0050] First, a boundary scan interconnect test workstation sets a plurality of test points to be tested on a circuit board to be tested, and the test points to be tested cannot be tested by a boundary scan interconnect test (step 101); then, a first test pin board with a plurality of first test pins is provided, and the first test pin board has a plurality of first test pins, and the first test pins correspond to the positions of the test points to be tested respectively (step 102); then, the test pin board is pressed by a clamp of the boundary scan interconnect test workstation so that the first test pins are respectively electrically connected to the corresponding test points to be tested (step 103); then, the second test pin board provides the boundary scan interconnect test workstation with a boundary scan on the boundary scan element of the circuit board to be tested. Then, the boundary scan interconnection test workstation is electrically connected to the first test pin board and the second test pin board respectively (step 105); then, the boundary scan interconnection test workstation obtains the detection signal corresponding to the test point to be detected from the first test pin board, and determines whether it is conductive according to the detection signal (step 106); then, the boundary scan interconnection test workstation obtains the boundary scan interconnection test result of the boundary scan component of the circuit board to be detected through the second test pin board (step 107); finally, the boundary scan interconnection test workstation integrates the conductive determination result of the detection signal with the boundary scan interconnection test result and generates a detection result (step 108).

[0051] To sum up, it can be seen that the difference between the present invention and the prior art lies in that the boundary scan interconnect test workstation is electrically connected to the first test pin board and the second test pin board respectively, the boundary scan interconnect test workstation obtains the detection signal corresponding to the test point to be detected from the first test pin board, and determines whether it is conductive based on the detection signal, the boundary scan interconnect test workstation obtains the boundary scan interconnect test result of the boundary scan component of the circuit board to be detected through the second test pin board, and the boundary scan interconnect test workstation integrates the conductive determination result of the detection signal with the boundary scan interconnect test result and generates a detection result.

[0052] This technical approach can solve the problem in the prior art that the boundary scan test of the existing circuit board to be tested can only measure the pin detection of the boundary scan chip with power supply and controllable shift register, thereby achieving the technical effect of improving the pin test coverage of the boundary scan test.

[0053] Although the embodiments disclosed in the present invention are as above, the above contents are not intended to directly limit the scope of patent protection of the present invention. Any technician in the field to which the present invention belongs can make some changes in the form and details of implementation without departing from the spirit and scope disclosed in the present invention. The scope of patent protection of the present invention shall still be based on the content defined in the attached claims.

Claims

1. A system for improving the pin test coverage of a boundary scan test, suitable for testing a boundary scan interconnect test workstation, characterized in that: The system for improving the pin test coverage of boundary scan testing comprises: a circuit board to be tested, wherein the circuit board to be tested is set with a plurality of test points to be tested by the boundary scan interconnect test workstation, and the test points to be tested cannot be tested by the boundary scan interconnect test; a first test pin board, the first test pin board having a plurality of first test pins, the first test pins respectively corresponding to the positions of the test points to be detected, and the first test pins respectively electrically connected to the corresponding test points to be detected by pressing the clamp of the boundary scan interconnect test workstation; and a second test needle board, wherein the second test needle board provides the boundary scan interconnect test workstation with a boundary scan interconnect test on the boundary scan components of the circuit board to be tested; The boundary scan interconnect test station is electrically connected to the first test pin board and the second test pin board respectively, the boundary scan interconnect test station obtains a detection signal corresponding to the test point to be detected from the first test pin board, and determines whether it is conductive according to the detection signal, the boundary scan interconnect test station obtains the boundary scan interconnect test result of the boundary scan component of the circuit board to be detected through the second test pin board, and the boundary scan interconnect test station integrates the conductive determination result of the detection signal with the boundary scan interconnect test result and generates a detection result.

2. The system for improving the pin test coverage of boundary scan testing according to claim 1, wherein: The boundary scan interconnect test workstation obtains the detection signal corresponding to the test point to be detected from the first test pin board, and determines whether it is conductive according to the detection signal. The boundary scan interconnect test workstation receives the electronic signal of the test point to be detected from the first test pin board, and converts the received electronic signal of the test point to be detected into the detection signal corresponding to the test point to be detected.

3. The system for improving the pin test coverage of boundary scan testing according to claim 1, wherein: The boundary scan interconnect test workstation selects the corresponding first test pin board according to the circuit board to be tested so that the clamp of the boundary scan interconnect test workstation is pressed together so that the first test pins are electrically connected to the corresponding test points to be tested.

4. The system for improving the pin test coverage of boundary scan testing according to claim 1, wherein: The boundary scan interconnect test workstation obtains the detection signal corresponding to the to-be-detected test point from the first test pin board, and determines whether it is turned on according to the detection signal. The to-be-detected circuit board does not obtain power supply.

5. The system for improving the pin test coverage of boundary scan testing according to claim 1, wherein: The boundary scan interconnect test workstation obtains the boundary scan interconnect test result of the boundary scan component of the circuit board to be tested through the second test needle board, and the circuit board to be tested obtains power supply.

6. A method for improving the pin test coverage of a boundary scan test, suitable for detection of a boundary scan interconnect test workstation, characterized in that: The method for improving the pin test coverage of the boundary scan test comprises the following steps: The boundary scan interconnect test workstation sets a plurality of test points to be tested on a circuit board to be tested, and the test points to be tested cannot be tested by the boundary scan interconnect test; Providing a first test pin board having a plurality of first test pins, wherein the first test pin board has a plurality of first test pins, and the first test pins respectively correspond to the positions of the test points to be detected; The first test pin board is pressed by a fixture of the boundary scan interconnect test workstation so that the first test pins are electrically connected to the corresponding test points to be tested; A second test needle board provides the boundary scan interconnect test workstation to perform boundary scan interconnect test on the boundary scan components of the circuit board to be tested; The boundary scan interconnect test workstation is electrically connected to the first test pin board and the second test pin board respectively; The boundary scan interconnect test workstation obtains a detection signal corresponding to the test point to be detected from the first test needle board, and determines whether it is conductive according to the detection signal; The boundary scan interconnect test workstation obtains the boundary scan interconnect test result of the boundary scan component of the circuit board to be tested through the second test needle board; and The boundary scan interconnect test workstation integrates the conduction determination result of the detection signal with the boundary scan interconnect test result to generate a detection result.

7. The method for improving the pin test coverage of boundary scan testing according to claim 6, characterized in that: In the step where the boundary scan interconnect test workstation obtains a detection signal corresponding to the test point to be detected from the first test pin board and determines whether it is conductive according to the detection signal, the boundary scan interconnect test workstation receives the electronic signal of the test point to be detected from the first test pin board and converts the received electronic signal of the test point to be detected into the detection signal corresponding to the test point to be detected.

8. The method for improving the pin test coverage of boundary scan testing according to claim 6, characterized in that: The step of pressing the first test pin board through the clamp of the boundary scan interconnect test workstation so that the first test pins are electrically connected to the corresponding test points to be detected is that the boundary scan interconnect test workstation selects the corresponding first test pin board according to the circuit board to be detected so that the clamp of the boundary scan interconnect test workstation is pressed so that the first test pins are electrically connected to the corresponding test points to be detected.

9. The method for improving the pin test coverage of boundary scan testing according to claim 6, characterized in that: The boundary scan interconnect test workstation obtains a detection signal corresponding to the to-be-detected test point from the first test pin board, and in the step of determining whether the to-be-detected circuit board is turned on according to the detection signal, the to-be-detected circuit board does not obtain power supply.

10. The method for improving the pin test coverage of boundary scan testing according to claim 6, characterized in that: In the step where the boundary scan interconnect test workstation obtains the boundary scan interconnect test result of the boundary scan component of the circuit board to be tested through the second test needle board, the circuit board to be tested obtains power supply.

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