Extraction method of thermal sensitive parameters of UHVDC thyristors based on TCAD

Abstract

The present invention discloses a method for extracting thermally sensitive parameters of UHVDC thyristors based on TCAD. The method comprises: using an SDE tool in Sentaurus TCAD to complete UHVDC thyristor modeling; using an Sdevice tool in Sentaurus TCAD to use temperature, anode voltage, gate pulse current peak value, and main circuit resistance as variables to perform multi-operating condition combination simulation on the model; and using an Svisual tool in Sentaurus TCAD to extract thermally sensitive parameters, the thermally sensitive parameters including on-state voltage drop, turn-on current rise rate, and gate control delay time. The method has the advantage of being able to extract thermally sensitive parameters of UHVDC thyristors under the full operating range, thereby providing a reliable data source for tasks such as real-time thyristor junction temperature detection, converter valve current carrying capacity boundary estimation, and safe operation status research.

Description

Technical Field

[0001] The present invention relates to the fields of ultra-high voltage direct current (UHVDC) power transmission and semiconductor devices, and more particularly to a method for extracting thermally sensitive parameters of UHVDC thyristors based on TCAD. Background Art

[0002] The inverse east-west distribution of primary energy and load demand in my country necessitates the development of ultra-high voltage direct current (UHVDC) transmission. The UHV Guquan Station is East China's largest power transmission hub, housing a large-scale converter station with numerous first-of-its-kind devices. During routine operation and maintenance, changes in system power supply methods, equipment overhauls, and the commissioning of new equipment all require corresponding changes in the operating mode of relay protection devices. Consequently, the internal parameter configurations of the converter station must be adjusted to reflect the changing operating mode. Consequently, tasks such as adjusting the operating parameters and setting the thresholds of the secondary control and protection system introduce significant uncertainty into the safe operation of the station's primary equipment, dramatically increasing safety risks in the converter station's operation and maintenance and equipment management processes. Currently, routine control and protection logic modifications at converter stations lack verification methods, making it impossible to perform secondary current and voltage verification like AC systems. More reliable verification methods and testing techniques are urgently needed. The concept of digital twin (DT) integrates popular technologies such as intelligent sensing, cloud platforms, big data analytics, and artificial intelligence. It designs virtual models in a digital space and establishes a real-time mapping relationship between the digital virtual model and the physical entity. This model is required to more realistically, objectively, and comprehensively depict the dynamic and real-time characteristics of the physical entity. The introduction of digital twin models for UHV converter stations facilitates multi-metric monitoring and full lifecycle management of primary and secondary equipment. This allows for on-site equipment maintenance and relay protection parameter debugging while maintaining system operation, significantly improving the control convenience and safety of UHVDC transmission systems.

[0003] Current carrying capacity is one of the most important attributes of a converter station, and its boundaries directly determine the station's power transmission capacity. Previously, calculations of converter station current carrying capacity boundaries employed a crude margin calculation method. Beyond operational safety considerations, these methods lacked a refined descriptive model (typically, a single switch was used to replace a bridge arm consisting of hundreds of thyristors connected in series) and reliable operational status monitoring. Thanks to the development of the digital twin concept and related modeling and sensor technologies, thyristor-level modeling and status monitoring have become possible. Exploring more precise current carrying capacity boundaries based on digital twin technology allows for more efficient utilization of the converter valve's power transmission capacity while ensuring safety, bringing greater flexibility to the development of converter station power transmission plans.

[0004] Power thyristors are core components of converter valve equipment. Due to the series structure of converter valves, the current carrying capacity of a converter station is determined by the maximum current the thyristors can withstand, which in turn is determined by their maximum junction temperature. Limited by the converter valve operating environment and sensing technology, it is difficult to monitor the junction temperature of power thyristors. However, thyristor modeling can effectively monitor the thyristor operating status and junction temperature, further facilitating the exploration of converter station current carrying capacity boundaries.

[0005] With the continuous development of computer-aided tools, finite element analysis (EFA) methods are gradually being used in circuit simulation of power devices. Technology Computer Aided Design (TCAD), a semiconductor process simulation and device simulation tool, is a finite element modeling tool. Its model is based on the underlying physical mechanism and can fully reflect the underlying physical properties of the semiconductor. Using TCAD tools, UHVDC thyristors are modeled and calibrated to reflect the main characteristics of the device. By using simulation methods to obtain the operating characteristics of UHVDC thyristors across the full operating range and extract thermally sensitive parameters, not only can the cost of thermally sensitive parameter extraction be effectively reduced, but the junction temperature-thermal sensitive parameter relationship across the full operating range can also provide a reliable data source for tasks such as real-time thyristor junction temperature detection, current carrying capacity boundary estimation of converter valves, and safe operating status research, thus having important engineering practical value. However, there is currently a lack of methods for extracting thermally sensitive parameters for UHVDC (ultra-high voltage direct current) thyristors. Only a small number of existing technologies mention UHVDC thyristor modeling. For example, Chinese Patent Publication No. CN112948960A discloses a joint simulation method for the effect of high-power microwaves on frequency-modulated fuses. Although it mentions the use of TCAD modeling, it does not explain how to model and how to extract thermally sensitive parameters based on the thyristor model. For example, Chinese Patent Publication No. CN107622172A discloses a chip-device level combined press-fit IGBT temperature field finite element modeling method, which directly imports the model from an external source (ATHENA or DevEdit) and also does not explain how to model and how to extract thermally sensitive parameters based on the thyristor model. Summary of the Invention

[0006] The technical problem to be solved by the present invention is that the existing technology lacks a solution for extracting thermally sensitive parameters of UHVDC thyristors, thereby failing to provide a reliable data source for tasks such as real-time thyristor junction temperature detection, converter valve current carrying capacity boundary estimation, and safe operation status research.

[0007] The present invention solves the above technical problems by the following technical means: a method for extracting thermal-sensitive parameters of UHVDC thyristors based on TCAD, the method comprising:

[0008] Step 1: Use the SDE tool in Sentaurus TCAD to model the thyristor geometry. Use the Sdevice tool to build a characteristic test circuit and perform simulations under specific operating conditions. Based on the simulation results, adjust the model parameters to meet the characteristic specifications, completing the UHVDC thyristor modeling.

[0009] Step 2: Use the Sdevice tool in Sentaurus TCAD to set temperature, anode voltage, gate pulse current peak, and main circuit resistance as variables and perform multi-condition combination simulation on the model.

[0010] Step 3: Use the Svisual tool in Sentaurus TCAD to extract thermally sensitive parameters, including on-state voltage drop, turn-on current rise rate, and gate control delay time.

[0011] The present invention first models the UHVDC thyristor, then uses temperature, anode voltage, gate pulse current peak, and main circuit resistance as variables to perform multi-operating condition combination simulation on the model, and then extracts thermally sensitive parameters to obtain the thermally sensitive parameters of the UHVDC thyristor under the full operating range, providing a reliable data source for real-time thyristor junction temperature detection, converter valve current carrying capacity boundary estimation, and safe operation status research.

[0012] Furthermore, the step 1 includes:

[0013] Step 101: Model the thyristor geometry in the SDE tool integrated with TCAD.

[0014] Step 102: Setting the electrode contact surface and contact material of the thyristor model in the SDE tool;

[0015] Step 103: first apply low-concentration N-type doping to the thyristor model in SDE, and then apply Gaussian doping superposition to complete the division of the anode region, gate region, and cathode region;

[0016] Step 104: Mesh the model in SDE;

[0017] Step 105: Declare the physical parameter model in Sdevice to describe the physical process;

[0018] Step 106: Use quasi-static scanning simulation in Sdevice to verify the static blocking characteristics of the model. If the static blocking characteristics are correct, proceed to the next step. Otherwise, return to step 103 to reduce the doping concentration of the N-drift region and the doping depth of other regions, or increase the overall device size in step 101.

[0019] Step 107: Build a pulse test circuit in Sdevice and use dynamic simulation to verify the dynamic on-off characteristics of the model under gate-level current pulses. If the dynamic on-off characteristics are correct, the UHVDC thyristor modeling is completed. Otherwise, return to step 103 to adjust the doping concentration or doping range of the anode region and gate region.

[0020] Furthermore, the step 101 includes:

[0021] According to the physical dimensions of the thyristor chip or the chip dimensions given in the thyristor device manual, the geometric structure of the thyristor chip is modeled in the SDE tool integrated in TCAD. The geometric structure modeling adopts the unit cell modeling method. The unit cell modeling method saves a lot of computing resources for the very large UHVDC thyristor chip, making it possible to obtain simulation results in a shorter time. The unit cell modeling method requires the calculation of the area factor, which is calculated by the formula Calculate the area factor, where V is the volume of the thyristor in μm. 3 , S is the cross-sectional area of ​​its complete cross section, in μm 2 , the 1 in the denominator means that in the actual simulation, the size of the 2D model in the Z-axis direction is 1μm. The area factor links the macroscopic external characteristics of the model with the external characteristics of the unit cell. In fact, the device can be understood as being formed by a large number of unit cells "in parallel". The simulation only calculates various physical quantities within a unit cell of several hundred cubic μm. By multiplying the partial quantities by the area factor, the physical quantities of each part of the entire device are obtained, thereby speeding up the simulation calculation. The area factor is implemented by declaring the value of the AreaFactor keyword in the simulation code, such as: AreaFactor=1e6. At this time, the simulation unit cell volume is 400μm^3, and the corresponding simulation physical volume is 4e8μm^3, that is, a 0.4cm^3 silicon chip.

[0022] Furthermore, the step 102 includes:

[0023] In the SDE tool, the thyristor model is divided from top to bottom into the cathode, gate, base, and anode regions. The entire lower surface of the anode region in the X-axis direction is set as the anode contact, the entire upper surface of the cathode region in the X-axis direction is set as the cathode contact, and the upper surface of the gate region in the X-axis direction is set as the gate contact. A 15% surface area is left between the gate and cathode contacts as a non-contact area, and the contact material is set to aluminum. The X-axis represents the width of the thyristor model, and the Y-axis represents the thickness of the thyristor model. The 15% surface area between the gate and cathode contacts is primarily intended to prevent the gate pulse from effectively spreading, preventing the positive feedback required for thyristor turn-on, and thus preventing the model from simulating the thyristor turn-on process. The 15% parameter was chosen because it is a relatively universal value. Designing the contact area based on this value ensures the correct gate triggering positive feedback mechanism for models of varying sizes. Leaving too much space, such as 30%, will inevitably lead to uneven internal electric field distribution, affecting the accuracy of subsequent device characteristic simulations. If it is too small, such as 5%, it will definitely lead to incomplete gate triggering, which will cause the model to fail to reflect the triggering and conduction mechanism. The specific value range is set according to the actual situation.

[0024] Furthermore, the step 103 includes:

[0025] The SDE tool first applies a low-concentration uniform N-type doping to the entire geometry. A Gaussian doping baseline is then set at the boundaries of each region away from the center. Finally, based on this Gaussian doping baseline, Gaussian doping is applied toward the N-drift region, with P-type doping applied to the anode and gate regions and N-type doping applied to the cathode region. The N-drift region is pre-set to have a thickness of approximately 70% of the model thickness, the P+ anode region to approximately 3% of the model thickness, the P gate region to approximately 25% of the model thickness, and the N+ cathode region to approximately 2% of the model thickness. The doping depth is the pre-set thickness for each region.

[0026] Furthermore, the step 104 includes:

[0027] In the non-PN junction direction, the maximum mesh size is set to 1 / 8 of the device size in that direction. In the PN junction direction, the maximum mesh size is set to approximately 1 / 30 of that direction. The minimum mesh size is used at the PN junction and electrode contact, and the mesh size at the minimum mesh size is set to expand at a rate of 1.3 times the maximum mesh size away from the PN junction. This mesh setting scheme is suitable for models of various sizes. Because the mesh is mainly concentrated at the contact between different doping regions and the mesh is relatively sparse in other areas, it can ensure the accuracy of electrical characteristic calculations with limited computing resources.

[0028] Furthermore, the step 105 includes:

[0029] The Physics section in the Sdevice code area declares the physical parameter models used for simulation and solution. The physical parameter models are the mobility model, the carrier transport model, and the carrier generation and recombination model. The mobility model at least declares the default doping model and carrier saturation model of silicon, the carrier transport model at least declares the bandgap narrowing model, and the carrier generation and recombination model at least declares the SRH recombination, Auger recombination, and avalanche ionization models. The lack of physical models will result in the model's characteristics not matching the device under certain specific operating conditions. Declaring too many physical models will make it difficult for the numerical solution to converge, and it will be impossible to obtain a TCAD model that can be used for characteristic simulation. The present invention declares several physical models related to the TCAD model in the above manner, making it easy to quickly obtain a TCAD model that can be used for characteristic simulation.

[0030] Furthermore, the step 106 includes:

[0031] Use Sdevice's Quasi stationary quasi-static scanning method to verify the static blocking characteristics of the model. Set the initial anode voltage condition to 0 and set a two-step Quasi stationary solution boundary condition. The first solution boundary condition is an anode voltage of 1 kV, and the second solution boundary condition is an anode voltage of -1 kV. Observe the anode current-anode voltage curve in the simulation results. If the anode current does not exceed 50 mA, the forward blocking characteristic is considered correct and proceed to the next step. Otherwise, reduce the N-drift region doping concentration in step 3 and the doping depth of other regions. If the static blocking characteristic cannot be achieved even after the N-drift region doping concentration is reduced to 10-10 level, reduce the Gaussian doping depth of the gate region and anode region by 10% each time to increase the thickness of the N-drift region. If the thickness of the gate region and anode region is already less than 1% of the total model thickness, return to step 1 and increase the thickness of the entire model to increase the overall device size.

[0032] Furthermore, the step 107 includes:

[0033] Add the system part in the Sdevice code area, and use the node table in the system part to build a pulse test circuit consisting of a main loop with an external 1Ω resistor load and a gate pulse loop with an external 0.1Ω current-limiting resistor. Use the Sdevice Transient dynamic simulation solution method to simulate the activation of the model. First, set the piecewise linear model of the anode voltage source. The sorting linear model only needs to declare the inflection points in the waveform. The Sdevice system will automatically take values ​​based on the line segments connecting the points for the rest. The inflection points of the piecewise linear model of the anode voltage source are 0, 1kV, and -1kV. The anode voltage source rises from 0 to 1kV within a certain period of time, lasts for a certain period of time, and then drops to -1kV within a certain period of time. The certain period of time is a preset time.

[0034] Then, a piecewise linear model of the gate voltage source is set. The gate voltage source has a transient pulse waveform during the period when the anode voltage source lasts for 1 kV. The pulse also lasts for a period of time and returns to zero before the anode voltage starts to drop.

[0035] Observe the anode current-time curve and gate current-time curve in the simulation results. If the anode current rises rapidly to 1 kA after the gate current pulse is applied and remains at 1 kA after the gate transient pulse returns to zero, the dynamic switching characteristics of the model are considered correct, and the UHVDC thyristor modeling is completed. If there are problems with the above characteristics, return to step 103 to adjust the doping concentration or doping range of the anode and gate regions.

[0036] Furthermore, the step 2 includes:

[0037] Set the thyristor operating temperature to 0-90℃, and the temperature variable sequence to [0,10,20,30,40,50,60,70,80,90];

[0038] If the rated voltage of the thyristor is set to 8500V, the anode voltage variable sequence is [500, 1000, 2000, 3000, 4000, 5000, 6000, 7000, 8000, 8500];

[0039] If the thyristor gate trigger range is set to 2-10A, the gate pulse current peak variable sequence is [2, 4, 10];

[0040] Set the thyristor rated on-state current to 5500A and the main circuit resistance value sequence to [0.8, 1, 1.2, 1.5];

[0041] In Sentaurus TCAD, the Sdevice tool is used to randomly select values ​​from the variable sequence corresponding to temperature, anode voltage, gate pulse current peak, and main circuit resistance to perform multi-condition combination simulation on the model.

[0042] Furthermore, the step three includes:

[0043] Use the create_curve command in the TCL code of the Svisual tool to draw a curve with time as the x-axis and anode current, anode voltage, and gate current as the y-axis. Read the maximum gate current in the gate current-time curve and store it in the variable I gm , as the current gate pulse current peak operating condition parameter; read the maximum anode current in the anode current-time curve and store it in the variable I d As the current on-state current working condition parameter; 0.1I d and 0.9Id Store them as variables I1 and I2 respectively, read the abscissa time corresponding to I1 and I2 in the anode current-time curve, store them as variables t1 and t2 respectively, Stored as variable didt, as the turn-on current rise rate under the current working condition;

[0044] Read the minimum anode voltage in the anode voltage-time curve and store it as variable V drop , as the on-state pressure drop under the current working condition;

[0045] Read the maximum anode voltage in the anode voltage-time curve and store it as variable V D , 0.9V D Stored as variable V1, read the horizontal coordinate corresponding to V1 in the anode voltage-time curve and store it as variable t3, calculate the difference between t3 and the peak arrival time of the gate pulse current, and store it as variable t d , as the gate control delay time under the current working conditions.

[0046] Furthermore, the method further comprises:

[0047] Step 4: Use LiberOffice to convert the data extracted by the Svisual tool into a .CSV file and export it to the Linux system.

[0048] The advantages of the present invention are:

[0049] (1) The present invention first models the UHVDC thyristor, then uses temperature, anode voltage, gate pulse current peak, and main circuit resistance as variables to perform multi-operating condition combination simulation on the model, and then extracts the thermally sensitive parameters to obtain the thermally sensitive parameters of the UHVDC thyristor under the full operating range, providing a reliable data source for real-time thyristor junction temperature detection, converter valve current carrying capacity boundary estimation, and safe operation status research.

[0050] (2) The present invention sets the operating condition variable sequence such as temperature, anode voltage, gate pulse current peak, main circuit resistance, etc. according to the rated range of the device and the required accuracy of the simulation, and performs multi-operating condition combination simulation on the model, so that the model is simulated under the full operating condition range, which is convenient for the later extraction of thermal sensitive parameters under the full operating condition range.

[0051] (3) For high-power semiconductor devices, the traditional experimental method for extracting thermal sensitive parameters is limited by factors such as experimental conditions and experimental costs. It is difficult to obtain reliable and large amounts of junction temperature-thermal sensitivity relationship data, and it cannot be directly used in engineering practice applications. However, the method of the present invention can obtain the UHVDC thyristor junction temperature thermal sensitivity parameters under the full operating range, and can provide data support for key tasks such as the current carrying capacity boundary calibration and operation status evaluation of the UHVDC converter valve at the thyristor level.

[0052] (4) The present invention adopts SDE tools for modeling. It does not require the existing internal structure of the device or the existing TCAD model of the device. Instead, it relies on the semiconductor physics principles and the external characteristics given in the device data manual to build a UHVDC thyristor model that meets the static blocking characteristics and dynamic on-off characteristics. It can realize the monitoring of thyristors in the converter station and promote the exploration of the current carrying capacity boundary of the converter station.

[0053] (5) If the surface size between the cathode and the gate is too large, it will lead to uneven distribution of the internal electric field, causing the accuracy of the subsequent device characteristic simulation. If the surface size between the cathode and the gate is too small, it will lead to incomplete triggering of the gate, and then the model will not be able to reflect the triggering conduction mechanism. The present invention leaves a non-contact area of ​​about 15% of the surface size between the cathode and the gate to prevent the gate pulse from being unable to spread effectively, prevent the positive feedback of the thyristor from being unable to turn on, and avoid the model from being unable to simulate the thyristor turn-on process.

[0054] (6) The grid setting method proposed in the present invention selects different densities for different areas. Small-sized (high-density) grids are used for different doping contact areas (i.e., near PN junctions) that mainly affect the electrical characteristics of the device, thereby ensuring the accuracy of subsequent electrical characteristics simulation. Large-sized (low-density) grids are used in other areas to increase the calculation speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] Figure 1 Flowchart of a method for extracting thermal-sensitive parameters of UHVDC thyristors based on TCAD provided in an embodiment of the present invention;

[0056] Figure 2 A modeling flow chart of the TCAD-based UHVDC thyristor thermal sensitivity parameter extraction method provided in an embodiment of the present invention;

[0057] Figure 3 A schematic diagram of the geometric structure and contact settings of the thyristor model in the TCAD-based UHVDC thyristor thermal sensitivity parameter extraction method provided in an embodiment of the present invention;

[0058] Figure 4 Schematic diagram of the regions and contact division of the thyristor model in the TCAD-based UHVDC converter valve thyristor modeling method provided in Example 1 of the present invention;

[0059] Figure 5 The doping distribution diagram of the thyristor model in the TCAD-based UHVDC thyristor thermal sensitivity parameter extraction method provided in an embodiment of the present invention;

[0060] Figure 6A grid division distribution diagram of a thyristor model in the TCAD-based UHVDC thyristor thermal sensitivity parameter extraction method provided in an embodiment of the present invention;

[0061] Figure 7 Schematic diagram of a thyristor static characteristic simulation circuit in a TCAD-based UHVDC thyristor thermal-sensitive parameter extraction method provided in an embodiment of the present invention;

[0062] Figure 8 This is a diagram showing the simulation results of the static characteristics of a thyristor in the TCAD-based UHVDC thyristor thermal-sensitive parameter extraction method provided by an embodiment of the present invention;

[0063] Figure 9 Schematic diagram of a thyristor dynamic characteristics simulation circuit in a TCAD-based UHVDC thyristor thermal-sensitive parameter extraction method provided in an embodiment of the present invention;

[0064] Figure 10 This is a diagram showing the simulation results of the dynamic characteristics of a thyristor in the TCAD-based UHVDC thyristor thermal-sensitive parameter extraction method provided in an embodiment of the present invention;

[0065] Figure 11 Schematic diagram of temperature and combined working condition simulation settings in the TCAD-based UHVDC thyristor thermal sensitive parameter extraction method provided by an embodiment of the present invention;

[0066] Figure 12 The thermal sensitive parameter extraction effect diagram of the UHVDC thyristor thermal sensitive parameter extraction method based on TCAD provided by the embodiment of the present invention;

[0067] Figure 13 This is a schematic diagram of a full-operating-range thermal-sensitive parameter data set extracted in the TCAD-based UHVDC thyristor thermal-sensitive parameter extraction method provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0068] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0069] like Figure 1 As shown, the present invention provides a method for extracting thermal sensitive parameters of UHVDC thyristors based on TCAD, which mainly includes the following steps:

[0070] S1: Use the SDE tool in Sentaurus TCAD to model the geometric structure of the thyristor, use the Sdevice tool to build a characteristic test circuit and perform specific working condition simulation, adjust the model parameters according to the simulation results to make it meet the characteristic indicators, and complete the UHVDC thyristor modeling; the focus of the present invention is not on the UHVDC thyristor modeling, but on simulating the model after modeling and extracting thermal sensitive parameters. The method for modeling the UHVDC thyristor can adopt the modeling method described in the patent literature in the background technology of the present invention or the modeling method of the present invention. The flow chart of the modeling method of the present invention is as follows: Figure 2 As shown, the specific implementation is as follows:

[0071] The thyristor KP55Y8502N used in the converter valve of the Guquan ±1100kV UHVDC transmission converter station was modeled and tested. According to the modeling process proposed in the present invention, a UHVDC thyristor TCAD model was established that can withstand 8.5kV positive and reverse anode voltages and simulate dynamic characteristics.

[0072] First, create a new project in Sentaurus TCAD and add the SDE tool.

[0073] Referring to the cross-section of a general cylindrical thyristor chip, create a rectangle with a width of 400μm and a thickness of 1240μm, and declare its material to be "Silicon". In the SDE tool, divide the thyristor model from top to bottom into the cathode region, gate region, base region, and anode region, and set the lower surface of the anode region in the X-axis direction as the anode contact, the upper surface of the cathode region in the X-axis direction as the cathode contact, and the upper surface of the gate region in the X-axis direction as the gate contact, where 15% of the surface size is left between the gate contact and the cathode contact as an electrode-free contact area, and the contact material is set to aluminum. Specifically, create a silicon rectangle with a width of 180μm and a thickness of 10μm on one side of the rectangle as the cathode contact. The created geometric structure diagram is as follows: Figure 3 As shown. Figure 4 As shown, if the areas are divided according to the actual modeling size, the base area is very thick and the other areas are very thin, resulting in the contact setting not being clearly displayed. Therefore, in order to clearly see the specific positions of the gate contact, cathode contact, and anode contact, the following diagram is drawn: Figure 4 Schematic diagram to describe the contact partitioning, Figure 4 Where L1 represents the X-axis dimension of the thyristor model, L2 represents the X-axis dimension of the cathode region, the X-axis is the width direction of the thyristor model, and the Y-axis is the thickness direction of the thyristor model. Figure 4 The dimensions shown are not actual dimensions. Figure 41 is the cathode contact, 2 is the gate contact, 3 is the anode contact, 4 is the cathode region, 5 is the gate region, 6 is the base region, and 7 is the anode region.

[0074] Use the "find-face-id" statement to retrieve the contact boundary locations. Set the anode contact on the face at point (200,1250). Set the gate contact on the face at point (40,10), and the cathode contact on the face at point (200,0). The gate contact width is 80 μm, with a 30 μm non-contact area reserved between the gate and cathode. The anode contact width is 400 μm, which is the entire surface on the other side of the gate-cathode face. Figure 5 , the purple bars at the upper and lower boundaries of the geometry are contacts.

[0075] Create a 2D region of 401 μm × 1251 μm covering a rectangular silicon area and assign it the command "R.Global" to serve as the doping application region. Apply doping to the model using empirical parameters and reference parameters. Specifically, the maximum and minimum doping concentrations and doping ranges for each region used in this example are shown in Table 1.

[0076] Table 1 Doping related parameters

[0077] Region Name Doping type Doping range / μm Maximum doping concentration Minimum doping concentration P+ anode region Gaussian doping (boron) 18 1e18 2e16 N-drift region Uniform doping (phosphorus) 1240 1e13 1e13 P gate region Gaussian doping (boron) 130 2e16 1e13 N+ cathode region Gaussian doping (phosphorus) 12 1e20 2e16

[0078] After doping, an N-drift region with a thickness of 1092μm, a P+ anode region with a thickness of 18μm, a P gate region with a thickness of 130μm (the portion of the region in contact with the N+ cathode region has a 2μm thickness affected by the doping of the N+ cathode region), and an N+ cathode region with a thickness of 12μm are actually formed. The doping result diagram is shown in the figure below. Figure 5 shown.

[0079] Use the area "R.Global" as the applied mesh area. According to the mesh division standard, set the maximum mesh size in the X-axis direction to 50μm (400*1 / 8=50), the maximum mesh size in the Y-axis direction to (1240*1 / 30≈40), and the maximum mesh size in the Z-axis direction to 1μm. The minimum mesh size in each coordinate axis direction is 1μm. A minimum mesh of 1μm×1μm×1μm is set at the junction of different doping concentrations. Declare the keywords "Maxlatent" and "Doubleside" to indicate the bidirectional expansion of the mesh, and declare "1.3" as the expansion rate. The mesh division results are as follows: Figure 6 shown.

[0080] Add the Sdevice tool to the project for declaring physical parameter models, setting solution methods, and simulating characteristics.

[0081] In the file section of the Sdevice code area, specify Grid as the .tdr file generated by SDE, specify Plot as the .plot file generated by SDE, specify Plot as the .tdrdat file generated by SDE, and specify Output as the default .log file.

[0082] In the Physics section of the Sdevice code area, declare the physical parameter models used for the simulation. Use the physical parameter model keywords to declare the default silicon doping model (DopingDependent), carrier saturation model (High-Field Saturation), bandgap narrowing model (Bandgapnarrowing), SRH recombination (SRH recombination), Auger recombination (Auger), and avalanche ionization model (eAvalanche).

[0083] In the Electrode section of the Sdevice code area, set the initial voltage conditions of the anode, cathode, and gate contacts to 0, and declare the contact material to be Aluminum.

[0084] In the Math section of the Sdevice code area, declare the automatic solution failure exit keyword (Extrapolate), declare the maximum number of iterations to be 50 (Iterations = 50), and declare the numerical solution method to be ParDiso (Method = ParDiso).

[0085] In the Solve section of the Sdevice code area, use the Quasi stationary solver macro code. Set the Goal of the first solver code to: {name="anode"Voltage=1000}, and the Goal of the second solver code to: {name="anode"Voltage=-1000}. Other simulation settings can use the macro default settings. The equivalent simulation circuit diagram is as follows: Figure 7 shown.

[0086] After the simulation is completed, use Svisual software to open the .plt file under the Sdevice case block, draw the simulation result graph with the anode voltage (Anode Outer Voltage) as the horizontal axis and the anode current (Anode Total Current) as the vertical axis. The correct simulation result is as follows Figure 8 As shown in the figure, the model has a leakage current of only 50mA under the anode withstand voltage of -8500V to 8500V, which proves that the model has the forward and reverse anode voltage blocking capability of the thyristor.

[0087] Add a second Sdevice tool to the project for dynamic on-off characteristic simulation.

[0088] Add the system section in the Sdevice code area and use the node table in the system section to build Figure 9 The simulation circuit shown. Each component in the circuit uses a self-named node number to indicate its connection location. The resistance of the resistor component is directly declared in the parameter section. The anode voltage source V d and gate voltage source V g The parameter part of the waveform is described using a piecewise linear model (pwl). The piecewise linear model only needs to declare the inflection point in the waveform, and the system will automatically take the value of the rest according to the line segment between the points. d Set as a variable (declare V d =@V d @). Anode voltage source voltage V d The voltage is set to 8500 V using the Quasistationary method. By stating {pwl = (0 0 100 0 100.1 1150 1 180 0)} in the gate voltage source parameter section, we can indicate a gate pulse with a peak value of 1 V that occurs at t = 100 μs, has a rise time of 0.1 μs, a peak duration of 50 μs, a total duration of 80 μs, and a peak value of 1 V.

[0089] In the Math section of Sdevice, declare the transient solution keyword (Transient=BE).

[0090] In the Solve section of Sdevice, use the Transient solver macro code, set the final simulation time to 250 μs, use the default settings for other parameters, and run the simulation.

[0091] After the simulation is completed, use Svisual software to open the .plt file under the Sdevice case block, and draw the simulation result graph with time as the horizontal axis and anode current (Anode Total Current) as the vertical axis. The correct simulation result is as follows Figure 10 As shown in the figure, at t = 100 μs, the thyristor is successfully turned on by the gate pulse, and the anode current reaches approximately 8500 A, which is consistent with the main circuit voltage source and impedance settings. After t = 180 μs, the gate pulse is removed, and the thyristor model remains on.

[0092] In summary, it can be considered that the TCAD model can correctly reflect the static forward and reverse blocking characteristics and dynamic turn-on characteristics of the UHVDC thyristor, and realize the UHVDC thyristor modeling based on physical mechanisms.

[0093] S2: Using the Sdevice tool in Sentaurus TCAD, temperature, anode voltage, gate pulse current peak, and main circuit resistance are set as variables to perform multi-condition combination simulation on the model.

[0094] In the physics module of the Sdevice code area, set the temperature to 90°C (363K, which is the maximum operating temperature given in the data sheet and is also the standard junction temperature for most rated parameters). Other parameter settings can be given by default. In Sentaurus Workbench, right-click under the sdevice tool and select "Add parameter" to add the variable V d , and add the voltages to be simulated (1000V, 2000V, 3000V, ... 8000V) in the "List of Value" column. Since the main circuit resistance is set to 1Ω and the thyristor's voltage drop in the on-state is very small, the simulation obtains thyristor turn-on waveforms with on-state currents of 1000A, 2000A, 3000A, ... 8000A.

[0095] Create a new Sdevice tool again, using the same simulation settings as in the characterization test. In the Physics section, declare the keyword "Temperature = @Temperature@," setting the temperature as a variable. Similarly, set the anode voltage source excitation value to "Vdc = @Vdc@," the gate trigger pulse peak value to "Vg = @Vg@," and the main circuit resistance value to "Rg = @Rg@." Within this Sdevice tool, add a sequence of variables in any order, assigning values ​​to the sequence based on the rated voltage, current, and gate trigger range specified in the datasheet. In this embodiment, the operating temperature given in the thyristor data sheet is 0-90°C, and the set temperature variable sequence is: [0, 10, 20, 30, 40, 50, 60, 70, 80, 90]; the rated voltage given in the thyristor data sheet is 8500V, and the set anode voltage excitation variable sequence is: [500, 1000, 2000, 3000, 4000, 5000, 6000, 7000, 8000, 8500]; the gate trigger range given in the thyristor data sheet is 2-10A, and the set gate trigger pulse peak variable sequence is: [2, 4, 10]; the rated on-state current given in the thyristor data sheet is 5500A. Considering the simulation requirement of 1.5 times the load, the set main circuit resistance value sequence is: [0.8, 1, 1.2, 1.5]. The simulation settings are as follows: Figure 11 As shown, the simulation is run to obtain a total of 1200 sets of simulation results.

[0096] S3: Use the Svisual tool in Sentaurus TCAD to extract thermally sensitive parameters, including on-state voltage drop, turn-on current rise rate, and gate control delay time.

[0097] Create a new Svisual tool and use the create_curve command in the TCL code of the Svisual tool to draw a curve with time as the x-axis and anode current, anode voltage, and gate current as the y-axis. Use the Doe:$ statement to directly read the temperature and anode voltage preset in step (5); use the ext::ExtractExtremum command to read the maximum value of the gate current-time curve and store it in the variable I gm As the current gate pulse current peak operating condition parameter; use the ext::ExtractExtremum instruction to read the maximum anode current and store it in the variable I d As the current on-state current condition parameter; use the expr statement to calculate and convert 0.1I d and 0.9I d Store to I1, I2, use ext:ExtractValue instruction to read the abscissa time corresponding to I1 and I2 in the anode current-time curve, store it in variables t1, t2, use expr statement to calculate and Stored in the variable didt as the turn-on current rise rate under the current working condition; use the ext::ExtractExtremum instruction to read the minimum anode voltage and store it in the variable V drop In the current working condition, it is used as the on-state voltage drop; use the ext::ExtractExtremum instruction to read the maximum anode voltage and store it in the variable V D In the example, use the expr statement to calculate and convert 0.9V D Store it in variable V1. Use the ext:ExtractValue command to read the horizontal coordinate corresponding to V1 in the anode voltage-time curve and store it in variable t3. Use the expr command to calculate the difference between t3 and the gate pulse peak arrival time set in step (3) and store it in variable t d In the current working condition, it is used as the gate control delay time. The Tcl automatic data extraction effect is as follows: Figure 12 shown.

[0098] S4: Use LiberOffice to extract the data from the Svisual tool and save it as a .CSV file, then export it to the Linux system.

[0099] In the Sentaurus Workbench toolbar, click "openviewinaspreadsheet" to call out LiberOffice. In the Fields column of the pop-up window, expand the selection range to 1201 rows to generate a .CSV file containing all the contents in Sentaurus Workbench. Delete the first four columns in the .CSV file (which are occupied by simulation cases and do not contain useful values) to obtain a data set of thermally sensitive parameters for the KP55Y8502N thyristor's on-state voltage drop, turn-on current rise rate, and gate control delay time under the full operating range. A schematic diagram of some of the obtained data is shown below. Figure 13 As shown in the figure, the .CSV file is moved out of the Linux system where Sentaurus TCAD is located by copying the data for further data analysis.

[0100] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A TCAD-based UHVDC thyristor thermal sensitivity parameter extraction method is characterized by: The method comprises: Step 1: Use the SDE tool in Sentaurus TCAD to model the thyristor geometry, use the Sdevice tool to build a characteristic test circuit and perform specific operating condition simulation, adjust the model parameters based on the simulation results to meet the characteristic indicators, and complete the UHVDC thyristor modeling. Step 1 includes: Step 101: Model the thyristor geometry in the SDE tool integrated with TCAD. Step 102: Setting the electrode contact surface and contact material of the thyristor model in the SDE tool; Step 103: first apply low-concentration N-type doping to the thyristor model in SDE, and then apply Gaussian doping superposition to complete the division of the anode region, gate region, and cathode region; Step 104: Mesh the model in SDE; Step 105: Declare the physical parameter model in Sdevice to describe the physical process; Step 106: Use quasi-static scanning simulation in Sdevice to verify the static blocking characteristics of the model. If the static blocking characteristics are correct, proceed to the next step. Otherwise, return to step 103 to reduce the doping concentration of the N-drift region and the doping depth of other regions, or increase the overall device size in step 101. Step 107: Build a pulse test circuit in Sdevice and use dynamic simulation to verify the dynamic on-off characteristics of the model under gate-level current pulses. If the dynamic on-off characteristics are correct, the UHVDC thyristor modeling is completed. Otherwise, return to step 103 to adjust the doping concentration or doping range of the anode region and gate region. Step 2: Use the Sdevice tool in Sentaurus TCAD to simulate the model under multiple operating conditions, using temperature, anode voltage, gate pulse current peak, and main circuit resistance as variables. Step 3: Using the Svisual tool in Sentaurus TCAD to extract thermally sensitive parameters, including on-state voltage drop, turn-on current rise rate, and gate control delay time; Step 3 includes: Use the create_curve command in the TCL code of the Svisual tool to draw a curve with time as the x-axis and anode current, anode voltage, and gate current as the Y-axis. Read the maximum gate current in the gate current-time curve and store it as a variable I gm , as the current gate pulse current peak operating condition parameter; read the maximum anode current in the anode current-time curve and store it in the variable I d As the current on-state current working condition parameter; 0.1 I d and 0.9 I d Stored as variables I 1, I 2. Read the anode current-time curve I 1 and I 2 corresponding to the horizontal axis time, respectively stored as variables t 1, t 2. Store as a variable didt , as the turn-on current rising rate under the current working condition; Read the minimum anode voltage in the anode voltage-time curve and store it as variable V drop , as the on-state pressure drop under the current working condition; Read the maximum anode voltage in the anode voltage-time curve and store it as a variable V D , change 0.9 V D Store as a variable V 1. Read the anode voltage-time curve V 1 corresponding to the horizontal coordinate and stored as a variable t 3. Calculation t 3 and the difference between the gate pulse current peak arrival time and stored as a variable t d , as the gate control delay time under the current working conditions.

2. The method for extracting thermal sensitive parameters of UHVDC thyristors based on TCAD according to claim 1, characterized in that: The step 102 includes: In the SDE tool, the thyristor model is divided into cathode, gate, base, and anode regions from top to bottom. The lower surface of the anode region in the X-axis direction is set as the anode contact, the upper surface of the cathode region in the X-axis direction is set as the cathode contact, and the upper surface of the gate region in the X-axis direction is set as the gate contact. A 15% surface area is left between the gate contact and the cathode contact as a non-electrode contact area, and the contact material is set to aluminum. The X-axis is the width direction of the thyristor model, and the Y-axis is the thickness direction of the thyristor model.

3. The method for extracting thermal sensitive parameters of UHVDC thyristors based on TCAD according to claim 1, characterized in that: The step 103 includes: In the SDE tool, a low-concentration N-type uniform doping is first placed on the entire geometric structure, and then a Gaussian doping baseline is set on the boundary of each area away from the center. Finally, based on the Gaussian doping baseline, Gaussian doping is applied toward the N-drift region, where P-type doping is applied to the anode and gate regions, and N-type doping is applied to the cathode region.

4. The method for extracting thermal sensitive parameters of UHVDC thyristors based on TCAD according to claim 1, characterized in that: The step 104 includes: In the non-PN junction direction, the maximum grid size is set to 1 / 8 of the device size in this direction. In the PN junction direction, the maximum grid size is set to about 1 / 30 of the device size in this direction. The minimum grid size is used at the PN junction and electrode contact, and the grid size at the minimum grid is set to expand at 1.3 times the expansion rate in the direction away from the PN junction to the maximum grid size.

5. The method for extracting thermal sensitive parameters of UHVDC thyristors based on TCAD according to claim 1, characterized in that: The step 106 includes: The static blocking characteristics of the model are verified using the Quasi stationary quasi-static scanning method of Sdevice. The initial anode voltage condition is set to 0, and a two-step Quasi stationary solution boundary condition is set. The first solution boundary condition is an anode voltage of 1 kV, and the second solution boundary condition is an anode voltage of -1 kV. The anode current-anode voltage curve in the simulation results is observed. If the anode current does not exceed 50 mA, the forward blocking characteristic is considered correct and the next step is entered. Otherwise, the doping concentration of the N-drift region in step 103 and the doping depth of other regions are reduced, or the overall device size in step 101 is increased.

6. The method for extracting thermal sensitive parameters of UHVDC thyristors based on TCAD according to claim 1, characterized in that: The step 107 includes: Add the system part in the Sdevice code area, and use the node table in the system part to build a pulse test circuit consisting of a main loop with an external 1Ω resistor load and a gate pulse loop with an external 0.1Ω current-limiting resistor. Use the Sdevice Transient dynamic simulation solution method to simulate the activation of the model. First, set the piecewise linear model of the anode voltage source. The piecewise linear model only needs to declare the inflection points in the waveform. The Sdevice system will automatically take values ​​based on the line segments connecting the points for the rest. The inflection points of the piecewise linear model of the anode voltage source are 0, 1kV, and -1kV. The anode voltage source rises from 0 to 1kV within a certain period of time, lasts for a certain period of time, and then drops to -1kV within a certain period of time. The certain period of time is a preset time. Then, a piecewise linear model of the gate voltage source is set. The gate voltage source has a transient pulse waveform during the period when the anode voltage source lasts for 1 kV. The pulse also lasts for a period of time and returns to zero before the anode voltage starts to drop. Observe the anode current-time curve and gate current-time curve in the simulation results. If the anode current rises rapidly to 1 kA after the gate current pulse is applied and remains at 1 kA after the gate transient pulse returns to zero, the dynamic switching characteristics of the model are considered correct, and the UHVDC thyristor modeling is completed. If there are problems with the above characteristics, return to step 103 to adjust the doping concentration or doping range of the anode and gate regions.

7. The method for extracting thermal sensitive parameters of UHVDC thyristors based on TCAD according to claim 1, characterized in that: The second step includes: Set the thyristor operating temperature to 0-90℃, and the temperature variable sequence to [0,10,20,30,40,50,60,70,80,90]; If the rated voltage of the thyristor is set to 8500V, the anode voltage variable sequence is [500, 1000, 2000, 3000, 4000, 5000, 6000, 7000, 8000, 8500]; If the thyristor gate trigger range is set to 2-10A, the gate pulse current peak variable sequence is [2, 4, 10]; Set the thyristor rated on-state current to 5500A and the main circuit resistance value sequence to [0.8, 1, 1.2, 1.5]; In Sentaurus TCAD, the Sdevice tool is used to randomly select values ​​from the variable sequence corresponding to temperature, anode voltage, gate pulse current peak, and main circuit resistance, and perform multi-condition combination simulation on the model.

8. The method for extracting thermal sensitive parameters of UHVDC thyristors based on TCAD according to claim 1, characterized in that: The method further comprises: Step 4: Use LiberOffice to convert the data extracted by the Svisual tool into a .CSV file and export it to the Linux system.

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