High thermal conductive wafer fan-out package structure and method

Abstract

The application belongs to the technical field of semiconductor packaging and relates to a high-thermal-conductivity wafer fan-out packaging structure and method, which comprises a plastic encapsulation layer, a thermal-conductivity ring, an insulation layer, a rewiring layer, a thermal-conductivity connecting bridge and a chip, the plastic encapsulation layer covers the chip, the thermal-conductivity ring is arranged around the chip, the thermal-conductivity ring penetrates the plastic encapsulation layer up and down, one end of the thermal-conductivity connecting bridge is connected with the bottom surface of the thermal-conductivity ring, the other end is connected with the bottom surface of the chip, the thermal-conductivity connecting bridge is arranged in the insulation layer, and the insulation layer and the rewiring layer are arranged on the bottom surface of the plastic encapsulation layer. The application increases the thermal-conductivity ring and the thermal-conductivity metal bridge, the thermal-conductivity ring is directly in contact with the chip through the thermal-conductivity metal bridge, a good rapid heat dissipation channel can be formed, and the application can be suitable for high-density, high-power and multi-chip integration; the metal ring structure of the thermal-conductivity ring can resist bending and provide certain strength support, and the application can provide support and protection effects for the chip.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of semiconductor packaging and relates to a high-thermal-conductivity wafer fan-out packaging structure and method. BACKGROUND

[0002] Chip packaging can protect the chip from direct contact with the external environment to prevent electrical performance degradation, and also provides circuit connection, support, heat dissipation and other functions for the chip. With the development of integrated circuits (ICs), high-performance, high-density, high-power and multi-functional chips have gradually become the main development direction of integrated circuits. However, the input and output of high-frequency electrical signals can cause the heat generated by the chip to quickly accumulate in the package, which can cause device damage and failure to work normally. Within a certain range, the reliability of electronic components decreases by 10% for every 2℃ increase. Wafer fan-out packaging is currently a hot topic and development trend in the packaging field, and the integration level of wafer fan-out packaging is also increasing. Therefore, how to quickly dissipate the heat generated during chip operation has become an important issue. With the miniaturization of electronic products, the size of the corresponding integrated circuits is also becoming smaller and smaller, and the packaging thickness requirement is also becoming lower and lower. Wafer fan-out packaging can reduce the packaging thickness, but as the thickness decreases, the structural strength also decreases. At the same time, during the wafer fan-out packaging process, the CTE mismatch between the plastic encapsulant and the chip causes stress concentration and warping. Excessive warping can easily lead to the failure of subsequent processes and can easily cause chip cracking and chip solder joint cracking, which greatly increases the processing difficulty and reduces the service life of the device. SUMMARY

[0003] The application provides a high-thermal-conductivity wafer fan-out packaging structure and packaging method to solve at least one technical problem in the prior art.

[0004] One technical solution of the application is as follows: a high-thermal-conductivity wafer fan-out packaging structure, characterized by comprising a plastic encapsulation layer, a thermal conductive ring, an insulating layer, a rewiring layer, a thermal conductive connecting bridge and a chip. The plastic encapsulation layer covers the chip. The thermal conductive ring is arranged around the chip and penetrates the plastic encapsulation layer from top to bottom. One end of the thermal conductive connecting bridge is connected to the bottom surface of the thermal conductive ring, and the other end is connected to the bottom surface of the chip. The thermal conductive connecting bridge and the rewiring layer are arranged in the insulating layer. The insulating layer is arranged on the bottom surface of the plastic encapsulation layer. The rewiring layer is connected to the pins of the chip.

[0005] Further, the shape of the thermal conductive ring is a square ring or a circular ring, and the size of the thermal conductive ring is greater than the size of the chip.

[0006] Further, the cross-sectional shape of the thermal conductive ring is one of a square, a T shape, an inverted T shape, a trapezoidal shape, a cross shape and an I shape.

[0007] Further, the re-distribution layer tail end is connected with a tin ball bump, and the re-distribution layer is isolated from the heat-conducting connecting bridge through an insulating layer.

[0008] Further, a flow channel opening is formed on the heat-conducting ring.

[0009] Further, an external heat dissipation device is connected to the top surface of the heat-conducting ring.

[0010] Another technical solution of the present application provides a high-heat-conducting wafer fan-out packaging method for manufacturing the high-heat-conducting wafer fan-out packaging structure as described above, comprising:

[0011] S10: fixing a chip and a heat-conducting ring on the surface of a carrier plate, and placing the chip inside the heat-conducting ring;

[0012] S20: plastic packaging the fixed chip and heat-conducting ring to form a plastic packaging layer, and removing the carrier plate;

[0013] S30: processing a heat-conducting connecting bridge for connecting the chip and the heat-conducting ring on one side of the plastic packaging layer after removing the carrier plate;

[0014] S40: processing an insulating layer on the heat-conducting connecting bridge;

[0015] S50: processing a re-distribution layer in the insulating layer through a photoetching or electroplating process;

[0016] S60: processing a tin ball bump on the tail end of the re-distribution layer through a ball planting or reflow soldering process.

[0017] Further, the step S10 comprises: pasting a temporary bonding glue on one side of the carrier plate.

[0018] Further, it further comprises the following step performed after the step S20: thinning the thickness of the plastic packaging layer until the upper surface of the heat-conducting ring is exposed from the plastic packaging layer.

[0019] Further, the number of the chip is one or more.

[0020] The present application has the following beneficial effects: the present application increases the heat-conducting ring and the heat-conducting metal bridge, the heat-conducting ring is directly contacted with the chip through the heat-conducting metal bridge, a good rapid heat dissipation channel can be formed, and the present application can be applied to high-density, high-power and multi-chip integration; the metal ring structure of the heat-conducting ring used in the present application can resist bending, provide certain strength support, and provide support and protection effects for the chip; the present application can effectively improve the warping of the plastic packaging body in the wafer fan-out packaging process by adjusting the cross-sectional shape of the heat-conducting ring. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a structural schematic diagram of the packaging structure of the present application.

[0022] Figure 2 is a schematic diagram of the longitudinal section of the heat-conducting ring of different shapes in the present application.

[0023] Figure 3 is a schematic diagram of the temporary bonding glue adhered to the carrier plate in the packaging method of the present application.

[0024] Figure 4 is a schematic diagram of the fixed chip and heat-conducting ring in the packaging method of the present application.

[0025] Figure 5 is a schematic diagram of the top view of the plastic encapsulation layer in the packaging method of the present application.

[0026] Figure 6 is a schematic diagram of the mouth of the flow guide channel in the packaging method of the present application.

[0027] Figure 7 is a schematic diagram of the cross section of the plastic encapsulation layer in the packaging method of the present application.

[0028] Figure 8 is a schematic diagram of the heat-conducting connecting bridge in the packaging method of the present application.

[0029] Figure 9 is a schematic diagram of the insulation layer in the packaging method of the present application.

[0030] Figure 10 is a schematic diagram of the re-wiring layer in the packaging method of the present application.

[0031] Figure 11 is a schematic diagram of the tin ball bump in the packaging method of the present application.

[0032] Figure 12 is a schematic diagram of the top view of the multi-chip processing in the packaging method of the present application.

[0033] Figure 13 is a schematic diagram of the cross section of the multi-chip processing in the packaging method of the present application.

[0034] Figure 14 is a schematic diagram of the plastic encapsulation layer of the trapezoidal heat-conducting ring in the packaging method of the present application.

[0035] Figure 15 is a schematic diagram of the thinned plastic encapsulation layer of the trapezoidal heat-conducting ring in the packaging method of the present application.

[0036] Figure 16 is a schematic diagram of the tin ball bump of the trapezoidal heat-conducting ring in the packaging method of the present application.

[0037] Figure 17 is a schematic diagram of the heat-conducting ring connecting the external metal plate heat dissipation device in the packaging method of the present application. DETAILED DESCRIPTION

[0038] In order for those skilled in the art to better understand the technical scheme of the present application, the technical scheme in the embodiments of the present application will be described clearly and completely below in combination with the drawings in the embodiments of the present application. The described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should belong to the scope of protection of the present application.

[0039] In one technical scheme of the present application, the present application provides a wafer fan-out package structure with high thermal conductivity. Figure 1 is a structural schematic diagram provided according to the specific structure of the present application. As shown in Figure 1 , the present application comprises a plastic sealing layer 203, a thermal conductive ring 202, an insulating layer 205, a rewiring layer 206, a thermal conductive connecting bridge 204 and a chip 201. The plastic sealing layer 203 covers the chip 201. The thermal conductive ring 202 is arranged around the chip 201. The thermal conductive ring 202 penetrates the plastic sealing layer 203 from top to bottom. The upper and lower surfaces of the thermal conductive ring are exposed from the plastic sealing layer 203. The main material of the plastic sealing layer is one or more of epoxy resin, phenolic resin, silicone resin and unsaturated polyester resin, preferably epoxy resin plastic sealing material.

[0040] One end of the thermal conductive connecting bridge 204 is connected with the bottom surface of the thermal conductive ring 202, and the other end is connected with the bottom surface of the chip 201. The thermal conductive connecting bridge 204 connects the thermal conductive ring and the chip, plays a role of heat transfer, and the chip, the thermal conductive connecting bridge and the thermal conductive ring form a complete heat dissipation channel. Heat flows out from the upper and lower surfaces of the thermal conductive ring exposed, and the effect of heat dissipation is achieved. The thermal conductive ring has excellent thermal conductivity. The material of the thermal conductive ring includes but is not limited to metal, metal alloy and inorganic material, etc., which can be selected as copper, aluminum, gold, silver, graphene, ceramic or alloy, etc., preferably copper and copper alloy.

[0041] The shape of the thermal conductive ring 202 is square ring or circular ring. The size of the thermal conductive ring 202 is greater than the size of the chip 201. The thermal conductive ring is in the form of a ring. The ring structure can resist bending and provide certain strength support, thereby providing support and protection effect for the chip. The thermal conductive connecting bridge 204 is arranged in the insulating layer 205, and the insulating layer 205 is arranged on the bottom surface of the plastic sealing layer 203. The material of the thermal conductive connecting bridge includes but is not limited to copper, gold, aluminum, silver, tin, nickel and metal alloy, etc., preferably copper.

[0042] The re-wiring layer 206 is arranged in the insulating layer 205, and the re-wiring layer 206 is connected with the pins of the chip 201.

[0043] The tail end of the re-wiring layer 206 is provided with a UBM layer.

[0044] In an embodiment of the present application, as shown in Figure 2 The cross-sectional structure of the heat-conducting ring can be adjusted or changed according to the actual warping size after plastic packaging, and the cross-sectional shape of the heat-conducting ring 202 includes but is not limited to square, T-shaped, inverted T-shaped, trapezoidal, cross-shaped, and I-shaped, and is preferably square, T-shaped, or trapezoidal.

[0045] In an embodiment of the present application, as shown in Figure 6 The heat-conducting ring 202 can be further provided with a flow channel opening 103. The flow channel opening can communicate the inside and outside of the heat-conducting ring, and make the plastic packaging material flow more uniformly during plastic packaging. Meanwhile, increasing the contact area between the heat-conducting ring and the plastic packaging material can make the overall structure more firm. The shape of the flow channel opening is not limited, and is preferably circular or square.

[0046] In an embodiment of the present application, as shown in Figure 17 The top surface of the heat-conducting ring 202 can be further connected with an external heat dissipation device 301. The external heat dissipation device plays a role in strengthening heat dissipation, and the heat dissipation device can be selected from a metal plate, liquid cooling, air cooling, a metal heat dissipation device, and a graphene heat dissipation device.

[0047] Another technical solution of the present application provides a wafer fan-out packaging method with high heat conductivity, which is used for manufacturing the wafer fan-out packaging structure with high heat conductivity as described above, and includes the following steps:

[0048] S10: Fix the chip 201 and the heat-conducting ring 202 on the surface of the carrier plate 101, and place the chip 201 inside the heat-conducting ring 202.

[0049] Prepare a 12-inch carrier plate 101 and clean it, and attach a temporary bonding glue 102 to the carrier plate. Attach the chip 201 and the heat-conducting ring 202 to the side of the carrier plate with the temporary bonding glue, and place the chip 201 inside the heat-conducting ring 202. The top view and the sectional view are shown in Figures 1 and 2, respectively. In this embodiment, a square heat-conducting ring is selected, and the sectional structure is square. A flow channel opening 103 is provided on the lower side of the heat-conducting ring. The side view of the heat-conducting ring is shown in Figure 6. The material of the carrier plate can be selected from silicon wafer, glass, and metal plate, etc. The temporary bonding glue is a high polymer material, including liquid glue and solid dry film. Figure 4 、 5 The material of the carrier plate can be selected from silicon wafer, glass, and metal plate, etc. The temporary bonding glue is a high polymer material, including liquid glue and solid dry film.

[0050] S20: Plastic encapsulate the fixed chip 201 and the heat-conducting ring 202 to form a plastic encapsulation layer 203, and remove the carrier plate 101.

[0051] Plastic encapsulate the structure of step S10. After plastic encapsulation, the upper surface of the heat-conducting ring is exposed and flush with the upper surface of the plastic encapsulation layer, as shown in Figure 3. Figure 7 After plastic encapsulation, remove the carrier plate, residual glue, and clean it.

[0052] S30: Process a heat-conducting connecting bridge 204 for connecting the chip 201 and the heat-conducting ring 202 on one side of the carrier plate 101 removed in the plastic encapsulation layer 203.

[0053] As shown in Figure 4, reverse the structure after step three, and process the side of the chip pad upward. Use photoetching, electroplating, etc. to complete the processing of the heat-conducting bridge 204. Figure 8 S40: Process an insulating layer 205 on the heat-conducting connecting bridge 204.

[0054] The insulating material of the insulating layer includes liquid glue and solid dry film. Use the solid dry film to press on the heat-conducting connecting bridge, and solidify to form the insulating layer, as shown in Figure 5.

[0055] Figure 9 S40: Process an insulating layer 205 on the heat-conducting connecting bridge 204.

[0056] S50: Process a re-wiring layer 206 in the insulating layer 205 by photoetching or electroplating process.

[0057] As shown in Figure 6, use photoetching, electroplating, etc. to process the re-wiring layer 206 again, to realize the electrical connection channel with the chip. According to the situation, this step can be repeated to realize the processing of multiple re-wiring layers. Figure 10 S60: Process a tin ball bump 207 at the tail end of the re-wiring layer 206 by ball planting or reflow soldering.

[0058] Use plating process to process the UBM layer, and use ball planting, reflow soldering, etc. to process the tin ball bump 207, as shown in Figure 7.

[0059] Figure 11 ​​The last cutting forms a single package.

[0060] In one embodiment of the present application, when performing multi-chip packaging, a square ring-shaped and T-shaped cross-section heat conducting ring is selected to better control the warping after plastic packaging. The heat conducting ring has a plastic material flow channel port. The multi-chip 201 and the T-shaped heat conducting ring 202 are attached as shown in Figure 12 The remaining steps are the same as the above process. In this embodiment, the package before the last cutting is as shown in Figure 13 .

[0061] In one embodiment of the present application, when performing multi-chip packaging, a square ring-shaped and T-shaped cross-section heat conducting ring is selected to better control the warping after plastic packaging. The heat conducting ring has a plastic material flow channel port. The multi-chip 201 and the T-shaped heat conducting ring 202 are attached as shown in

[0062] In step S10, a 12-inch silicon carrier plate is prepared;

[0063] In the plastic packaging process of step S20, the plastic material covers all surfaces of the heat conducting ring except the contact surface with the bonding glue, as shown in Figure 14 .

[0064] After the re-distribution layer processing in step five is completed, the structure is thinned and shaped to expose the upper surface of the heat conducting ring, as shown in Figure 15 The thickness of the plastic layer 203 is thinned until the upper surface of the heat conducting ring 202 is exposed from the plastic layer 203, and then the following steps are processed. The remaining steps are the same as the above steps. In this embodiment, the package before cutting is as shown in Figure 16 .

[0065] Finally, it should be noted that the above specific embodiments are only used to illustrate the technical solutions of the present application and are not limiting. Although the present application has been described in detail with reference to the examples, those skilled in the art should understand that the technical solutions of the present application can be modified or replaced equivalently without departing from the spirit and scope of the present application, and they should be covered in the scope of the claims of the present application.

Claims

1. A high-thermal-conductivity wafer fan-out packaging method for manufacturing a high-thermal-conductivity wafer fan-out packaging structure, characterized in that the wafer fan-out packaging structure comprises a plastic encapsulation layer (203), a thermal conductive ring (202), an insulating layer (205), a rewiring layer (206), a thermal conductive connecting bridge (204), and a chip (201), the plastic encapsulation layer (203) encapsulates the chip (201), the thermal conductive ring (202) is arranged around the chip (201), the thermal conductive ring (202) penetrates the plastic encapsulation layer (203) from top to bottom, one end of the thermal conductive connecting bridge (204) is connected to the bottom surface of the thermal conductive ring (202), and the other end is connected to the bottom surface of the chip (201), the thermal conductive connecting bridge (204) and the rewiring layer (206) are arranged in the insulating layer (205), the insulating layer (205) is arranged on the bottom surface of the plastic encapsulation layer (203), and the rewiring layer (206) is connected to the pins of the chip (201). The method comprises the following steps: S10: fixing the chip (201) and the thermal conductive ring (202) on the surface of a carrier plate (101), and placing the chip (201) inside the thermal conductive ring (202); S20: plastic encapsulating the fixed chip (201) and the thermal conductive ring (202) to form a plastic encapsulation layer (203) and removing the carrier plate (101); S30: processing the thermal conductive connecting bridge (204) for connecting the chip (201) and the thermal conductive ring (202) on the side of the plastic encapsulation layer (203) from which the carrier plate (101) is removed; S40: processing the insulating layer (205) on the thermal conductive connecting bridge (204); S50: processing the rewiring layer (206) in the insulating layer (205) through a photoetching or electroplating process; S60: processing the tin ball bump (207) at the tail end of the rewiring layer (206) through a ball mounting or reflow soldering process. The shape of the thermal conductive ring (202) is a square ring or a circular ring, and the size of the thermal conductive ring (202) is greater than that of the chip (201).

2. The high thermal conductivity wafer fan-out packaging method of claim 1, wherein, The cross-sectional shape of the thermal conductive ring (202) is one of a square, a T shape, an inverted T shape, a trapezoid, a cross shape, and an I shape.

3. The high thermal conductivity wafer fan-out packaging method of claim 1, wherein, The rewiring layer (206) is connected with the tin ball bump (207) at the tail end, and the rewiring layer (206) is isolated from the thermal conductive connecting bridge (204) by the insulating layer (205).

4. The high thermal conductivity wafer fan-out packaging method of claim 1, wherein, A flow guide passage (103) is formed in the thermal conductive ring (202).

5. The high thermal conductivity wafer fan-out packaging method of claim 1, wherein, An external heat dissipation device is connected to the top surface of the thermal conductive ring (202).

6. The high thermal conductivity wafer fan-out packaging method of claim 1, wherein, The step S10 comprises: pasting a temporary bonding glue (102) on one side of the carrier plate (101).

7. The high thermal conductivity wafer fan-out packaging method of claim 1, wherein, Further comprising: after the step S20, thinning the thickness of the plastic encapsulation layer (203) until the upper surface of the thermal conductive ring (202) is exposed from the plastic encapsulation layer (203).

8. The high thermal conductivity wafer fan-out packaging method of claim 1, wherein, The number of the chips (201) is one or more.

9. The high thermal conductivity wafer fan-out packaging method of claim 1, wherein, ​

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