Conditional probability bit circuit, m-h sampling method, apparatus, device, and medium

Abstract

The present application provides a conditional probability bit circuit, applied to the technical field of data sampling, comprising: a plurality of basic units, each of which is a probability bit unit, each of which comprises a first transistor, a second transistor and a spin-orbit moment magnetic tunnel junction, which are connected through a plurality of circuit wires, and the same signal terminals of a plurality of probability bit units are connected through the same circuit wire. The present application also provides a Metropolis-Hasting (M-H) sampling method, device, equipment and medium based on the conditional probability bit circuit.

Description

Technical Field

[0001] This invention relates to the field of sampling technology, and in particular to a conditional probability bit circuit, an MH sampling method, apparatus, device, and medium. Background Technology

[0002] In existing technologies, traditional digital computers can use pseudo-random numbers generated by deterministic algorithms to solve problems such as sampling, searching, and optimization. However, pseudo-random numbers suffer from drawbacks such as periodicity, coherence, uneven distribution of the generated numbers, slow generation speed, and high energy consumption. These drawbacks result in slow solution speed, high energy consumption, and low accuracy for traditional digital computers in solving sampling, searching, and optimization problems, making it difficult to achieve precise solutions. Therefore, there is a need to provide a high-speed, low-energy-consumption, and effective solution for solving these problems. Summary of the Invention

[0003] The main objective of this invention is to provide a conditional probability bit circuit, an MH (Metropolis-Hasting) sampling method, apparatus, device, and medium to solve at least one of the above-mentioned technical problems.

[0004] To achieve the above objectives, a first aspect of the present invention provides a conditional probability bit circuit, comprising: a plurality of basic units, each of the basic units being a probability bit unit, each of the probability bit units including a first transistor, a second transistor and a spin-orbit magnetic tunnel junction, wherein the first transistor, the second transistor and the spin-orbit magnetic tunnel junction are connected by a plurality of circuit lines, and the same signal terminals of the plurality of probability bit units are connected by the same circuit line.

[0005] In one embodiment of the present invention, the plurality of circuit connections include a first circuit connection, a second circuit connection, a third circuit connection, a fourth circuit connection, and a fifth circuit connection;

[0006] The first circuit connection is connected to the gate of the first transistor and is used to control the gate voltage input of the first transistor;

[0007] The second circuit connection is connected to the source of the first transistor and is used to control the source voltage input of the first transistor;

[0008] The third circuit connection is connected to the source of the second transistor and is used to control the source voltage input of the second transistor.

[0009] The fourth circuit connection is connected to the output terminal of the spin-orbit magnetic tunnel junction and is used to output column cell signals or as the ground terminal for the write signal during probability flipping.

[0010] The fifth circuit connection is connected to the gate of the second transistor and is used to control the gate voltage input of the second transistor.

[0011] In one embodiment of the present invention, the spin-orbit moment magnetic tunnel junction includes a protective layer, a pinning layer, an insulating layer, a free layer, and a spin-orbit moment layer;

[0012] The magnetization state of the free layer includes an upward state and a downward state. When a current is applied to the spin-orbit moment layer, a spin-orbit coupling effect is generated. The spin current converted by the spin-orbit coupling effect is conducted into the free layer, causing the magnetization direction of the free layer to randomly flip.

[0013] The direction of the random flip is determined by at least one of the initial magnetization state of the free layer and the magnitude of the current applied to the spin orbital moment layer, and is independent of the direction of the current.

[0014] In one embodiment of the present invention, when the current applied to the spin-orbit magnetic tunnel junction's spin-orbit magnetic tunnel junction is less than a threshold I0, the probability that the magnetization state of the free layer of the spin-orbit magnetic tunnel junction after applying the current is in the downward state depends on both the magnitude of the current and the initial magnetization state of the free layer. When the current is greater than or equal to the threshold I0, the probability that the magnetization state of the free layer after applying the current is in the downward state is approximately 0.5, which is independent of the initial magnetization state of the free layer.

[0015] A second aspect of this invention provides an MH sampling method applied to the conditional probability bit circuit described in the first aspect, the method comprising:

[0016] S1, set the target stable distribution π, the threshold for the number of free layer magnetization state transitions n1, and the required number of samples n2;

[0017] S2, representing floating-point numbers using a column of free-layer magnetization states of N MTJ devices. Where q1 + q2 = N, and q1 and q2 are both positive integers, q1 and q2 represent the number of decimal places and the number of integer places in the binary representation of the floating-point number, respectively. The MTJ device with a weight of 2q in the floating-point number is encoded using q. it =0 or 1, m it =0 indicates that the free layer magnetization state of the i-th device is upward, m it =1 indicates that the free layer magnetization state is downward, m it Let represent the free layer magnetization state of the i-th MTJ device after the t-th iteration, where q1>q>-q2 and q is an integer;

[0018] S3, apply a current I to the spin-orbit moment layers of the N MTJ devices, such that the probability of the free layer's magnetization state being either upward or downward is approximately 0.5. The floating-point number x represented by the free layer magnetization state of the N MTJ devices... t Approximate region Uniform sampling, where I > I0;

[0019] S4, in the first iteration to the n1+n2-1th iteration, let 1≤t≤n1+n2-1;

[0020] S5, Record Let π represent the stationary distribution of the target.

[0021] In one embodiment of the present invention, S4 specifically includes:

[0022] S41, Read the free-layer magnetization state of the q2th device.

[0023] S42, record the current floating-point number x t Record the currently read device number as q, and retrieve the floating-point number. Calculate the acceptance rate Apply a current I to the q-th MTJ device, causing the q-th device to switch from state m. qt Become state (1-m) qt The probability of ) is α, π(x) * () represents the floating-point number x under the target equilibrium distribution π. * The probability density, π(x) t () represents the floating-point number x under the target equilibrium distribution π. t The probability density, m qt This represents the free layer magnetization state of the q-th MTJ device after the t-th iteration;

[0024] S43, read the (q-1)th device, repeat step S42 until q-1 < -q2.

[0025] A third aspect of the present invention provides an electronic device, comprising:

[0026] A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the program, implements the MH sampling method provided in the second aspect of the present invention.

[0027] A fourth aspect of the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the MH sampling method provided in the second aspect of the present invention. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 A schematic diagram of a probability bit unit provided in an embodiment of the present invention;

[0030] Figure 2 A schematic diagram of a conditional probability bit circuit provided in an embodiment of the present invention;

[0031] Figure 3 A schematic diagram of a spin-orbit magnetic tunnel junction provided in an embodiment of the present invention;

[0032] Figure 4 This is a schematic diagram showing the result of applying current to a spin-orbit magnetic tunnel junction according to an embodiment of the present invention;

[0033] Figure 5 A system architecture diagram of an MH algorithm based on conditional probability bit circuit optimization is shown.

[0034] Figure 6 A schematic diagram of the hardware structure of an electronic device is shown. Detailed Implementation

[0035] To make the objectives, features, and advantages of this invention more apparent and understandable, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0036] Figure 1 This is a schematic diagram of a probability bit unit provided in an embodiment of the present invention. Figure 2 This is a schematic diagram of a conditional probability bit circuit provided in an embodiment of the present invention.

[0037] Please see Figure 1 and Figure 2The conditional probability bit circuit provided by the present invention includes: a plurality of basic units, each of which is a probability bit unit, each of which includes a first transistor ①, a second transistor ② and a spin-orbit magnetic tunnel junction SOT-MTJ, wherein the first transistor ①, the second transistor ② and the spin-orbit magnetic tunnel junction SOT-MTJ are connected by a plurality of circuit lines, and the same signal terminals of the plurality of probability bit units are connected by the same circuit line.

[0038] In one embodiment of the present invention, the plurality of circuit connections include a first circuit connection a, a second circuit connection b, a third circuit connection c, a fourth circuit connection d, and a fifth circuit connection e. The first circuit connection a is connected to the gate of the first transistor ① and is used to control the gate voltage input of the first transistor ①. The second circuit connection b is connected to the source of the first transistor ① and is used to control the source voltage input of the first transistor ①. The third circuit connection c is connected to the source of the second transistor ② and is used to control the source voltage input of the second transistor ②. The fourth circuit connection d is connected to the output terminal of the spin-orbit-momentum tunnel junction (SOT-MTJ) and is used to output column cell signals or as a ground terminal for the write signal during probability flipping. The fifth circuit connection e is connected to the gate of the second transistor ② and is used to control the gate voltage input of the second transistor ②.

[0039] In one embodiment of the present invention, such as Figure 3 As shown, the spin-orbit-moment magnetic tunnel junction (SOT-MTJ) includes a protective layer 31, a pinning layer 32, an insulating layer 33, a free layer 34, and a spin-orbit-moment layer (SOT layer) 35. The pinning layer 32 and the free layer 34 each contain at least one ferromagnetic layer, which can be made of at least one of ferromagnetic materials such as Co and CoFeB. An insulating layer 33 is also included between the pinning layer 32 and the free layer 34. The insulating layer 33 can be made of at least one of insulating materials such as MgO, Al2O3, and BN. The SOT layer 35 can be made of at least one of materials with a high spin-orbit coupling effect, such as heavy metals, alloys, or topological insulators. The protective layer 31 is located on the top layer of the device structure.

[0040] In such Figure 3 In the device structure shown, the magnetization direction of the pinned layer 32 is fixed by an artificial antiferromagnetic structure or the exchange bias of the antiferromagnetic layer, while the magnetization direction of the ferromagnetic layer in the bottom free layer 34 is not fixed. When a current is applied to the SOT layer 305, a spin-orbit coupling effect is generated. The spin current converted by the spin-orbit coupling effect is conducted to the free layer 34, causing the magnetization direction of the free layer 34 to randomly flip.

[0041] The free layer has two magnetization states: an upward state and a downward state. When a current is applied to the spin-orbit moment layer, a spin-orbit coupling effect is generated. The spin current generated by this spin-orbit coupling effect is conducted into the free layer, causing the magnetization direction of the free layer to randomly flip. The direction of this random flip is determined by at least one of the initial magnetization state of the free layer and the magnitude of the current applied to the spin-orbit moment layer, and is independent of the direction of the current.

[0042] In one embodiment of the present invention, such as Figure 4 As shown, when the current applied to the spin-orbit magnetic tunnel junction (SOT-MTJ) is less than the threshold I0, the probability that the magnetization state of the free layer of the SOT-MTJ is downward after applying the current depends on both the magnitude of the current and the initial magnetization state of the free layer. When the current is greater than or equal to the threshold I0, the probability that the magnetization state of the free layer is downward after applying the current is approximately 0.5, which is independent of the initial magnetization state of the free layer.

[0043] The present invention also provides an application in, for example Figure 2 The conditional probability bit circuit illustrated uses the MH sampling method, which mainly includes the following steps:

[0044] S1, set the target stable distribution π, the threshold for the number of free layer magnetization state transitions n1, and the required number of samples n2;

[0045] S2, representing floating-point numbers using a column of free-layer magnetization states of N SOT-MTJ devices. Where q1 + q2 = N, and q1 and q2 are both positive integers, q1 and q2 represent the number of decimal places and the number of integer places in the binary representation of the floating-point number, respectively, and the weight of the floating-point number is encoded using q (q1 > q > -q2, and q is an integer). q MTJ devices, m it =0 or 1, m it =0 indicates that the free layer magnetization state is upward, m it =1 indicates that the free layer magnetization state is downward, m it This represents the free layer magnetization state of the i-th SOT-MTJ device after the t-th iteration;

[0046] S3, apply a current I to the spin-orbit moment layers of the N SOT-MTJ devices, such that the probability of the free layer's magnetization state being either upward or downward is approximately 0.5. The floating-point number x representing the free layer magnetization state of these N SOT-MTJ devices is... t Approximate region Uniform sampling, where I>I0;

[0047] S4, in the first iteration to the n1+n2-1th iteration, let 1≤t≤n1+n2-1;

[0048] S5, Record Let π represent the stationary distribution of the target.

[0049] In this invention, for Figure 1 The probability bit unit shown is used for reading: the first circuit connection a is low, the fifth circuit connection e is high, the second transistor ② is turned on, the first transistor ① is turned off, a voltage u is applied to line c, and a current change can be read on line d. Where R is the SOT-MTJ junction resistance, its magnitude is related to the relative magnetization directions of the free layer and the pinned layer. When the magnetization directions of the two magnetic layers are the same, the tunnel junction is in a low-resistance state; while when the magnetization directions of the two magnetic layers are opposite, the tunnel junction is in a high-resistance state, where R... AP >R P .

[0050] In this invention, for Figure 1 The probability bit unit shown is used for a write operation: the first circuit connection a is at a high level, the fifth circuit connection e is at a low level, the first transistor ① is turned on, the second transistor ② is turned off, and a current I is applied to the first circuit connection a. The magnitude of the current is related to the free layer magnetization state as follows: Figure 4 As shown.

[0051] In this invention, for Figure 2 The conditional probability bit circuit shown performs a read operation: The fifth circuit connection e is turned on, turning on the second transistor ② in the m-th column. Voltage is applied to the second circuit connection b from the first column to the last column, with the voltage of the previous row being twice the voltage of the next row. Let the voltage of the first row be u0. Then the voltage read from the lower resistor in the m-th column is... in Where R im There are only two values, R. P and R AP Therefore G im There are two possible values. A×G can be converted using an analog-to-digital converter. im Convert to 0 or 1, such as Figure 5 As shown, the floating-point number represented by voltage u is obtained. Where x tm This represents the floating-point number represented by the voltage in the m-th column at the t-th iteration.

[0052] In this invention, for Figure 2The conditional probability bit circuit shown is used for a write operation: the first circuit connection a is high-level, the fifth circuit connection e is low-level, the first transistor ① is turned on, the second transistor ② is turned off, and a current I is applied to the first circuit connection a. The magnitude of the current is related to the free layer magnetization state as follows: Figure 4 As shown.

[0053] In the MH algorithm, an acceptance rate α is introduced to satisfy the detailed balance condition, and one side of α is normalized to ensure the acceptance rate is... This increases the acceptance probability. However, in the process of running this algorithm on a traditional computer, the speed and energy consumption of reading state i and calculating random numbers are relatively high, making it difficult to improve. The conditional probability bit circuit designed in this invention can integrate the storage of state and the calculation of random numbers, breaking through the bottleneck of the von Neumann architecture, thereby improving the calculation speed and reducing the calculation energy consumption.

[0054] The following describes the traditional MH algorithm and the process of implementing the MH algorithm using the conditional probability bit circuit designed in this invention:

[0055] The sampling process implemented in the traditional MH algorithm:

[0056] A) Input any given Markov chain state transition matrix Q, target stationary distribution π, set a threshold of state transition times n1, and require the number of samples n2;

[0057] B) Obtain the initial state x0 from any simple probability distribution;

[0058] C) In the first iteration to the (n1+n2-1)th iteration, let the state of each iteration be x. t (1≤t≤n1+n2-1):

[0059] i) From the conditional distribution probability Q(x|x) t Sample x is obtained from ) * ;

[0060] ii) Sample U ~ [0, 1] from a uniform distribution;

[0061] iii) If u < α(x) t x * If x is accepted, then x is accepted. t+1 =x * ;

[0062] iv) Otherwise, do not accept the transition, t = max{t-1, 0};

[0063] D) Record That is, the target is a stationary distribution π.

[0064] This invention utilizes Figure 2The conditional probability bit circuit shown illustrates the sampling process of the MH algorithm:

[0065] A) The target is a stationary distribution π. A threshold of n1 is set for the number of state transitions, and the number of samples required is n2.

[0066] B) Turn on the first transistor ① of all probability bit units, and apply a current I > I0 to the first circuit connection a of all probability bit units (each row of probability bit units shares one line a), so that the probability of the free layer being either up or down is approximately 0.5. The floating-point number corresponding to the m-th column is... x t Approximate region Uniform sampling;

[0067] C) In the first iteration to the (n1+n2-1)th iteration, let the state of each iteration be x. t (1≤t≤n1+n2-1, where t is the iteration number) and the array has only one column, i.e., M=1:

[0068] i) Read the state m of the q2th device. q2 ;

[0069] ii) Record the total state x at this time. t The device number read is q, and the value is a floating-point number. At this time, Q(x|x) t )=x t +(random 1, -1)×2 q Calculate the acceptance rate And according to Figure 2 Apply a current I to the q-th device, causing the q-th device to switch from state m. qt Become state (1-m) qt The probability of ) is α, π(x) * () represents the floating-point number x under the target equilibrium distribution π. * The probability density, π(x) t () represents the floating-point number x under the target equilibrium distribution π. t The probability density, m qt This represents the free layer magnetization state of the q-th MTJ device after the t-th iteration;

[0070] iii) Read the (q-1)th device and repeat step ii) until q-1 < -q2;

[0071] D) Record That is, the target is a stationary distribution π.

[0072] E) When the distribution π is a high-dimensional distribution, M > 1. In this case, step C) only needs to be performed once for each column, and the states of other columns need to be considered when calculating the acceptance rate α. Where x represents the floating-point number represented by all other columns except the m-th column.

[0073] Please see Figure 5 , Figure 5 A system architecture diagram for optimizing the MH algorithm based on conditional probability bit circuits is shown. This includes a bit circuit (within the dashed box), a multiplexer (MUX), an analog-to-digital converter (ADC), a processor, a digital-to-analog converter (DAC), and a demultiplexer (DEMUX). The conditional probability bit circuit runs the MH algorithm; the multiplexer (MUX) outputs multiple signals read from the conditional probability bit circuit; the ADC converts the multiple signals output by the multiplexer into digital signals; the processor processes the digital signals converted by the ADC to determine the acceptance rate; the DAC converts the flip probability values ​​obtained by the processor into analog signals; and the demultiplexer (DEMUX) performs conditional probability bit read / write operations on the analog signals converted by the DAC.

[0074] Please see Figure 6 , Figure 6 A hardware structure diagram of an electronic device is shown.

[0075] The electronic device described in this embodiment includes:

[0076] The memory 61, the processor 62, and the computer program stored in the memory 61 and executable on the processor, wherein the processor executes the program to implement the aforementioned... Figure 1 The MH sampling method described in the illustrated embodiment.

[0077] Furthermore, the electronic device also includes:

[0078] At least one input device 63; at least one output device 64.

[0079] The aforementioned memory 61, processor 62, input device 63, and output device 64 are connected via bus 65.

[0080] The input device 63 can specifically be a camera, touch panel, physical buttons, or mouse, etc. The output device 64 can specifically be a display screen.

[0081] The memory 61 can be a high-speed random access memory (RAM) or a non-volatile memory, such as a disk storage device. The memory 61 is used to store a set of executable program code, and the processor 62 is coupled to the memory 61.

[0082] Furthermore, embodiments of the present invention also provide a computer-readable storage medium, which may be disposed in the electronic device described in the above embodiments, and the computer-readable storage medium may be as described above. Figure 6 The electronic device in the illustrated embodiment. A computer program is stored on the computer-readable storage medium, which, when executed by a processor, implements the aforementioned... Figure 1 The MH sampling method described in the illustrated embodiment. Further, the computer storage medium can also be a USB flash drive, external hard drive, read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk, or any other medium capable of storing program code.

[0083] It should be noted that the functional modules in the various embodiments of the present invention can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0084] If the integrated module is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product.

[0085] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that the present invention is not limited to the described order of actions, because according to the present invention, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to the present invention.

[0086] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0087] The above is a description of a conditional probability bit circuit, MH sampling method, apparatus, device, and medium provided by the present invention. For those skilled in the art, based on the ideas of the embodiments of the present invention, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A conditional probability bit circuit, comprising: The method comprises the following steps: A plurality of basic units, each of which is a probability bit unit, each of which comprises a first transistor, a second transistor and a spin-orbit moment magnetic tunnel junction, and the first transistor, the second transistor and the spin-orbit moment magnetic tunnel junction are connected through a plurality of circuit wires, and the same signal terminals of a plurality of probability bit units are connected through the same circuit wire; When the current applied to the spin-orbit moment layer of the spin-orbit moment magnetic tunnel junction is less than a threshold value I0, the probability of the magnetization state of the free layer of the spin-orbit moment magnetic tunnel junction being in a downward state after the current is applied depends on the size of the current and the initial magnetization state of the free layer, and when the current is greater than or equal to the threshold value I0, the probability of the magnetization state of the free layer being in a downward state after the current is applied is approximately 0.5, which is independent of the initial magnetization state of the free layer.

2. The conditional probability bit circuit of claim 1, wherein, The plurality of circuit wires comprise a first circuit wire, a second circuit wire, a third circuit wire, a fourth circuit wire and a fifth circuit wire; The first circuit wire is connected with the gate of the first transistor and is used for controlling the gate voltage input of the first transistor; The second circuit wire is connected with the source of the first transistor and is used for controlling the source voltage input of the first transistor; The third circuit wire is connected with the source of the second transistor and is used for controlling the source voltage input of the second transistor; The fourth circuit wire is connected with the output terminal of the spin-orbit moment magnetic tunnel junction and is used for outputting a column unit signal or a ground terminal as a probability flip write signal; The fifth circuit wire is connected with the gate of the second transistor and is used for controlling the gate voltage input of the second transistor.

3. The conditional probability bit circuit of claim 1, wherein, The spin-orbit moment magnetic tunnel junction comprises a protection layer, a pinning layer, an insulating layer, a free layer and a spin-orbit moment layer; The magnetization state of the free layer comprises an upward state and a downward state, and a spin-orbit coupling effect is generated under the condition that a current is applied to the spin-orbit moment layer, a spin current converted by the spin-orbit coupling effect is conducted into the free layer, and the magnetization direction of the free layer is randomly flipped; The direction of the random flip is determined by at least one of the initial magnetization state of the free layer and the size of the current applied to the spin-orbit moment layer, and is independent of the direction of the current.

4. An M-H sampling method, characterized in that, The method is applied to the conditional probability bit circuit as claimed in any one of claims 1 to 3, and the method comprises the following steps: S1, set target stationary distribution , threshold of number of free layer magnetization state transitions , number of samples needed ; S2, representing a floating point number with a sequence of N MTJ devices whose free layer magnetization states , wherein + , and are positive integers, represent the number of decimal places and the number of integer places, respectively, of the binary representation of the floating point number, and , = 0 or 1, = 0 represents a free layer magnetization state that is an up state, = 1 represents a free layer magnetization state that is a down state, ; S3, applying a current to spin orbit torque layers of the N MTJ devices such that a probability of a magnetization state of the free layer being in an up state or a down state is approximately 0.5, a floating point number represented by the magnetization state of the free layer of the N MTJ devices is uniformly sampled, wherein, , is a current threshold value; S4, in the 1st iteration to the (i-1)th iteration, let ; and ; S5, record floating point number to represent the target stationary distribution .

5. The M-H sampling method of claim 4, wherein S4 specifically comprises: S41, reading the first magnetization state of the free layer of the device ; S42, record current float , record current read device number as q, take float , calculate acceptance rate , apply current to qth MTJ device , so that qth device goes from state to state with probability , probability density of float under target equilibrium distribution probability density of float under target equilibrium distribution , probability density of float under target equilibrium distribution , probability density of float under target equilibrium distribution , probability density of float under target equilibrium distribution , probability density of float under target equilibrium distribution , free layer magnetization state of qth MTJ device after tth iteration S43, reading the q-1th device, repeating step S42 until .

6. An electronic device comprising: A memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, each step of the M-H sampling method of claim 4 or 5 is implemented.

7. A computer readable storage medium having stored thereon a computer program, characterized in that When the computer program is executed by the processor, each step of the M-H sampling method of claim 4 or 5 is implemented.

Images