A trench-type MPS device and a method of manufacturing the same

By forming a groove on the front side of the N-type epitaxial layer and injecting multiple P-type doped regions, the electric field shielding and anode injection efficiency are optimized, solving the problem that fast recovery diode structures cannot simultaneously meet the requirements of low voltage field (VF) and low anode injection efficiency. This results in a trench-type MPS device with high breakdown voltage, low VF, high softness, and low IRM.

CN115513054BActive Publication Date: 2026-04-07SHENZHEN XINER SEMICON TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-15
Publication Date
2026-04-07

AI Technical Summary

Technical Problem

Existing fast recovery diode structures cannot simultaneously meet the requirements of low forward turn-on voltage drop (VF) and low anode injection efficiency, which affects the turn-on loss and softness of insulated gate bipolar transistors (IGBTs).

Method used

A groove is formed on the front side of the N-type epitaxial layer, and multiple layers of P-type doped regions are formed at the bottom, sidewalls and above the sidewalls of the groove by multiple implantation of P-type doped ions of different concentrations and annealing treatment. Combined with Schottky metal layer and Ohm metal layer, the electric field shielding and anode implantation efficiency are optimized.

Benefits of technology

A trench-type MPS device with high withstand voltage, low VF, high softness, and low reverse recovery current (IRM) has been achieved, improving the overall performance of the device.

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Abstract

This application belongs to the field of power device technology and provides a trench-type MPS device and its fabrication method. A trench is formed on the front side of an N-type epitaxial layer. Then, a first P-type dopant ion is implanted at the bottom of the trench, followed by high-temperature annealing to form a first P-type doped region. A second P-type dopant ion is implanted below the sidewall of the trench, and a third P-type dopant ion is implanted above the sidewall of the trench. Then, low-temperature annealing is performed to form a second P-type doped region below the sidewall of the trench and a third P-type doped region above the sidewall of the trench. The doping concentration of the first, second, and third P-type doped regions gradually increases, resulting in weaker electric field shielding of the Schottky device at the bottom of the trench and higher anode implantation efficiency above the sidewall of the trench. This satisfies the conditions of high electric field shielding for the Schottky device and minimal impact on IRM, achieving the characteristics of high breakdown voltage, low VF, high softness, and low IRM for the fast recovery diode device.
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Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of power devices, and particularly relates to a trench type MPS device and a preparation method thereof. BACKGROUND

[0002] A fast recovery diode is usually composed of an epitaxial layer of a PIN structure. Under the application of global or local carrier lifetime control technology, the carrier lifetime is reduced to make the diode have the characteristics of fast recovery. The diode is usually used in parallel with an insulated gate bipolar transistor (IGBT). The peak current generated in the reverse recovery process of the diode usually increases the turn-on loss of the IGBT. If the epitaxial buffer layer is not controlled well, low softness is caused, which affects the gate voltage of the IGBT. The higher the forward voltage drop (VF) of the fast recovery diode using global carrier lifetime control, that is, the lower the anode injection efficiency, the smaller the reverse peak current (IRM), and the smaller the influence on the IGBT. However, the loss of the diode is increased.

[0003] The MPS (merge pin schottky) fast recovery diode combines the Schottky and PIN structures, reduces the anode injection efficiency without increasing the forward voltage drop, has the conditions of low VF, low IRM and high voltage fast recovery diode. However, the current fast recovery diode structure cannot simultaneously meet the conditions of low VF and low anode injection efficiency. SUMMARY

[0004] The application aims to provide a trench type MPS device and a preparation method thereof, and aims to solve the problem that the current fast recovery diode structure cannot simultaneously meet the conditions of low VF and low anode injection efficiency.

[0005] The first aspect of the embodiment of the application provides a preparation method of a trench type MPS device, and the preparation method comprises the following steps.

[0006] An oxide layer is formed on the front surface of an N-type epitaxial layer, and the oxide layer and the N-type epitaxial layer are etched under the protection of a first etching mask to form a groove on the front surface of the N-type epitaxial layer;

[0007] First P-type doping ions are injected into the bottom of the groove under the protection of the oxide layer, and annealing treatment is performed under a first annealing condition to form a first P-type doping region at the bottom of the groove and an N-type channel region at the interface between the first P-type doping region and the N-type epitaxial layer;

[0008] injecting second P-type doping ions to the side wall of the recess to form a second P-type doping region on the side wall of the recess; wherein the doping concentration of the second P-type doping region is greater than the doping concentration of the first P-type doping region;

[0009] injecting third P-type doping ions above the side wall of the recess and performing annealing treatment under a second annealing condition to form a third P-type doping region above the side wall of the recess; wherein the annealing temperature in the second annealing condition is less than the annealing temperature in the first annealing condition, and the doping concentration of the third P-type doping region is greater than the doping concentration of the second P-type doping region;

[0010] forming a Schottky metal layer on both sides of the recess and forming an ohmic metal layer on the bottom and the side wall of the recess;

[0011] forming a cathode metal layer on the back surface of the N-type epitaxial layer.

[0012] In one embodiment, the step of injecting third P-type doping ions above the side wall of the recess and performing annealing treatment under a second annealing condition comprises:

[0013] forming a second etching mask to determine a third P-type ion doping region on the front surface of the N-type epitaxial layer, the bottom of the recess and below the side wall of the recess;

[0014] injecting third P-type doping ions above the side wall of the recess under the protection of the second etching mask;

[0015] removing the second etching mask and the oxide layer and performing annealing treatment under the second annealing condition.

[0016] In one embodiment, the injection dose of the third P-type doping ions is at least 10 times of the injection dose of the first P-type doping ions.

[0017] In one embodiment, the injection dose of the first P-type doping ions is 1*10 12 -9*10 12 , and the injection energy of the first P-type doping ions is 20-120KeV;

[0018] the injection dose of the second P-type doping ions is 5*10 12 -1*10 13 , and the injection energy of the second P-type doping ions is 60-200KeV;

[0019] the injection dose of the third P-type doping ions is 1*10 14 -8*10 15 , and the injection energy of the third P-type doping ions is 60-120KeV.

[0020] In one embodiment, the annealing temperature in the first annealing condition is 1050-1200℃, and the annealing time in the first annealing condition is 100-600 minutes.

[0021] The annealing temperature in the second annealing condition is 800-1000℃, and the annealing time in the second annealing condition is 30-90 minutes.

[0022] In one embodiment, the injection angle of the second P-type doping ions is D=arctan(A / (B+C)), A is the width of the groove, B is the thickness of the oxide layer, and C is the depth of the groove.

[0023] In one embodiment, the injection angle of the third P-type doping ions is smaller than the injection angle of the second P-type doping ions and greater than 9°.

[0024] The second aspect of the embodiments of the present application further provides a trench type MPS device, which comprises:

[0025] An N-type epitaxial layer, wherein the front surface of the N-type epitaxial layer is provided with a groove;

[0026] A first P-type doping region, which is surrounded at the bottom of the groove of the N-type epitaxial layer;

[0027] An N-type channel region, which is arranged between the first P-type doping region and the N-type epitaxial layer;

[0028] A second P-type doping region, which is arranged at the sidewall of the groove;

[0029] A third P-type doping region, which is arranged at the sidewall of the groove and located between the first P-type doping region and the second P-type doping region; wherein the doping concentration of the third P-type doping region is greater than the doping concentration of the second P-type doping region, and the doping concentration of the second P-type doping region is greater than the doping concentration of the first P-type doping region;

[0030] A Schottky metal layer, which is located at the front surface of the N-type epitaxial layer and on both sides of the groove;

[0031] An ohmic metal layer, which is located in the groove;

[0032] A cathode metal layer, which is located at the back surface of the N-type epitaxial layer.

[0033] In one embodiment, the cross-sectional shape of the second P-type doping region is a parallelogram.

[0034] In one embodiment, the cathode metal layer is a Ni / Ti / Ni / Ag laminated material.

[0035] In the trench type MPS device and the preparation method thereof provided by the embodiment of the present application, a groove is formed on the front surface of an N-type epitaxial layer, then first P-type doping ions are injected into the bottom of the groove and high-temperature annealing is performed to form a first P-type doping region, second P-type doping ions are injected below the sidewall of the groove, third P-type doping ions are injected above the sidewall of the groove, then low-temperature annealing is performed to form a second P-type doping region below the sidewall of the groove and a third P-type doping region above the sidewall of the groove, wherein the doping concentration of the first P-type doping region, the second P-type doping region and the third P-type doping region gradually increases, so that the electric field shielding of the Schottky device at the bottom of the groove is weaker, the anode injection efficiency above the sidewall of the groove is higher, the conditions of higher electric field shielding of the Schottky device and smaller influence on the IRM are met, and the characteristics of high withstand voltage, low VF, high softness and low IRM of the fast recovery diode device are realized. BRIEF DESCRIPTION OF DRAWINGS

[0036] Figure 1 FIG. 1 is a flowchart of a preparation method of a trench type MPS device provided by the embodiment of the present application.

[0037] Figure 2 FIG. 2 is a schematic diagram of forming a groove 110 provided by the embodiment of the present application.

[0038] Figure 3 FIG. 3 is a schematic diagram of forming a first P-type doping region 310 provided by the embodiment of the present application.

[0039] Figure 4 FIG. 4 is a schematic diagram of forming a second P-type doping region 320 provided by the embodiment of the present application.

[0040] Figure 5 FIG. 5 is a schematic diagram of forming a third P-type doping region 330 provided by the embodiment of the present application.

[0041] Figure 6 FIG. 6 is a flowchart of step S400 provided by the embodiment of the present application.

[0042] Figure 7 FIG. 7 is a schematic diagram of the doping concentration of a P-type doping region and an N-type epitaxial layer provided by the embodiment of the present application.

[0043] Figure 8 FIG. 8 is a structural schematic diagram of a trench type MPS device provided by the embodiment of the present application. DETAILED DESCRIPTION

[0044] In order to make the purpose, technical scheme and advantages of the present application more clear, the present application is further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0045] It is to be noted that when an element is referred to as being "fixed" or "set" on another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or indirectly connected to the other element.

[0046] It is to be understood that the terms "length", "width", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate directions or positions based on the directions or positions shown in the drawings, and are merely used for the purpose of facilitating this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be construed as limiting the application.

[0047] In addition, the terms "first", "second" are only for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first", "second" can explicitly or implicitly include one or more of the features. In the description of the application, the meaning of "multiple" is two or more, unless otherwise specifically limited.

[0048] Fast recovery diodes are usually epitaxially formed with PIN structure, and under the application of global or local carrier lifetime control technology, the carrier lifetime is reduced to make the diode have the characteristics of fast recovery. Such diodes are usually used in parallel with IGBT, and the peak current generated during the reverse recovery process of the diode usually increases the turn-on loss of the IGBT. If the epitaxial buffer layer is not controlled well, it will result in low softness and affect the gate voltage of the IGBT. Generally, the higher the forward voltage drop VF of the fast recovery diode using global carrier lifetime control, i.e. the lower the anode injection efficiency, the smaller the reverse peak current IRM, and the smaller the impact on the IGBT, but the loss of the diode increases.

[0049] MPS fast recovery diodes, due to the fusion of Schottky and PIN structures, reduce the anode injection efficiency without increasing the forward VF, and have the conditions to manufacture low VF, low IRM and high softness fast recovery diodes. However, due to the large leakage current of the Schottky junction without good electric field shielding, in order to obtain a good electric field shielding effect, a high-concentration P junction needs to be prepared to deplete the Schottky junction region, which also increases the anode injection efficiency. Therefore, it is difficult to prepare high-voltage MPS fast recovery diodes.

[0050] The embodiment of the present application provides a preparation method of a trench type MPS device, as shown in the figure, Figure 1 The preparation method in the embodiment includes steps S100 to S600.

[0051] In step S100, an oxide layer is formed on the front side of the N-type epitaxial layer, and the oxide layer and the N-type epitaxial layer are etched under the protection of a first etching mask to form a groove on the front side of the N-type epitaxial layer.

[0052] In this embodiment, combined with Figure 2 As shown, firstly, an oxide layer 200 is formed on the front side of the N-type epitaxial layer 100 by epitaxial growth. Then, a first etching mask is formed on the surface of the oxide layer 200 to define the etching area. The etching area is then etched to a depth that extends into the N-type epitaxial layer 100, thereby forming a groove 110 on the front side of the N-type epitaxial layer 100.

[0053] In a specific application embodiment, an oxide layer 200 can be formed on the front side of the N-type epitaxial layer 100 by oxidizing the front side of the N-type epitaxial layer 100. Then, photoresist is spin-coated on the surface of the oxide layer 200, photolithography is used to determine the etching area, and then the oxide layer 200 and the N-type epitaxial layer 100 are dry-etched to form a groove 110 on the front side of the N-type epitaxial layer 100.

[0054] In specific applications, such as Figure 2 As shown, the groove width and depth of the groove 110 and the thickness of the oxide layer 200 determine the tilt angle of the subsequent implantation. Currently, the tilt angle of the ion implanter is no greater than 45°. This also affects the temperature and duration of the subsequent high-temperature annealing, which need to be selected according to the process conditions.

[0055] In one specific application embodiment, the N-type epitaxial layer 100 can be an N-type silicon layer.

[0056] In one specific application embodiment, the trench depth of the groove 110 is at least half the thickness of the N-type epitaxial layer 100.

[0057] In step S200, under the protection of the oxide layer, a first P-type dopant ion is implanted into the bottom of the groove, and annealing is performed under a first annealing condition to form a first P-type doped region at the bottom of the groove, and an N-type channel region is formed at the interface between the first P-type doped region and the N-type epitaxial layer.

[0058] In this embodiment, combined with Figure 3 As shown, under the protection of the oxide layer 200 and the first etching mask above it, the first P-type dopant ions are implanted into the bottom of the groove 110, and then annealing is performed under the first annealing condition, thereby forming the first P-type doped region 310 at the bottom of the groove 110. The first P-type dopant ions in the first P-type doped region 310 diffuse through the annealing process, and their concentration gradually decreases to the boundary with the N-type epitaxial layer 100, and an N-type channel region 120 is formed at the boundary between the first P-type doped region 310 and the N-type epitaxial layer 100.

[0059] In one specific application embodiment, the first P-type doping ions are boron ions.

[0060] In one specific application, a conventional boron ion implantation is performed to the bottom of the recess 110 under the protection of the oxide layer 200 and the first etching mask above it, the boron ions are implanted to the bottom of the recess 110 and under part of the sidewall, and then a high-temperature annealing process is performed under the first annealing condition to promote the diffusion of the implanted boron ions. At this time, the concentration of the boron ions at the bottom plane of the recess 110 is relatively high, and then the concentration gradually decreases to the abrupt PN junction.

[0061] In one specific application embodiment, by implanting boron ions to the bottom of the recess 110, the region where the boron ions are implanted is the first P-type doping region 310, which forms a PN junction with the N-type epitaxial layer 100, and the junction of the first P-type doping region 310 and the N-type epitaxial layer 100 forms the N-type channel region 120. By matching the annealing temperature and annealing time of the boron ions, the width of the N-type channel region 120 can be controlled.

[0062] In one specific application embodiment, by matching the annealing temperature and annealing time of the boron ions, the width of the N-type channel region 120 can be controlled to be 1-3um.

[0063] In one specific application embodiment, the first P-type doping region 310 surrounds the bottom of the recess 110, and the doping type above the sidewall of the recess 110 still remains N-type, which is used for subsequent preparation of a Schottky junction region.

[0064] In one specific application embodiment, the doping concentration in the first P-type doping region 310 is inversely proportional to the distance from the bottom of the recess 110, that is, the closer to the bottom of the recess 110, the higher the doping concentration, until the concentration of the first P-type doping ions at the abrupt PN junction 311 between the N-type epitaxial layer 100 is the lowest

[0065] In one specific application embodiment, the implantation dose of the first P-type doping ions is 1*10 12 -9*10 12 The implantation energy of the first P-type doping ions is 20-120KeV.

[0066] In step S300, second P-type doping ions are implanted to the sidewall of the recess to form a second P-type doping region on the sidewall of the recess.

[0067] In this embodiment, the doping concentration of the second P-type doping region 320 is greater than the doping concentration of the first P-type doping region 310, and the combination of the first P-type doping region 310 and the second P-type doping region 320 forms a Schottky junction region. Figure 4As shown, the second P-type doping ions are implanted into the sidewall of the groove 110 to form the second P-type doping region 320 as an implantation region of medium concentration P-type doping ions.

[0068] Specifically, the second P-type doping ions can be the same as the first P-type doping ions, for example, the second P-type doping ions are boron ions and the first P-type doping ions are also boron ions; or the second P-type doping ions can be different from the first P-type doping ions, for example, the second P-type doping ions are boron ions and the first P-type doping ions are aluminum ions.

[0069] In one embodiment, the implantation angle D of the second P-type doping ions is arctan(A / (B+C)), A is the width of the groove 110, B is the thickness of the oxide layer 200, and C is the depth of the groove 110.

[0070] In a specific application, since the implantation angle D of the second P-type doping ions is greater than 0, the cross-sectional shape of the second P-type doping region before the annealing treatment is a parallelogram.

[0071] In one specific application embodiment, the doping concentration of the second P-type doping region 320 is at least 10 times the doping concentration of the first P-type doping region 310.

[0072] In step S400, third P-type doping ions are implanted above the sidewall of the groove, and an annealing treatment is performed under a second annealing condition to form a third P-type doping region above the sidewall of the groove.

[0073] In the present embodiment, the annealing temperature in the second annealing condition is less than the annealing temperature in the first annealing condition, and the doping concentration of the third P-type doping region 330 is greater than the doping concentration of the second P-type doping region 320.

[0074] In one specific application embodiment, the doping concentration of the third P-type doping region 330 is at least 100 times the doping concentration of the first P-type doping region 310. Specifically, the doping concentrations of the first P-type doping region 310, the second P-type doping region 320, and the third P-type doping region 330 gradually increase, and the doping concentration of each P-type doping region is at least 10 times the doping concentration of the previous P-type doping region.

[0075] In the present embodiment, the third P-type doping ions are implanted into the sidewall of the groove 110 to form the third P-type doping region 330 as an implantation region of high concentration P-type doping ions. Figure 5 As shown, the implantation dose of the third P-type doping ions is greater than the implantation dose of the second P-type doping ions, and at this time, the high-concentration third P-type doping region 330 is formed above the sidewall of the groove 110.

[0076] In one embodiment, referring to Figure 6 As shown, in step S400, the step of implanting third P-type doping ions above the sidewall of the groove and performing an annealing treatment under a second annealing condition includes steps S410 to S430.

[0077] In step S410, a second etching mask is formed on the front surface of the N-type epitaxial layer, the bottom of the groove, and the lower part of the sidewall of the groove, and a third P-type ion doping area is determined.

[0078] In this embodiment, the second etching mask is formed by spin-coating photoresist on the front surface of the N-type epitaxial layer 100, the bottom of the groove 110, and the lower part of the sidewall of the groove 110, and then determining the pattern of the third P-type ion doping area after exposure, so as to implant the third P-type doping ions.

[0079] In a specific application embodiment, the thickness of the second etching mask is 0.1-1.0 μm.

[0080] In a specific application embodiment, after spin-coating photoresist, the thickness of the photoresist is 0.1-1.0 μm, and at this time the groove 110 is completely covered by the photoresist; the exposure intensity is adjusted so that the photoresist is retained at the sidewall PN junction of the groove 110, that is, the photoresist above this position is exposed, and after the photoresist is cured, the lower part of the photoresist is retained and used as an implantation blocking layer of high-concentration boron ions together with the surface oxide layer 200.

[0081] In step S420, the third P-type doping ions are implanted above the sidewall of the groove under the protection of the second etching mask.

[0082] In this embodiment, the implantation of the third P-type doping ions is performed by adjusting the implantation angle, and the implantation dose of the third P-type doping ions is greater than that of the second P-type doping ions.

[0083] In a specific application embodiment, the implantation dose of the third P-type doping ions is 1*10 14 -8*10 15 , and the implantation energy of the third P-type doping ions is 60-120 KeV.

[0084] In step S430, the second etching mask and the oxide layer are removed, and annealing treatment is performed under the second annealing condition.

[0085] In this embodiment, after the second etching mask and the oxide layer 200 are removed, annealing treatment is performed under the second annealing condition, so as to activate the second P-type doping ions and the third P-type doping ions, and form a third P-type doping area 330 with high doping concentration and a second P-type doping area 320 with medium doping concentration on the sidewall of the groove 110.

[0086] In a specific application embodiment, the photoresist and the oxide layer are removed, and low-temperature annealing is performed at 800-1000 °C for 30-90 minutes, so as to activate the medium-high-concentration boron ion doping area and form a structure as shown in FIG. 4D. Figure 5The structure shown, that is, the sidewall is composed of the third P-type doped region 330 with high doping concentration and the second P-type doped region 320 with medium doping concentration, and the bottom is composed of the first P-type doped region 310 with low doping concentration, forming three kinds of injection regions.

[0087] The concentration relationship of the third P-type doped region 330, the second P-type doped region 320 and the first P-type doped region 310 is as shown in the following table. Figure 7 As shown, the second P-type doped region 320 and the third P-type doped region 330 form the sidewall injection region 321 of the recess 110, and the doping concentration gradually decreases. Figure 7 As shown, the third P-type doped region 330 and the second P-type doped region 320 form the sidewall injection region 321 of the recess 110, and the doping concentration gradually decreases, and the distance between the doping concentration in the first P-type doped region 310 and the bottom of the recess 110 is inversely proportional, that is, the closer to the bottom of the recess 110, the higher the doping concentration, until the concentration of the first P-type doped ions at the abrupt PN junction 311 between the N-type epitaxial layer 100 is the lowest, and the doping concentration of the first P-type doped ions at this position is less than the doping concentration of the N-type doped ions in the N-type epitaxial layer 100.

[0088] In step S500, a Schottky metal layer is formed on both sides of the recess, and an ohmic metal layer is formed on the bottom and sidewall of the recess.

[0089] In this embodiment, as shown in the following table, the second P-type doped region 320 and the third P-type doped region 330 form the sidewall injection region 321 of the recess 110, and the doping concentration gradually decreases. Figure 8 As shown, by forming a Schottky metal layer 410 on the N-type epitaxial layer 100 on both sides of the recess 110 and the third P-type doped region 330, and forming an ohmic metal layer 420 on the bottom and sidewall of the recess 110, the Schottky metal layer 410 is ensured to cover the third P-type doped region 330, preventing the ohmic metal layer 420 from contacting the N-type channel region 120 to form an ohmic contact, and avoiding affecting the control of the leakage current of the device.

[0090] In a specific application embodiment, the Schottky metal layer 410 and the ohmic metal layer 420 are connected, used to cover two corners of the recess 110, and the upper surface of the ohmic metal layer 420 is flush with the upper surface of the third P-type doped region 330.

[0091] In a specific application embodiment, the Schottky metal material is deposited, and the Schottky metal material on the sidewall and the bottom is etched away, leaving the Schottky metal layer 410 on the top of the N-type epitaxial layer 100, while ensuring that the Schottky metal layer 410 covers the third P-type doped region 330, preventing the subsequent ohmic metal layer 420 from forming an ohmic contact with the N-type channel region 120, which is not conducive to the control of the leakage current, and then depositing an ohmic metal material after a short Schottky metal alloy, and forming an ohmic metal alloy, to form Figure 8 The device structure shown.

[0092] In step S600, a cathode metal layer is formed on the back surface of the N-type epitaxial layer.

[0093] In the present embodiment, the cathode metal layer 510 is formed by depositing a cathode metal material on the back surface of the N-type epitaxial layer 100. Figure 8

[0094] In the present embodiment, the trench-type MPS device prepared by the above preparation method has low anode injection efficiency of the first P-type doped region 310 at the bottom of the groove 110, moderate anode injection efficiency of the P-type doped region on the sidewall of the groove 110, which reduces the IRM of the trench-type MPS device and improves the softness factor, but weakens the electric field shielding of the Schottky device part. Further, by forming a third P-type doped region 330 with a higher doping concentration on the sidewall of the groove 110, it has a higher anode injection efficiency, but the area ratio is small, and the influence on the IRM is small, and it can shield the electric field intensity of the Schottky device part; the existence of the Schottky device part can further reduce the anode injection efficiency, while improving the softness of the device. Therefore, the trench-type MPS device prepared by the above preparation method can obtain the characteristics of high voltage resistance, low VF, high softness, and low IRM.

[0095] In one embodiment, the implantation dose of the third P-type doped ions is at least 10 times the implantation dose of the first P-type doped ions.

[0096] In one embodiment, the implantation dose of the first P-type doped ions is 1*10 12 -9*10 12 , and the implantation energy of the first P-type doped ions is 20-120KeV.

[0097] The implantation dose of the second P-type doped ions is 5*10 12 -1*10 13 , and the implantation energy of the second P-type doped ions is 60-200KeV.

[0098] The implantation dose of the third P-type doped ions is 1*10 14 -8*10 15 , and the implantation energy of the third P-type doped ions is 60-120KeV.

[0099] In one embodiment, the annealing time in the first annealing condition is greater than the annealing time in the second annealing condition.

[0100] In one embodiment, the annealing temperature in the first annealing condition is 1050-1200℃, and the annealing time in the first annealing condition is 100-600 minutes; the annealing temperature in the second annealing condition is 800-1000℃, and the annealing time in the second annealing condition is 30-90 minutes.

[0101] ​In this embodiment, by setting the annealing time in the first annealing condition to be greater than the annealing time in the second annealing condition, the diffusion depth of the second P-type doped ions and the third P-type doped ions can be reduced. At this time, the thickness of the second P-type doped region 320 and the third P-type doped region 330 is less than the thickness of the first P-type doped region 310.

[0102] In one embodiment, the diffusion depth of the second P-type dopant and the third P-type dopant is at least half the diffusion depth of the first P-type dopant.

[0103] In one embodiment, the implantation angle of the third P-type doped ion is smaller than that of the second P-type doped ion, and greater than 9°.

[0104] In one embodiment, after removing the oxide layer 110 on the top of the device, Schottky contacts and ohmic contacts are prepared to form an MPS structure. Then, platinum diffusion or electron irradiation can be performed according to the actual process conditions to enable the MPS diode to have fast recovery characteristics.

[0105] This application also provides a trench-type MPS device, which is fabricated using the fabrication method of any of the above embodiments.

[0106] This application also provides a trench-type MPS device, combined with... Figure 8 As shown, the trench-type MPS device includes: an N-type epitaxial layer 100, a first P-type doped region 310, an N-type channel region 120, a second P-type doped region 320, a third P-type doped region 330, a Schottky metal layer 410, an ohmic metal layer 420, and a cathode metal layer 510.

[0107] Specifically, the front side of the N-type epitaxial layer 100 is provided with a groove; the first P-type doped region 310 surrounds the bottom of the groove of the N-type epitaxial layer 100; the N-type channel region 120 is disposed between the first P-type doped region 310 and the N-type epitaxial layer 100; the second P-type doped region 320 is disposed on the sidewall of the groove; the third P-type doped region 330 is disposed on the sidewall of the groove and is located between the first P-type doped region 310 and the second P-type doped region 320; the Schottky metal layer 410 is located on the front side of the N-type epitaxial layer 100 and is located on both sides of the groove; the ohmic metal layer 420 is located inside the groove; and the cathode metal layer 510 is located on the back side of the N-type epitaxial layer 100.

[0108] In this embodiment, the doping concentrations of the third P-type doped region 330, the second P-type doped region 320, and the first P-type doped region 310 gradually decrease. Specifically, the concentration relationship of the third P-type doped region 330, the second P-type doped region 320, and the first P-type doped region 310 is as follows: Figure 7 As shown, combined with Figure 7As shown, the third P-type doped region 330 and the second P-type doped region 320 form the sidewall implantation region 321 of the groove, and its doping concentration gradually decreases. The doping concentration in the first P-type doped region 310 is inversely proportional to the distance between it and the bottom of the groove, that is, the closer to the bottom of the groove, the higher its doping concentration, until the concentration of the first P-type doped ions at the abrupt PN junction 311 between it and the N-type epitaxial layer 100 is the lowest. The doping concentration of the first P-type doped ions at this point is less than the doping concentration of the N-type doped ions in the N-type epitaxial layer 100.

[0109] Specifically, the first P-type doped region 310 forms a PN junction with the N-type epitaxial layer 100, and an N-type channel region 120 is formed at the junction of the first P-type doped region 310 and the N-type epitaxial layer 100. The width of the N-type channel region 120 can be controlled by matching the annealing temperature and annealing time of boron ions.

[0110] In one specific application embodiment, the width of the N-type channel region 120 is 1-3 μm.

[0111] In one specific application embodiment, the trench depth is at least half the thickness of the N-type epitaxial layer 100.

[0112] In one specific application embodiment, the Schottky metal layer 410 covers the third P-type doped region 330 to prevent the subsequent ohmic metal layer 420 from forming an ohmic contact with the N-type channel region 120, which would be detrimental to leakage current control.

[0113] In one embodiment, the cross-sectional shape of the second P-type doped region 320 is a parallelogram, and the angle between the second P-type doped region 320 and the bottom surface of the groove is E = 90° + D.

[0114] D = arctan(A / (B+C)), where A is the width of the groove, B is the thickness of the oxide layer covering the surface of the N-type epitaxial layer 100 when the second P-type doped ion is implanted, and C is the depth of the groove.

[0115] In one embodiment, the cathode metal layer 510 is a Ni / Ti / Ni / Ag stacked material.

[0116] In the trench-type MPS device and its fabrication method provided in this application embodiment, a trench is formed on the front side of the N-type epitaxial layer. Then, a first P-type dopant ion is implanted at the bottom of the trench and annealed at high temperature to form a first P-type doped region. A second P-type dopant ion is implanted below the sidewall of the trench, and a third P-type dopant ion is implanted above the sidewall of the trench. Then, a second P-type doped region is formed below the sidewall of the trench and a third P-type doped region is formed above the sidewall of the trench after low-temperature annealing. The doping concentration of the first, second, and third P-type doped regions gradually increases, thereby making the electric field shielding of the Schottky device at the bottom of the trench weaker and the anode implantation efficiency above the sidewall of the trench higher. At the same time, it satisfies the conditions of high electric field shielding of the Schottky device and small impact on IRM, realizing the characteristics of high breakdown voltage, low VF, high softness, and low IRM of the fast recovery diode device.

[0117] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of doped regions is used as an example. In practical applications, the above-described functional areas can be assigned to different doped regions as needed, that is, the internal structure of the device can be divided into different doped regions to complete all or part of the functions described above.

[0118] In the embodiments, the doped regions can be integrated into one functional region, or each doped region can exist independently, or two or more doped regions can be integrated into one functional region. The integrated functional region can be implemented using the same type of dopant ion or multiple types of dopant ions. Furthermore, the specific names of each doped region are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the doped region in the fabrication method of the above device can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0119] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method for fabricating a trench-type MPS device, characterized in that, The preparation method includes: An oxide layer is formed on the front side of the N-type epitaxial layer, and the oxide layer and the N-type epitaxial layer are etched under the protection of a first etching mask to form a groove on the front side of the N-type epitaxial layer. Under the protection of the oxide layer, a first P-type dopant ion is implanted into the bottom of the groove and annealed under the first annealing condition to form a first P-type doped region at the bottom of the groove, and an N-type channel region is formed at the interface between the first P-type doped region and the N-type epitaxial layer. A second P-type dopant ion is implanted into the sidewall of the groove to form a second P-type doped region on the sidewall of the groove; wherein the doping concentration of the second P-type doped region is greater than the doping concentration of the first P-type doped region; A third P-type dopant ion is injected above the sidewall of the groove, and annealing is performed under a second annealing condition to form a third P-type doped region above the sidewall of the groove; wherein the annealing temperature in the second annealing condition is lower than the annealing temperature in the first annealing condition, and the doping concentration of the third P-type doped region is greater than the doping concentration of the second P-type doped region. Schottky metal layers are formed on both sides of the groove, and ohmic metal layers are formed on the bottom and sidewalls of the groove; A cathode metal layer is formed on the back side of the N-type epitaxial layer.

2. The preparation method according to claim 1, characterized in that, The step of injecting a third P-type dopant ion above the sidewall of the groove and annealing it under the second annealing condition includes: A second etching mask is formed on the front side of the N-type epitaxial layer, the bottom of the groove, and below the sidewall of the groove to define the third P-type ion doped region; Under the protection of the second etching mask, a third P-type doped ion is injected above the sidewall of the groove; Remove the second etching mask and the oxide layer, and then perform annealing under the second annealing conditions.

3. The preparation method according to claim 1, characterized in that, The implantation dose of the third P-type dopant ion is at least 10 times that of the first P-type dopant ion.

4. The preparation method according to claim 1, characterized in that, The implantation dose of the first P-type doped ion is 1*10-1 12 -9*10 12 The implantation energy of the first P-type doped ion is 20-120 keV; The implantation dose of the second P-type doped ion is 5*10. 12 -1*10 13 The implantation energy of the second P-type doped ion is 60-200 keV; The implantation dose of the third P-type doped ion is 1*103 14 -8*10 15 The implantation energy of the third P-type doped ion is 60-120 keV.

5. The preparation method according to claim 1, characterized in that, The annealing temperature in the first annealing condition is 1050℃-1200℃, and the annealing time in the first annealing condition is 100 minutes-600 minutes; The annealing temperature in the second annealing condition is 800℃-1000℃, and the annealing time in the second annealing condition is 30 minutes-90 minutes.

6. The preparation method according to claim 1, characterized in that, The implantation angle D of the second P-type doped ion is D = arctan(A / (B+C)), where A is the width of the groove, B is the thickness of the oxide layer, and C is the depth of the groove.

7. The preparation method according to claim 6, characterized in that, The implantation angle of the third P-type doped ion is smaller than that of the second P-type doped ion, and greater than 9°.

8. A trench-type MPS device, characterized in that, The trench-type MPS device includes: An N-type epitaxial layer, wherein a groove is provided on the front side of the N-type epitaxial layer; The first P-type doped region surrounds the bottom of the groove of the N-type epitaxial layer; An N-type channel region is located between the first P-type doped region and the N-type epitaxial layer; A second P-type doped region is located on the sidewall of the groove; A third P-type doped region is disposed on the sidewall of the groove and located between the first P-type doped region and the second P-type doped region; wherein the doping concentration of the third P-type doped region is greater than the doping concentration of the second P-type doped region, and the doping concentration of the second P-type doped region is greater than the doping concentration of the first P-type doped region. A Schottky metal layer is located on the front side of the N-type epitaxial layer and on both sides of the groove; An ohmic metal layer is located within the groove; A cathode metal layer is located on the back side of the N-type epitaxial layer.

9. The trench-type MPS device as described in claim 8, characterized in that, The cross-sectional shape of the second P-type doped region is a parallelogram.

10. The trench-type MPS device as described in claim 8, characterized in that, The cathode metal layer is a Ni / Ti / Ni / Ag stacked material.

Citation Information

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