Light emitting diode package with multiple test terminals and shunt elements

Abstract

The LED package with multiple test terminals and parallel components includes a package substrate and electrically testable first, second and third terminals disposed on the package substrate. The package substrate has upper component planes and lower SMD electrode planes on both sides. The side edges of the upper component planes are provided with main component first and second electrodes and auxiliary component first and second electrodes. The electrically testable first terminal is electrically connected to the main component first electrode and the auxiliary component first electrode. The electrically testable second terminal is electrically connected to the auxiliary component second electrode. The electrically testable third terminal is electrically connected to the main component second electrode. Accordingly, the main component first and second electrodes and the space therebetween are electrically connected to the main component LED dies. The auxiliary component first and second electrodes and the space therebetween are electrically connected to the parallel auxiliary components. After the electrical connection, the electrical characteristics of the main component LED dies and the parallel auxiliary components can still be measured through the electrically testable first, second and third terminals.

Description

Technical Field

[0001] This invention relates to the packaging structure of light-emitting diodes, and more particularly to a light-emitting diode package having multiple test terminals and parallel elements. Background Technology

[0002] Light-emitting diodes (LEDs) are light sources that generate high brightness by utilizing the recombination of electrons and holes in semiconductors. Products can be used in high-intensity sterilization (ultraviolet light), automotive headlights and taillights (blue, yellow, and red light), projector light sources (blue, green, and red), and infrared security detection (infrared light). In addition to high luminous intensity and luminous density, excellent high-power LED components also require high reliability. Taking automotive headlight modules as an example, LED failure can affect nighttime safety. Even a trace failure of 1 ppm is considered a significant improvement in the automotive industry, given the high standards and specifications for automotive LEDs.

[0003] Depending on the LED chip structure, LEDs come in various forms. Besides the lower-cost horizontal chips, more complex flip-chip and vertical high-power LED chips are also being developed for high-power, large-size chips. For example, US Patent 8,183,579 B2 discloses a FLIP-CHIP type LED chip structure. Another example is US Patent 8,546,831, which discloses a vertical LED chip structure. Yet another example is US Patent 8,319,250, which discloses a multi-conducting pillar technology using vertical LEDs. This technology allows the N-electrode to serve as the bottom electrode, extending multiple sidewall-insulated vertical conductive pillars through the P-type semiconductor layer, the quantum well layer, and into the N-type semiconductor layer. This ensures that the operating current is evenly distributed within the N-type semiconductor layer, while the P-electrode is positioned on the side for wire bonding in the packaging process.

[0004] Currently, the main failure modes of LEDs are leakage current caused by wafer defects. These also include the stress pulling the semiconductor layer during the packaging process due to die bonding and electrode conduction; or the thermal stress during high-temperature processes; or the stretching of the encapsulating material causing microcracks or film peeling, resulting in greater leakage current, causing package failure or reduced reliability.

[0005] like Figure 1 This is a circuit diagram of a known package. (Example) Figure 2The diagram shows a cross-sectional view of a conventional light-emitting diode (LED) package structure. During SMD packaging, the P-electrode 2 is bonded to the die-bonding base 4 of the package substrate 3 via a die-bonding adhesive layer 4A. The N-electrode 5 is electrically connected to the wire bonding endpoint 7 via a gold wire 6. The die-bonding base 4 and the wire bonding endpoint 7 are electrically connected to the anode 9A and cathode 9B located on the other side of the package substrate 3 via conductive metal 8, respectively. The LED chip 1 can be connected in parallel with a Zener diode 1A to prevent damage from strong static electricity.

[0006] To meet the high reliability requirements, the packaged LED chip 1 can use the anode 9A and the cathode 9B as test contacts and be tested with a testing instrument to meet the high standards of automotive LEDs.

[0007] However, when inspecting LED chip 1, severe component failure can be detected by forward voltage Vf and brightness. Microcracks in the semiconductor can only be detected by reverse bias characteristics (e.g., Ir). But after connecting the Zener diode 1A in parallel with LED chip 1, it is impossible to measure the electrical characteristics under reverse bias (e.g., leakage current Ir); only the photoelectric characteristics under forward bias operation (e.g., brightness, wavelength, and Vf) can be measured, thus reducing the reliability and detectability of LED chip 1.

[0008] Besides the Zener diode 1A connected in parallel, any other parallel components in the circuit will interfere with the electrical measurements of LED chip 1. If the leakage current of LED chip 1 under reverse bias conditions cannot be accurately measured, it will greatly hinder the reliability of LED chip 1 in the packaging process and the evaluation of aging tests. Summary of the Invention

[0009] Therefore, the main objective of this invention is to disclose a light-emitting diode package with multiple test endpoints and parallel components, which can still measure the electrical characteristics of the main light-emitting diode die and the parallel secondary components after die bonding.

[0010] This invention relates to a light-emitting diode (LED) package with multiple test endpoints and parallel components, providing a die-bonded main LED chip and a parallel secondary component. It includes a package carrier, a first electrical test contact, a second electrical test contact, and a third electrical test contact. The package carrier has an upper component plane and a lower SMD electrode plane located on both sides. The upper component plane is provided with a first electrode of the main component, a second electrode of the main component, a first electrode of the secondary component, and a second electrode of the secondary component. The first and second electrodes of the main component are electrically connected to the main LED chip, while the first and second electrodes of the secondary component are electrically connected to the parallel secondary component. In different embodiments, the electrical connection can be achieved through die bonding, wire bonding, etc., as long as an electrical connection is possible. The first electrodes of the main component and the first electrodes of the secondary component are electrically connected. The first electrical test contact is located on the package substrate and is electrically connected to the first electrode of the main component and the first electrode of the auxiliary component. The second electrical test contact is located on the package substrate and is electrically connected to the second electrode of the auxiliary component. The third electrical test contact is located on the package substrate and is electrically connected to the second electrode of the main component.

[0011] Accordingly, the first electrode and the second electrode of the main component can be used for die bonding of the main component light-emitting diode chip, while the first electrode and the second electrode of the auxiliary component can be used for die bonding of a parallel auxiliary component. After the main component light-emitting diode chip and the parallel auxiliary component are die bonded and connected to the important process structure, the electrical characteristics of the main component light-emitting diode chip and the parallel auxiliary component can still be measured through the first, second and third electrical test contacts. Finally, the second and third electrical test contacts are connected. The connection process is simple and safe, and the reliability of the main component light-emitting diode chip can be maintained. Attached Figure Description

[0012] Figure 1 This is a circuit diagram of a known package;

[0013] Figure 2 This is a schematic cross-sectional view of a conventional light-emitting diode (LED) package structure.

[0014] Figure 3 This is a schematic diagram of the front structure of the packaging carrier board of the present invention;

[0015] Figure 4 This is a schematic diagram of the back structure of the packaging carrier board of the present invention;

[0016] Figure 5 This is a schematic diagram of the packaging structure circuit of the present invention;

[0017] Figure 6 This is a schematic diagram of the front structure of the packaging carrier board according to an embodiment of the present invention;

[0018] Figure 7 This is a cross-sectional schematic diagram of the packaging structure according to an embodiment of the present invention;

[0019] Figure 8 This is a cross-sectional schematic diagram of another packaging structure according to an embodiment of the present invention;

[0020] Figure 9 This is a schematic diagram of the circuit connection according to an embodiment of the present invention. Figure 1 ;

[0021] Figure 10 This is a schematic diagram of the circuit connection according to an embodiment of the present invention. Figure 2 ;

[0022] Figure 11 This is a schematic diagram of the packaging carrier board structure according to another embodiment of the present invention;

[0023] Figure 12 This is a schematic diagram of the packaging carrier board structure according to another embodiment of the present invention;

[0024] Figure 13 This is a schematic diagram of the packaging structure circuit of another embodiment of the present invention;

[0025] Figure 14 This is a schematic diagram of the packaging carrier board structure according to another embodiment of the present invention. Detailed Implementation

[0026] To gain a deeper understanding and appreciation of the features, objectives, and effects of this invention, a preferred embodiment is described below in conjunction with the accompanying drawings:

[0027] Please see Figure 3 , Figure 4 and Figure 5 As shown, the present invention is a light-emitting diode package with multiple test terminals and parallel components, which provides die bonding for a main component light-emitting diode die 10 and a parallel secondary component 11. It includes a package board 20, a first electrical test position contact 31, a second electrical test position contact 32 and a third electrical test position contact 33.

[0028] Please refer to the following: Figure 6 and Figure 7As shown, the packaging substrate 20 has an upper component plane 21 and a lower bottom SMD electrode plane 22 located on both sides. The upper component plane 21 is provided with a main component first electrode 41, a main component second electrode 42, a secondary component first electrode 43, and a secondary component second electrode 44. The main component first electrode 41 and the main component second electrode 42 are used for die bonding of the main component light-emitting diode chip 10, while the secondary component first electrode 43 and the secondary component second electrode 44 are used for die bonding of the parallel secondary component 11. The main component first electrode 41 and the secondary component first electrode 43 are electrically connected.

[0029] The first electrical test contact 31 is disposed on the packaging substrate 20 and electrically connected to the first electrode 41 of the main component and the first electrode 43 of the auxiliary component; the second electrical test contact 32 is disposed on the packaging substrate 20 and electrically connected to the second electrode 44 of the auxiliary component; the third electrical test contact 33 is disposed on the packaging substrate 20 and electrically connected to the second electrode 42 of the main component.

[0030] In actual structure, the packaging substrate 20 can be made of ceramic substrate (aluminum nitride, alumina, silicon carbide), copper substrate, BT (Bismaleimide Triazine) board, etc., and can be a single-layer board or a multi-layer board. The first electrical test contact 31, the second electrical test contact 32, and the third electrical test contact 33 are disposed on the upper component plane 21. The lower bottom SMD electrode plane 22 is also provided with a first external electrode 51, a second external electrode 52, and a transfer electrode 53. Furthermore, the first external electrode 51 of the carrier board is electrically connected to the first electrode 41 of the main component, the first electrode 43 of the auxiliary component, and the first electrical test position contact 31 via a first electrode through-hole 61; the second external electrode 52 of the carrier board is electrically connected to the second electrode 42 of the main component and the third electrical test position contact 33 via a second electrode through-hole 62; the intermediate electrode 53 of the carrier board is electrically connected to the second electrode 44 of the auxiliary component and the second electrical test position contact 32 via an intermediate electrode through-hole 63. Additionally, a layer 54 can also be provided on the bottom SMD electrode plane 22 (e.g., ...). Figure 4 As shown, the height of the augmentation layer 54 is the same as that of the first external electrode 51, the second external electrode 52, and the intermediate electrode 53 of the carrier plate, which can meet the needs of subsequent processes.

[0031] Additionally, the first contact 31 for electrical testing, the first electrode 41 of the main component, and the first electrode 43 of the secondary component can utilize a metal conductive layer 64 embedded within the packaging substrate 20 (e.g., Figure 7(As shown in the drawing) Electrical connection; the second electrical test contact 32 and the second electrode 44 of the secondary component can also be electrically connected using the metal conductive layer 64 embedded in the package substrate 20; the electrical connection between the third electrical test contact 33 and the second electrode 42 of the main component can also be achieved using the metal conductive layer 64 embedded in the package substrate 20 (such as... Figure 7 (As shown in the drawing) Electrical connection. The conductive metal layer 64 can also be formed on the upper component plane 21 of the package carrier 20 (e.g., Figure 6 (Drawn).

[0032] The main component LED chip 10 of this invention can be any one selected from horizontal LEDs, flip-chip LEDs, vertical LEDs, and multi-pillar vertical LEDs (such as US Patent 8,319,250), and the main component LED chip 10 can be a single LED chip or multiple LED chips connected in series to increase luminous brightness. The cross-section of the packaging structure of this invention is shown below. Figure 7 As shown, the main component LED chip 10 is a vertical LED. The main component LED chip 10 includes an uppermost N-type electrode 101 and a lowermost P-type electrode 102. The P-type electrode 102 is die-bonded to the second electrode 42 of the main component via a substrate die-bonding layer 103, while the N-type electrode 101 is wire-connected to the first electrode 41 of the main component via a gold wire 65. The parallel secondary component 11 can be selected from Zener diodes, capacitors, and LED chips to meet different functional requirements. If the parallel secondary component 11 is an LED chip, its forward voltage (Vf) must be close to the forward voltage (Vf) of the main component LED chip 10. If the parallel secondary component 11 is a Zener diode, a bidirectional Zener diode can be selected. Alternatively, a unidirectional Zener diode can be used. If a unidirectional Zener diode is used, the parallel secondary element 11 needs to be connected in parallel with the main element LED chip 10 with opposite polarity.

[0033] like Figure 5As shown, the LED package structure circuit has three test contacts: the first electrical test contact 31, the second electrical test contact 32, and the third electrical test contact 33. Testing the first electrical test contact 31 and the second electrical test contact 32 allows for testing whether the parallel auxiliary component 11 is operating normally. Testing the first electrical test contact 31 and the third electrical test contact 33, in the presence of the parallel auxiliary component 11, also allows for the measurement of the small-current forward voltage Vf of the main component LED chip 10, as well as the precise value of the leakage current of the main component LED chip 10 under reverse bias conditions. The causes of reverse bias leakage current include semiconductor defect propagation, aging in a high-temperature furnace, and ESD testing, etc.

[0034] After the test is completed, the second electrical test contact 32 and the third electrical test contact 33 can be electrically connected together through a conductive metal 66. The conductive metal 66 can be formed using gold wires from a wire bonding process or by forming a semiconductor thin film.

[0035] In addition, to protect the components on the package carrier 20, after testing, such as Figure 7 As shown, the present invention may further include an encapsulation material 70 that covers the upper component plane 21 of the encapsulation carrier 20, thereby protecting the components on the encapsulation carrier 20, such as the main component light-emitting diode chip 10, the first electrical test contact 31, the second electrical test contact 32, the third electrical test contact 33, the first electrode 41 of the main component, the second electrode 42 of the main component, the first electrode 43 of the auxiliary component, and the second electrode 44 of the auxiliary component, etc.

[0036] See also Figure 8 In another embodiment, the present invention may further include a first encapsulation material 71 and a second encapsulation material 72, wherein the first encapsulation material 71 covers the main component light-emitting diode chip 10, the parallel secondary component 11, the main component first electrode 41, the main component second electrode 42, the secondary component first electrode 43, and the secondary component second electrode 44.

[0037] By using the unpackaged first electrical test contact 31, the second electrical test contact 32, and the third electrical test contact 33 for testing, the problem that the gold wire 65 is pulled by the packaging material during the conventional packaging process, which indirectly damages the main component LED chip 10, resulting in microcracks or film peeling of the main component LED chip 10, causing failure or instability, can be solved.

[0038] After the test is completed, the second electrical test contact 32 and the third electrical test contact 33 are electrically connected together through the conductive metal 66. Finally, the second package material 72 covers the conductive metal 66, the first electrical test contact 31, the second electrical test contact 32, and the third electrical test contact 33, thus completing the overall packaging process. Furthermore, if the main component, the LED chip 10, fails, the second package material 72 can be removed separately, and the connecting wire 66 can be disconnected or broken without damaging the main component, the LED chip 10. Therefore, it can be retested, and the root cause of the component failure can be easily and effectively identified.

[0039] Please refer to the following: Figure 9 As shown, in one embodiment, the first electrical test contact 31, the second electrical test contact 32, and the third electrical test contact 33 can be disposed on the lower bottom SMD electrode plane 22 of the packaging substrate 20. In actual structure, the first external electrode 51 of the substrate can be used as the first electrical test contact 31, the intermediate electrode 53 of the substrate as the second electrical test contact 32, and the second external electrode 52 of the substrate as the third electrical test contact 33. After testing, the lower bottom SMD electrode plane 22 of the packaging substrate 20 covers a circuit board 80, and the second external electrode 52 and the intermediate electrode 53 of the substrate are electrically connected on the lower bottom SMD electrode plane 22 via solder paste 81. Thus, multiple packaging substrates 20 can be arranged side by side, and in this structure, the circuit board 80 has multiple circuit board extension electrodes 82 that are electrically connected to the first external electrode 51 and the second external electrode 52 of the multiple packaging substrates 20, which can meet the usage requirements of subsequent processes.

[0040] Please refer to the following: Figure 10 As shown, in one embodiment, the first external electrode 51, the second external electrode 52, and the intermediate electrode 53 of the carrier plate can also extend to a plane 83 above the circuit board of the circuit board 80, and the second external electrode 52 and the intermediate electrode 53 of the carrier plate are electrically connected to the plane 83 above the circuit board through a conductive film 81A.

[0041] In the above-described embodiments, the main component LED chip 10 is a vertical LED. This invention can also be used for flip-chip LEDs, multi-pillar vertical LEDs, etc., as described below.

[0042] Please refer to the following: Figure 11As shown, if the main component LED chip 10A is a flip-chip LED and the parallel secondary component 11A is a flip-chip LED, then the main component LED chip 10A and the parallel secondary component 11A can be die-bonded onto the packaging substrate 20 by flip-chip bonding.

[0043] Please refer to the following: Figure 12 As shown, if the main component LED chip 10B is a multi-pillar vertical LED, and the parallel auxiliary component 11B is a capacitor, then the N-type electrode (located at the bottom, not shown) of the main component LED chip 10B can be die-bonded to the first electrode 41 of the main component. The P-type electrode 102 of the main component LED chip is then electrically connected to the second electrode 42 of the main component via a gold wire 65 using a wire bonding method. Figure 12 As shown, it only has the first electrode through hole 61 and the second electrode through hole 62, and the second position contact 32 and the third position contact 33 of the electrical test are electrically connected by conductive metal 66 (wire bonding or metal film) after the test, so the transfer electrode through hole 63 in the carrier plate can be omitted.

[0044] Please refer to the following: Figure 13 The diagram shown is a schematic of the packaging structure circuit according to another embodiment of the present invention. In this embodiment, the main component, the light-emitting diode chip 10C, can be multiple light-emitting diode chips 10C1, 10C2, and 10C3 connected in series. In other embodiments, the main component, the light-emitting diode chip, can also be multiple light-emitting diode chips connected in parallel. In this embodiment, for example, in... Figure 13 In this design, the three LED chips 10C1, 10C2, and 10C3 connected in series, operating under the same forward current as a single LED chip, have an overall voltage (Vf) three times that of the main LED chip 10C, resulting in three times the light output. Therefore, current headlight packages commonly use multiple LED chips connected in series to achieve higher light output at a higher voltage.

[0045] In a series circuit, if some of the LED chips 10C1, 10C2, and 10C3 are damaged, causing leakage current, the leakage current from the other damaged chips cannot be detected as long as at least one of the LED chips 10C1, 10C2, and 10C3 in the series circuit is intact. Therefore, to improve this drawback, electrical test contacts 33B and 33C can be added between different LED chips 10C1, 10C2, and 10C3, respectively. Figure 13As shown. An electrical test contact 33B is added between LED chips 10C1 and 10C2, and an electrical test contact 33C is added between LED chips 10C2 and 10C3.

[0046] like Figure 13 As shown, measuring the third electrical test contact 33 and the electrical test contact 33B allows for the measurement of the leakage current characteristics of the LED chip 10C1. Similarly, measuring the electrical test contact 33B and the electrical test contact 33C allows for the measurement of the leakage current characteristics of the LED chip 10C2. Likewise, measuring the electrical test contact 33C and the first electrical test contact 31 allows for the measurement of the leakage current characteristics of the LED chip 10C3. This method can be extended to include more LED chips connected in series.

[0047] Please refer to the following: Figure 14 The diagram shown is a schematic of the packaging substrate structure according to another embodiment of the present invention. In this embodiment, the light-emitting diode die 10C1 is die-bonded to the second electrode 42A of a main component die A. The N electrode 12C1 of the light-emitting diode die 10C1 is connected to the P electrode terminal 42B1 of the die-bonding base of the second electrode 42B of a main component die B by wire bonding, and is electrically connected to the electrical test position contact 33B.

[0048] The light-emitting diode chip 10C2 is die-bonded to the second electrode 42B of the main component chip B. The N electrode 12C2 of the light-emitting diode chip 10C2 is connected to the P electrode terminal 42C1 of the die-bonding base of the second electrode 42C of the main component chip C by wire bonding, and is electrically connected to the electrical test position contact 33C.

[0049] The light-emitting diode chip 10C3 is die-bonded to the second electrode 42C of the main component chip C. The N electrode 12C3 of the light-emitting diode chip 10C3 is connected to the first electrode 41 of the main component by wire bonding, and can be connected in parallel with the secondary component sodium diode 11C.

[0050] The five test points of the packaged substrate in this embodiment include the first electrical test position contact 31, the second electrical test position contact 32, the third electrical test position contact 33, the electrical test position contact 33B, and the electrical test position contact 33C, which can be used for programmed measurement using five probe arrays.

[0051] As described above, the features of the present invention include at least:

[0052] 1. The main component of the present invention, the light-emitting diode chip, can be a horizontal light-emitting diode, a flip-chip light-emitting diode, a vertical light-emitting diode, or a multi-conductor-pillar vertical light-emitting diode. It can be operated as a single LED chip or as multiple LED chips connected in series, with a wide range of applications, and can meet the needs of packaging and testing.

[0053] 2. The electrical characteristics of the main component LED chip and the parallel auxiliary component can be measured by the first, second and third contact points of the electrical test. This improves the conventional method that the reverse bias electrical characteristics (such as leakage current Ir) of the main component LED chip cannot be tested in circuits with the parallel auxiliary component. This allows for the screening of components damaged due to defects in the chip material and mechanical force, thermal stress and electrostatic force during the packaging process, thereby maintaining the reliability of the main component LED chip.

[0054] 3. The first, second, and third test contacts can be located on the upper component plane or the lower SMD electrode plane of the package substrate, satisfying various test contact connection methods.

[0055] 4. Through the secondary packaging design of segmented packaging of the first packaging material and the second packaging material, the problem that the wire bonding metal is pulled by the packaging material during the conventional packaging process, which indirectly pulls and damages the main component LED chip, causing microcracks or film peeling, resulting in reduced component performance but undetectable.

[0056] 5. When a secondary packaging design is used, if a component fails, the second packaging material can be removed separately and the connecting wires can be disconnected or the circuit broken. This will not damage the main component, the LED chip, and it can be retested, making it simple and effective to find out the root cause of the component failure.

Claims

1. A light-emitting diode package with multiple test terminals and parallel components, for bonding a main light-emitting diode die and a parallel secondary component, characterized in that, Include: A packaging carrier has an upper component plane and a lower SMD electrode plane located on both sides. The upper component plane is provided with a main component first electrode, a main component second electrode, a secondary component first electrode, and a secondary component second electrode. The main component first electrode and the main component second electrode are used for die bonding of the main component light-emitting diode die, while the secondary component first electrode and the secondary component second electrode are used for die bonding of the parallel secondary component. The main component first electrode and the secondary component first electrode are electrically connected. An electrical test first position contact is disposed on the package substrate and electrically connected to the first electrode of the main component and the first electrode of the auxiliary component; An electrical test second position contact is disposed on the package substrate and electrically connected to the second electrode of the sub-component; An electrical test third position contact is disposed on the package substrate and electrically connected to the second electrode of the main component.

2. The light-emitting diode package according to claim 1, characterized in that, The first electrical test contact, the second electrical test contact, and the third electrical test contact are located on the upper component plane.

3. The light-emitting diode package according to claim 2, characterized in that, The bottom SMD electrode plane is also provided with a first external electrode of the carrier plate, a second external electrode of the carrier plate, and a transfer electrode of the carrier plate. The first external electrode of the carrier plate is electrically connected to the first electrode of the main component and the first electrode of the sub-component through a first electrode through hole. The second external electrode of the carrier plate is electrically connected to the second electrode of the main component through a second electrode through hole. The transfer electrode of the carrier plate is electrically connected to the second electrode of the sub-component through a transfer electrode through hole of the carrier plate.

4. The light-emitting diode package according to claim 2, characterized in that, The second and third electrical test contacts are electrically connected together via a conductive metal.

5. The light-emitting diode package according to claim 4, characterized in that, It also includes a packaging material that covers the upper component plane of the packaging carrier.

6. The light-emitting diode package according to claim 4, characterized in that, It also includes a first encapsulation material that covers the main component light-emitting diode die, the parallel secondary component, the first electrode of the main component, the second electrode of the main component, the first electrode of the secondary component, and the second electrode of the secondary component.

7. The light-emitting diode package according to claim 6, characterized in that, The second position contact of the electrical test is electrically connected to the third position contact of the electrical test through a conductive metal.

8. The light-emitting diode package according to claim 7, characterized in that, It also includes a second encapsulation material that covers the conductive metal, the first electrical test contact, the second electrical test contact, and the third electrical test contact.

9. The light-emitting diode package according to claim 1, characterized in that, The first electrical test contact, the second electrical test contact, and the third electrical test contact are located on the bottom SMD electrode plane.

10. The light-emitting diode package according to claim 9, characterized in that, The bottom SMD electrode plane is also provided with a first external electrode of the carrier plate, a second external electrode of the carrier plate, and a transfer electrode of the carrier plate. The first external electrode of the carrier plate is electrically connected to the first electrode of the main component and the first electrode of the sub-component through a first electrode through hole. The second external electrode of the carrier plate is electrically connected to the second electrode of the main component through a second electrode through hole. The transfer electrode of the carrier plate is electrically connected to the second electrode of the sub-component through a transfer electrode through hole of the carrier plate.

11. The light-emitting diode package according to claim 10, characterized in that, The bottom SMD electrode plane of the packaging substrate is covered on a circuit board, and the second external electrode of the substrate and the intermediate electrode of the substrate are electrically connected at the bottom SMD electrode plane through solder paste.

12. The light-emitting diode package according to claim 10, characterized in that, The bottom SMD electrode plane of the packaging substrate is disposed on a circuit board, and the first external electrode, the second external electrode and the intermediate electrode of the substrate extend to a plane above the circuit board of the circuit board. The second external electrode and the intermediate electrode of the substrate are electrically connected on the plane above the circuit board through a conductive film.

13. The light-emitting diode package according to claim 1, characterized in that, The main component, the LED chip, is selected from any one of horizontal LEDs, flip-chip LEDs, vertical LEDs, and multi-pillar vertical LEDs.

14. The light-emitting diode package according to claim 1, characterized in that, The material of the packaging substrate can be selected from ceramic substrate, BT board, copper substrate and silicon carbide substrate.

15. The light-emitting diode package according to claim 1, characterized in that, The main component, the LED chip, consists of multiple LED chips connected in series.

16. The light-emitting diode package according to claim 15, characterized in that, An electrical test contact is added between different LED chips.

17. The light-emitting diode package according to claim 1, characterized in that, The main component, the LED chip, consists of multiple LED chips connected in parallel.

18. The light-emitting diode package according to claim 1, characterized in that, The parallel secondary element is selected from any one of Zener diodes, capacitors, and light-emitting diode chips. If the parallel secondary element is a light-emitting diode chip, the forward voltage of the parallel secondary element is close to the forward voltage of the main element, the light-emitting diode chip.

19. The light-emitting diode package according to claim 18, characterized in that, When the parallel secondary element is a Zener diode and is unidirectional, the parallel secondary element is connected in parallel with the main element, the light-emitting diode chip, with opposite polarities.

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