A circulating solid-state electronic switch and circulating circuit control method

By designing a cyclic solid-state electronic switch, and using the series and parallel structure of capacitors and transistors, the problem of fixed rated voltage of the electronic switch is solved, and the on-off control in the range of 3-24V is achieved, which expands the application scenario.

CN115514355BActive Publication Date: 2025-08-29SHOUXIAN COUNTY CHU GUANG LIGHTING APPLIANCE CO LTD
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Patent Information

Application Number
CN202211387823.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-08
Publication Date
2025-08-29
Estimated Expiration
2042-11-08

AI Technical Summary

Technical Problem

The rated voltage and current of existing electronic switches are fixed, and cannot meet the needs of different devices, resulting in their application being limited to specific voltage environments.

Method used

A cyclic solid-state electronic switch is designed, including power supply, capacitor, multiple transistors and MOS tubes. Through the series and parallel structure of resistors and diodes, a wide range of supply voltage adaptability is achieved, suitable for power supply environments of 3-24V.

Benefits of technology

It realizes the on-off control of electronic switches under different voltage environments, and is suitable for control circuits that require circulating switches such as traffic lights, field insect traps and advertising light boxes, improving the adaptability and application range of electronic switches.

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Abstract

A circulating solid-state electronic switch and circulating circuit control method include a power supply, a capacitor, a first resistor and a third resistor connected in series with the capacitor, and a first triode and a second triode. The base of the first triode is connected between the capacitor and the first resistor, the collector is connected to the base of the second triode, and the emitter is connected to the negative electrode of the power supply. The emitter plate of the second triode is connected to the other end of the first resistor, the base is connected to the collector of the first triode, and the collector is connected to the negative electrode of the power supply through the third resistor. Two first and second diodes are connected in series between the capacitor and the third resistor in opposite directions and in parallel, wherein the second diode is also connected in series with the second resistor. One end of a fourth resistor is also connected between the first and second diodes, the other end of the fourth resistor is connected to the gate of a MOS transistor, the drain of the MOS transistor is connected to the positive electrode of the power supply through a load, and the source is connected to the negative electrode of the power supply.
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Description

Technical Field

[0001] The present invention relates to an electronic switch, in particular to a circulating solid-state electronic switch. Background Art

[0002] Electronic switches are widely used in various electronic circuits. Current electronic switches are generally specialized, meaning they are designed for and compatible with only one device and can only provide a fixed voltage. This is primarily because the rated voltage and current of current electronic switches are fixed and cannot be changed once designed. Summary of the Invention

[0003] In order to solve the above technical problems, the present invention proposes a cyclic solid-state electronic switch, which has a wide supply voltage range, which can provide a supply voltage of 3-24V. It has wide adaptability and can be widely used in various fields, such as traffic light control, cyclic switching control of outdoor insect trap light sources, advertising light box control, and other control circuits that require cyclic switching.

[0004] A cyclic solid-state electronic switch includes a power supply, a capacitor, a first resistor and a third resistor connected in series with the capacitor, and a first transistor and a second transistor.

[0005] The base of the first transistor is connected between the capacitor and the first resistor, the collector is connected to the base of the second transistor, and the emitter is connected to the negative electrode of the power supply;

[0006] The emitter of the second transistor is connected to the other end of the first resistor, the base is connected to the collector of the first transistor, and the collector is connected to the negative electrode of the power supply through a third resistor;

[0007] A first diode and a second diode are connected in parallel in opposite directions in series between the capacitor and the third resistor, wherein the second diode is further connected in series with a second resistor;

[0008] One end of a fourth resistor is connected between the first diode and the second diode, the other end of the fourth resistor is connected to the gate of the MOS tube, the drain of the MOS tube is connected to the positive electrode of the power supply through the load, and the source is connected to the negative electrode of the power supply.

[0009] Preferably, the first transistor is of NPN type, and the second transistor is of PNP type.

[0010] Preferably, the first resistor and the second resistor are adjustable resistors.

[0011] Preferably, the third resistor and the fourth resistor are fixed resistors.

[0012] Preferably, the resistance of the first resistor is 560-5600 kilo-ohms, the resistance of the second resistor is 330-2310 kilo-ohms, the resistance of the third resistor is 560-1120 ohms, and the resistance of the fourth resistor is 560 ohms; the first transistor model is 13003, the second transistor model is B772, the capacitor capacity is 1-3 microfarads, and the MOS tube uses PTP11N60.

[0013] A loop circuit control method comprises the following steps:

[0014] Step 1: The power supply charges the capacitor in a positive direction;

[0015] Step 2: The base voltage of the NPN transistor connected to the positive terminal of the capacitor increases;

[0016] Step 3: The NPN transistor connected to the positive electrode of the capacitor is turned on, and the other PNP transistor whose base is connected to the collector of the NPN transistor is turned on;

[0017] Step 4: The terminal voltage of the capacitor increases, the base voltage of the NPN transistor increases, and the base voltage of the PNP transistor increases;

[0018] Step 5: Repeat steps 1 to 4 until the PNP transistor is saturated.

[0019] Step 6: The gate voltage of the MOS tube increases to make the MOS tube conductive, thus realizing the load circuit path;

[0020] Step 7: Reverse charging of the capacitor;

[0021] Step 8: The base voltage of the NPN transistor connected to the positive terminal of the capacitor decreases;

[0022] Step 9: The NPN transistor connected to the positive electrode of the capacitor is cut off, and the other PNP transistor whose base is connected to the collector of the NPN transistor is cut off;

[0023] Step 10: The MOS tube is cut off to disconnect the load circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 This is a schematic diagram of the circuit used in the present invention. DETAILED DESCRIPTION

[0025] In order to explain the present invention more clearly, the embodiments of the present invention are further described below with reference to the accompanying drawings.

[0026] like Figure 1As shown, a cyclic solid-state electronic switch includes a power supply U, a capacitor C, a first resistor R1 and a third resistor R3 connected in series with the capacitor C, and a first transistor Q1 and a second transistor Q2.

[0027] The base of the first transistor Q1 is connected between the capacitor C and the first resistor R1, the collector and the base of the second transistor Q2, and the emitter is connected to the negative electrode of the power supply U;

[0028] The emitter of the second transistor Q2 is connected to the other end of the first resistor R1, the base is connected to the collector of the first transistor Q1, and the collector is connected to the negative electrode of the power supply U through the third resistor R3;

[0029] A first diode VD1 and a second diode VD2 are connected in parallel in opposite directions in series between the capacitor C and the third resistor R3, wherein the second diode VD2 is further connected in series with a second resistor R2;

[0030] One end of a fourth resistor R4 is further connected between the first diode VD1 and the second diode VD2. The other end of the fourth resistor R4 is connected to the gate of the MOS transistor. The drain of the MOS transistor is connected to the positive electrode of the power supply U through the load, and the source is connected to the negative electrode of the power supply U.

[0031] Preferably, the first resistor R1 and the second resistor R2 are adjustable resistors.

[0032] Preferably, the third resistor R3 and the fourth resistor R4 are fixed resistors.

[0033] Preferably, the resistance of the first resistor R1 is 5600 kilo-ohms, the resistance of the second resistor R2 is 2310 kilo-ohms, the resistance of the third resistor R3 is 1120 ohms, and the resistance of the fourth resistor R4 is 560 ohms; the first transistor model is 13003, the second transistor model is B772, the capacitor capacity is 1-3 microfarads, and the MOS tube uses PTP11N60.

[0034] A switch K is provided in the main circuit of the power supply U.

[0035] The following will explain its working principle. First, the working principle of the electronic switch from breaking circuit to opening circuit.

[0036] Phase 1: Close switch K. The current flows through switch K, points a, b, the first resistor R1, c, capacitor C, d, VD1, e, f, g, the third resistor R3, h, and i, and then returns to the negative pole of the power supply.

[0037] The branch from point a, which branches downward through the load to the drain of the MOS transistor, is disconnected and blocked. Point b branches downward to the emitter of the second transistor. Since the first transistor is not conducting at this time, the base of the second transistor Q2 is disconnected and blocked. Point C branches rightward to the base of the first transistor Q1. At this time, the voltage across capacitor C is very low, and the base voltage of the first transistor Q1 is very small, insufficient to turn on the first transistor. Point F branches through the fourth resistor R4 to the gate of the MOS transistor. At this time, the voltage across the third resistor R3 is zero, insufficient to turn on the MOS transistor, and the circuit is disconnected.

[0038] During this stage, the power supply charges capacitor C, and the potential at the left end of capacitor C slowly increases.

[0039] Phase 2: When the voltage across capacitor C rises to the sum of the base turn-on voltage of the first transistor Q1 and the conduction voltage of the first diode VD1, that is, when the voltage rises to the voltage that turns on the first transistor Q1, the first transistor Q1 is turned on. At the same time, the base of the second transistor Q2 is connected to the negative pole of the power supply through the collector and emitter of the first transistor Q1, forming a path, and the second transistor Q2 is also turned on.

[0040] Phase 3: After the second transistor Q2 turns on, the voltage across the third resistor R3 increases, causing the base voltage of the first transistor Q1 to increase. This increases the collector current of the first transistor Q1, which in turn increases the base current of the second transistor Q2, further increasing the collector current of the second transistor Q2, and thus increasing the voltage across the third resistor R3. This increases the voltage across the third resistor, the base voltage of the first transistor Q1, further turning on the first transistor Q1, further turning on the second transistor Q2, and further increasing the voltage across the third resistor R3. This cycle continues until the second transistor Q2 reaches saturation.

[0041] Phase 4: After the second transistor Q2 is saturated, the voltage across the third resistor R3 is approximately equal to the power supply voltage. This voltage is coupled to the gate of the MOS transistor Q3 via the fourth resistor R4, ensuring that the MOS transistor is turned on. The load path provided at the drain of the MOS transistor Q3 then turns on the electronic switch.

[0042] The following describes the working principle of an electronic switch from circuit opening to circuit breaking.

[0043] Phase 1: When the MOS tube Q3 is turned on, the power supply reversely charges the capacitor C through the second transistor Q2, the second diode VD2 and the second resistor R2.

[0044] Phase 2: During the reverse charging period of capacitor C, the terminal voltage thereof gradually decreases until the first transistor Q1 is turned off. When the first transistor Q1 is turned off, the second transistor Q2 is also turned off.

[0045] Phase 3: After the second transistor Q2 is turned off, the gate of the MOS transistor Q3 has no driving voltage, and the MOS transistor Q3 is turned off. The load connected to the drain of the MOS transistor Q3 is disconnected, and the electronic switch is in the disconnected state.

[0046] By cycling through the above two processes, the on-off state of the electronic switch is changed. By adjusting the resistance values ​​of the first resistor R1 and the second resistor R2, the charge and discharge time of the capacitor can be changed, thereby adjusting the on-off time of the electronic switch.

Claims

1. A circulating solid-state electronic switch, characterized in that: The device comprises a power supply, a capacitor, a first resistor and a third resistor connected in series with the capacitor, and a first transistor and a second transistor. The base of the first transistor is connected between the capacitor and the first resistor, the collector is connected to the base of the second transistor, and the emitter is connected to the negative electrode of the power supply; The emitter of the second transistor is connected to the other end of the first resistor, the base is connected to the collector of the first transistor, and the collector is connected to the negative electrode of the power supply through a third resistor; A first diode and a second diode are connected in parallel in opposite directions in series between the capacitor and the third resistor, wherein a second resistor is further connected in series with the second diode, and the cathode of the second diode is connected to the capacitor via the second resistor; One end of a fourth resistor is connected between the first diode and the second diode, the other end of the fourth resistor is connected to the gate of the MOS tube, the drain of the MOS tube is connected to the positive electrode of the power supply through the load, and the source is connected to the negative electrode of the power supply.

2. A circulating solid-state electronic switch according to claim 1, characterized in that: The first transistor is of NPN type, and the second transistor is of PNP type.

3. The cyclic solid-state electronic switch according to claim 1, characterized in that: The first resistor and the second resistor are adjustable resistors.

4. The cyclic solid-state electronic switch according to claim 1, characterized in that: The third resistor and the fourth resistor are fixed resistors.

5. The cyclic solid-state electronic switch according to claim 1, characterized in that: The resistance of the first resistor is 560-5600 kilo-ohms, the resistance of the second resistor is 330-2310 kilo-ohms, the resistance of the third resistor is 560-1120 ohms, and the resistance of the fourth resistor is 560 ohms; the first transistor model is 13003, the second transistor model is B772, the capacitor capacity is 1-3 microfarads, and the MOS tube uses PTP11N60.

6. A loop circuit control method, characterized in that: A cyclic solid-state electronic switch according to any one of claims 1 to 5 is used, and includes the following steps: Step 1: The power supply charges the capacitor in a positive direction; Step 2: The base voltage of the NPN transistor connected to the positive terminal of the capacitor increases; Step 3: The NPN transistor connected to the positive electrode of the capacitor is turned on, and the other PNP transistor whose base is connected to the collector of the NPN transistor is turned on; Step 4: The terminal voltage of the capacitor increases, the base voltage of the NPN transistor increases, and the base voltage of the PNP transistor increases; Step 5: Repeat steps 1 to 4 until the PNP transistor is saturated. Step 6: The gate voltage of the MOS tube increases to make the MOS tube conductive, thus realizing the load circuit path; Step 7: Reverse charging of the capacitor; Step 8: The base voltage of the NPN transistor connected to the positive terminal of the capacitor decreases; Step 9: The NPN transistor connected to the positive electrode of the capacitor is cut off, and the other PNP transistor whose base is connected to the collector of the NPN transistor is cut off; Step 10: The MOS tube is cut off to disconnect the load circuit.

Citation Information

Patent Citations

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