Data frame reading and writing method, device and terminal based on fixed delay retransmission service

Abstract

The data frame reading and writing method, device and terminal based on the fixed delay retransmission service of the present invention perform reading and writing operations of the FixRD frame obtained from the mobile MC window in the main cache or additional cache in the buffer by using the constructed linked list based on the direct linked list reading and writing method and / or the indirect linked list reading and writing method; the present invention not only solves the performance loss problem and power consumption increase problem caused by the transportation of data faced by the fixed delay service, but also solves the overwrite writing requirement of supporting the retransmission service.

Description

Technical Field

[0001] The present invention relates to the field of data transmission, and in particular to a data frame reading and writing method, device and terminal based on a fixed delay retransmission service. Background Art

[0002] New energy vehicles, especially those with assisted driving functions, have become more and more popular in recent years. New energy vehicles, especially those with assisted driving functions, are equipped with more and more sensors. Cars with L3 assisted driving functions are generally equipped with more than 13 cameras. The data of these sensors needs to be transmitted to the assisted driving domain controller. Considering that compression will bring greater delays, in the vehicle application environment, the sensor needs to transmit uncompressed raw data to the domain controller. The number of pixels of each camera is getting higher and higher, so the requirements for data transmission bandwidth are increasing year by year. On the other hand, the transmission distance is long, reaching 10 meters to 15 meters, which will introduce greater attenuation, and specific technology is required to counteract the attenuation caused by the cable and restore the original data.

[0003] The current mainstream solution is the vehicle-mounted SerDes (serial deserializer) solution. The serializer chip (transmitter chip) is integrated in the camera module, and the serializer chip output is connected to a coaxial cable or a shielded twisted pair. The other end of the cable is connected to the assisted driving domain controller, which integrates a deserializer chip (receiver chip). The deserializer chip processes the signal received on the cable and converts it into parallel data. A bidirectional channel is established between the serializer and the deserializer: the channel from the serializer to the deserializer is a high-speed downlink channel, which mainly transmits video data; the channel from the deserializer to the serializer is a low-speed uplink channel, which mainly transmits commands. At present, in this market, both US companies have adopted private protocols and cannot communicate with chips from other manufacturers. In order to solve the problem of interoperability, the MIPI Alliance has introduced the APHY (vehicle-mounted serial deserializer) standard. In some cases, there will be bit errors in the data received by the deserializer. In order to obtain correct data, APHY defines a retransmission process. The deserializer detects a CRC (cyclic redundancy check) error in the received data frame and can request the serializer to resend the specified previously sent data frame on the uplink channel. Within a limited time, the deserializer can make retransmission requests for the same data frame multiple times. When the limited time is exceeded, the data frame is abandoned and the serializer no longer retains the data of this frame. There is a field in the data frame to indicate whether the current frame is a retransmission frame or an original frame. The MC (message counter) field in the data frame numbers the frames. MC is an 8-bit flippable counter: MC increases from 0 to 255, and then starts counting from 0 again. Each frame is distinguished by MC. If the CRC of a frame with MC=5 on a downlink channel is wrong, the deserializer requests the retransmission of the frame with MC=5 through the uplink channel, and the serializer reads the data from the corresponding area of ​​MC=5 in the buffer and resends the data.

[0004] APHY provides two retransmission services: MinRD (minimum delay retransmission service) and FixRD (fixed delay retransmission service). MinRD aims to submit data with the minimum delay. FixRD aims to submit data with the minimum delay difference. A specific field in the data frame header is used to distinguish MinRD from FixRD.

[0005] At the receiving end, data frames must be submitted in the order in which they were sent. Since data may be erroneous and cause retransmission, the receiving end must manage a buffer. For MinRD service, the buffer is read in the order of MC. If the data has been received and is intact, it is submitted immediately; if the frame data is in transmission, it is necessary to wait for the arrival of the frame with no CRC error before submission. For FixRD, it is also submitted in the order of MC; however, even if the data has been received and is intact, it cannot be submitted immediately, but needs to wait for the fixed delay to expire before submission. The sending end and the receiving end always manage a moving active MC window. Taking the downlink as an example, this window does not exceed 128. The buffer depth of the sending end and the receiving end is not less than the maximum active MC window width. Whenever the receiving end submits a frame, the receiving end informs the sending end through another channel that the MC can be recycled, the sending end's active MC window will move, and the MC will be assigned a new frame in the future; at the same time, the locally stored MC frame is discarded from the buffer. For MinRD, the depth of the receiving end buffer is the maximum active MC window width, but FixRD requires additional buffer space compared to MinRD. Because if the FixRD service waits until the fixed delay expires before releasing the cache address, the performance will be greatly reduced. If the FixRD service data has been received and is intact, the data should be immediately moved to the additional cache, so that the cache address and the MC can be immediately released. The prior art lacks a method that does not require data movement and uses fewer resources to implement a fixed delay retransmission service. Summary of the invention

[0006] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a data frame reading and writing method based on a fixed delay retransmission service, so as to solve the above technical problems arising in the prior art.

[0007] To achieve the above-mentioned purpose and other related purposes, the present invention provides a data frame reading and writing method based on a fixed delay retransmission service, including: based on a linked list reading and writing implementation method, using a constructed linked list to perform reading and writing operations of FixRD frames obtained from a moving MC window in a main cache or an additional cache in a buffer; wherein the linked list reading and writing implementation method includes: a direct linked list reading and writing method and / or an indirect linked list reading and writing method.

[0008] In one embodiment of the present invention, the direct linked list reading and writing method includes: when a write request for a FixRD frame corresponding to an MC window is received, a write operation of the FixRD frame is performed in a main cache or an additional cache in a buffer based on a constructed direct linked list; when a read request for a FixRD frame corresponding to an MC window is received, a read operation of the FixRD frame is performed in a main cache or an additional cache in the buffer based on the constructed direct linked list.

[0009] In one embodiment of the present invention, the write operation of the FixRD frame in the main cache or additional cache in the buffer based on the constructed direct linked list includes: if the FixRD frame data is rewrite frame data, the rewrite frame data directly overwrites the data at the corresponding position of the linked list tail pointer of the direct linked list of the main cache address that has a corresponding relationship with the MC window corresponding to the FixRD frame; if the FixRD frame data is normal frame data, based on the direct linked list of the main cache address that has a corresponding relationship with the MC window corresponding to the FixRD frame, the FixRD frame is written in the main cache or additional cache.

[0010] In one embodiment of the present invention, if the FixRD frame data is normal frame data, then based on the direct linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame, writing the FixRD frame in the main cache or the additional cache includes: judging whether the main cache address has data based on the data occupation mark of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame; if there is no data, marking the data occupation mark of the main cache address as having data, and writing the FixRD frame in the main cache address; if the main cache address does not have a linked list established, constructing a direct linked list of the main cache address; wherein the direct linked list includes: a linked list head pointer pointing to the main cache address, a linked list tail pointer pointing to the main cache address, and linked list establishment information corresponding to the established linked list; if the main cache address has a linked list established, making the next address pointed to by the linked list tail pointer point to the main cache address, and updating the linked list tail pointer to point to the main cache address;

[0011] If there is data, an additional cache address with a corresponding data occupancy mark with no data is found from the additional cache, and the direct linked list of the main cache address is updated, and the data occupancy mark of the additional cache address is marked as having data, and the FixRD frame is written in the additional cache address; wherein the direct linked list includes: a linked list head pointer, a linked list tail pointer and linked list establishment information of the corresponding linked list that has been established; and the next address pointed to by the linked list tail pointer is made to point to the additional cache address, and the linked list tail pointer is updated to point to the additional cache address.

[0012] In one embodiment of the present invention, when a read request for a FixRD frame corresponding to an MC window is received, based on the constructed direct linked list, a read operation of the FixRD frame is performed in the main cache or the additional cache in the buffer, including: based on the direct linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame, the FixRD frame is read in the main cache or the additional cache in the buffer, and the linked list head pointer of the corresponding direct linked list and the information on whether the linked list is established are updated, and the data occupancy mark of the corresponding main cache address or the additional cache address is marked as a no data state.

[0013] In one embodiment of the present invention, the indirect linked list reading and writing method includes: when a write request for a FixRD frame corresponding to an MC window is received, based on the constructed indirect linked list, a write operation of the FixRD frame is performed in the main cache or the additional cache in the buffer; when a read request for a FixRD frame corresponding to an MC window is received, based on the constructed indirect linked list, a read operation of the FixRD frame is performed in the main cache or the additional cache in the buffer.

[0014] In one embodiment of the present invention, the write operation of the FixRD frame in the main cache or the additional cache in the buffer based on the constructed indirect linked list includes: if the FixRD frame data is rewritten frame data, if the indirect linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame has been established, then the rewritten frame data is directly overwritten with the data at the corresponding position of the tail pointer of the indirect linked list; if the indirect linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame has not been established, then the rewritten frame data is directly overwritten with the data at the corresponding position of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame; if the FixRD frame data is normal frame data, then based on the indirect linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame, the FixRD frame is written in the main cache or the additional cache.

[0015] In one embodiment of the present invention, if the FixRD frame data is normal frame data, then based on the indirect linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame, writing the FixRD frame in the main cache or the additional cache includes: judging whether the main cache address has data based on the data occupancy mark of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame; if there is no data, marking the data occupancy mark of the main cache address as having data, and writing the FixRD frame in the main cache address; if the main cache address already points to the indirect linked list, pointing the next address pointed to by the tail pointer of the linked list to the main cache address, and making the tail pointer of the linked list point to the main cache address; if there is data, searching for a corresponding additional cache address from the constructed corresponding additional cache addresses for which the data occupancy mark is not in the data state state, write the FixRD frame in the additional cache address, mark the data occupation mark of the additional cache address as having data state; if the main cache address does not point to a linked list, construct an indirect linked list corresponding to the main cache address, find an invalid linked list from the linked list space, mark the linked list valid, mark the linked list pointing to the main cache address as having a linked list pointing state, and construct a linked list index corresponding to the linked list of the main cache address; wherein the indirect linked list includes: a linked list head pointer pointing to the main cache address, a linked list tail pointer pointing to the additional cache address, and linked list establishment information corresponding to the established linked list; and let the linked list head pointer point to the next address as the additional cache address; if the main cache address already points to a linked list, let the next address pointed to by the linked list tail pointer point to the additional cache address, and let the linked list tail pointer point to the additional cache address.

[0016] In one embodiment of the present invention, when a read request for a FixRD frame corresponding to an MC window is received, performing a read operation of the FixRD frame in a main cache or an additional cache in a cache based on a constructed indirect linked list includes: judging whether to establish a linked list based on a pointing linked list flag of a main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame; if a linked list is established, obtaining a corresponding indirect linked list according to a linked list index of the main cache address, and reading the FixRD frame in a main cache or an additional cache in the cache based on the indirect linked list, and updating a linked list head pointer of the corresponding indirect linked list and information on whether the linked list is established, or releasing the linked list; and marking a data occupancy mark of the corresponding main cache address or the additional cache address as a no data state; if a linked list is not established, directly reading the FixRD frame at the main cache address, and marking the corresponding main cache address data occupancy mark as a no data state.

[0017] To achieve the above-mentioned purpose and other related purposes, the present invention provides a data frame reading and writing device based on a fixed delay retransmission service, the device comprising: a reading and writing implementation module, which is used to perform reading and writing operations of FixRD frames obtained from a moving MC window in a main cache or an additional cache in a buffer using a constructed linked list based on a linked list reading and writing implementation method; wherein the linked list reading and writing implementation method comprises: a direct linked list reading and writing method and / or an indirect linked list reading and writing method.

[0018] To achieve the above-mentioned object and other related objects, the present invention provides a terminal, including: a data frame reading and writing device based on a fixed delay retransmission service.

[0019] As described above, the data frame reading and writing method, device and terminal based on the fixed delay retransmission service of the present invention have the following beneficial effects: the present invention uses a constructed linked list to perform read and write operations of the FixRD frame obtained from the mobile MC window in the main cache or additional cache in the cache based on a direct linked list reading and writing method and / or an indirect linked list reading and writing method; the present invention not only solves the performance loss problem and power consumption increase problem caused by the transportation of data faced by the fixed delay service, but also solves the overwrite write requirement of supporting the retransmission service. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a storage diagram of a direct linked list reading and writing method in one embodiment of the present invention.

[0021] Figure 2 Shown is a storage schematic diagram of an indirect linked list reading and writing method in one embodiment of the present invention.

[0022] Figure 3 Shown is a schematic diagram of the structure of a terminal in an embodiment of the present invention. DETAILED DESCRIPTION

[0023] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0024] It should be noted that in the following description, reference is made to the accompanying drawings, which describe several embodiments of the present invention. It should be understood that other embodiments may also be used, and that mechanical composition, structural, electrical and operational changes may be made without departing from the spirit and scope of the present invention. The following detailed description should not be considered restrictive, and the scope of the embodiments of the present invention is limited only by the claims of the published patents. The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. Spatially related terms, such as "upper", "lower", "left", "right", "below", "below", "lower", "above", "upper", etc., may be used in the text to facilitate the description of the relationship between an element or feature shown in the figure and another element or feature.

[0025] Throughout the specification, when a part is said to be "connected" to another part, this includes not only the case of "direct connection" but also the case of "indirect connection" by placing other elements therebetween. In addition, when a part is said to "include" a certain constituent element, unless otherwise stated, it does not exclude other constituent elements, but means that other constituent elements may be included.

[0026] The terms first, second and third mentioned herein are used to describe various parts, components, regions, layers and / or segments, but are not limited thereto. These terms are only used to distinguish a certain part, component, region, layer or segment from other parts, components, regions, layers or segments. Therefore, the first part, component, region, layer or segment described below may refer to the second part, component, region, layer or segment within the scope of the present invention.

[0027] Furthermore, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless there is an indication to the contrary in the context. It should be further understood that the terms "comprise", "include" indicate the presence of the described features, operations, elements, components, items, kinds, and / or groups, but do not exclude the presence, occurrence or addition of one or more other features, operations, elements, components, items, kinds, and / or groups. The terms "or" and "and / or" used herein are interpreted as inclusive, or mean any one or any combination. Therefore, "A, B or C" or "A, B and / or C" means "any of the following: A; B; C; A and B; A and C; B and C; A, B and C". Exceptions to this definition will only occur when the combination of elements, functions or operations is inherently mutually exclusive in some way.

[0028] The embodiment of the present invention provides a data frame reading and writing method, device and terminal based on a fixed delay retransmission service. The method uses a constructed linked list to perform reading and writing operations on a FixRD frame obtained from a mobile MC window in a main cache or an additional cache in a cache by using a direct linked list reading and writing method and / or an indirect linked list reading and writing method. The present invention not only solves the performance loss problem and power consumption increase problem caused by the data handling faced by the fixed delay service, but also solves the overwrite writing requirement for supporting the retransmission service.

[0029] The following is a detailed description of the embodiments of the present invention so that those skilled in the art can easily implement the present invention. The present invention can be embodied in many different forms and is not limited to the embodiments described herein.

[0030] The method comprises:

[0031] Based on the linked list reading and writing implementation method, the constructed linked list is used to perform the reading and writing operations of the FixRD frame obtained from the moving MC window in the main cache or the additional cache in the buffer;

[0032] Wherein, the linked list reading and writing implementation method includes: a direct linked list reading and writing method and / or an indirect linked list reading and writing method.

[0033] Specifically, since the frames in the buffer need to be read in sequence according to the order of MC, if the currently read frame is a FixRD frame and the data of the FixRD frame is intact, it needs to be placed in the additional cache. In fact, it takes many cycles to move data (the maximum length of a frame is 392 bytes, and the data width of the buffer is only a few bytes, so it takes dozens of cycles to move a frame). The read logic of the buffer is occupied for a long time, and normal data read operations cannot be performed during this period; at the same time, data movement increases power consumption. Therefore, a more effective method is to establish a linked list. The FixRD frame still occupies the original storage space. After the corresponding MC is released, when a new frame pointing to the same address arrives, it is written to the additional cache, and a linked list is established at the same time, and the two frames are added to the linked list. When reading, just read in the order of the linked list.

[0034] In one embodiment, the data buffer includes two parts: a main buffer main_buf with a depth of M and an additional buffer addon_buf with a depth of N. The additional buffer is a buffer opened for FixRD frames that need to be stored for an additional period of time. M is equal to the maximum active MC window width. Preferably, M is 128 on the APHY downlink channel, and N can be 16, 32, etc.

[0035] In one embodiment, there is a corresponding relationship between the information counter MC and the main cache (if the additional storage is not considered, the low-order address of MC corresponds to the main cache address one by one).

[0036] In one embodiment, the direct linked list reading and writing method includes:

[0037] When a write request for a FixRD frame corresponding to an MC window is received, a write operation of the FixRD frame is performed in a main cache or an additional cache in the cache based on the constructed direct linked list;

[0038] When a read request for a FixRD frame corresponding to an MC window is received, a read operation of the FixRD frame is performed in a main cache or an additional cache in the cache based on the constructed direct linked list.

[0039] In a specific embodiment, the write operation of the FixRD frame in the main cache or the additional cache in the cache based on the constructed direct linked list includes:

[0040] If the FixRD frame data is rewrite frame data, the rewrite frame data directly overwrites the data at the position corresponding to the tail pointer of the direct linked list of the primary cache address having a corresponding relationship with the MC window corresponding to the FixRD frame;

[0041] If the FixRD frame data is normal frame data, the FixRD frame is written into the main cache or the additional cache based on a direct linked list of main cache addresses corresponding to the MC window corresponding to the FixRD frame.

[0042] Therefore, the direct linked list write operation is different from the general linked list write operation in that it supports the overwrite function. If it is an overwrite, there is storage space before the data is written, and the data should be written into the existing storage space, overwriting the original data, rather than writing the data to a new address, so as to support the writing of retransmitted frames. If it is a normal write, a new address needs to be allocated and the data is written to the new address.

[0043] In a specific embodiment, if Figure 1 As shown, if the FixRD frame data is normal frame data, then based on a direct linked list of main cache addresses having a corresponding relationship with the MC window corresponding to the FixRD frame, writing the FixRD frame in the main cache or the additional cache includes:

[0044] Based on the data occupation mark of the main cache address corresponding to the MC window corresponding to the FixRD frame, it is determined whether the main cache address has data; specifically, first use the MC low-order part mc_low for addressing, for example, mc_low=mc[6:0] on the APHY downstream channel. Based on the data occupation mark entry_valid of the main cache address corresponding to the MC window corresponding to the FixRD frame, it is determined whether the main cache address has data; in a specific embodiment, if entry_valid is in a data state, it is determined that there is data, and if it is in a data-free state, it is determined that there is no data.

[0045] If there is no data and the main cache address has not established a linked list, a direct linked list of the main cache address is constructed, and the data occupation mark of the main cache address is marked as having data, and the FixRD frame is written in the main cache address; wherein the direct linked list includes: a linked list head pointer pointing to the main cache address, a linked list tail pointer pointing to the main cache address, and linked list establishment information of the corresponding linked list that has been established; specifically, for M main storage addresses, each address has a linked list, and there are M linked lists in total. Each linked list has a linked list head pointer linklist_head, a linked list tail pointer linklist_tail, whether the linked list has been established linklist_valid and other information. If the main cache address is x, a linked list linklist_head[x]=x, linklist_tail[x]=x, linklist_valid[x]=1 is established. If the main cache address has established a linked list (linklist_valid[x]=1), the next address pointed to by the linked list tail pointer is pointed to the main cache address, and the linked list tail pointer is updated to point to the main cache address.

[0046] If there is data, an additional cache address with a corresponding data occupancy mark with no data is found from the additional cache, and the direct linked list of the main cache address is updated, and the data occupancy mark of the additional cache address is marked as having data, and the FixRD frame is written in the additional cache address; wherein the direct linked list includes: a linked list head pointer, a linked list tail pointer and linked list establishment information of the corresponding linked list that has been established; and the next address pointed to by the linked list tail pointer is pointed to the additional cache address, and the linked list tail pointer is updated to point to the additional cache address.

[0047] For example, find a free address from the additional cache, assuming it is y, write the address and return y. Assume linklist_tail[x] = z, set the next address it points to nxt_addr[z] = y, add the address y to the end of the linked list: linklist_tail[x] = y, and mark the address as having data entry_valid[y] = 1.

[0048] That is to say, if the xth linked list links the main cache address space x and part of the additional cache address space. If mc_low = x, first check whether there is data in the main cache address x: if there is no data, the data is written to the address space x. If there is data at the address, find an idle address in the additional cache addon_buf to write the data.

[0049] In a specific embodiment, when a read request of a FixRD frame corresponding to an MC window is received, performing a read operation of the FixRD frame in a main cache or an additional cache in the cache based on the constructed direct linked list includes:

[0050] Based on the direct linked list of the main cache address that has a corresponding relationship with the MC window corresponding to the FixRD frame, the main cache or additional cache in the cache reads the FixRD frame, and updates the linked list head pointer of the corresponding direct linked list and the information on whether the linked list is established, and marks the data occupancy mark of the corresponding main cache address or additional cache address as a no data state.

[0051] Specifically, if the list head pointer of the direct linked list points to the main cache address, the FixRD frame is read at the main cache address in the cache, and the list head pointer is made to point to the next address, and the corresponding main cache address is marked as no data state;

[0052] If the list head pointer of the direct linked list points to the additional cache address, the FixRD frame is read at the additional cache address in the buffer, and the list head pointer is made to point to the next address, and the corresponding additional cache address is marked as no data state.

[0053] In a specific embodiment, the direct linked list reading and writing method requires the establishment of M linked lists corresponding to the number of main cache addresses. In fact, there are at most N linked lists at the same time, because the depth of the additional cache is N. And M>>N, if only the storage corresponding to N linked lists is retained, the cost will be reduced.

[0054] In one embodiment, the indirect linked list reading and writing method includes:

[0055] When a write request for a FixRD frame corresponding to an MC window is received, a write operation of the FixRD frame is performed in a main cache or an additional cache in the cache based on the constructed indirect linked list;

[0056] When a read request for a FixRD frame corresponding to an MC window is received, a read operation of the FixRD frame is performed in a main buffer or an additional buffer in the buffer based on the constructed indirect linked list.

[0057] In a specific embodiment, when a write request of a FixRD frame corresponding to an MC window is received, based on the constructed indirect linked list, performing a write operation of the FixRD frame in a main cache or an additional cache in the cache includes:

[0058] If the FixRD frame data is rewrite frame data, if the indirect linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame has been established, the rewrite frame data is directly used to overwrite the data at the position corresponding to the tail pointer of the indirect linked list; if the indirect linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame has not been established, the rewrite frame data is directly used to overwrite the data at the position corresponding to the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame;

[0059] If the FixRD frame data is normal frame data, the FixRD frame is written into the main cache or the additional cache based on an indirect linked list of main cache addresses corresponding to the MC window corresponding to the FixRD frame.

[0060] In a specific embodiment, if the FixRD frame data is normal frame data, writing the FixRD frame in the main cache or the additional cache based on an indirect linked list of main cache addresses having a corresponding relationship with the MC window corresponding to the FixRD frame includes:

[0061] Based on the data occupancy mark of the main cache address corresponding to the MC window corresponding to the FixRD frame, it is determined whether the main cache address has data; specifically, based on the data occupancy mark entry_valid of the main cache address corresponding to the MC window corresponding to the FixRD frame, it is determined whether the main cache address has data; in a specific embodiment, if entry_valid is in a data state, it is determined that there is data, and if it is in a no-data state, it is determined that there is no data.

[0062] If there is no data, mark the data occupancy mark of the main cache address as having data, and write the FixRD frame in the main cache address; if the main cache address already points to a linked list, point the next address pointed by the tail pointer of the linked list to the main cache address, and let the tail pointer of the linked list point to the main cache address.

[0063] If there is data, find an address space marked as no data for the data occupation of the corresponding additional cache address from the constructed corresponding additional cache addresses, write the FixRD frame in the additional cache address, and mark the data occupation of the additional cache address as having data. If the main cache address does not point to a linked list, an indirect linked list corresponding to the main cache address will be constructed, and an invalid linked list will be found from the linked list space, and the linked list will be marked as valid, and the linked list pointing to the main cache address will be marked as having a linked list pointing state and a linked list index corresponding to the linked list of the main cache address will be constructed; wherein the indirect linked list includes: a linked list head pointer pointing to the main cache address, a linked list tail pointer pointing to the additional cache address, and the linked list establishment information of the corresponding linked list; and the linked list head pointer is made to point to the next address as the additional cache address; if the main cache address already points to a linked list, the next address pointed to by the linked list tail pointer is made to point to the additional cache address, and the linked list tail pointer is made to point to the additional cache address.

[0064] Specifically, Figure 2 As shown, there are N linked lists in total, each of which has a linked list head pointer linklist_head, a linked list tail pointer linklist_tail, whether the linked list information is valid linklist_valid and other information. For M main storage addresses, each address contains information such as a linked list flag linklist_exist and a linked list indirect index linklist_index. If there is only one element in the linked list corresponding to the main storage address x, and the element is in the main storage address x, then it does not occupy the linked list resources, linklist_exist[x] = 0. If a new linked list is to be established, first, an invalid linked list needs to be found from the N linked lists. Assuming its index is y, then linklist_valid[y] = 0; secondly, a mapping is established between the main storage address x and the new linked list y: linklist_head[y] points to the head of the linked list, linklist_tail[y] points to the tail of the linked list, and at the same time, linklist_valid[y] is set to 1, linklist_exist[x] is set to 1, and y is assigned to linklist_index[x]. During the writing process, the condition for establishing a new linked list at the main storage address x is: if x has data, find an idle address xnew in addon_buf to write the data. If there was no linked list before, a linked list needs to be established at this time: the head pointer of the linked list points to address x, and the tail pointer points to address xnew.

[0065] The main difference between the indirect linked list read and write method and the direct linked list read and write method is that the linked list head pointer, tail pointer and other linked list information of the main storage address x need to be selected from the information of N linked lists using its indirect index linklist_index[x]. Since the sum of the bit widths of linklist_head and linklist_tail is much larger than the bit width of linklist_index, the indirect linked list method uses less storage than the direct linked list method.

[0066] In a specific embodiment, when a read request of a FixRD frame corresponding to an MC window is received, performing a read operation of the FixRD frame in a main cache or an additional cache in the cache based on the constructed indirect linked list includes:

[0067] Determine whether to establish a linked list based on the pointing linked list flag of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame;

[0068] If a linked list is established, then the corresponding indirect linked list is obtained according to the linked list index of the main cache address, and the FixRD frame is read based on the main cache or additional cache of the indirect linked list in the cache, and the linked list head pointer of the corresponding indirect linked list and the information whether the linked list is established are updated, or the linked list is released; the data occupation mark of the corresponding main cache address or additional cache address is also marked as no data state; specifically, if there is a linked list linklist_exist[x]=1, then the address space pointed to by the linked list head pointer is read out. If the linked list head pointer of the indirect linked list points to the main cache address, then the FixRD frame is first read at the main cache address in the cache, and the linked list head pointer is updated to point to the next address of the head pointer, and the corresponding main cache address is marked as no data state; if the linked list head pointer of the indirect linked list points to the additional cache address, then the FixRD frame is read at the additional cache address in the cache, and the linked list head pointer is updated to point to the next address of the head pointer, and the corresponding additional cache address is marked as no data state.

[0069] It should be noted that the condition for releasing the linked list at the main cache address x is: assuming that x is mapped to the linked list y, if the head pointer and the tail pointer point to the same address, the linked list is released after the data is read out; or if the tail pointer points to x, and the next address pointed to by the head pointer is also x, it means that there is only one element x in the linked list after the data is read out, then the linked list is also released after the data is read out: linklist_exist[x] is cleared to 0, and linklist_valid[y] is cleared to 0.

[0070] In order to better illustrate the above-mentioned data frame reading and writing method based on fixed delay retransmission service, the present invention provides the following specific embodiments.

[0071] Embodiment 1: A data frame reading and writing method based on a direct linked list reading and writing method.

[0072] The method includes: there is no data in all the main caches and the additional caches, and entry_valid is all 0.

[0073] When the first write request arrives: mc_low = 3, check entry_valid[3] = 0, there is no data in address 3, write address returns 3. Create a linked list linklist_head[3] = 3, linklist_tail[3] = 3, linklist_valid[3] = 1, and mark the address as having data entry_valid[3] = 1.

[0074] When the second write request comes, mc_low=3. Check entry_valid[3]=1, indicating that there is data in address 3. Find a free address from the additional cache, assuming it is 129, and write address 129. Add this address to the end of the linked list: linklist_tail[3]=129. At the same time, set the next address of primary cache address 3 in the linked list, nxt_addr[3]=129, marking that there is data at this address, entry_valid

[129] =1.

[0075] When the first read request arrives: mc_low = 3, because the head pointer points to address 3, the read address 3 is returned. The head pointer points to the next address (nxt_addr[3] = 129): linklist_head[3] = 129, and at the same time marks that there is no data at this address: entry_valid[3] = 0.

[0076] When the second read request comes: mc_low = 3, the head pointer points to address 129, and the read address 129 is returned. Since the head pointer and the tail pointer point to the same address, the linked list is released: linklist_valid[3] = 0, and it is marked that there is no data at this address: entry_valid

[129] = 0.

[0077] Embodiment 2: A data frame reading and writing method based on an indirect linked list reading and writing method.

[0078] The method includes: there is no data in all the main caches and the additional caches, and entry_valid is all 0.

[0079] When the first write request arrives: mc_low = 3, check entry_valid[3] = 0, there is no data in address 3, and the write address returns 3. At the same time, it is marked that there is data at this address, entry_valid[3] = 1.

[0080] When the second write request comes, mc_low=3, check entry_valid[3]=1, there is data in address 3, find a free address from the additional cache, assume it is 129, and write address 129 back. Create a linked list, assume the invalid linked list number is 5, then linklist_valid[5]=0. Create a mapping between the main storage address 3 and this new linked list 5: linklist_head[5]=3, linklist_tail[5]=129, linklist_valid[5]=1, linklist_exist[3]=1, linklist_index[3]=5, and set the next address of the main cache address 3 in the linked list nxt_addr[3]=129, indicating that there is data at this address entry_valid

[129] =1.

[0081] When the first read request arrives: mc_low = 3, the head pointer linklist_head[linklist_index[3]] = linklist_head[5] = 3, and the read address 3 is returned. The head pointer points to the next address (nxt_addr[3] = 129): linklist_head[5] = 129, and at the same time marks that there is no data at this address: entry_valid[3] = 0.

[0082] When the second read request arrives: mc_low = 3, the head pointer linklist_head[linklist_index[3]] = linklist_head[5] = 129, and the read address 129 is returned. linklist_tail[linklist_index[3]] = linklist_tail[5] = 129. Since the head pointer and the tail pointer point to the same address, the linked list is released: linklist_valid[5] = 0, linklist_exist[3] = 0. At the same time, it is marked that there is no data at this address: entry_valid

[129] = 0.

[0083] Similar to the principle of the above embodiment, the present invention provides a data frame reading and writing device based on a fixed delay retransmission service.

[0084] The following provides specific embodiments in conjunction with the accompanying drawings:

[0085] The device comprises:

[0086] A read / write implementation module, for performing read / write operations of a FixRD frame obtained from a moving MC window in a main cache or an additional cache in a cache using a constructed linked list based on a linked list read / write implementation method;

[0087] Wherein, the linked list reading and writing implementation method includes: a direct linked list reading and writing method and / or an indirect linked list reading and writing method.

[0088] Since the implementation principle of the data frame reading and writing device based on the fixed delay retransmission service has been described in the above-mentioned embodiment, it will not be repeated here.

[0089] In one embodiment, the direct linked list reading and writing method includes: when a write request for a FixRD frame corresponding to an MC window is received, a write operation of the FixRD frame is performed in a main cache or an additional cache in a buffer based on a constructed direct linked list; when a read request for a FixRD frame corresponding to an MC window is received, a read operation of the FixRD frame is performed in a main cache or an additional cache in the buffer based on the constructed direct linked list.

[0090] In one embodiment, the write operation of the FixRD frame in the main cache or additional cache in the buffer based on the constructed direct linked list includes: if the FixRD frame data is rewrite frame data, the rewrite frame data directly overwrites the data at the position corresponding to the direct linked list tail pointer of the main cache address that has a corresponding relationship with the MC window corresponding to the FixRD frame; if the FixRD frame data is normal frame data, based on the direct linked list of the main cache address that has a corresponding relationship with the MC window corresponding to the FixRD frame, the FixRD frame is written in the main cache or additional cache.

[0091] In one embodiment, if the FixRD frame data is normal frame data, then based on a direct linked list of a primary cache address having a corresponding relationship with the MC window corresponding to the FixRD frame, writing the FixRD frame in the primary cache or the additional cache includes: based on a data occupation flag of the primary cache address having a corresponding relationship with the MC window corresponding to the FixRD frame, determining whether the primary cache address has data;

[0092] If there is no data, mark the data occupation mark of the main cache address as having data, and write the FixRD frame in the main cache address; if the main cache address does not have a linked list, build a direct linked list of the main cache address. Wherein, the direct linked list includes: a linked list head pointer pointing to the main cache address, a linked list tail pointer pointing to the main cache address, and the linked list establishment information of the corresponding linked list; if the main cache address has established a linked list, let the next address pointed by the linked list tail pointer point to the main cache address, and update the linked list tail pointer to point to the main cache address. If there is data, find an additional cache address with a corresponding data occupation mark without data from the additional cache, update the direct linked list of the main cache address, mark the data occupation mark of the additional cache address as having data, and write the FixRD frame in the additional cache address; wherein, the direct linked list includes: a linked list head pointer, a linked list tail pointer, and the linked list establishment information of the corresponding linked list; and let the next address pointed by the linked list tail pointer point to the additional cache address, and update the linked list tail pointer to point to the additional cache address.

[0093] In one embodiment, when a read request for a FixRD frame corresponding to an MC window is received, based on the constructed direct linked list, a read operation of the FixRD frame is performed in the main cache or the additional cache in the buffer, including: based on the direct linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame, the FixRD frame is read in the main cache or the additional cache in the buffer, and the linked list head pointer of the corresponding direct linked list and the information on whether the linked list is established are updated, and the data occupancy mark of the corresponding main cache address or the additional cache address is marked as a no data state.

[0094] In one embodiment, the indirect linked list reading and writing method includes: when a write request for a FixRD frame corresponding to an MC window is received, based on the constructed indirect linked list, a write operation of the FixRD frame is performed in a main cache or an additional cache in a buffer; when a read request for a FixRD frame corresponding to an MC window is received, based on the constructed indirect linked list, a read operation of the FixRD frame is performed in the main cache or an additional cache in the buffer.

[0095] In one embodiment, when a write request for a FixRD frame corresponding to an MC window is received, based on the constructed indirect linked list, the write operation of the FixRD frame in the main cache or the additional cache in the buffer includes: if the FixRD frame data is rewrite frame data, if the indirect linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame has been established, then the rewrite frame data is directly overwritten with the data at the corresponding position of the tail pointer of the indirect linked list; if the indirect linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame has not been established, then the rewrite frame data is directly overwritten with the data at the corresponding position of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame; if the FixRD frame data is normal frame data, then based on the indirect linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame, the FixRD frame is written in the main cache or the additional cache.

[0096] In one embodiment, if the FixRD frame data is normal frame data, then based on the indirect linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame, writing the FixRD frame in the main cache or the additional cache includes: judging whether the main cache address has data based on the data occupation flag of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame;

[0097] If there is no data, mark the data occupation mark of the main cache address as having data, and write the FixRD frame in the main cache address; if the main cache address already points to a linked list, point the next address pointed by the tail pointer of the linked list to the main cache address, and let the tail pointer of the linked list point to the main cache address. If there is data, find an address space with the data occupation mark of the corresponding additional cache address as having no data from the corresponding additional cache addresses constructed, write the FixRD frame in the additional cache address, and mark the data occupation mark of the additional cache address as having data. If the main cache address does not point to a linked list, an indirect linked list corresponding to the main cache address will be constructed, an invalid linked list will be found from the linked list space, and the linked list will be marked as valid, and the linked list flag pointing to the main cache address will be marked as having a linked list pointing state and a linked list index corresponding to the linked list of the main cache address will be constructed; wherein the indirect linked list includes: a linked list head pointer pointing to the main cache address, a linked list tail pointer pointing to the additional cache address and linked list establishment information corresponding to the established linked list; and the linked list head pointer is made to point to the next address as the additional cache address; if the main cache address has already pointed to a linked list, the next address pointed to by the linked list tail pointer is made to point to the additional cache address, and the linked list tail pointer is made to point to the additional cache address.

[0098] In one embodiment, when a read request for a FixRD frame corresponding to an MC window is received, performing a read operation of the FixRD frame in a main cache or an additional cache in a cache based on a constructed indirect linked list includes: judging whether to establish a linked list based on a pointing linked list flag of a main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame; if a linked list is established, obtaining a corresponding indirect linked list according to a linked list index of the main cache address, and reading the FixRD frame in a main cache or an additional cache in the cache based on the indirect linked list, and updating a linked list head pointer of the corresponding indirect linked list and information on whether the linked list is established, or releasing the linked list; and marking a data occupancy mark of the corresponding main cache address or the additional cache address as a no data state; if a linked list is not established, directly reading the FixRD frame at the main cache address, and marking the corresponding main cache address data occupancy mark as a no data state.

[0099] like Figure 3 A schematic diagram showing the structure of the terminal 30 in an embodiment of the present invention is shown.

[0100] The terminal comprises: the data frame reading and writing device 31 based on the fixed delay retransmission service.

[0101] The implementation principle of the data frame reading and writing device based on the fixed delay retransmission service has been described in the aforementioned embodiment, so it will not be repeated here.

[0102] It should be noted that the terminal may refer to a sending end and a receiving end, both of which always manage a mobile active MC window.

[0103] In summary, the data frame reading and writing method, device and terminal of the present invention based on the fixed delay retransmission service, through the direct linked list reading and writing method and / or the indirect linked list reading and writing method, the constructed linked list is used to perform the reading and writing operation of the FixRD frame obtained from the mobile MC window in the main cache or the additional cache in the buffer; the present invention not only solves the performance loss problem and the power consumption increase problem caused by the data handling faced by the fixed delay service, but also solves the overwrite writing requirement of supporting the retransmission service. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0104] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A data frame reading and writing method based on a fixed delay retransmission service, characterized in that: include: Based on the linked list reading and writing implementation method, the constructed linked list is used to perform the reading and writing operations of the FixRD frame obtained from the moving MC window in the main cache or the additional cache in the buffer; The linked list reading and writing implementation method includes: a direct linked list reading and writing method, and the direct linked list reading and writing method includes: When a write request of a FixRD frame corresponding to an MC window is received, a write operation of the FixRD frame is performed in a main cache or an additional cache in a buffer based on a constructed direct linked list, and the process includes: if the FixRD frame data is rewrite frame data, the rewrite frame data is directly overwritten with data at a position corresponding to a tail pointer of a direct linked list of a main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame; if the FixRD frame data is normal frame data, the FixRD frame is written in a main cache or an additional cache based on a direct linked list of a main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame; If the FixRD frame data is normal frame data, writing the FixRD frame into the main cache or the additional cache based on a direct linked list of main cache addresses having a corresponding relationship with the MC window corresponding to the FixRD frame includes: Based on the data occupation mark of the main cache address corresponding to the MC window corresponding to the FixRD frame, it is determined whether the main cache address has data; If there is no data, mark the data occupation mark of the main cache address as a data state, and write the FixRD frame in the main cache address; if the main cache address does not have a linked list, build a direct linked list of the main cache address; wherein the direct linked list includes: a linked list head pointer pointing to the main cache address, a linked list tail pointer pointing to the main cache address, and linked list establishment information corresponding to the established linked list; if the main cache address has a linked list, let the next address pointed to by the linked list tail pointer point to the main cache address, and update the linked list tail pointer to point to the main cache address; If there is data, an additional cache address with a corresponding data occupation mark without data is searched from the additional cache, and the direct linked list of the main cache address is updated, and the data occupation mark of the additional cache address is marked as having data, and the FixRD frame is written in the additional cache address; wherein the direct linked list includes: a linked list head pointer, a linked list tail pointer and linked list establishment information corresponding to the established linked list; and the next address pointed to by the linked list tail pointer is pointed to the additional cache address, and the linked list tail pointer is updated to point to the additional cache address; When a read request for a FixRD frame corresponding to an MC window is received, a read operation of the FixRD frame is performed in the main cache or the additional cache in the buffer based on the constructed direct linked list, and the process includes: based on the direct linked list of the main cache address that has a corresponding relationship with the MC window corresponding to the FixRD frame, the FixRD frame is read in the main cache or the additional cache in the buffer, and the linked list head pointer of the corresponding direct linked list and the information on whether the linked list is established are updated, and the data occupancy mark of the corresponding main cache address or the additional cache address is marked as a no data state.

2. The data frame reading and writing method based on the fixed delay retransmission service according to claim 1, characterized in that: The linked list reading and writing implementation method also includes: an indirect linked list reading and writing method, the indirect linked list reading and writing method includes: When a write request for a FixRD frame corresponding to an MC window is received, a write operation of the FixRD frame is performed in a main cache or an additional cache in the cache based on the constructed indirect linked list; When a read request for a FixRD frame corresponding to an MC window is received, a read operation of the FixRD frame is performed in a main buffer or an additional buffer in the buffer based on the constructed indirect linked list.

3. The data frame reading and writing method based on the fixed delay retransmission service according to claim 2, characterized in that: The write operation of the FixRD frame in the main cache or the additional cache in the cache based on the constructed indirect linked list includes: If the FixRD frame data is rewrite frame data, if the indirect linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame has been established, the rewrite frame data is directly used to overwrite the data at the position corresponding to the tail pointer of the indirect linked list; if the indirect linked list of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame has not been established, the rewrite frame data is directly used to overwrite the data at the position corresponding to the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame; If the FixRD frame data is normal frame data, the FixRD frame is written into the main cache or the additional cache based on an indirect linked list of main cache addresses corresponding to the MC window corresponding to the FixRD frame.

4. The data frame reading and writing method based on the fixed delay retransmission service according to claim 3, characterized in that: If the FixRD frame data is normal frame data, then based on an indirect linked list of main cache addresses corresponding to the MC window corresponding to the FixRD frame, writing the FixRD frame into the main cache or the additional cache includes: Based on the data occupation mark of the main cache address corresponding to the MC window corresponding to the FixRD frame, it is determined whether the main cache address has data; If there is no data, mark the data occupation mark of the primary cache address as having data, and write the FixRD frame in the primary cache address; if the primary cache address already points to an indirect linked list, point the next address pointed by the tail pointer of the linked list to the primary cache address, and make the tail pointer of the linked list point to the primary cache address; If there is data, find an address space marked as no data state for the data occupation of the corresponding additional cache address from the constructed corresponding additional cache addresses, write the FixRD frame in the additional cache address, and mark the data occupation mark of the additional cache address as having data state; if the main cache address does not point to a linked list, build an indirect linked list corresponding to the main cache address, find an invalid linked list from the linked list space, mark the linked list valid, mark the main cache address pointing to the linked list as having a linked list pointing state and build a linked list index corresponding to the linked list of the main cache address; wherein the indirect linked list includes: a linked list head pointer pointing to the main cache address, a linked list tail pointer pointing to the additional cache address and the linked list establishment information of the corresponding linked list; and let the linked list head pointer point to the next address as the additional cache address; if the main cache address already points to a linked list, let the next address pointed to by the linked list tail pointer point to the additional cache address, and let the linked list tail pointer point to the additional cache address.

5. The data frame reading and writing method based on fixed delay retransmission service according to claim 2, characterized in that: When a read request of a FixRD frame corresponding to an MC window is received, performing a read operation of the FixRD frame in a main cache or an additional cache in the cache based on the constructed indirect linked list includes: Determine whether to establish a linked list based on the pointing linked list flag of the main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame; If a linked list is established, then the corresponding indirect linked list is obtained according to the linked list index of the primary cache address, and the FixRD frame is read based on the primary cache or additional cache in the cache of the indirect linked list, and the linked list head pointer of the corresponding indirect linked list and the information whether the linked list is established are updated, or the linked list is released; and the data occupation mark of the corresponding primary cache address or additional cache address is marked as no data state; If the linked list is not established, the FixRD frame is directly read at the main cache address, and the corresponding main cache address data occupancy mark is marked as a no data state.

6. A data frame reading and writing device based on a fixed delay retransmission service, characterized in that: The device comprises: A read / write implementation module, for performing read / write operations of a FixRD frame obtained from a moving MC window in a main cache or an additional cache in a cache using a constructed linked list based on a linked list read / write implementation method; The linked list reading and writing implementation method includes: a direct linked list reading and writing method, and the direct linked list reading and writing method includes: When a write request of a FixRD frame corresponding to an MC window is received, a write operation of the FixRD frame is performed in a main cache or an additional cache in a buffer based on a constructed direct linked list, and the process includes: if the FixRD frame data is rewrite frame data, the rewrite frame data is directly overwritten with data at a position corresponding to a tail pointer of a direct linked list of a main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame; if the FixRD frame data is normal frame data, the FixRD frame is written in a main cache or an additional cache based on a direct linked list of a main cache address having a corresponding relationship with the MC window corresponding to the FixRD frame; If the FixRD frame data is normal frame data, writing the FixRD frame into the main cache or the additional cache based on a direct linked list of main cache addresses having a corresponding relationship with the MC window corresponding to the FixRD frame includes: Based on the data occupation mark of the main cache address corresponding to the MC window corresponding to the FixRD frame, it is determined whether the main cache address has data; If there is no data, mark the data occupation mark of the main cache address as a data state, and write the FixRD frame in the main cache address; if the main cache address does not have a linked list, build a direct linked list of the main cache address; wherein the direct linked list includes: a linked list head pointer pointing to the main cache address, a linked list tail pointer pointing to the main cache address, and linked list establishment information corresponding to the established linked list; if the main cache address has a linked list, let the next address pointed to by the linked list tail pointer point to the main cache address, and update the linked list tail pointer to point to the main cache address; If there is data, an additional cache address with a corresponding data occupation mark without data is searched from the additional cache, and the direct linked list of the main cache address is updated, and the data occupation mark of the additional cache address is marked as having data, and the FixRD frame is written in the additional cache address; wherein the direct linked list includes: a linked list head pointer, a linked list tail pointer and linked list establishment information corresponding to the established linked list; and the next address pointed to by the linked list tail pointer is pointed to the additional cache address, and the linked list tail pointer is updated to point to the additional cache address; When a read request for a FixRD frame corresponding to an MC window is received, a read operation of the FixRD frame is performed in the main cache or the additional cache in the buffer based on the constructed direct linked list, and the process includes: based on the direct linked list of the main cache address that has a corresponding relationship with the MC window corresponding to the FixRD frame, the FixRD frame is read in the main cache or the additional cache in the buffer, and the linked list head pointer of the corresponding direct linked list and the information on whether the linked list is established are updated, and the data occupancy mark of the corresponding main cache address or the additional cache address is marked as a no data state.

7. A terminal, characterized in that: include: A data frame reading and writing device based on a fixed delay retransmission service as described in claim 6.

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