A patterned substrate and a method for preparing the same, and an LED epitaxial wafer

Abstract

The application discloses a kind of graphical substrate and its preparation method, LED epitaxial wafer.Preparation method includes: providing sapphire substrate;Sapphire substrate includes the substrate body and metal ion doping layer being arranged in layers, and the side surface of metal ion doping layer deviating from substrate body is sapphire substrate front;Mask layer is formed on sapphire substrate front;Using exposure developing process, mask layer is patterned to form mask pattern;Based on mask pattern, using dry etching process, sapphire substrate is etched to form multiple protruding structures on sapphire substrate front, and metal ions are doped in protruding structure.This application, metal ion doping layer can absorb light into sapphire substrate inside when exposure, avoid appearing secondary exposure phenomenon, improve mask pattern uniformity;Metal ion doped in protruding structure, can adjust the carrier concentration of epitaxial film layer, reduce the non-radiation process of extra electron in chip, improve the overall performance of chip.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor chip technology, and in particular to a patterned substrate and its preparation method, and an LED epitaxial wafer. Background Technology

[0002] Patterned sapphire substrates (PSS) have been widely adopted and applied in the epitaxial growth of GaN-based LEDs. Compared to flat sapphire substrates, PSS has two advantages: First, PSS can reduce the dislocation density of the GaN epitaxial layer and relax the stress generated during heteroepitaxial growth, thereby improving the crystal quality of the epitaxial material, reducing nonradiative recombination in the active region, and improving internal quantum efficiency. Second, PSS can reduce internal total internal reflection caused by material refractive index differences through the reflection and diffraction of light generated in the active layer by the patterned array, thus improving the light extraction efficiency of the LED.

[0003] Photolithography is a common process for fabricating patterned substrates. It refers to the process of forming a mask pattern on a sapphire substrate using exposure and development processes. The mask pattern is the photoresist pattern. Figure 1 This is a schematic diagram of the exposure process in related technologies. Figure 2 SEM images of photoresist patterns obtained after exposure and development using related technologies, such as Figure 1 and Figure 2 As shown, during the exposure process, due to the certain roughness of the back side of the sapphire substrate 1', after the photoresist layer 5' is formed, part of the exposure beam entering the interior of the sapphire substrate 1' undergoes diffuse reflection on the back side (the black solid arrow in the figure represents the exposure beam), while the other part of the light passes through the sapphire substrate 1', is reflected by the exposure stage 7', and re-enters the interior of the sapphire substrate 1'. The exposure beam that re-enters the sapphire substrate 1' will again strike the bottom of the photoresist layer 5'. After development, the photoresist pillars 6' will exhibit a smaller, concave bottom, affecting the shape of the photoresist pillars 6'. Therefore, the difference in back side roughness leads to a decrease in the concentration of the photolithography process on the sapphire substrate 1'. Large-size sapphire substrates 1', due to their large size and varying degrees of local processing, have uneven back side roughness, often with greater roughness near the edges than in the center. The greater the back side roughness, the stronger the secondary exposure, resulting in a decrease in the uniformity of the photolithography pattern within the sapphire substrate 1'. Figure 2 As shown, the bottom diameter of the photoresist pillar 6' in the central region is approximately 898 nm, and the top diameter is approximately 1.00 μm, with a difference of approximately 100 nm between the bottom and top diameters. In contrast, the bottom diameter of the photoresist pillar 6' in the edge region is approximately 771 nm, and the top diameter is approximately 966 nm, with a difference of nearly 200 nm between the bottom and top diameters. Compared to the central region of the sapphire substrate 1', the concave phenomenon of the photoresist pillar 6' near the edge region of the sapphire substrate 1' is more pronounced. Summary of the Invention

[0004] The application provides a patterned substrate and a preparation method thereof and an LED epitaxial wafer, avoids secondary exposure in a photoetching process of the patterned substrate, and improves pattern uniformity.

[0005] In a first aspect, the application provides a preparation method of a patterned substrate, comprising:

[0006] A sapphire substrate is provided, and the sapphire substrate comprises a substrate body and a metal ion doped layer arranged in layers, wherein a side surface of the metal ion doped layer away from the substrate body is a front surface of the sapphire substrate;

[0007] A mask layer is formed on the front surface of the sapphire substrate;

[0008] The mask layer is subjected to a patterned treatment by using an exposure and development process to form a mask pattern;

[0009] Based on the mask pattern, the sapphire substrate is etched by using a dry etching process to form a plurality of protruding structures on the front surface of the sapphire substrate, and the protruding structures are doped with metal ions.

[0010] In a second aspect, the application further provides a patterned substrate prepared by using the preparation method of the first aspect.

[0011] In a third aspect, the application further provides an LED epitaxial wafer comprising the patterned substrate provided by any of the embodiments of the application and an epitaxial layer formed on the patterned substrate.

[0012] The preparation method of the patterned substrate provided by the embodiments of the application first provides a sapphire substrate, the sapphire substrate comprises a substrate body and a metal ion doped layer arranged in layers, a side surface of the metal ion doped layer away from the substrate body is a front surface of the sapphire substrate, then a mask layer is formed on the front surface of the sapphire substrate, then the mask layer is subjected to a patterned treatment by using an exposure and development process to form a mask pattern, and then based on the mask pattern, the sapphire substrate is etched by using a dry etching process to form a plurality of protruding structures on the front surface of the sapphire substrate, and the protruding structures are doped with metal ions. In the application, the metal ion doped layer can greatly absorb light entering the inside of the sapphire substrate during photoetching exposure, thereby inhibiting the problem that the mask pattern is subjected to secondary exposure due to the diffuse reflection of light caused by the rough back surface of the sapphire substrate and the light beam re-entering the inside of the sapphire substrate from the exposure table through the sapphire substrate, and effectively improving the uniformity of the mask pattern. In addition, the metal ions doped in the protruding structures can adjust the carrier concentration of a subsequently grown epitaxial film layer, thereby promoting the matching recombination of carriers in the quantum well layer, reducing the non-radiation process of excess electrons in the chip, and improving the electrical performance of the epitaxial film layer. BRIEF DESCRIPTION OF DRAWINGS

[0013] Figure 1 This is a schematic diagram of the exposure process in related technologies;

[0014] Figure 2 SEM image of the photoresist pattern obtained after exposure and development using related technologies;

[0015] Figure 3 A flowchart illustrating a method for fabricating a patterned substrate according to an embodiment of the present invention;

[0016] Figure 4 for Figure 3 A schematic diagram of the preparation method shown;

[0017] Figure 5 This is a schematic diagram of the propagation path of an exposure beam provided in an embodiment of the present invention;

[0018] Figure 6 An SEM image of a mask pattern provided in an embodiment of the present invention;

[0019] Figure 7 A flowchart illustrating another method for preparing a patterned substrate according to an embodiment of the present invention;

[0020] Figure 8 for Figure 7 A schematic diagram of the preparation method shown;

[0021] Figure 9 This is a schematic diagram of a patterned substrate provided in an embodiment of the present invention;

[0022] Figure 10 This is a schematic diagram of the structure of an LED epitaxial wafer provided in an embodiment of the present invention. Detailed Implementation

[0023] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0024] Based on the deficiencies of the prior art, the inventors propose the technical solution in this application, which provides a method for preparing a patterned substrate, avoiding secondary exposure during the photolithography process of the patterned substrate and improving pattern uniformity. Figure 3 This is a flowchart illustrating a method for fabricating a patterned substrate according to an embodiment of the present invention. Figure 4 for Figure 3 The schematic diagram of the preparation method shown is for reference. Figure 3 and Figure 4 The preparation method provided in this application includes:

[0025] S110, providing a sapphire substrate.

[0026] As Figure 4 As shown in (a) of the figure, the sapphire substrate 1 is in the form of a sheet as a whole, and the sapphire substrate 1 comprises a substrate body 2 and a metal ion doped layer 3 arranged in a stacked manner, and a sapphire substrate front surface 4 is formed on a side surface of the metal ion doped layer 3 away from the substrate body 2. The sapphire substrate 1 is made of sapphire material as a whole, wherein the substrate body 2 is made of pure sapphire material without doping, and the metal ion doped layer 3 is made of sapphire material doped with metal ions. The substrate body 2 and the metal ion doped layer 3 jointly form the sapphire substrate 1.

[0027] As shown in (a) of the figure, the sapphire substrate 1 is in the form of a sheet as a whole, and the sapphire substrate 1 comprises a substrate body 2 and a metal ion doped layer 3 arranged in a stacked manner, and a sapphire substrate front surface 4 is formed on a side surface of the metal ion doped layer 3 away from the substrate body 2. The sapphire substrate 1 is made of sapphire material as a whole, wherein the substrate body 2 is made of pure sapphire material without doping, and the metal ion doped layer 3 is made of sapphire material doped with metal ions. The substrate body 2 and the metal ion doped layer 3 jointly form the sapphire substrate 1.

[0028] In the embodiment of the present application, the metal ion doped layer 3 is formed in the sapphire substrate 1, and the metal ions doped in the sapphire substrate 1 can enhance the light absorption capacity of the sapphire substrate 1, and to a great extent, the exposure beam is prevented from being transmitted through the sapphire substrate 1 to the exposure platform in the subsequent exposure and development process.

[0029] S120, forming a mask layer on the sapphire substrate front surface.

[0030] As shown in (a) of the figure, the sapphire substrate 1 is in the form of a sheet as a whole, and the sapphire substrate 1 comprises a substrate body 2 and a metal ion doped layer 3 arranged in a stacked manner, and a sapphire substrate front surface 4 is formed on a side surface of the metal ion doped layer 3 away from the substrate body 2. The sapphire substrate 1 is made of sapphire material as a whole, wherein the substrate body 2 is made of pure sapphire material without doping, and the metal ion doped layer 3 is made of sapphire material doped with metal ions. The substrate body 2 and the metal ion doped layer 3 jointly form the sapphire substrate 1. Figure 4 As shown in (a) of the figure, the sapphire substrate 1 is in the form of a sheet as a whole, and the sapphire substrate 1 comprises a substrate body 2 and a metal ion doped layer 3 arranged in a stacked manner, and a sapphire substrate front surface 4 is formed on a side surface of the metal ion doped layer 3 away from the substrate body 2. The sapphire substrate 1 is made of sapphire material as a whole, wherein the substrate body 2 is made of pure sapphire material without doping, and the metal ion doped layer 3 is made of sapphire material doped with metal ions. The substrate body 2 and the metal ion doped layer 3 jointly form the sapphire substrate 1.

[0031] Optionally, the specific process parameters of the spin coating can be adjusted by those skilled in the art according to actual needs, and the embodiment of the present application does not limit this, for example, the photoresist can be spin coated to the sapphire substrate front surface 4 to form the mask layer 5 at 16-25℃, and the thickness of the mask layer 5 can be controlled to be 1100-2500nm, but is not limited thereto.

[0032] S130, patterning the mask layer by an exposure and development process to form a mask pattern.

[0033] Further, as shown in (b) of the figure, the mask layer 5 is a photoresist layer, and the photoresist can be uniformly coated on the sapphire substrate front surface 4 by spin coating, that is, on the side surface of the sapphire substrate 1 with the metal ion doped layer 3. The selection of the photoresist is not limited, and any one of the existing photoresists can be selected, which can be a positive photoresist or a negative photoresist, wherein the thickness of the mask layer 5 has a certain influence on the subsequent etching of the protruding structure, and the thickness of the mask layer 5 can be set according to the results of multiple experiments. Figure 4In the middle (c) figure, the mask layer 5 is patterned by an exposure and development process, which is a kind of photolithography technology that, under the action of light, transfers the pattern on the mask to the substrate by photoresist, and then dissolves the photoresist in the exposed area of the positive photoresist and the non-exposed area of the negative photoresist by using a developing solution, so as to form a three-dimensional pattern on the photoresist.

[0034] Specifically, the photoresist layer formed in S120 can be exposed using a selected mask, and the exposure mode can be step exposure, in which the photoresist layer is exposed in a single exposure field in sequence. After development, the required photoresist column, i.e. the mask pattern 6, is formed on the front surface 4 of the sapphire substrate. The development temperature can be controlled to be 16-25℃, and the development time can be 10-40s, so as to obtain a mask pattern 6 with high uniformity.

[0035] Alternatively, the pattern arrangement on the mask can be a periodic square lattice arrangement, a periodic hexagonal close-packed arrangement, a non-periodic quasicrystal arrangement, and a random array arrangement, etc., which is not limited herein. The pattern arrangement on the mask is the arrangement of the mask pattern 6 formed after exposure and development.

[0036] It can be understood that when the sapphire material is doped with metal ions, the doped metal ions change the phase structure of the sapphire material, i.e. the phase structure of the metal ion doped layer is different from that of the pure sapphire material, which causes the absorption of the light beam by the metal ion doped layer to change. According to the experimental test results, the light absorption effect of the metal ion doped layer is better than that of the pure sapphire material, which can absorb most of the exposure light beams in the photolithography exposure process, avoid the exposure light beams from penetrating through the sapphire substrate, and greatly reduce the exposure light beams that are directed to the back surface of the sapphire substrate and the exposure table.

[0037] Figure 5 An exposure light beam propagation path schematic diagram is provided for the embodiment of the present application, as shown in Figure 5 The presence of the metal ion doped layer 3 can absorb a large amount of exposure light beams (indicated by black solid arrows in the figure), greatly reducing the light beams that penetrate through the sapphire substrate 1 and are directed to the exposure table 7, and also inhibiting the generation of diffuse reflection light beams caused by the roughness of the back surface of the sapphire substrate 1. Even if a small part of the light beams (indicated by black dashed arrows in the figure) are directed to the exposure table 7 and are reflected to the sapphire substrate 1 via the exposure table 7, the metal ion doped layer 3 can further have a light absorption effect, ensuring that no reflected exposure light beams are directed to the mask layer 5, avoiding the problem of secondary exposure of the mask pattern 6, improving the uniformity of the mask pattern 6 on the front surface 4 of the sapphire substrate, and improving the concentration of the photolithography and finished product process of the sapphire substrate 1.

[0038] Figure 6As provided in this embodiment of the invention, an SEM image of a mask pattern was obtained. The inventors measured the morphology of the mask pattern 6 obtained after S130, as follows: Figure 6 As shown, the bottom diameter of the mask pattern 6 (photoresist pillar) in the middle region of the sapphire substrate 1 is about 1.00 μm, and the top diameter is about 1.02 μm. The difference between the bottom diameter and the top diameter is about 20 nm, which significantly improves the concavity phenomenon. The bottom diameter of the mask pattern 6 in the edge region of the sapphire substrate 1 is about 1.02 μm, and the top diameter is about 1.04 μm. The difference between the bottom diameter and the top diameter is about 20 nm, which also significantly improves the concavity phenomenon. Furthermore, the overall shape of the mask pattern 6 in the central region and the edge region is not much different, and the overall uniformity of the mask pattern 6 is greatly improved.

[0039] S140. Based on the mask pattern, a dry etching process is used to etch the sapphire substrate to form multiple protrusion structures on the front side of the sapphire substrate, and the protrusion structures are doped with metal ions.

[0040] Dry etching is a process that uses plasma to etch thin films. Optionally, in this embodiment of the invention, inductively coupled plasma (ICP) dry etching is used to etch the sapphire substrate 1. ICP refers to the process of introducing a reactive gas and using inductively coupled plasma glow discharge to decompose it. The resulting highly chemically active plasma moves to the sample surface under the acceleration of an electric field, thereby etching the sample surface.

[0041] Specifically, further, refer to Figure 4 In Figure (d), based on the mask pattern 6, multiple protrusion structures 8 are fabricated on the front side 4 of the sapphire substrate using a dry etching process, thus forming a patterned substrate.

[0042] The protruding structure 8 can be any one of the following shapes: conical, frustum-shaped, polygonal pyramidal, or frustum-shaped. Furthermore, the sidewalls of the protruding structure 8 can have a certain curvature. Protruding structures 8 with curved sidewalls can better utilize scattering effects to scatter the emitted light from the LED active region, breaking the total internal reflection limitation at the light emission interface, improving the effective scattering area of ​​the protruding structure 8, and increasing the LED light emission efficiency. The curvature range of the sidewalls can be controlled by changing various parameters during the ICP dry etching process; for example, the flow rate-to-volume ratio of the mixed gas can be changed.

[0043] As can be known by those skilled in the art, in subsequent LED chip processes, a plurality of epitaxial film layers will be grown on the side of the patterned substrate with the protruding structure 8, such as n-type GaN epitaxial film layers, quantum well layers, and the like. Another advantage of the patterned substrate in the present application is that, since the front surface 4 of the sapphire substrate is the surface of the metal ion doped layer 3, there is also a part of the metal ion doped area in the protruding structure 8 obtained by dry etching. Metal ions are generally positively charged, similar to "holes", and in subsequent growth of n-type GaN epitaxial film layers, electrons in the n-type GaN epitaxial film layers migrate, and the doped metal ions in the protruding structure 8 have a probability of combining with the electrons, which can to some extent adjust the carrier concentration in the n-type GaN epitaxial film layers, thereby promoting the matching recombination of quantum well layer electrons and holes, reducing the non-radiative process of excess electrons in the quantum well layer, and thus improving the heat generation of the quantum well layer and improving the overall reliability and light output of the LED chip.

[0044] The preparation method of the patterned substrate provided by the embodiments of the present application first provides a sapphire substrate; the sapphire substrate includes a substrate body and a metal ion doped layer arranged in layers, and the side surface of the metal ion doped layer away from the substrate body is the front surface of the sapphire substrate; then a mask layer is formed on the front surface of the sapphire substrate; then the mask layer is patterned by using an exposure and development process to form a mask pattern; and then based on the mask pattern, the sapphire substrate is etched by using a dry etching process to form a plurality of protruding structures on the front surface of the sapphire substrate, and the protruding structures are doped with metal ions. In the present application, the presence of the metal ion doped layer can greatly absorb the light entering the inside of the sapphire substrate during photolithography exposure, thereby inhibiting the problem of secondary exposure of the mask pattern caused by the diffuse reflected light due to the rough back surface of the sapphire substrate and the light beam re-entering the inside of the sapphire substrate through the exposure table, and effectively improving the uniformity of the mask pattern. In addition, the doped metal ions in the protruding structures can adjust the carrier concentration of the subsequently grown epitaxial film layers, thereby promoting the matching recombination of the quantum well layer carriers, reducing the non-radiative process of excess electrons in the chip, and improving the overall performance of the chip.

[0045] Optionally, the embodiments of the present application do not limit the formation method of the metal ion doped layer, for example, the metal ion doped layer can be formed in the sapphire substrate by diffusion or ion implantation process, but is not limited thereto, and any method capable of forming a metal ion doped layer in the sapphire substrate is within the scope of the technical solutions protected by the embodiments of the present application.

[0046] For example, in a possible embodiment, before the sapphire substrate is provided, the method further includes: providing a sapphire wafer; implanting metal ions on one side surface of the sapphire wafer by using an ion implantation process to form a metal ion doped layer with a preset thickness in the sapphire wafer, thereby obtaining the sapphire substrate, and the part of the sapphire wafer without the metal ion doped layer is the substrate body.

[0047] Figure 7 This is a flowchart illustrating another method for fabricating a patterned substrate according to an embodiment of the present invention. Figure 8 for Figure 7 The schematic diagram of the preparation method shown is as follows. Figure 7 The preparation method shown is a further refinement based on the above embodiments, refer to... Figure 7 and Figure 8 The preparation method provided in this embodiment includes:

[0048] S210, provides sapphire flat sheets.

[0049] Sapphire wafer 9 is made of undoped pure sapphire material. The size of sapphire wafer 9 can be selected according to needs and is not limited here. Sapphire wafer 9 can be cleaned before use. Cleaning methods include conventional chemical cleaning and plasma cleaning. Conventional chemical cleaning refers to using chemical reagents to remove impurities and stains from the sapphire wafer 9; plasma cleaning refers to using the properties of active components in plasma to treat the sample surface to improve the surface crystal quality of the sapphire wafer 9.

[0050] S220. Using an ion implantation process, metal ions are implanted on one side surface of a sapphire flat sheet to form a metal ion doped layer of a predetermined thickness in the sapphire flat sheet, thereby obtaining a sapphire substrate. The part of the sapphire flat sheet without the metal ion doped layer is the substrate body.

[0051] Further, refer to Figure 8 Figures (a) and (b) show that metal ions M can be implanted onto one side of the sapphire wafer 9 using ion implantation. + By controlling the metal ion M + The injected dose is sufficient to target metal ions M + The diffusion depth in the sapphire flat wafer 9 is controlled, thereby forming a metal ion doped layer 3 of a predetermined thickness h on one side of the sapphire flat wafer 9. (No metal ion M is present.) + The diffused area is the substrate body 2, and the substrate body 2 and the metal ion doped layer 3 together constitute the sapphire substrate 1.

[0052] Optionally, the specific process of ion implantation can be selected by those skilled in the art according to actual needs, and embodiments of the present application do not limit this. For example, in possible embodiments, metal ion implantation can be completed by a metal vapor vacuum arc (MEVVA) ion implantation method. The MEVVA ion implantation generates high-density metal plasma by using the principle of vacuum arc discharge of the MEVVA ion source, and the metal plasma is implanted into the surface of the material to be processed to cause changes in the composition and structure of the material surface. Of course, in actual applications, those skilled in the art can select other ion implantation methods according to actual conditions, and any process for forming a metal ion doped layer 3 by an ion implantation method is within the scope of the technical solutions protected by embodiments of the present application.

[0053] In which, the preset thickness h of the metal ion doped layer 3 can be adjusted by adjusting various process parameters during ion implantation. For example, the implantation thickness of the metal ion doped layer 3 can be adjusted by adjusting the energy and dose of the implanted metal ions.

[0054] Optionally, in possible embodiments, the preset thickness h is 10-1000 nm.

[0055] In this embodiment, the ion implantation process can be used to implant metal ions with an energy range of 10-200 keV and a dose of 10 16 cm -2 -10 18 cm -2 nm into the surface of the sapphire flat sheet 9, forming a metal ion doped layer 3 with a depth of 10-1000 nm, i.e., the preset thickness h of the metal ion doped layer 3 is 10-1000 nm.

[0056] S230, providing a sapphire substrate.

[0057] S240, forming a mask layer on the front surface of the sapphire substrate.

[0058] S250, patterning the mask layer using an exposure and development process to form a mask pattern.

[0059] S260, based on the mask pattern, using a dry etching process to etch the sapphire substrate to form a plurality of protruding structures on the front surface of the sapphire substrate, and the protruding structures are doped with metal ions.

[0060] The specific embodiments of S230-S260 described above can refer to the embodiments described above, and will not be repeated here.

[0061] A metal ion doped layer 3 is formed on one side of the sapphire flat wafer 9 by ion implantation. The metal ion doped layer 3 has a high flatness, that is, the thickness distribution of the metal ion doped layer 3 inside the sapphire substrate 1 is relatively uniform. As a result, the metal ion doped layer 3 has a basically the same absorption effect on the exposure beam at different positions of the sapphire substrate 1, thereby improving the uniformity of the mask pattern 6 obtained by photolithography.

[0062] Optionally, in a possible embodiment, metal ions M are implanted onto one side surface of the sapphire wafer 9 using an ion implantation process. + After forming a metal ion doped layer 3 of a preset thickness h, the process also includes annealing the sapphire flat sheet 9.

[0063] Specifically, in this embodiment, after forming a metal ion doped layer 3 on one side of the sapphire wafer 9, the doped sapphire wafer 9 can be annealed. The advantage of annealing is that it can enhance the metal ion doping layer 3. + The diffusion effect within the sapphire enhances the diffusion of metal ions M within the metal ion doped layer 3. + This improves the uniformity of the sapphire distribution and reduces the stress on the sapphire substrate 1.

[0064] In actual production, those skilled in the art can adjust the annealing temperature and time according to the actual situation, and this application does not limit this. For example, the annealing temperature and time for doped metal ions M can be adjusted at 600–1200°C. + The sapphire flat wafer 9 is then annealed for 2 to 48 hours to obtain the sapphire substrate 1, but is not limited to this.

[0065] One point to note is that during dry etching of the sapphire substrate 1, different etching process parameters result in different etching depths. When the etching depth differs, the composition of the resulting protrusion structure 8 also varies. For example, when the etching depth is less than or equal to the thickness h of the metal ion doped layer 3, the protrusion structure 8 formed by dry etching is entirely composed of the metal ion doped layer 3, and the entire protrusion structure 8 is doped with metal ions M. + When the etching depth is greater than the thickness h of the metal ion doped layer 3, the protrusion structure 8 formed by dry etching is formed by the metal ion doped layer 3 and the substrate body 2. The protrusion structure 8 contains both metal ions M + The doped areas also include pure sapphire areas.

[0066] In a possible embodiment, the etching depth can be controlled to be less than or equal to the thickness h of the metal ion doped layer 3, so that the protrusion structure 8 is entirely formed by the metal ion doped layer 3.

[0067] In other possible embodiments, the protruding structure 8 comprises a sapphire protruding part 81 and a doped layer protruding part 82 stacked along a first direction X, the first direction X being a direction in which the substrate body 2 points to the metal ion doped layer 3; based on the mask pattern 6, the sapphire substrate 1 is etched by using a dry etching process to form a plurality of protruding structures 8 on the front surface 4 of the sapphire substrate 1, comprising: based on the mask pattern 6, the metal ion doped layer 3 and part of the sapphire substrate 1 are etched by using a dry etching process to form a plurality of sapphire protruding parts 81 and doped layer protruding parts 82 stacked along the first direction X on the front surface 4 of the sapphire substrate 1.

[0068] Specifically, still referring to Figure 4 or Figure 8 , in this application, the metal ion doped layer 3 and part of the sapphire substrate 1 can be etched by using a dry etching process at the same time, that is, the dry etching depth can be controlled to be greater than the thickness h of the metal ion doped layer 3. At this time, the protruding structure 8 formed after dry etching is formed by the metal ion doped layer 3 and the substrate body 2 at the same time, and the protruding structure 8 can be divided into a doped layer protruding part 82 and a sapphire protruding part 81, the doped layer protruding part 82 is formed after etching the metal ion doped layer 3, and the sapphire protruding part 81 is formed after etching part of the substrate body 2. The direction in which the substrate body 2 points to the metal ion doped layer 3 is defined as the first direction X, and it can be understood that the sapphire protruding part 81 and the doped layer protruding part 82 are stacked along the first direction X.

[0069] In this embodiment, the metal ion doped layer 3 and the substrate body 2 are etched by using a dry etching process at the same time, and then the protruding structure 8 comprising the doped layer protruding part 82 and the sapphire protruding part 81 is formed. The existence of the doped layer protruding part 82 can adjust the carrier concentration of the epitaxial film layer grown subsequently, and then promote the matching recombination of the quantum well layer carrier; the existence of the sapphire protruding part 81 can ensure the growth quality of the epitaxial film layer and reduce the defects in the epitaxial film layer.

[0070] Optionally, still referring to Figure 4 or Figure 8 , in possible embodiments, before the sapphire substrate 1 is etched by using a dry etching process based on the mask pattern 6 to form a plurality of protruding structures 8 on the front surface 4 of the sapphire substrate 1, it further comprises: determining a first target height h1 of the doped layer protruding part 82 and a second target height h2 of the protruding structure 8; based on the mask pattern 6, the sapphire substrate 1 is etched by using a dry etching process to form a plurality of protruding structures 8 on the front surface 4 of the sapphire substrate 1, further comprising: based on the first target height h1 and the second target height h2, adjusting the dry etching process parameters.

[0071] Specifically, in the embodiment, the first target height h1 of the doped layer protrusion 82 and the second target height h2 of the protrusion structure 8 can be determined, which can also be understood as determining the proportion of the height of the doped layer protrusion 82 in the height of the protrusion structure 8. Those skilled in the art can understand that when the dry etching depth is small, the proportion of the height of the doped layer protrusion 82 in the height of the protrusion structure 8 is large; as the dry etching depth increases, the proportion of the height of the doped layer protrusion 82 in the height of the protrusion structure 8 gradually decreases.

[0072] Further, in the dry etching process, based on the first target height h1 of the doped layer protrusion 82 and the second target height h2 of the protrusion structure 8, the depth of dry etching is adjusted by adjusting the process parameters of dry etching, so that the height proportion of the doped layer protrusion 82 and the protrusion structure 8 reaches the pre-set proportion range.

[0073] Optionally, the specific values of the first target height h1 and the second target height h2 are not limited in the embodiment of the application, and those skilled in the art can set them according to actual needs. In an exemplary embodiment, the ratio of the first target height h1 to the second target height h2 can be in the range of 1:20 to 1:1, that is, the ratio of the first target height h1 to the second target height h2 is greater than or equal to 0.05.

[0074] Optionally, the embodiment of the application does not limit the material of the doped metal ion M + It can be understood that when the doped metal ion M + is different, the absorption effect of the metal ion doped layer 3 on the light beam is different. Those skilled in the art can know that the wavelength of the exposure light beam in the photolithography exposure system is generally less than 500 nm, and in the present application, the metal ion doped layer 3 can mainly absorb light beams with a wavelength of less than 500 nm.

[0075] For example, in a possible embodiment, the metal ion M + includes one or more of Co + , Fe + , Nd + , Cr + , V + and Ni + .

[0076] Applicants have found that after doping one or more of the above metal ions in the sapphire material, the sapphire substrate 1 can better absorb the photolithography exposure light beam.

[0077] Next, a method for preparing a patterned substrate provided by the embodiment of the application will be described with reference to a specific embodiment. First, an ion implantation process is used to implant ions on the front surface of a sapphire wafer, and the energy range is 10-200 keV, the dose is 10 16cm -2 ~10 18 cm -2 of metal ions (Co + , Fe + , Nd + , Cr + , V + and / or Ni + ) is implanted, and then annealed at 600-1200℃ for 2-48h to form a sapphire substrate including a metal ion doped layer and a substrate body, and a front surface of the sapphire substrate is opposite to a side surface of the metal ion doped layer. Further, a spin coating photoresist process is performed on the front surface of the sapphire substrate, the spin coating process temperature is controlled at 16-25℃, and the thickness of the spin coated photoresist layer is controlled at 1100-2500nm. Further, the sapphire substrate with the photoresist layer is subjected to a photoetching exposure process, and due to the presence of the metal ion doped layer, the exposure light beam entering the sapphire substrate is effectively absorbed, thereby inhibiting the problem of secondary exposure; the exposed photoresist layer is developed at 16-25℃ for 10-40s to obtain a mask pattern with high uniformity. Finally, an ICP dry etching is performed to obtain a patterned substrate with high uniformity of the convex structure, the convex structure has a bottom diameter of 600nm-3100nm and a height of 100nm-2500nm, and the convex structure includes a doped layer convex and a sapphire convex arranged in a stack, and the height ratio of the doped layer convex to the entire convex structure is between 5% and 100%. The process parameters of the dry etching can be: temperature 1-30℃, pressure 2-8mtorr, upper electrode power 600-1800w, lower electrode power 100-850w, and etching gas BCl3 and CHF3.

[0078] Based on the same concept, the embodiment of the present application also provides a patterned substrate prepared by the preparation method of the patterned substrate provided by any of the embodiments of the present application, Figure 9 which is a structural schematic diagram of the patterned substrate provided by the embodiment of the present application, and Figure 9 the patterned substrate includes a sapphire substrate 1 and a plurality of convex structures 8 on the front surface 4 of the sapphire substrate, and the convex structures 8 are doped with metal ions.

[0079] The patterned substrate provided by the embodiment of the present application includes all the technical features and corresponding beneficial effects of the preparation method of the patterned substrate provided by any of the embodiments of the present application, which will not be repeated here.

[0080] Optionally, the patterned substrate provided by the embodiment of the present application can still refer to Figure 9 In a possible embodiment, the convex structure 8 includes a sapphire convex 81 and a doped layer convex 82 arranged in a stack; and the ratio of the first target height h1 of the doped layer convex 82 to the second target height h2 of the convex structure 8 is greater than or equal to 0.05.

[0081] The embodiment of the present application also provides an LED epitaxial wafer, Figure 10 A structural diagram of an LED epitaxial wafer provided by the embodiment of the present application, which comprises the patterned substrate 10 provided by any embodiment of the present application and the epitaxial layer 20 formed on the patterned substrate 10. Different LED epitaxial wafer growth technologies, chip processing technologies and device packaging technologies are needed for different substrate materials, and the epitaxial layer 20 on the corresponding LED epitaxial wafer of the patterned composite substrate provided by the embodiment of the present application can be GaN, AIGaN epitaxial layer, etc.

[0082] The LED epitaxial wafer provided by the embodiment of the present application comprises all the technical features and corresponding beneficial effects of the patterned substrate provided by any embodiment of the present application, which will not be repeated here.

[0083] It should be noted that the above are only the preferred embodiments of the present application and the technical principles applied. Those skilled in the art will understand that the present application is not limited to the specific embodiments herein, and those skilled in the art can make various obvious changes, re-adjustments, mutual combinations and substitutions without departing from the protection scope of the present application. Therefore, although the present application has been described in more detail through the above embodiments, the present application is not limited to the above embodiments, and can also include more other equivalent embodiments without departing from the concept of the present application, and the scope of the present application is determined by the scope of the appended claims.

Claims

1. A method for preparing a patterned substrate, characterized in that, include: A sapphire substrate is provided; the sapphire substrate includes a substrate body and a metal ion doped layer stacked together, the side of the metal ion doped layer facing away from the substrate body is the front side of the sapphire substrate; the metal ion doped layer is used to absorb the exposure beam during the photolithography process to avoid secondary exposure of the mask pattern. A mask layer is formed on the front side of the sapphire substrate; The mask layer is patterned using an exposure and development process to form a mask pattern; Based on the mask pattern, the sapphire substrate is etched using a dry etching process to form multiple protrusion structures on the front side of the sapphire substrate, wherein the protrusion structures are doped with metal ions.

2. The preparation method according to claim 1, characterized in that, Prior to providing the sapphire substrate, the method further includes: Sapphire wafers are available; Using an ion implantation process, metal ions are implanted into one side surface of the sapphire flat sheet to form a metal ion doped layer of a predetermined thickness in the sapphire flat sheet, thereby obtaining the sapphire substrate. The portion of the sapphire flat sheet without the metal ion doped layer is the substrate body.

3. The preparation method according to claim 2, characterized in that, After implanting metal ions into one side surface of the sapphire wafer using an ion implantation process to form a metal ion-doped layer of a predetermined thickness, the method further includes: The sapphire wafer is then annealed.

4. The preparation method according to any one of claims 2 to 3, characterized in that, The preset thickness is 10 to 1000 nm.

5. The preparation method according to claim 1, characterized in that, The protrusion structure includes sapphire protrusions and doped layer protrusions stacked along a first direction, wherein the first direction is the direction from the substrate body to the metal ion doped layer; Based on the mask pattern, a dry etching process is used to etch the sapphire substrate to form multiple protrusion structures on the front side of the sapphire substrate, including: Based on the mask pattern, a dry etching process is used to etch the metal ion doped layer and part of the sapphire substrate to form a plurality of sapphire protrusions and doped layer protrusions stacked along a first direction on the front side of the sapphire substrate.

6. The preparation method according to claim 5, characterized in that, Before etching the sapphire substrate using a dry etching process based on the mask pattern to form multiple protrusion structures on the front side of the sapphire substrate, the method further includes: Determine the first target height of the doped layer protrusion and the second target height of the protrusion structure; The method of etching the sapphire substrate using a dry etching process based on the mask pattern to form multiple protrusion structures on the front side of the sapphire substrate further includes: Based on the first target height and the second target height, adjust the dry etching process parameters.

7. The preparation method according to claim 1, characterized in that, The metal ions include at least Co. + Fe + 、Nd + Cr + V + and Ni + One or more of them.

8. A patterned substrate, prepared by the preparation method according to any one of claims 1 to 7, wherein the patterned substrate comprises: A sapphire substrate and a plurality of protrusions on the front side of the sapphire substrate, wherein the protrusions are doped with metal ions.

9. The patterned substrate according to claim 8, characterized in that, The protrusion structure includes sapphire protrusions and doped layer protrusions arranged along the stack; the ratio of the first target height of the doped layer protrusion to the second target height of the protrusion structure is greater than or equal to 0.

05.

10. An LED epitaxial wafer, characterized in that, Includes the patterned substrate as described in any one of claims 8 or 9 and the epitaxial layer formed on the patterned substrate.

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