Via hole metallization process for high aspect ratio blind holes in circuit boards

Abstract

The application provides a hole metal process for a high aspect ratio blind hole of a circuit board. The hole metal process for the high aspect ratio blind hole of the circuit board comprises the following steps: obtaining a nano-graphite hole metallization solution and a to-be-processed circuit board; performing a cleaning and hole processing operation on the to-be-processed circuit board; performing a graphite adsorption operation on the pretreated circuit board by using the nano-graphite hole metallization solution, so that a nano-graphite layer is formed on the hole wall and the hole bottom of the blind hole of the pretreated circuit board; performing a fixing treatment on the pretreated circuit board after the graphite adsorption treatment, so as to remove part of the nano-graphite on the surface of the nano-graphite layer in the blind hole of the pretreated circuit board; performing a drying treatment on the circuit board semi-finished product; and performing a micro-etching electroplating operation on the circuit board semi-finished product after the drying treatment, so as to obtain a direct electroplating circuit board. The hole metal process for the high aspect ratio blind hole of the circuit board can better ensure the blind hole conduction effect, and further ensure that the circuit board has a better conduction effect between layers.

Description

Technical Field

[0001] This invention relates to the field of circuit board processing technology, and in particular to a hole metallization process for high aspect ratio blind vias in circuit boards. Background Technology

[0002] The most mature process for metallizing PCB holes is chemical copper plating. The general process of chemical copper plating is: feeding - cleaning and shaping - water washing - micro etching - water washing - pre-immersion - activation - water washing - acceleration - water washing - copper plating - water washing - unloading. Due to the design requirements of end products, some blind holes with ultra-high aspect ratios (AR) are encountered in the PCB manufacturing process. The AR of conventional blind holes is ≤0.8, and the AR of deep blind holes is >0.8. If chemical copper plating is used to metallize blind holes with high aspect ratios, a large amount of hydrogen gas will be generated during the process due to the metal oxidation-reduction reaction. Moreover, air agitation is required in the chemical copper plating tank to maintain the stability of the solution. However, since the blind holes with high aspect ratios are deep or have small diameters, the hydrogen gas and air present will enter the blind holes and are difficult to fully expel. This will affect the exchange of the solution in the chemical copper plating tank in the blind holes, resulting in the inability to effectively deposit copper in the deep blind holes.

[0003] The chemical copper deposition reaction equation is as follows:

[0004]

[0005]

[0006] In other words, when using chemical copper plating to metallize blind vias with high aspect ratios, especially when the aspect ratio (AR) of the blind vias is as high as 2, it is difficult to deposit copper deep within the blind vias. This makes it difficult to electroplate thicker copper layers on areas where copper has not been deposited in subsequent copper plating processes, resulting in poor conductivity in the blind vias. This can lead to poor conductivity between different layers of the circuit board, affecting the use of the circuit board.

[0007] Currently, many methods employ direct electroplating to metallize high aspect ratio blind vias, such as patent CN110351956A. Specifically, graphene oxide via metallizing solution is adsorbed onto the walls and bottom of the blind via to form a conductive layer, which is then electroplated on top of the conductive layer to complete the metallization of the blind via. However, to ensure the conductivity of the conductive layer formed within the blind via, graphene oxide is applied multiple times to form a relatively thick conductive layer within the blind via. Due to the expansion properties of graphene oxide, the copper plating layer within the blind via is prone to peeling off during the high-temperature soldering and cooling process of the circuit board, still resulting in poor conductivity between different layers of the circuit board, thus affecting the use of the circuit board. Summary of the Invention

[0008] The purpose of this invention is to overcome the shortcomings of the prior art and provide a hole metallization process for high aspect ratio blind vias that can better ensure the conductivity of blind vias and thus ensure good conductivity between different layers of the circuit board.

[0009] The objective of this invention is achieved through the following technical solution:

[0010] A hole metallization process for high aspect ratio blind vias on circuit boards includes the following steps:

[0011] Obtain the nano-graphite pore metallization solution and the circuit board to be processed;

[0012] The circuit board to be processed is cleaned and the holes are cleaned to obtain a pre-processed circuit board;

[0013] The pretreated circuit board is subjected to graphite adsorption using the nano-graphite pore metallization solution, so that a nano-graphite layer is formed on the hole walls and bottom of the blind holes of the pretreated circuit board.

[0014] The pretreated circuit board after graphite adsorption treatment is fixed to remove some of the nano-graphite on the surface of the nano-graphite layer in the blind holes of the pretreated circuit board, so as to obtain a semi-finished circuit board.

[0015] The circuit board semi-finished product is dried.

[0016] The dried circuit board semi-finished product is subjected to micro-etching electroplating to obtain a directly electroplated circuit board.

[0017] In one embodiment, the cleaning and via cleaning operation of the circuit board to be processed specifically involves: cleaning the blind vias of the circuit board to be processed with a mixed solution of polyethylene glycol and hydroxyethyl ethylenediamine and adjusting the via walls to be positively charged.

[0018] In one embodiment, the pretreated circuit board is subjected to graphite adsorption using the nano-graphite pore metallization solution under ultrasonic vibration conditions.

[0019] In one embodiment, the nano-graphite pore metallization solution comprises nano-graphite, a binder, a dispersant, a surface enhancer, and an alkaline buffer salt.

[0020] In one embodiment, the fixing process for the pretreated circuit board after graphite adsorption treatment specifically involves immersing the pretreated circuit board after graphite adsorption treatment in a sulfuric acid solution.

[0021] In one embodiment, the pretreated circuit board after graphite adsorption treatment is immersed in a sulfuric acid solution under vacuum conditions.

[0022] In one embodiment, the pretreated circuit board after graphite adsorption treatment is immersed in sulfuric acid solution under an air pressure of 0.2 atm to 0.7 atm.

[0023] In one embodiment, a sulfuric acid solution with a volume fraction of 0.5% to 2% is used to fix the pretreated circuit board after graphite adsorption treatment.

[0024] In one embodiment, the pretreated circuit board after graphite adsorption treatment is fixed with a sulfuric acid solution with a volume fraction of 0.8% to 2% for 10 to 20 seconds.

[0025] In one embodiment, the micro-etching electroplating operation on the dried circuit board semi-finished product specifically includes the following steps:

[0026] The semi-finished circuit board is subjected to micro-etching treatment;

[0027] The semi-finished circuit board after micro-etching is then subjected to electroplating.

[0028] Compared with the prior art, the present invention has at least the following advantages:

[0029] The hole metallization process for high aspect ratio blind vias in this invention involves obtaining a nano-graphite hole metallization solution and performing hole metallization treatment on the circuit board to be treated. This effectively ensures the conductivity of the nano-graphite layer even with a relatively small nano-graphite layer thickness. Furthermore, the circuit board is fixed immediately after the hole metallization treatment, i.e., before the nano-graphite layer is dried and cured. This removes nano-graphite particles that are not adsorbed with positive ions in the blind vias of the pre-treated circuit board, effectively reducing the thickness of the nano-graphite layer in the blind vias of the pre-treated circuit board and effectively ensuring the conductivity of the nano-graphite layer in the blind vias. The uniformity of the nano-graphite layer thickness in the blind vias of the circuit board is improved, thereby reducing the degree of expansion and variation of the nano-graphite layer. This alleviates the problem that the copper plating layer in the blind vias is prone to peeling off during the high-temperature soldering and cooling process of the circuit board due to the large expansion and variation of the nano-graphite layer, which leads to poor conductivity between the layers of the circuit board. This effectively ensures the conductivity stability of the circuit board. Next, the semi-finished circuit board after fixing is dried, which effectively solidifies the nano-graphite layer, improves the adhesion stability of the nano-graphite layer, improves the packing compactness of the nano-graphite layer, and improves the conductivity of the nano-graphite layer. Attached Figure Description

[0030] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a flowchart of the hole metallization process for high aspect ratio blind vias on a circuit board according to an embodiment of the present invention.

[0032] Figure 2 This is a partial view of the ultra-high aspect ratio blind hole plate with one hole metallization obtained in Example 1.

[0033] Figure 3 This is a partial view of the ultra-high aspect ratio blind hole plate with one hole metallization obtained in Example 2.

[0034] Figure 4 This is a partial view of the ultra-high aspect ratio blind hole plate with one hole metallization obtained in Example 3. Detailed Implementation

[0035] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.

[0036] It should be noted that when an element is referred to as being "fixed to" another element, it can be directly attached to the other element or there may be an intervening element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only possible implementation.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0038] This application provides a hole metallization process for high aspect ratio blind vias on a circuit board. The aforementioned hole metallization process for high aspect ratio blind vias on a circuit board includes the following steps: obtaining a nano-graphite hole metallization solution and a circuit board to be processed; cleaning and rectifying the holes in the circuit board to obtain a pre-treated circuit board; using the nano-graphite hole metallization solution to perform a graphite adsorption operation on the pre-treated circuit board, so that a nano-graphite layer is formed on the hole walls and bottom of the blind vias of the pre-treated circuit board; fixing the pre-treated circuit board after graphite adsorption treatment to remove some of the nano-graphite on the surface of the nano-graphite layer in the blind vias of the pre-treated circuit board, obtaining a semi-finished circuit board; drying the semi-finished circuit board; and performing a micro-etching electroplating operation on the dried semi-finished circuit board to obtain a directly electroplated circuit board.

[0039] The aforementioned hole metallization process for high aspect ratio blind vias on circuit boards involves obtaining a nano-graphite hole metallization solution and performing hole metallization treatment on the circuit board to be treated. This effectively ensures the conductivity of the nano-graphite layer even with a relatively small nano-graphite layer thickness. Furthermore, the pre-treated circuit board undergoes fixing treatment immediately after hole metallization, i.e., fixing the pre-treated circuit board before the nano-graphite layer is dried and cured. This removes nano-graphite particles that are not adsorbed with positive ions in the blind vias of the pre-treated circuit board, effectively reducing the thickness of the nano-graphite layer in the blind vias and ensuring the pre-treatment... The uniform thickness of the nano-graphite layer in the blind vias of the circuit board effectively reduces the degree of expansion and variation of the nano-graphite layer. This mitigates the problem of copper plating in the blind vias easily peeling off during high-temperature soldering and cooling of the circuit board due to the large expansion and variation of the nano-graphite layer, thus causing poor conductivity between the layers of the circuit board. This effectively ensures the conductivity stability of the circuit board. Next, the semi-finished circuit board after fixing is dried, which effectively solidifies the nano-graphite layer, improves the adhesion stability of the nano-graphite layer, enhances the packing compactness of the nano-graphite layer, and improves the conductivity of the nano-graphite layer.

[0040] It should be noted that, since this application uses a nano-graphite pore metallization solution containing nano-graphite particles with a diameter of 300nm to 700nm, it is less expensive than graphene. Furthermore, nano-graphite has good conductivity, allowing the nano-graphite layer to achieve good conductivity even with a small amount of nano-graphite used. Therefore, when combined with fixing the pre-treated circuit board after graphite adsorption treatment, the nano-graphite particles that were not adsorbed with positive ions in the blind holes of the pre-treated circuit board are removed, effectively reducing the thickness of the nano-graphite layer in the blind holes of the pre-treated circuit board. While significantly reducing the thickness of the nano-graphite layer in the blind holes of the pre-treated circuit board, the conductivity of the nano-graphite layer is ensured, and the viscosity and adsorption compactness of the remaining nano-graphite particles are increased. This effectively mitigates the problem of loosening of the nano-graphite layer in the blind holes during expansion, which forces the electroplated copper layer to fall off, thereby better ensuring the conductivity stability of the electroplated copper layer in the blind holes.

[0041] It should also be noted that the nano-graphite layer at the blind holes of the semi-finished circuit board after drying has already solidified. That is, all parts of the nano-graphene, whether or not they are bonded to positively charged particles, have solidified. After solidification, the looser nano-graphite on the surface of the nano-graphite layer is removed using sulfuric acid solution. This makes it difficult to remove some of the nano-graphite that is not bonded to positively charged particles by the sulfuric acid solution. Only the looser nano-graphite on the surface can be removed. As a result, it is difficult to effectively reduce the thickness of the nano-graphite layer and to ensure the uniformity of the final nano-graphite layer thickness. This leads to different degrees of expansion of the nano-graphite layer at the blind holes of the semi-finished circuit board, and the expansion variation of the nano-graphite layer at the blind holes is large. Therefore, it is difficult to improve the problem that the copper plating layer in the blind holes is prone to peeling off during the high-temperature soldering and cooling of the circuit board due to the large expansion variation of the nano-graphite layer, which in turn causes poor conductivity between the layers of the circuit board.

[0042] To better understand the hole metallization process for high aspect ratio blind vias in this application, the following further explanation is provided:

[0043] Please see Figure 1 One embodiment of the hole metallization process for high aspect ratio blind vias on a circuit board includes the following steps:

[0044] S100. Obtain the nano-graphite pore metallization solution and the circuit board to be processed. It is understood that the nano-graphite particles in the nano-graphite pore metallization solution have a particle size of 300nm to 700nm, which is lower in cost than graphene. Furthermore, nano-graphite has good electrical conductivity, allowing the nano-graphite layer to achieve good conductivity even with a small amount used. Therefore, in order to ensure good conductivity of the conductive layer formed within the blind holes, this application obtains the nano-graphite pore metallization solution and performs pore metallization treatment on the circuit board to be processed, effectively ensuring the conductivity of the nano-graphite layer even with a relatively small nano-graphite layer thickness.

[0045] S200. Perform a cleaning and hole-refining operation on the circuit board to be processed to obtain a pre-processed circuit board. It can be understood that the cleaning and hole-refining operation on the circuit board to be processed is the same as the cleaning and hole-refining operation in a general direct electroplating process. Both remove oxide scale, grease, fingerprints, and dirt from the copper surface of the circuit board and adjust the blind holes, thereby better ensuring the flatness of the inner wall of the blind holes in the circuit board to be processed. This is beneficial to achieving the uniformity and flatness of the nano-graphite porous layer formed on the inner wall of the blind holes in the circuit board to be processed.

[0046] S300. A nano-graphite pore metallization solution is used to perform a graphite adsorption operation on the pre-treated circuit board, so that a nano-graphite layer is formed on the walls and bottoms of the blind holes of the pre-treated circuit board. It can be understood that since the main conductive material used in the nano-graphite pore metallization solution is nano-graphite, a relatively small thickness of the nano-graphite layer formed after the graphite adsorption operation on the pre-treated circuit board can effectively ensure the conductivity of the nano-graphite layer.

[0047] S400. Fixing process is performed on the pretreated circuit board after graphite adsorption treatment to remove part of the nano-graphite on the surface of the nano-graphite layer in the blind holes of the pretreated circuit board, so as to obtain a semi-finished circuit board. It is understandable that directly fixing the pre-treated circuit board after graphite adsorption treatment is equivalent to directly removing excess nano-graphite from the blind holes of the pre-treated circuit board. This removes some of the nano-graphite on the side of the hole wall and bottom away from the blind hole, thus removing the nano-graphite particles that were not adsorbed with positive ions in the blind holes. This effectively reduces the thickness of the nano-graphite layer in the blind holes of the pre-treated circuit board while ensuring the conductivity of the nano-graphite layer, and also ensures the uniformity of the nano-graphite layer thickness in the blind holes of the pre-treated circuit board. This further reduces the degree of expansion and variation of the nano-graphite layer, mitigating the problem that the copper plating layer in the blind holes is prone to peeling off during high-temperature soldering and cooling of the circuit board due to the large expansion and variation of the nano-graphite layer, thereby causing poor conductivity between the layers of the circuit board and better ensuring the conductivity stability of the circuit board.

[0048] S500. The semi-finished circuit board is dried. It can be understood that drying the semi-finished circuit board after fixing effectively solidifies the nano-graphite layer, improves its adhesion stability, increases its packing compactness, and enhances its conductivity.

[0049] S600 performs micro-etching electroplating on the dried circuit board semi-finished product to obtain a directly electroplated circuit board, which effectively achieves the metallization of the holes in the circuit board.

[0050] The aforementioned hole metallization process for high aspect ratio blind vias on circuit boards involves obtaining a nano-graphite hole metallization solution and performing hole metallization treatment on the circuit board to be treated. This effectively ensures the conductivity of the nano-graphite layer even with a relatively small nano-graphite layer thickness. Furthermore, the pre-treated circuit board undergoes fixing treatment immediately after hole metallization, i.e., fixing the pre-treated circuit board before the nano-graphite layer is dried and cured. This removes nano-graphite particles that are not adsorbed with positive ions in the blind vias of the pre-treated circuit board, effectively reducing the thickness of the nano-graphite layer in the blind vias and ensuring the pre-treatment... The uniform thickness of the nano-graphite layer in the blind vias of the circuit board effectively reduces the degree of expansion and variation of the nano-graphite layer. This mitigates the problem of copper plating in the blind vias easily peeling off during high-temperature soldering and cooling of the circuit board due to the large expansion and variation of the nano-graphite layer, thus causing poor conductivity between the layers of the circuit board. This effectively ensures the conductivity stability of the circuit board. Next, the semi-finished circuit board after fixing is dried, which effectively solidifies the nano-graphite layer, improves the adhesion stability of the nano-graphite layer, enhances the packing compactness of the nano-graphite layer, and improves the conductivity of the nano-graphite layer.

[0051] In one embodiment, the nanographite pore metallization solution includes nanographite, a binder, a dispersant, a surface enhancer, and an alkaline buffer salt.

[0052] In one embodiment, the nanographite pore metallization solution includes nanographite, a binder, a dispersant, a surface energy aid, an alkaline buffer, and an antibacterial agent.

[0053] In one embodiment, the nano-graphite pore metallization solution is similar to the conductive graphite pore metallization solution described in patent CN 112867285 A, the only difference being that the conductive graphite in the conductive graphite pore metallization solution described in patent CN 112867285 A is replaced with nano-graphite.

[0054] In one embodiment, the circuit board to be treated is cleaned and its holes are cleaned by using a mixed solution of polyethylene glycol and hydroxyethyl ethylenediamine to clean the blind holes of the circuit board to be treated and adjusting the hole walls to be positively charged. The mixed solution of polyethylene glycol and hydroxyethyl ethylenediamine is used to soak and clean the circuit board to be treated, which effectively cleans the blind holes of the circuit board to be treated and effectively adsorbs the positive charge on the inner wall of the blind holes, thereby ensuring the adsorption of nano-graphite by the blind holes of the circuit board to be treated.

[0055] In one embodiment, a nano-graphite pore metallization solution is used to perform graphite adsorption on the pretreated circuit board under ultrasonic vibration conditions. It is understood that if a chemical copper plating process is used for pore metallization of the circuit board, the properties of the chemical copper plating solution prevent it from being performed under ultrasonic vibration conditions, resulting in low efficiency and poor uniformity of the plating layer. This application uses a direct electroplating process, which can be performed under ultrasonic vibration, achieving better plating uniformity and a significantly faster plating formation rate.

[0056] In one embodiment, at a temperature of 20°C to 24°C, a nano-graphite pore metallization solution is used to perform graphite adsorption on the pretreated circuit board for 40 to 60 seconds, which effectively ensures that the nano-graphite in the nano-graphite pore metallization solution is fully adsorbed onto the inner wall of the blind holes of the pretreated circuit board.

[0057] In one embodiment, under vacuum conditions, a nano-graphite pore metallization solution is used to perform graphite adsorption on the pretreated circuit board, which effectively ensures that the nano-graphite pore metallization solution fully wets the pretreated circuit board.

[0058] In one embodiment, under an air pressure of 0.2 atm to 0.7 atm, a nano-graphite pore metallization solution is used to perform graphite adsorption on the pretreated circuit board, further ensuring that the nano-graphite pore metallization solution fully wets the pretreated circuit board. In another embodiment, fixing the pretreated circuit board after graphite adsorption treatment specifically involves immersing the pretreated circuit board in a sulfuric acid solution. It is understandable that sulfuric acid has good acid etching properties. Using sulfuric acid of appropriate concentration to fix the pre-treated circuit board is equivalent to immersing the nano-graphite deposited on the pre-treated circuit board with sulfuric acid of appropriate concentration. This makes the thickness of the nano-graphite layer in the blind via more stable and allows for the removal of more nano-graphite. Even when removing a large amount of nano-graphite, the uniformity of the nano-graphite layer can still be well ensured. That is, it will not cause excessive removal of nano-graphite in some areas or complete removal of nano-graphite in others. This ensures that the thickness of the nano-graphite layer after fixing is smaller and has better uniformity. It also reduces the problem of loosening of the nano-graphite layer in the blind via during expansion, which would force the electroplated copper layer to fall off. This, in turn, ensures the conductivity stability of the electroplated copper layer in the blind via.

[0059] In one embodiment, the pretreated circuit board after graphite adsorption treatment is immersed in a sulfuric acid solution under vacuum conditions. Under vacuum conditions, air can be effectively expelled from the blind holes of the pretreated circuit board. This results in faster and more thorough penetration of the sulfuric acid solution into the blind holes during the immersion process, ensuring better contact between the sulfuric acid solution and the nano-graphite layer within the blind holes. This, in turn, ensures a thinner and more uniform nano-graphite layer after fixing, mitigating the problem of loosening due to expansion of the nano-graphite layer in the blind holes, which could cause the electroplated copper layer to detach. This, in turn, better ensures the conductivity stability of the electroplated copper layer in the blind holes.

[0060] In one embodiment, the pretreated circuit board after graphite adsorption treatment was immersed in sulfuric acid solution under an air pressure of 0.2 atm to 0.7 atm, which effectively ensured that the sulfuric acid solution had sufficient contact and wetting between the nano-graphite layer in the blind holes of the pretreated circuit board.

[0061] In one embodiment, a sulfuric acid solution with a volume fraction of 0.5% to 2% is used to fix the pretreated circuit board after graphite adsorption treatment. It is understood that the concentration of sulfuric acid in the solution has a significant impact on the etching effect of the nano-graphite layer in the blind vias of the pretreated circuit board. If the concentration of sulfuric acid is high, it can cause excessive etching of the nano-graphite layer in the blind vias, even etching of the copper layer, resulting in insufficient thickness of the nano-graphite layer or even complete etching of certain areas. This affects the direct copper plating process and may even cause changes in the size of the blind vias, thus impacting the circuit board's performance. Conversely, if the concentration of sulfuric acid is low, it can cause excessive etching of the nano-graphite layer in the blind vias, affecting the pretreated circuit board's performance. The removal effect of nano-graphite layers in blind vias of circuit boards is poor. It is difficult to solve the problem of loosening of nano-graphite layers during expansion in blind vias, which forces the electroplated copper layer to fall off. Moreover, it is impossible to improve the viscosity and adsorption compactness of nano-graphite particles. Therefore, in this application, based on fixing treatment before drying, a sulfuric acid solution with a volume fraction of 0.5% to 2% is used to fix the pre-treated circuit board after graphite adsorption treatment. This better ensures that the thickness of the nano-graphite layer after fixing treatment is small and the thickness uniformity is good. This better alleviates the problem of loosening of nano-graphite layers during expansion in blind vias, which forces the electroplated copper layer to fall off, and thus better ensures the conductivity stability of the electroplated copper layer in blind vias.

[0062] In one embodiment, a sulfuric acid solution with a volume fraction of 0.8% to 2% was used to fix the pretreated circuit board after graphite adsorption treatment for 10 to 20 seconds, which better ensured that the thickness of the nano-graphite layer after fixing was small and the thickness uniformity was good.

[0063] In one embodiment, the dried circuit board semi-finished product undergoes a micro-etching electroplating operation, specifically including the following steps:

[0064] Micro-etching treatment is performed on the semi-finished circuit board;

[0065] Electroplating is performed on the semi-finished circuit board after micro-etching.

[0066] In one embodiment, the micro-etching treatment of the circuit board semi-finished product specifically involves using a sodium persulfate-sulfuric acid system to micro-etch the copper surface of the circuit board semi-finished product and the copper surface at the bottom of the blind holes, in order to micro-etch the copper surface of the circuit board semi-finished product and remove the residual nano-graphite on the copper surface of the circuit board semi-finished product.

[0067] In one embodiment, the sodium persulfate-sulfuric acid system is the sodium persulfate-sulfuric acid system commonly used in direct electroplating processes for micro-etching the copper surface of semi-finished circuit boards.

[0068] In one embodiment, after the step of performing micro-etching electroplating on the dried circuit board semi-finished product and before the step of obtaining the directly electroplated circuit board, the following steps are repeated at least once:

[0069] Cleaning and hole-refining operations are performed on the semi-finished circuit board.

[0070] A nano-graphite pore metallization solution is used to perform graphite adsorption on the semi-finished circuit board, so that a nano-graphite layer is formed on the hole wall and bottom of the blind hole of the semi-finished circuit board.

[0071] The semi-finished circuit board after graphite adsorption treatment is fixed to remove some of the nano-graphite on the surface of the nano-graphite layer inside the blind holes of the semi-finished circuit board.

[0072] The semi-finished circuit board is dried.

[0073] Micro-etching electroplating is performed on the dried circuit board semi-finished products.

[0074] The above steps are repeated sequentially to better ensure the thickness and uniformity of the formed nano-graphite layer, as well as the compactness of the formed nano-graphite layer. This better mitigates the problem of the nano-graphite layer in the blind hole loosening during expansion, which forces the electroplated copper layer to fall off, and thus better ensures the conductivity stability of the electroplated copper layer in the blind hole.

[0075] Compared with the prior art, the present invention has at least the following advantages:

[0076] The hole metallization process for high aspect ratio blind vias in this invention involves obtaining a nano-graphite hole metallization solution and performing hole metallization treatment on the circuit board to be treated. This effectively ensures the conductivity of the nano-graphite layer even with a relatively small nano-graphite layer thickness. Furthermore, the circuit board is fixed immediately after the hole metallization treatment, i.e., before the nano-graphite layer is dried and cured. This removes nano-graphite particles that are not adsorbed with positive ions in the blind vias of the pre-treated circuit board, effectively reducing the thickness of the nano-graphite layer in the blind vias and effectively ensuring the conductivity of the nano-graphite layer in the blind vias of the pre-treated circuit board. The uniformity of the nano-graphite layer thickness in the holes was ensured. Next, the semi-finished circuit board after fixing was dried, effectively solidifying the nano-graphite layer, improving its adhesion stability, packing compactness, and conductivity. Finally, micro-etching completely removed all residual nano-graphite on the copper surfaces, including a small amount of graphite at the bottom of the blind holes. This prevented the copper plating layer inside the blind holes from separating during high-temperature soldering and cooling, thus avoiding poor conductivity between circuit layers and ensuring better conductivity stability of the circuit board.

[0077] The following are some specific examples. Where %, it refers to a percentage by weight. It should be noted that the following examples do not exhaustively cover all possible scenarios, and unless otherwise specified, the materials used in the following examples are commercially available.

[0078] Example 1

[0079] A high aspect ratio blind via board (approximately 0.2 mm in diameter and 0.5 mm in depth) was formed by machining FR-4 printed circuit board substrate. Residue was removed using an alkaline potassium permanganate method. The blind vias of the circuit board were then cleaned with M8601 (mainly composed of polyethylene glycol and hydroxyethyl ethylenediamine) until the via walls were positively charged. The board was then subjected to ultrasonic treatment at 28 kHz for 60 seconds, followed by water rinsing. The conductivity was <20 μS / cm, and the overflow flow rate was 5 LPM. Subsequently, at 20°C, the high aspect ratio blind via board was subjected to M8603 (a nano-graphite via metallization solution, mainly composed of nano-graphite) at a pressure of 0.2A. The plate was immersed for 60 seconds under tm conditions, followed by three sets of ultrasonic waves at 28 kHz. It was then removed and immersed in a 0.5% sulfuric acid solution at a pressure of 0.2 atm for 20 seconds. Next, it was rinsed with pure water spray at an overflow rate of 5 LPM, then dried. The ultra-high aspect ratio blind via plate was then micro-etched using an etching solution of SPS (50 g / L) - 50% H2SO4 (2%) at a micro-etching rate of 0.21 μm. It was then rinsed three times with water for 9 seconds each time at an overflow rate of 5 LPM, dried, and electroplated to obtain a metallized ultra-high aspect ratio blind via plate. The conductivity was excellent, with no broken blind vias, and a 100% conductivity pass rate.

[0080] Example 2

[0081] The FR-4 printed circuit board substrate was machined to form a blind via board with an ultra-high aspect ratio (approximately 0.5 mm in diameter and 2.0 mm in depth). The board was then cleaned using an alkaline potassium permanganate method to remove adhesive residue. M8601 (mainly composed of polyethylene glycol and hydroxyethyl ethylenediamine) was used to clean the blind vias until the via walls were positively charged. The board was then subjected to three sets of ultrasonic waves at 28 kHz for 60 seconds, followed by water rinsing. The conductivity was <20 μS / cm, and the overflow flow rate was 5 LPM. Finally, the board was subjected to a temperature of 22°C. The ultra-high aspect ratio blind-hole plate was immersed in M8603 (a nano-graphite pore metallization solution, mainly composed of nano-graphite) for 50 seconds at a pressure of 0.5 atm, followed by three sets of ultrasonic waves at 28 kHz. It was then removed and immersed in a 1% (v / v) sulfuric acid solution at a pressure of 0.5 atm for 15 seconds. Following this, it was rinsed with pure water spray at an overflow rate of 5 LPM. Finally, it was cleaned with M8601 (mainly composed of polyethylene glycol and hydroxyethyl ethylenediamine). The blind vias of the circuit board were adjusted until the via walls were positively charged. Three sets of ultrasonic waves at 28 kHz were used for 60 seconds, followed by water rinsing. The conductivity was <20 μS / cm, and the overflow current was 5 LPM. Then, at 22°C, the ultra-high aspect ratio blind via board was immersed in M8603 (nanographite hole metallization solution, mainly composed of nanographite) at a pressure of 0.5 atm for 50 seconds, followed by three sets of ultrasonic waves at 28 kHz. The board was then removed and immersed in a 1% (v / v) sulfuric acid solution. The plate was immersed for 15 seconds under a pressure of 0.5 atm, followed by a pure water spray wash with an overflow of 5 LPM, and then dried. The ultra-high aspect ratio blind via plate was then micro-etched using an etching solution of SPS (70 g / L) - 50% H2SO4 (3%) at a micro-etching rate of 0.21 μm. It was then washed three times with water for 9 seconds each time with an overflow of 5 LPM, dried, and electroplated to obtain an ultra-high aspect ratio blind via plate with metallized holes. The conductivity was good, with no hole breakage and a conductivity pass rate of 100%.

[0082] Example 3

[0083] The FR-4 printed circuit board substrate was machined to form a blind via board with an ultra-high aspect ratio (0.1 mm diameter, 0.16 mm depth). The board was then cleaned using an alkaline potassium permanganate method to remove adhesive residue. M8601 (main components of polyethylene glycol and hydroxyethyl ethylenediamine) was used to clean the blind vias until the via walls were positively charged. The board was then subjected to three sets of ultrasonic waves at 28 kHz for 60 seconds, followed by water rinsing. The conductivity was <20 μS / cm, and the overflow flow rate was 5 LPM. Finally, the board was subjected to a temperature of 24°C. The ultra-high aspect ratio blind-hole plate was immersed in M8603 (a nano-graphite pore metallization solution, mainly composed of nano-graphite) for 40 seconds at a pressure of 0.7 atm, followed by three sets of ultrasonic waves at 28 kHz. It was then removed and immersed in a 2% (v / v) sulfuric acid solution at a pressure of 0.7 atm for 10 seconds. This was followed by a pure water spray wash at an overflow rate of 5 LPM, and then the plate was cleaned with M8601 (mainly composed of polyethylene glycol and hydroxyethyl ethylenediamine). The blind vias of the circuit board were adjusted until the via walls were positively charged. Three sets of ultrasonic waves at 28 kHz were used for 60 seconds, followed by water rinsing. The conductivity was <20 μS / cm, and the overflow current was 5 LPM. Then, at 24°C, the ultra-high aspect ratio blind via board was immersed in M8603 (nanographite hole metallization solution, mainly composed of nanographite) at a pressure of 0.7 atm for 40 seconds, followed by three sets of ultrasonic waves at 28 kHz. The board was then removed and immersed in a 2% (v / v) sulfuric acid solution. The plate was immersed for 10 seconds under a pressure of 0.7 atm, followed by a pure water spray wash with an overflow of 5 LPM, and then dried. The ultra-high aspect ratio blind via plate was then micro-etched using an etching solution of SPS (90 g / L) - 50% H2SO4 (4%) at a micro-etching rate of 0.21 μm. It was then washed three times with water for 9 seconds each time with an overflow of 5 LPM, dried, and electroplated to obtain an ultra-high aspect ratio blind via plate with metallized holes. The conductivity was good, with no hole breakage and a conductivity pass rate of 100%.

[0084] Comparative Example

[0085] The FR-4 printed circuit board substrate was machined to form a blind via board with an ultra-high aspect ratio (approximately 0.5 mm in diameter and 2.0 mm in depth). The board was then cleaned using an alkaline potassium permanganate method to remove adhesive residue. M8601 (mainly composed of polyethylene glycol and hydroxyethyl ethylenediamine) was used to clean the blind vias until the via walls were positively charged. The process involved three sets of ultrasonic waves at 28 kHz for 60 seconds, followed by water rinsing. The conductivity was <20 μS / cm, and the overflow flow rate was 5 LPM. Finally, at 22°C, M8603 (nano-based) was used to clean the blind vias. A metallized metallized solution (mainly composed of nano-graphite) was used to immerse an ultra-high aspect ratio blind hole plate in an air pressure of 0.5 atm for 50 seconds, followed by three sets of ultrasonic waves at 28 kHz. The plate was then removed, washed three times with pure water spray (5 LPM overflow), dried, and activated by immersion in a 20 ml / L sulfuric acid solution (50% H2SO4). The plate was washed three times with water (9 seconds each time, 5 LPM overflow), dried, and electroplated to obtain a metallized ultra-high aspect ratio blind hole plate with good conductivity and a conductivity pass rate of 81.6%.

[0086] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A hole metallization process for high aspect ratio blind vias on circuit boards, characterized in that, Includes the following steps: Obtain the nano-graphite pore metallization solution and the circuit board to be processed; The circuit board to be processed is cleaned and the holes are cleaned to obtain a pre-processed circuit board; The pretreated circuit board is subjected to graphite adsorption using the nano-graphite pore metallization solution, so that a nano-graphite layer is formed on the hole walls and bottom of the blind holes of the pretreated circuit board. The pretreated circuit board after graphite adsorption treatment is fixed to remove some of the nano-graphite on the surface of the nano-graphite layer in the blind holes of the pretreated circuit board, so as to obtain a semi-finished circuit board. The circuit board semi-finished product is dried. The dried circuit board semi-finished product is subjected to micro-etching electroplating to obtain a directly electroplated circuit board. The circuit board to be treated is cleaned and the holes are cleaned by using a mixed solution of polyethylene glycol and hydroxyethyl ethylenediamine to clean the blind holes of the circuit board to be treated and adjusting the hole walls to be positively charged so that the mixed solution of polyethylene glycol and hydroxyethyl ethylenediamine can be used to soak and clean the circuit board to be treated. At a temperature of 20℃~24℃ and under ultrasonic vibration conditions, the pretreated circuit board was subjected to graphite adsorption operation for 40s~60s using a nano-graphite pore metallization solution. The fixing process for the pretreated circuit board after graphite adsorption treatment specifically involves immersing the pretreated circuit board after graphite adsorption treatment in a sulfuric acid solution with a volume fraction of 0.5% to 2% under vacuum conditions or at a pressure of 0.2 atm to 0.7 atm.

2. The hole metallization process for high aspect ratio blind vias on circuit boards according to claim 1, characterized in that, The nano-graphite pore metallization solution includes nano-graphite, binder, dispersant, surface enhancer, and alkaline buffer salt.

3. The hole metallization process for high aspect ratio blind vias on circuit boards according to claim 1, characterized in that, The pretreated circuit board after graphite adsorption treatment was fixed with a sulfuric acid solution with a volume fraction of 0.8%~2% for 10s~20s.

4. The hole metallization process for high aspect ratio blind vias on circuit boards according to claim 1, characterized in that, The micro-etching electroplating operation performed on the dried circuit board semi-finished product specifically includes the following steps: The semi-finished circuit board is subjected to micro-etching; the semi-finished circuit board after micro-etching is subjected to electroplating.

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