Provides circuitry and methods for temperature mitigation calibration in computing devices.

By installing multiple temperature sensors within the computing device to monitor the rate of temperature change and adjust the operating frequency and voltage, the problem of inconsistent skin temperature control in computing devices is solved, enabling personalized temperature mitigation strategies and improving user comfort and power efficiency.

CN115543045BActive Publication Date: 2026-03-06QUALCOMM INC
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Patent Information

Application Number
CN202211223675.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2016-07-08
Filing Date
2017-06-14
Publication Date
2026-03-06
Estimated Expiration
2037-06-14

AI Technical Summary

Technical Problem

During use, the skin temperature of conventional computing devices changes relatively slowly, while the temperature of SOCs changes rapidly, making it difficult to effectively control the skin temperature. Furthermore, differences in the physical characteristics of individual devices lead to inconsistent thermal management, affecting user comfort and safety.

Method used

By setting multiple temperature sensors within the computing device to monitor the rate of temperature change, and using lookup tables and calibration algorithms to adjust the operating frequency and voltage, a personalized temperature mitigation strategy is set according to the device characteristics, including junction temperature and skin temperature setpoints, voltage step size, and sensor polling rate.

Benefits of technology

It achieves personalized temperature mitigation based on equipment characteristics, improves the temperature control accuracy and user comfort during equipment use, reduces power consumption, and adapts to the impact of manufacturing differences and usage damage.

✦ Generated by Eureka AI based on patent content.

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Abstract

Embodiments of this disclosure relate to providing circuitry and methods for calibrating temperature mitigation in computing devices. One method includes generating temperature information from multiple temperature sensors within the computing device; and processing the temperature information based on the observed rate of change of the temperature information to generate a voltage reduction step.
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Description

[0001] This application is a divisional application of the invention patent application with an international filing date of June 14, 2017, which entered the Chinese national phase on January 4, 2019, with Chinese national application number 201780041785.9, entitled "Providing a circuit and method for temperature mitigation calibration in a computing device".

[0002] Cross-references to related applications

[0003] This application claims priority and benefit to U.S. nonprovisional application No. 15 / 205,678, filed July 8, 2016, the contents of which are incorporated herein by reference in their entirety, as if set forth in their entirety and for all applicable purposes. Technical Field

[0004] This application generally relates to thermal management of computing devices, and more specifically, to calibration temperature mitigation algorithms in computing devices. Background Technology

[0005] Conventional computing devices (e.g., smartphones, tablets, etc.) may include a System-on-a-Chip (SoC) with a processor and other operating circuitry. Specifically, the SoC in a smartphone may include a processor chip housed within a package mounted on a printed circuit board (PCB) inside the phone. The phone includes a housing and a display such as a liquid crystal display (LCD). Human users physically interact with the housing and display when using the phone.

[0006] When a System-on-a-Chip (SOC) is operating, it generates heat. In one example, the SOC inside a smartphone can reach temperatures of 80°C to 100°C. Furthermore, conventional smartphones do not include a fan for heat dissipation. During use, such as when a human user watches a video on a smartphone, the SOC generates heat, and this heat is dissipated through the phone's internal components to its external surface.

[0007] The outer surface of a telephone is sometimes referred to as its "skin." This outer surface includes the physical portion of the casing outside the telephone, as well as any other exposed parts such as the LCD display. It is generally accepted that, for safety and ergonomic reasons, the telephone's "skin" should not reach temperatures higher than approximately 40°C to 45°C. As mentioned above, although the temperature of the State of the Charge (SOC) is not directly felt at the telephone's skin, the SOC inside a smartphone can reach temperatures of 80°C to 100°C. Conversely, heat dissipation within the telephone typically means that the telephone's "skin" temperature is lower than the SOC temperature. Furthermore, while changes in SOC temperature can be relatively rapid (e.g., seconds), changes in the device's "skin" temperature can be relatively slow (e.g., tens of seconds or minutes).

[0008] Typical smartphones include algorithms that control both SOC temperature and skin temperature by reducing the SOC's operating frequency when the temperature sensor on the SOC reaches a threshold level. Furthermore, the smartphone model and the physical characteristics of the individual smartphone affect its thermal performance. For example, thin smartphones are generally expected to experience high skin temperatures faster than thicker smartphones. In another example, smartphone models with an air gap or heatsink between their processor and skin are generally expected to experience high skin temperatures more slowly than smartphones without an air gap or heatsink. Additionally, manufacturing defects and flaws can affect the thermal performance of a given smartphone by influencing the thermal resistance and thermal path between the smartphone processor and its skin. Summary of the Invention

[0009] According to one embodiment, a method includes generating temperature information from multiple temperature sensors within a computing device and processing the temperature information based on the observed rate of change of the temperature information to generate a voltage reduction step.

[0010] According to another embodiment, the system includes: a computer processor configured to execute computer-readable instructions, the computer processor being installed in a computing device; and a temperature sensing device disposed within the computing device, the temperature sensing device communicating with the computer processor, the computer processor being configured to perform the following operations: receiving temperature information from the temperature sensing device, calculating a junction temperature ramp value from the temperature information, and setting a voltage reduction step based on the junction temperature ramp value.

[0011] According to another embodiment, the computing device includes: means for sensing temperature at multiple locations within the housing of the computing device; means for calculating a junction temperature ramp rate from temperature data from the temperature sensing means; means for parsing a lookup table to select a voltage reduction step size value based on the junction temperature ramp rate; and means for reducing the operating voltage by the voltage reduction step size value.

[0012] According to another embodiment, the method includes: collecting temperature data from multiple temperature sensors inside the housing of a computing device during a first time period, measuring the temperature ramp rate of the computing device from the temperature data, and using the temperature ramp rate as a key to select a value from a data structure, wherein the value includes a voltage step size and a voltage step size that reduces the operating voltage of the computing device. Attached Figure Description

[0013] Figure 1 This is an illustration of an example computing device capable of performing methods according to various embodiments.

[0014] Figure 2 According to one embodiment Figure 1 A diagram illustrating an example of the internal architecture of a computing device.

[0015] Figure 3 It is aimed at Figure 1 An illustration of an example calibration method using a temperature mitigation algorithm for computing devices.

[0016] Figure 4 This is an illustration of an example lookup table according to one embodiment, which can be used to calibrate a temperature mitigation algorithm based on the rate of temperature change, such as the junction temperature ramp rate and the skin temperature ramp rate.

[0017] Figure 5 This is a diagram illustrating an example temperature ramp rate of a computing device according to one embodiment.

[0018] Figure 6 This is an illustration of an example of a voltage reduction step that can be applied by a temperature mitigation algorithm according to one embodiment.

[0019] Figure 7 This is a flowchart illustrating an example method for thermal mitigation. Detailed Implementation

[0020] The various embodiments provided herein include systems and methods for calibrating the temperature mitigation of computing devices. For example, the various embodiments described herein capture the physical characteristics of the manufactured computing device and use these physical characteristics to calibrate the temperature mitigation process of the computing device.

[0021] In one embodiment, a computer processor includes multiple integrated circuit chips (e.g., a System-on-a-Chip (SoC) with multiple processing cores, a power management integrated circuit (PMIC), etc.). The chips are housed within a computing device such as a smartphone. The computing device also includes a battery, a printed circuit board housing the chips, a touchscreen display, and a casing, etc. The power supply (e.g., the PMIC) converts the voltage and current from the battery into voltage and current that can be used by other chips. When the chips are operating, they generate heat.

[0022] Heat from the chip propagates throughout the computing device based on the thermal conductivity of the physical materials that make up the device. However, it is generally expected that, at least under normal operating conditions, the skin of the computing device will not get as hot as the chip. The system includes one or more processes that monitor temperature sensors inside the chip and on the printed circuit board, and reduce the operating frequency and / or operating voltage of one or more chips to mitigate chip and / or skin temperatures.

[0023] The physical characteristics of a computing device influence how effectively temperature mitigation algorithms can be used. For example, some computing devices may have physical thermal conductivity characteristics that allow skin temperature to rise relatively quickly. In another example, a computing device may have physical thermal conductivity characteristics that allow a relatively rapid rise in temperature detected at the chip or on a printed circuit board. In these examples, the rate of temperature change is called the ramp rate, making computing devices manufactured with a relatively high ramp rate have a high rate of temperature change detected at the chip or board, or calculated for skin.

[0024] In one example embodiment, after the computing device is manufactured, one or more chips in the chip run computational benchmarks while monitoring temperature readings across the entire chip and board. The computing device itself tracks its performance during the benchmarking process, including the number of instructions executed, the easing time under default thermal easing settings, the temperature ramp rate, etc. The temperature ramp rate and easing time provide indications of the computing device's thermal characteristics. The computing device processes the temperature information and other results from the computational benchmarks to generate parameter values ​​for a temperature easing algorithm used in a smartphone. For example, the processor may set a junction temperature setpoint, a skin temperature setpoint, frequency and temperature regulation increments, temperature sensor polling rate, etc., based on data from the benchmarks.

[0025] This calibration can be performed at any suitable time, such as after manufacturing but before shipping, as a regular annual procedure, or at other times. Various embodiments can provide advantages over conventional systems and techniques. For example, the various embodiments described herein can provide device-specific temperature mitigation algorithms by setting their temperature mitigation algorithms using the physical characteristics of the specific device. This differs from conventional systems, which may use the same temperature mitigation algorithm for every phone using the same chip or for each individual phone manufactured under the same model. Therefore, the various embodiments described herein can better adapt temperature mitigation to the individual properties of the device that may be caused by manufacturing variations, damage during use, etc.

[0026] Various embodiments can be implemented via hardware and / or software in a computing device. For example, some embodiments include hardware and / or software algorithms executed by a processor in the computing device during device operation, which may be part of a System-on-a-Chip (SoC). Adjusting thermal algorithm parameter values ​​includes storing data in a computer-readable medium. For example, various embodiments may include non-volatile or volatile memory housed in an integrated circuit chip within the computing device to store junction temperature setpoints, skin temperature setpoints, voltage and frequency reduction step sizes, and temperature sensor polling rates. The following... Figure 3 An overview of the example process is provided.

[0027] Figure 1This is a simplified diagram illustrating an example computing device 100, in which various embodiments can be implemented. Figure 1 In the example, computing device 100 is shown as a smartphone. However, the scope of the embodiments is not limited to smartphones, as other embodiments may include tablet computers, laptop computers, or other suitable devices. In fact, the scope of the embodiments includes any particular computing device, whether mobile or not. Embodiments including battery-powered devices such as tablet computers and smartphones can benefit from the concepts disclosed herein. Specifically, the concepts described herein provide techniques for managing heat generated inside computing device 100 and also dissipated outside computing device 100, thereby providing comfort and safety for human users and saving battery power.

[0028] like Figure 1 As shown, computing device 100 includes an outer surface or skin 120, which is anticipated to come into contact with the hand or other part of the body of a human user. The outer surface 120 includes, for example, metallic and plastic surfaces, as well as surfaces constituting display unit 110. In one example, display unit 110 includes a capacitive liquid crystal display (LCD) touchscreen, which may be made of glass, plastic, sapphire, or plastic-coated glass, etc. Therefore, outer surface 120 includes various outer surfaces such as display unit 110 and other portions of the housing. The rear cover of computing device 100 includes another portion of the device's outer surface and specifically another portion of the housing, which may be arranged in a plane parallel to the plane of display unit 110.

[0029] Figure 2 The illustration shows an example arrangement of some external and internal components of a computing device 100 according to one embodiment. In this example, the computing device's computer processor is implemented in a system-on-a-chip (SOC) within a package 220, and the package 220 is mounted to a printed circuit board 210 and disposed within the physical housing of the computing device 100. A heat sink and electromagnetic interference (EMI) layer 230 are disposed on top of the SOC package 220, and a rear cover 240 is disposed on the layer 230. The package 220, including the processor, can be mounted in a plane parallel to the plane of the display and the plane of the rear cover 240.

[0030] Although not in Figure 2 As shown, but it should be understood that computing device 100 may include other components such as batteries, other printed circuit boards, other integrated circuit chips, and chip packages. The batteries, printed circuit boards, and integrated circuit chips are disposed within computing device 100 such that they are enclosed within a physical housing of computing device 100 as indicated by outer surface 120.

[0031] When computer processors and other chips operate, they generate heat, which is dissipated throughout the physical structure of computing device 100. Depending on the specific thermal characteristics of computing device 100, the heat from the operation of the processor within SOC package 220 may reach uncomfortable or near-uncomfortable temperatures on the outer surface 120 of computing device 100, and runaway thermal events may threaten the integrity of package 220 or the integrity of the semiconductor devices within package 220. Therefore, computing device 100 includes temperature sensors located throughout. An example temperature sensor is labeled T. J1 T J2 and T J3 As shown. Temperature sensor T J1 and T J2 Implemented within a 220-package SoC, and marked as T J3 The temperature sensor is implemented on the surface of the printed circuit board 210.

[0032] Various embodiments may include any suitable number of temperature sensors. For example, a System-on-a-Chip (SoC) may include multiple cores, such as a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a camera core, a modem core, etc. In such embodiments, each core may include at least one (and possibly more) temperature sensors. Such an arrangement may be advantageous because, depending on the given application, different cores will operate at different times and at different intensities.

[0033] T J Represents the junction temperature, and at any given time, the junction temperature refers to the highest temperature reading of any sensor. For example, if among three temperature sensors, from temperature sensor T... J2 Once the highest temperature is read, that temperature reading is the junction temperature. The junction temperature can change as the computing device 100 operates, and the specific sensor that reads the junction temperature can change. Furthermore, although the computing device 100 does not include a temperature sensor on the back cover 240 or the display 110, the processor within the SOC package 220 can include a temperature sensor based on data from sensor T. J1 To T J3 An algorithm that calculates skin temperature (Tskin) based on temperature readings.

[0034] The computer processor within the SOC package 220 uses one or more algorithms to monitor temperatures at various sensors, including junction temperature, and takes appropriate actions to provide control over heat generated within the computing device 100. For example, one or more algorithms may track the temperature at a temperature sensor and reduce the operating voltage and / or frequency of the processor within package 220 when the junction temperature exceeds one or more set points. Similarly, the same or similar algorithms may track the value of Tskin and reduce the operating voltage and / or frequency of the processor within package 220 when Tskin exceeds one or more set points.

[0035] Figure 3 This is an illustration of a process 300 for calibrating a temperature mitigation algorithm, adapted according to one embodiment. The process begins with action 310, "Run Tests A, B, C". Some embodiments may include running a single computational benchmark or more than one benchmark, and in various embodiments, any number of benchmarks that may be appropriate may be run. Example tests include Dhrystone Million Instructions Per Second (DMIPS), which involves running various test modes on a smartphone or other processing device and recording the results.

[0036] When running one or more benchmarks on a computing device, the computing device may reduce its operating frequency and / or operating voltage based on default settings in a temperature mitigation algorithm. Example temperature mitigation algorithms that may be used in some embodiments include dynamic clocking and voltage scaling (DCVS), wherein the temperature mitigation algorithm checks the temperature sensor according to a polling rate and then, based on T... J Setpoints and Tskin setpoints are used to reduce operating frequency and operating voltage. With T... J As Tskin decreases, the algorithm can increase the operating frequency and / or operating voltage. Furthermore, as explained in more detail below, the operating frequency and / or operating voltage can be increased or decreased based on a set step size or increment. Various embodiments may include the use of any temperature mitigation algorithm, and DCVS is mentioned herein by way of example.

[0037] When a computing device runs benchmark tests, a temperature mitigation algorithm can reduce its operating frequency to execute fewer instructions per second. Therefore, a computing device with less desirable thermal conductivity may experience more thermal mitigation activity and thus execute fewer instructions per second than another computing device with more desirable thermal conductivity running the same temperature mitigation algorithm. While the computing device runs benchmark tests, it records the number of instructions executed, the time before mitigation occurs, and T... J Slope ratio, Tskin slope ratio, and any other useful values.

[0038] One or more of actions 320 to 350 may be performed during or after the test (Action 310). Action 320, "Measuring Performance," includes recording and / or processing test results indicating computing performance, such as millions of instructions per second. Action 330, "Measuring Buffer Time," includes recording and / or processing test results indicating the amount of time the computing device is allowed to run before the buffering algorithm slows down processing by reducing operating frequency, reducing voltage, etc. Furthermore, method 300 also includes action 340, "Measuring T..." J "Ramp-up" refers to the test results that record and / or process the rate of temperature change at the device's internal temperature sensor. A larger ramp-up generally indicates that performance is mitigated more quickly than a device with a lower ramp-up. Action 350, "Measure Tskin Ramp-up," includes a skin temperature estimation algorithm using a temperature sensor-based algorithm and the calculation of the ramp-up for skin temperature. Measurements at Actions 320 to 350 can be used to calibrate the temperature mitigation algorithm and subsequent actions.

[0039] Method 300 also includes actions 360, 370, 380, and 390 for updating parameters of the temperature mitigation algorithm based on measurements at actions 320 to 350. For example, action 360 includes updating the voltage and frequency steps used by the DCVS algorithm. In this example, the DCVS algorithm uses a specific step size to decrease or increase the voltage and is based on values ​​including T... J Multiple factors, including slope ratio and / or Tskin slope ratio, are used to select the step size.

[0040] Continuing this example, when the benchmark is run, the computer processor tracks T J Ramp ratio. Using the measured and stored ramp ratio, the computer processor then selects the voltage step size from lookup table 365 and uses that step size in the DCVS algorithm.

[0041] According to one embodiment, in Figure 4 The diagram illustrates an example lookup table. Figure 4 In the table, lookup table 365 includes a left column providing a series of step sizes in millivolts. The right column provides ramp rate measurements in degrees Celsius per second. Each row assigns a specific voltage step size to the measured ramp rate. For example, entry 410 assigns a 15mV step size to a measured ramp rate of 25°C per second. Similarly, entry 440 assigns a 65mV step size to a measured ramp rate of 55°C per second. Other entries 420 and 430 are intermediate entries between the top entry 440 and the bottom entry 410, respectively. Of course, Figure 4 Table 365 shown is an example. It should be understood that other embodiments may include more or fewer entries, different step sizes, and different ramp rates suitable for a particular application.

[0042] Figure 5 The illustration depicts an example ramp rate according to one embodiment. The ramp rate encompasses the temperature change over a defined time period, such as the duration of a benchmark test. Curve 510 illustrates an example ramp rate that might be associated with a low-end computing device having less desirable thermal conductivity characteristics. In the example of curve 510, the conductivity characteristics of the computing device allow the junction temperature, or the computed Tskin, to rise relatively quickly. Conversely, curve 520 illustrates an example ramp rate that might be associated with a higher-end computing device having more desirable thermal conductivity characteristics. In curve 520, the junction temperature and / or skin temperature rise less rapidly. In this example, a higher junction temperature ramp rate or Tskin ramp rate would be associated with a larger voltage step in order to control the temperature to an acceptable level. Therefore, curve 510 is associated with a larger voltage step (35mV) than curve 520 (15mV). This is related to… Figure 4 The example lookup table 365 is consistent, in which a higher temperature ramp rate is associated with a larger voltage step.

[0043] Return to Figure 3 For example, at action 360, the computer processor receives T from action 340. J Slope ratio measurement, and then T J The slope ratio measurement is compared with the entry in lookup table 365. Action 360 includes targeting T J An approximate match is made between the measured slope and the available entries in Table 365, including finding the closest match by rounding up or down, or using other selection criteria. Therefore, action 360 includes parsing the data structure (in this case, Table 365) to process the observed T... J Slope ratio matched to T in the table J Choose the slope ratio value that corresponds to T in the table. J The voltage step value of the ramp rate is then applied to the DCVS algorithm. Alternatively, other embodiments may match the observed Tskin ramp rate with entries in a table and apply the corresponding voltage step size in addition to using the junction temperature, or apply the corresponding voltage step size instead of using the junction temperature. In other words, in other embodiments, setting the voltage step size based on Tskin works similarly to action 360 using the junction temperature.

[0044] Figure 6 This is an illustration of DCVS behavior during normal operation according to one embodiment. Specifically, action 360 may include selecting and applying an appropriate voltage step size from lookup table 365 during calibration; thereafter, during normal operation, the DCVS algorithm exhibits behavior similar to Figure 6The behavior shown is due to the size of the applied voltage step.

[0045] Figure 6 Table 600, with three columns, is shown, where the right column illustrates a 50mV voltage step. Specifically, the difference between step 1 and step 2 is 50mV, and there is also a 50mV voltage increment between step 2 and step 3. The step between step 3 and step n is not specifically shown to indicate... Figure 6 The characteristic can include any number of steps. Although the step n is associated with 650mV, it should be understood that in various embodiments, the high and low ends of the characteristic can be set to any suitable voltage level.

[0046] The middle column indicates the frequency values ​​associated with the corresponding voltage levels and steps. Generally, operation at lower voltages is expected to be associated with operation at lower clock frequencies to ensure proper capture of data bits. Therefore, Figure 6 The embodiments associate a lower operating frequency with a lower operating voltage. Various embodiments may appropriately increase or decrease the voltage and clock frequency.

[0047] For example, Figure 6 Each row in the algorithm can correspond to an action taken by the temperature mitigation algorithm. Therefore, in one example, when the increased temperature reading exceeds the first temperature setpoint (T... J When the temperature reaches step 1 (or Tskin), the temperature mitigation algorithm can proceed to step 2 and continue monitoring. If the temperature continues to increase or remains the same for a certain period of time, the temperature mitigation algorithm can move to step 2 and continue monitoring, either further reducing the voltage or increasing the voltage after the temperature stabilizes or begins to decrease.

[0048] Action360 may also include selecting the voltage step size based on performance measurement or easing time, where a smaller easing time can be associated with a larger voltage step, and where higher measurement performance can be associated with a larger voltage step.

[0049] Action 370 includes at least part of T J The ramp rate (action 340) and easing time (action 330) are used to update the temperature setpoint and shutdown point. The setpoint comprises temperature readings from various temperature sensors, where easing algorithms such as DCVS can be invoked. Typically, a shorter easing time and a larger ramp rate will result in a lower temperature setpoint. Action 370 can be similar to action 360, since the computer processor receives values ​​from actions 330 and 340 and matches those values ​​against lookup table 375. Action 370 then applies the entries from the lookup table as the temperature setpoint.

[0050] Action 370 may also include updating the shutdown point. In this example, the shutdown point includes a temperature read value that can completely shut down the integrated circuit chip to avoid a runaway thermal event. Typically, a shorter mitigation time and a larger ramp rate will result in a lower shutdown point. Action 370 includes the computer processor receiving values ​​from actions 330 and 340 and matching those values ​​in a lookup table 375 to identify appropriate shutdown points and applying those shutdown points to the temperature mitigation algorithm.

[0051] Action 390 includes updating the skin temperature setpoint in response to the measured Tskin ramp rate from action 350. Action 390 includes a computer processor receiving values ​​from action 350 and matching those values ​​against entries in lookup table 395. Action 390 then applies the selected entry from lookup table 395 as the skin temperature setpoint in the mitigation algorithm. The skin temperature setpoint may include a temperature value corresponding to the Tskin estimate. Tskin can also be calculated while the computer device is operating normally, and when Tskin exceeds the setpoint, temperature mitigation can be performed by reducing the operating voltage and / or operating frequency as described above.

[0052] Action 380 includes receiving T J The ramp rate is measured and those measurements are matched with values ​​in lookup table 385 to identify an appropriate polling rate value. In this example, the polling rate includes the frequency at which temperature data is acquired from the temperature sensor. Generally, it is assumed that a higher junction temperature ramp rate should correspond to a higher polling rate for the temperature sensor. Action 380 includes using the measured T... J The ramp rate information is used to identify the appropriate polling rate and those polling rates are applied to the temperature mitigation algorithm.

[0053] Implementations may include performing method 300 during the manufacturing process of a particular smartphone or other computing device. This allows for setting a thermal strategy for a specific device on an individual basis. Method 300 can then be appropriately rerun, for example, annually or at other times, to adjust the thermal strategy. Conversely, various conventional processes involve setting a thermal strategy for a device model such that each device of that particular model includes the same thermal strategy.

[0054] An advantage of using method 300 to calibrate some embodiments of the temperature mitigation algorithm is that those embodiments can apply settings specific to a given manufactured computing device. For example, a given manufactured computing device may have manufacturing differences that affect the thermal conductivity characteristics of the computing device, such as air gaps between chip packages and heat sinks. Method 300 runs benchmark tests and then performs calibration to identify suitable settings for that manufactured computing device. Other computing devices manufactured in the same facility or even using the same model may have different thermal conductivity characteristics due to manufacturing differences, and therefore may include slightly different temperature mitigation settings that are more advantageous for those individual devices.

[0055] Figure 7 The diagram illustrates a flowchart of an example method 700 for providing thermal mitigation. In one example, method 700 is performed by a thermal management unit, which may include hardware and / or software functions at the processor of a computing device. In some examples, the thermal management unit includes processing circuitry that executes computer-readable instructions to receive temperature data from a temperature sensor in the computing device and performs calibration and temperature mitigation functions according to a specific algorithm.

[0056] Figure 7 Examples include performing actions 710 to 740 during calibration. For example, actions 710 to 740 may be performed in response to running a computational benchmark and capturing values ​​during that benchmark. Action 750 may be performed during normal operation using a calibrated temperature mitigation algorithm.

[0057] At action 710, the thermal management unit reads temperature sensing data from the integrated circuit chip and temperature sensors on the printed circuit board. (The above text appears to be incomplete and requires further context.) Figure 2 An example is shown where the temperature sensor is represented as T. J1 To T J3 Action 710 in this example may include polling the temperature sensor at a default rate during benchmark calculation. Action 710 may also include actions as described above regarding... Figure 3 The measurement performance described in Actions 320 to 350, the measurement easing time using the default temperature easing setting, and the measurement T J Slope ratio and measurement of Tskin slope ratio.

[0058] At action 720, the thermal management unit parses the data structure to match the observed rate of change of temperature information with specific rate of change values ​​for temperature information within the data structure. For example, in the example above, the rate of change of temperature information includes the ramp rate. Furthermore, in the example above, the thermal management unit uses T... JThe ramp rate (or Tskin ramp rate) is used as a key to examine the lookup table to find entries in the table that correspond to a ramp rate value that is an approximate match. In other words, the ramp rate can be used as a key in a key-value pair to select an entry in the table. The example above uses a lookup table as the data structure, but the scope of the embodiment is not limited to this. Other embodiments may appropriately use different data structures.

[0059] At action 730, the thermal management unit selects the first voltage reduction step value corresponding to the rate of change of specific temperature information in the data structure. (The above is about...) Figure 4 An example is provided where each voltage drop step value in the left column corresponds to a corresponding ramp rate value in the right column. At action 730, the thermal management unit responds to the analytical selection of the voltage drop step value in action 720.

[0060] At action 740, the thermal management unit applies the first voltage drop step value to the temperature mitigation algorithm. For example, the thermal management unit may store an indication of the first voltage drop step value in non-volatile memory within the chip of the computing device.

[0061] At action 750, the thermal mitigation unit reduces the performance of the computing device according to a temperature mitigation algorithm during normal operation. In one example, the temperature mitigation algorithm is a software algorithm that initializes itself by reading settings from calibration collection at a non-volatile memory address within the computer chip when the device starts up. One of those settings is a first voltage reduction step value. Other settings may include, for example, T, which is also stored at a non-volatile memory address. J Setpoints and shut-off points, Tskin setpoints, temperature sensor polling rates, etc.

[0062] Action 750 includes reducing the energy consumed by at least one integrated circuit chip in the computing device. In one example, a temperature mitigation algorithm reduces the operating voltage of one or more integrated circuit chips, thereby reducing power consumption. However, the scope of the embodiments may include any suitable temperature mitigation and techniques, such as operating frequency reduction, whether as part of a voltage reduction or independent of a voltage reduction.

[0063] While the device is operating under normal conditions, the thermal management unit runs a temperature mitigation algorithm in the background, taking appropriate action when the increasing or decreasing temperature reading exceeds the junction temperature setpoint and skin temperature setpoint. Therefore, when the user idles the device, makes phone calls, sends text messages, watches videos, etc., the thermal management unit continuously runs the calibrated temperature mitigation algorithm to ensure the device's operating temperature does not exceed skin limits.

[0064] The scope of the embodiments is not limited to Figure 7The specific method shown is illustrated. Other embodiments may add, omit, rearrange, or modify one or more actions. For example, method 700 may include repeating action 750 during normal operation, regardless of whether actions 710 to 740 are repeated.

[0065] As those skilled in the art will now understand and, depending on the specific application, numerous modifications, substitutions, and variations can be made to the materials, apparatus, configuration, and methods of use of the devices disclosed herein without departing from the spirit and scope of this disclosure. Therefore, the scope of this disclosure should not be limited to the specific embodiments shown and described herein, as these specific embodiments are merely examples of this disclosure, and should be fully commensurate with the scope of the appended claims and their functional equivalents.

Claims

1. A processor-implemented method comprising: collecting temperature information from a plurality of temperature sensors within a computing device; matching a rate of change of the temperature information to a particular temperature information rate of change stored in a data structure and selecting a voltage step value corresponding to the particular temperature information rate of change; and based on the voltage step value, modifying at least one of an operating voltage and an operating frequency of the computing device. modifying the operating voltage of the computing device while maintaining the operating frequency of the computing device.

2. The method of claim 1, comprising: modifying the operating frequency of the computing device while maintaining the operating voltage of the computing device.

3. The method of claim 1, comprising: modifying both the operating voltage and the operating frequency of the computing device.

4. The method of claim 1, comprising: increasing the operating voltage of the computing device.

5. The method of any one of claims 1, 2, and 4, comprising: increasing the operating frequency of the computing device.

6. The method of any one of claims 1, 3, and 4, comprising: increasing both the operating voltage and the operating frequency of the computing device.

7. The method of any one of claims 1 and 4, comprising:

8. A system comprising: a computer processor configured to execute computer-readable instructions, the computer processor installed in a computing device; and a plurality of temperature sensors disposed within the computing device, the plurality of temperature sensors configured to communicate with the computer processor, the computer processor configured to: during a first time period, collect temperature data from the plurality of temperature sensors inside a housing of the computing device; measure a temperature ramp rate of the computing device from the temperature data; select a voltage step value from a data structure using the temperature ramp rate; and based on the voltage step value, modify at least one of an operating voltage and an operating frequency of the computing device. modify the operating voltage of the computing device while maintaining the operating frequency of the computing device.

9. The system of claim 8, comprising: modify the operating frequency of the computing device while maintaining the operating voltage of the computing device.

10. The system of claim 8, comprising: modify both the operating voltage and the operating frequency of the computing device.

11. The system of claim 8, comprising: increase the operating voltage of the computing device.

12. The system of any one of claims 8, 9, and 11, comprising: increase the operating frequency of the computing device.

13. The system of any one of claims 8, 10, and 11, comprising: increase both the operating voltage and the operating frequency of the computing device.

14. The system of any one of claims 8 and 11, comprising:

15. The system of any of claims 8-14, wherein the computing device is one of a smartphone, a tablet computer, and a laptop computer.

16. A method for benchmarking a computing device comprising: running a set of test patterns comprising a plurality of instructions while recording a number of the instructions executed, a time before mitigation occurs, a junction temperature ramp rate, and a skin temperature ramp rate; based on the recorded parameters, updating voltage step values and frequency step values used by a temperature mitigation algorithm for the computing device, wherein the computing device is configured to perform the method of any of claims 1-7. ​

Citation Information

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