A high-voltage tolerant I2C interface circuit

Abstract

The present invention relates to an interface circuit, and in particular to a high-voltage tolerant I2C interface circuit, comprising a voltage detection circuit, an N-well control circuit, a gate control circuit, and a control switch; the voltage detection circuit detects a power supply voltage and an output voltage of the interface circuit; the N-well control circuit transmits a high voltage to the N-well of a field-effect transistor; and the gate control circuit switches a circuit output mode via a control switch based on a detection result of the voltage detection circuit. The technical solution provided by the present invention can effectively overcome the defects of the prior art in that the circuit does not support a push-pull output interface and requires two pins to be occupied.

Description

Technical Field

[0001] The present invention relates to an interface circuit, in particular to a high-voltage tolerant I2C interface circuit. Background Art

[0002] The standard I2C interface circuit basically uses an open-drain structure with an N-type field-effect transistor. Because there is no P-type field-effect transistor, the output high level relies on a pull-up resistor, the transmission speed is slow, and the high-level current is limited. However, since the ordinary push-pull output interface cannot tolerate signals higher than the power supply voltage, the ordinary push-pull output interface is not compatible with the standard I2C interface circuit, and the standard I2C interface circuit requires two dedicated pins. Summary of the Invention

[0003] (1) Technical problems solved

[0004] In view of the above shortcomings of the prior art, the present invention provides a high-voltage tolerant I2C interface circuit, which can effectively overcome the defects of the prior art in that it does not support a push-pull output interface and requires two pins.

[0005] (2) Technical solution

[0006] To achieve the above objectives, the present invention is implemented through the following technical solutions:

[0007] A high-voltage tolerant I2C interface circuit comprising a voltage detection circuit, an N-well control circuit, a gate control circuit, and a control switch;

[0008] A voltage detection circuit detects the power supply voltage and the output voltage of the interface circuit;

[0009] N-well control circuit, which delivers high voltage to the N-well of the field effect transistor;

[0010] The gate control circuit switches the circuit output mode by controlling the switch based on the detection result of the voltage detection circuit.

[0011] Preferably, the active end of the control switch is connected to the gate of the P-type field effect transistor, the fixed end of one control switch is connected to the input control signal, and the fixed end of the other control switch is connected to the output end of the N-well control circuit.

[0012] Preferably, the input end of the gate control circuit is connected to the output end of the voltage detection circuit, and the output end of the gate control circuit is connected to the control switch.

[0013] Preferably, the input end of the N-well control circuit is connected to the output end of the voltage detection circuit, and the output end of the N-well control circuit is connected to the N-well of the P-type field effect transistor.

[0014] Preferably, the field effect transistor includes a P-type field effect transistor and an N-type field effect transistor, the drain of the P-type field effect transistor is connected to the drain of the N-type field effect transistor, the gate of the N-type field effect transistor is connected to the input control signal, and the drains of the P-type field effect transistor and the N-type field effect transistor output the output voltage of the interface circuit.

[0015] (3) Beneficial effects

[0016] Compared with the prior art, the high-voltage tolerant I2C interface circuit provided by the present invention is compatible with a push-pull output interface, and the push-pull output interface can tolerate signals higher than the power supply voltage. When the push-pull output interface signal is higher than the power supply voltage, no current will flow from the pin to the power supply. At the same time, it can solve the problem that the I2C interface circuit needs to occupy two pins. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] To more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive effort.

[0018] Figure 1 1 is a circuit diagram of the present invention. DETAILED DESCRIPTION

[0019] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0020] A high voltage tolerant I2C interface circuit, such as Figure 1 As shown, it includes a voltage detection circuit, an N-well control circuit, a gate control circuit and a control switch;

[0021] A voltage detection circuit detects the power supply voltage and the output voltage of the interface circuit;

[0022] N-well control circuit, which delivers high voltage to the N-well of the field effect transistor;

[0023] The gate control circuit switches the circuit output mode by controlling the switch based on the detection result of the voltage detection circuit.

[0024] The active end of the control switch is connected to the gate of the P-type field effect transistor, the fixed end of one control switch is connected to the input control signal, and the fixed end of the other control switch is connected to the output end of the N-well control circuit.

[0025] The input end of the gate control circuit is connected to the output end of the voltage detection circuit, and the output end of the gate control circuit is connected to the control switch.

[0026] The input end of the N-well control circuit is connected to the output end of the voltage detection circuit, and the output end of the N-well control circuit is connected to the N-well of the P-type field effect transistor.

[0027] The field effect transistor includes a P-type field effect transistor and an N-type field effect transistor. The drain of the P-type field effect transistor is connected to the drain of the N-type field effect transistor, the gate of the N-type field effect transistor is connected to the input control signal, and the drains of the P-type field effect transistor and the N-type field effect transistor output the output voltage of the interface circuit.

[0028] The technical solution of the present application switches to the normal push-pull output mode when the control switch is selected in the upper direction; when the control switch is selected in the lower direction, the P-type field effect transistor is turned off and switches to the open-drain output mode.

[0029] Using the N-well control method for outputting P-type field-effect transistors, a higher voltage is always delivered to the N-well, controlling the normal operation of the P-type field-effect transistors. Using gate control technology, the gate voltage of the P-type field-effect transistor is controlled at an appropriate position. When the system power supply voltage is greater than the output voltage of the interface circuit, the gate voltage is connected to the input control signal through switch control. When the system power supply voltage is less than the output voltage of the interface circuit, the gate voltage is connected to the N-well through switch control, turning off the P-type field-effect transistor. This ensures that when the chip pins are connected to signals higher than the power supply voltage, there is no reverse leakage path from the pins to the power supply.

[0030] By using output P-type field effect transistors and gate control technology, the open-drain circuit of the N-type field effect transistor can be combined with the push-pull output interface circuit to achieve effective compatibility of the I2C interface circuit with the push-pull output interface circuit.

[0031] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements will not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A high-voltage tolerant I2C interface circuit, characterized in that: It includes a voltage detection circuit, an N-well control circuit, a gate control circuit and a control switch; A voltage detection circuit detects the power supply voltage and the output voltage of the interface circuit; N-well control circuit, which delivers high voltage to the N-well of the field effect transistor; a gate control circuit for switching a circuit output mode by controlling a switch based on a detection result of the voltage detection circuit; The active end of the control switch is connected to the gate of the P-type field effect transistor, the fixed end of one of the control switches is connected to the input control signal, and the fixed end of the other control switch is connected to the output end of the N-well control circuit; The input end of the gate control circuit is connected to the output end of the voltage detection circuit, and the output end of the gate control circuit is connected to the control switch; The input end of the N-well control circuit is connected to the output end of the voltage detection circuit, and the output end of the N-well control circuit is connected to the N-well of the P-type field effect transistor; The field effect transistor includes a P-type field effect transistor and an N-type field effect transistor, the drain of the P-type field effect transistor is connected to the drain of the N-type field effect transistor, the gate of the N-type field effect transistor is connected to the input control signal, and the drains of the P-type field effect transistor and the N-type field effect transistor output the output voltage of the interface circuit.

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