FPGA and method for sine wave sampling value simulation calculation

Abstract

The application discloses an FPGA (Field Programmable Gate Array) and a method thereof for simulating calculation of sine wave sampling values, and relates to the field of relay protection testing. A preset sine wave phase is acquired, including an integer part of the preset sine wave phase and a decimal part of the preset sine wave phase; an integer quantified sine value parameter corresponding to the sine value lookup table is determined according to the integer part of the preset sine wave phase; the integer quantified sine value parameter is linearly corrected according to the decimal part of the preset sine wave phase to obtain a small quantified sine value parameter; a quantified phase sine value is calculated according to the integer quantified sine value parameter and the small quantified sine value parameter; a preset sine wave amplitude value is acquired, including an integer part of the preset sine wave amplitude value, and a quantified amplitude value is determined according to the integer part of the preset sine wave amplitude value; a sine wave sampling quantized value is calculated according to the quantified phase sine value and the quantified amplitude value; and a sine wave sampling value is determined according to the sine wave sampling quantized value.

Description

Technical Field

[0001] This invention relates to the field of relay protection testing, and specifically to an FPGA and method for simulating and calculating sinusoidal wave sampling values. Background Technology

[0002] The main function of relay protection testing devices is to output voltage and current waveform signals. A prerequisite for accurate output of these signals is a high-precision simulation signal source. This simulation signal source is not a physical signal output device, but rather refers to the control word that controls the sampled values ​​of the DAC (Digital-to-Analog Converter) output waveform, obtained through software simulation calculations. Relay protection tester manufacturers typically use DSP (Digital Signal Processor) devices to calculate the sampled values ​​using software. However, this method is limited by the DSP's processing speed and code optimization, resulting in a limited number of sampled values ​​that can be calculated per second. Furthermore, using DSP devices often requires an ARM (Advanced RISC Machine), a DSP processor, and an FPGA (Field-Programmable Gate Array), leading to a complex system hardware structure. Summary of the Invention

[0003] To address the aforementioned issues, this application provides an FPGA and method for simulating and calculating sine wave sample values.

[0004] According to the first aspect, one embodiment provides a method for simulating and calculating sinusoidal wave sample values, including:

[0005] Obtain a preset sine wave phase, wherein the preset sine wave phase includes an integer part of the preset sine wave phase and a fractional part of the preset sine wave phase;

[0006] The integer quantized sine value parameter corresponding to the sine value lookup table is determined based on the integer part of the preset sine wave phase.

[0007] The integer quantized sine value parameter is linearly corrected based on the fractional part of the preset sine wave phase to obtain the fractional quantized sine value parameter;

[0008] Based on the integer quantization sine value parameter and the fractional quantization sine value parameter, the quantized phase sine value is calculated using the following formula:

[0009] sin(phase)=[sintab(n+1)-sintab(n)]×phs_fra+sintab(n)×2 i

[0010] Wherein, sin(phase) is the quantized phase sine value; sin is the sine function; n+1 is the (n+1)th point of the integer part of the preset sine wave phase; tab(n+1) is the value corresponding to the (n+1)th point in the sine value lookup table; sintab(n+1) is the integer quantized sine value parameter corresponding to the (n+1)th point in the sine value lookup table; n is the nth point of the integer part of the preset sine wave phase; tab(n) is the value corresponding to the nth point in the sine value lookup table; sintab(n) is the integer quantized sine value parameter corresponding to the nth point in the sine value lookup table; phs_fra is the fractional part of the preset sine wave phase; i is the number of decimal places corresponding to the fractional part of the preset sine wave phase.

[0011] Obtain a preset sine wave amplitude value, wherein the preset sine wave amplitude value includes the integer part of the preset sine wave amplitude value, and determine the quantized amplitude value based on the integer part of the preset sine wave amplitude value;

[0012] Based on the quantized phase sine value and the quantized amplitude, the quantized value of the sine wave sample is calculated using the following formula:

[0013] p = sin(phase) × range_int

[0014] Where p is the quantized value of the sine wave sample; sin(phase) is the quantized phase sine value; range_int is the quantized amplitude;

[0015] The sine wave sampling value is determined based on the sine wave sampling quantization value.

[0016] In one embodiment, determining the integer quantized sine value parameter corresponding to the sine value lookup table based on the integer part of the preset sine wave phase includes:

[0017] Obtain the integer part of the preset sine wave phase;

[0018] Obtain the preset phase and preset division point from the sine value lookup table;

[0019] The integer quantized sine value parameter corresponding to the integer part of the preset sine wave phase in the sine value lookup table is obtained by calculating the following formula:

[0020]

[0021] Where x is any point in the integer part of the preset sine wave phase; sintab(x) is the integer quantized sine value parameter corresponding to any point in the integer part of the preset sine wave phase in the sine value lookup table; A is the preset phase in the sine value lookup table; B is the preset division number in the sine value lookup table; j is the number of multiplier bits in the DSP engine.

[0022] In one embodiment, obtaining the integer portion of the preset sine wave phase includes:

[0023] The sine wave phase is quantized according to the data processing bit depth of the FPGA;

[0024] The data bits corresponding to the sine lookup table are determined according to the preset division position;

[0025] The integer bits of the quantized sine wave phase are determined based on the data bits.

[0026] The integer part of the sine wave phase is determined based on the integer bits.

[0027] In one embodiment, the fractional part of the preset sine wave phase includes:

[0028] The sine wave phase is quantized according to the data processing bit depth of the FPGA;

[0029] The data bits corresponding to the sine lookup table are determined according to the preset division position in the sine value lookup table;

[0030] The integer bits of the quantized sine wave phase are determined based on the data bits.

[0031] The initial decimal places of the quantized sine wave phase are determined based on the number of bits in the FPGA's data processing and the number of integer bits.

[0032] The fractional part of the preset sine wave phase is determined based on the initial fractional part of the quantized sine wave phase.

[0033] The fractional part of the preset sine wave phase is determined based on the fractional place corresponding to the fractional part of the preset sine wave phase.

[0034] In one embodiment, the step of linearly correcting the integer quantized sine value parameter based on the fractional part of the preset sine wave phase to obtain the fractional quantized sine value parameter includes:

[0035] When the preset sine wave phase is located between two adjacent positions in the preset division of the sine value lookup table, the integer quantized sine value parameter is the value corresponding to the first of the two adjacent positions in the preset division of the sine value lookup table; calculate the difference between the value corresponding to the second of the two adjacent positions in the preset division of the sine value lookup table and the value corresponding to the first of the two adjacent positions in the preset division of the sine value lookup table, and multiply the difference by the decimal part of the preset sine wave phase to obtain the fractional quantized sine value parameter.

[0036] In one embodiment, determining the quantized amplitude based on the integer portion of the preset sine wave amplitude includes:

[0037] The quantized amplitude is determined based on the integer part of the preset sine wave amplitude using the following formula:

[0038]

[0039] Wherein, range_int is the quantized amplitude; C is the preset sine wave amplitude; D is the preset range of the FPGA's measurement amplitude, which is positive within the range; and k is the number of bits in the DSP engine multiplier.

[0040] In one embodiment, determining the quantized amplitude based on the integer portion of the preset sine wave amplitude includes:

[0041] The quantized amplitude is determined based on the integer part of the preset sine wave amplitude using the following formula:

[0042]

[0043] Wherein, range_int is the quantized amplitude; C is the preset sine wave amplitude; D is the preset range of the FPGA's measurement amplitude, which includes both positive and negative values; and k is the number of bits in the DSP engine multiplier.

[0044] In one embodiment, determining the sine wave sampling value based on the sine wave sampling quantization value includes:

[0045] Obtain the sine wave sampling quantization value;

[0046] The quantized value of the sine wave is truncated based on the valid bits of the calculation result from the digital-to-analog converter to determine the sine wave sample value.

[0047] In one embodiment, the calculation result of the digital-to-analog converter includes 16 valid bits.

[0048] According to the second aspect, one embodiment provides an FPGA for sine wave sampling simulation calculation, comprising:

[0049] The DSP engine is used to obtain a preset sine wave phase and a preset sine wave amplitude. The preset sine wave phase includes an integer part and a fractional part of the preset sine wave phase, and the preset sine wave amplitude includes an integer part of the preset sine wave amplitude.

[0050] The ROM is used to store a sine value lookup table and determine the corresponding integer quantized sine value parameter in the sine value lookup table based on the integer part of the preset sine wave phase.

[0051] The processor is configured to acquire the fractional part of the sine wave phase and the integer quantized sine value parameter, linearly correct the integer quantized sine value parameter based on the preset fractional part of the sine wave phase to obtain the fractional quantized sine value parameter, and calculate the quantized phase sine value based on the integer quantized sine value parameter and the fractional quantized sine value parameter using the following formula:

[0052] sin(phase)=[sintab(n+1)-sintab(n)]×phs_fra+sintab(n)×2 i

[0053] Wherein, sin(phase) is the quantized phase sine value; sin is the sine function; n+1 is the (n+1)th point of the integer part of the preset sine wave phase; tab(n+1) is the value corresponding to the (n+1)th point in the sine value lookup table; sintab(n+1) is the integer quantized sine value parameter corresponding to the (n+1)th point in the sine value lookup table; n is the nth point of the integer part of the preset sine wave phase; tab(n) is the value corresponding to the nth point in the sine value lookup table; sintab(n) is the integer quantized sine value parameter corresponding to the nth point in the sine value lookup table; phs_fra is the fractional part of the preset sine wave phase; i is the number of decimal places corresponding to the fractional part of the preset sine wave phase.

[0054] The processor is further configured to obtain the integer part of the sine wave amplitude, determine the quantized amplitude based on the preset integer part of the sine wave amplitude, and calculate the quantized sine wave sample value based on the quantized phase sine value and the quantized amplitude using the following formula:

[0055] p = sin(phase) × range_int

[0056] Where p is the quantized value of the sine wave sample; sin(phase) is the quantized phase sine value; range_int is the quantized amplitude;

[0057] The processor also determines the sine wave sampling value based on the sine wave sampling quantization value.

[0058] The FPGA and method for simulating and calculating sine wave sampling values ​​according to the above embodiments obtain a preset sine wave phase and a preset sine wave amplitude. The integer quantized sine value parameter corresponding to the integer part of the sine wave phase is determined from a sine value lookup table. The integer quantized sine value parameter is corrected using the fractional part of the sine wave phase to obtain a fractional quantized sine value parameter. The quantized phase sine value is obtained based on the integer quantized sine value parameter and the fractional quantized sine value parameter. Then, a preset sine wave amplitude is obtained, and the quantized amplitude is determined based on the integer part of the sine wave amplitude. The sine wave sampling quantized value is obtained based on the quantized phase sine value and the quantized amplitude value. The sine wave sampling value is determined based on the sine wave sampling quantized value. This application uses a DSP engine within the FPGA and implements the calculation of sampling values ​​through a sine value lookup table in ROM. Parallel operation can be achieved through hardware logic multi-channel sampling value calculation modules, greatly improving the calculation speed and significantly releasing CPU resources, while also eliminating the need for a DSP processor. Attached Figure Description

[0059] Figure 1 Here is a flowchart of a sine wave sampling value simulation calculation method in one embodiment. Figure 1 ;

[0060] Figure 2 Here is a flowchart of a sine wave sampling value simulation calculation method in one embodiment. Figure 2 ;

[0061] Figure 3 Here is a flowchart of a sine wave sampling value simulation calculation method in one embodiment. Figure 3 ;

[0062] Figure 4 This is a block diagram of the simulation calculation logic for the sine wave sampling value in one embodiment.

[0063] Figure 5 A flowchart of a sine wave sampling value simulation calculation method in one embodiment. Figure 4 ;

[0064] Figure 6 A flowchart of a sine wave sampling value simulation calculation method in one embodiment. Figure 5 ;

[0065] Figure 7 This is an algorithm flowchart of a method for simulating and calculating sine wave sample values ​​in a computer, as described in one embodiment.

[0066] Figure 8 This is a block diagram of a DSP engine in one embodiment;

[0067] Figure 9 This is a schematic diagram of the DSP structure in one embodiment;

[0068] Figure 10 This is a schematic diagram of an FPGA for sine wave sampling simulation calculation in another embodiment. Detailed Implementation

[0069] The present invention will now be described in further detail with reference to specific embodiments and accompanying drawings. Similar elements in different embodiments are referred to by associated similar element reference numerals. In the following embodiments, many details are described to facilitate a better understanding of this application. However, those skilled in the art will readily recognize that some features may be omitted in different situations, or may be replaced by other elements, materials, or methods. In some cases, certain operations related to this application are not shown or described in the specification. This is to avoid obscuring the core parts of this application with excessive description. For those skilled in the art, detailed description of these related operations is not necessary; they can fully understand the related operations based on the description in the specification and general technical knowledge in the art.

[0070] Furthermore, the features, operations, or characteristics described in the specification can be combined in any suitable manner to form various embodiments. At the same time, the steps or actions in the method description can be rearranged or adjusted in a manner obvious to those skilled in the art. Therefore, the various orders in the specification and drawings are only for the clear description of a particular embodiment and do not imply a necessary order, unless otherwise stated that a particular order must be followed.

[0071] The serial numbers assigned to components in this document, such as "first" and "second," are used only to distinguish the described objects and have no sequential or technical meaning. Unless otherwise specified, the terms "connection" and "linkage" used in this application include both direct and indirect connections (linkages).

[0072] Please refer to Figure 1 As shown, some embodiments of this application disclose a method for simulating and calculating sine wave sample values, including the following steps:

[0073] Step S100: Obtain the preset sine wave phase.

[0074] Obtain the preset sine wave phase, which includes the integer part and the fractional part of the preset sine wave phase.

[0075] Please refer to Figure 2 As shown, obtaining the integer part of the preset sine wave phase includes the following steps:

[0076] Step S112: Quantize the sine wave phase according to the data processing bit depth of the FPGA.

[0077] Step S114: Determine the data bit corresponding to the sine value lookup table according to the preset division position in the sine value lookup table.

[0078] Step S116: Determine the integer bits of the quantized sine wave phase based on the data bits.

[0079] Step S118: Determine the integer part of the sine wave phase based on the integer bits.

[0080] Please refer to Figure 3 As shown, obtaining the fractional part of the preset sine wave phase includes the following steps:

[0081] Step S121: Quantize the sine wave phase according to the data processing bits of the FPGA.

[0082] Step S122: Determine the data bit corresponding to the sine value lookup table according to the preset division position in the sine value lookup table.

[0083] Step S123: Determine the integer bits of the phase of the quantized sine wave based on the data bits.

[0084] Step S124: Determine the initial decimal places of the quantized sine wave phase based on the data processing bits and integer bits of the FPGA.

[0085] Step S125: Determine the number of decimal places corresponding to the fractional part of the preset sine wave phase based on the initial fractional places of the quantized sine wave phase.

[0086] Step S126: Determine the fractional part of the preset sine wave phase according to the fractional part corresponding to the fractional part of the preset sine wave phase.

[0087] Please refer to Figure 4 The diagram shows the logic block diagram for simulating and calculating the sampled value of a sine wave, including a phase parameter input module 101. The phase parameter input module 101 is used to obtain a preset sine wave phase. In some embodiments, the preset sine wave phase is the radian value of the sine wave. In some embodiments, the preset sine wave phase input value is 2π. Since the FPGA's data processing bits are 32 bits, the sine wave phase input value of 2π is quantized into a 32-bit unsigned integer value. However, since in some embodiments, the sine value lookup table only has 4096 points, which is 12-bit integers, the first 12 bits of the quantized sine wave phase input value are taken as the integer bits of the sine wave phase. The remaining 20 bits are the initial decimal places. The first 18 bits of these 20 bits are taken as the decimal part of the sine wave phase, and the last two bits are discarded.

[0088] Step S200: Determine the integer quantized sine value parameter corresponding to the sine value lookup table based on the integer part of the preset sine wave phase.

[0089] Please refer to Figure 5As shown, step S200, which determines the integer quantized sine value parameter corresponding to the sine value lookup table based on the integer part of the preset sine wave phase, also includes the following steps:

[0090] Step S210: Obtain the integer part of the preset sine wave phase.

[0091] Step S220: Obtain the preset phase and preset division number from the sine value lookup table.

[0092] Step S230: Calculate the integer quantized sine value parameter.

[0093] In some embodiments, the integer quantized sine value parameter is calculated using the following formula:

[0094]

[0095] Where x is any point in the integer part of the preset sine wave phase; sintab(x) is the integer quantized sine value parameter corresponding to any point in the integer part of the preset sine wave phase in the sine value lookup table; A is the preset phase in the sine value lookup table; B is the preset division number in the sine value lookup table; j is the number of multiplier bits in the DSP engine.

[0096] The sine value parameter is quantized using a sine value lookup table according to the above formula to obtain an integer quantized sine value parameter. The calculation result of the integer quantized sine value parameter is stored in a 4096×25 ROM (Read-Only Memory). When reading, the integer part of the sine wave phase is used as the address. In some embodiments, the preset phase in the sine value lookup table is 2π, so A is 2π; the preset division number in the sine value lookup table is 4096, so B is 4096; the DSP engine multiplier number is 25 bits, so j is 25. Dividing the preset phase in the sine value lookup table by the preset division number in the sine value lookup table can determine the actual preset phase corresponding to a single division number in the preset division number in the sine value lookup table, that is, determine the correspondence between 4096 and 2π. Therefore, it is possible to determine the actual value of the preset phase (2π) corresponding to any point in the integer part of the preset sine wave phase.

[0097] Step S300: Linearly correct the integer quantized sine value parameter according to the fractional part of the preset sine wave phase to obtain the fractional quantized sine value parameter.

[0098] In some embodiments, when the preset sine wave phase is located between two adjacent positions in the preset division of the sine value lookup table, the integer quantized sine value parameter is the value corresponding to the first of the two adjacent positions in the preset division of the sine value lookup table. The difference between the value corresponding to the second of the two adjacent positions in the preset division of the sine value lookup table and the value corresponding to the second of the two adjacent positions in the preset division of the sine value lookup table is calculated, and this difference is multiplied by the decimal part of the preset sine wave phase to obtain the fractional quantized sine value parameter.

[0099] In some embodiments, when calculating the phase sine value using a sine lookup table, the intervals in the sine lookup table are relatively large. For example, the phase range from 0 to 2π corresponds to 4096 points in the sine lookup table. Therefore, the input phase sine value cannot cover all values, and there will inevitably be phase sine values ​​falling between two adjacent points in the 4096-point sine lookup table. Thus, a linear correction method is used to correct the phase sine value. That is, when the preset sine wave phase falls between adjacent points n and n+1 in the sine lookup table, the integer quantized sine value parameter takes the value corresponding to n, and the fractional quantized sine value parameter takes the difference between n and n+1. This difference is multiplied by the fractional part of the quantized sine wave phase to obtain the fractional quantized sine value parameter.

[0100] Step S400: Calculate the quantized phase sine value based on the integer quantized sine value parameter and the fractional quantized sine value parameter.

[0101] In some embodiments, the quantized phase sine value is calculated using the following formula:

[0102] sin(phase)=[sintab(n+1)-sintab(n)]×phs_fra+sintab(n)×2 i

[0103] Wherein, sin(phase) is the quantized phase sine value; sin is the sine function; n+1 is the (n+1)th point of the integer part of the preset sine wave phase; tab(n+1) is the value corresponding to the (n+1)th point in the sine value lookup table; sintab(n+1) is the integer quantized sine value parameter corresponding to the (n+1)th point in the sine value lookup table; n is the nth point of the integer part of the preset sine wave phase; tab(n) is the value corresponding to the nth point in the sine value lookup table; sintab(n) is the integer quantized sine value parameter corresponding to the nth point in the sine value lookup table; phs_fra is the fractional part of the preset sine wave phase; i is the number of decimal places corresponding to the fractional part of the preset sine wave phase.

[0104] Please refer to Figure 4The diagram shows the logic block diagram for simulating and calculating the sine wave sampling value. It includes a sine phase lookup table calculation module 100. This module retrieves the integer quantized sine value parameters corresponding to points n and (n+1) from the sine value lookup table. It then subtracts the value of point n from the value of point (n+1) to obtain the difference between the two points. In some embodiments, this difference is 25 bits. The difference is multiplied by the fractional part of the preset sine wave phase, and then added to the quantized integer quantized sine value parameter of point n to obtain the quantized phase sine value. In some embodiments, since the fractional part of the sine wave phase is 18 bits, the final calculation result discards the last 25 bits and the first 1 bit to obtain the quantized phase sine value.

[0105] Step S500: Obtain the preset sine wave amplitude value.

[0106] The preset sine wave amplitude includes the integer part of the preset sine wave amplitude, and the quantized amplitude is determined based on the integer part of the sine wave amplitude.

[0107] In some embodiments, the quantized amplitude is determined using the following formula:

[0108]

[0109] Where range_int is the quantized amplitude; C is the preset sine wave amplitude; D is the preset range of the FPGA's measurement amplitude, which is positive within the range; and k is the number of bits for the FPGA's data processing.

[0110] In some embodiments, the quantized amplitude is determined using the following formula:

[0111]

[0112] Wherein, range_int is the quantized amplitude; C is the preset sine wave amplitude; D is the preset measurement amplitude range of the FPGA, which includes both positive and negative values; and k is the number of bits for FPGA data processing.

[0113] In some embodiments, taking a preset sine wave amplitude of 2V and a preset FPGA measurement amplitude range of -100 to +100 as an example, the correspondence between the preset sine wave amplitude and the FPGA measurement amplitude range is calculated by dividing 2V by 100, thereby obtaining the quantized sine wave amplitude. Please refer to... Figure 4It also includes an amplitude input module 102. Since the DSP engine multiplier has 25 bits, the first 25 bits of the amplitude input value are used as the quantized amplitude, i.e., k is 25. When the preset FPGA measurement amplitude range includes both positive and negative values, the first bit is needed to represent the positive or negative value, so the number of bits for quantization is k-1. In some embodiments, the preset sine wave amplitude is the peak value of the sine signal, not the effective value.

[0114] Step S600: Calculate the quantized value of the sine wave sample based on the quantized phase sine value and the quantized amplitude.

[0115] In some embodiments, the sine wave sample quantization value is calculated using the following formula:

[0116] p = sin(phase) × range_int

[0117] Where p is the quantized value of the sine wave sample; sin(phase) is the quantized phase sine value; and range_int is the quantized amplitude.

[0118] Please refer to Figure 4 It also includes a phase amplitude calculation module 104, which uses the phase amplitude calculation module 104 to obtain the quantized phase sine value and the quantized amplitude, and multiplies them to obtain a 44-bit sine wave sampled quantized value.

[0119] Step S700: Determine the sine wave sampling value based on the sine wave sampling quantization value.

[0120] Please refer to Figure 6 In some embodiments, step S700, which determines the sine wave sampling value based on the sine wave sampling quantization value, further includes the following steps:

[0121] Step S701: Obtain the sine wave sampling quantization value.

[0122] Step S702: Based on the valid bits of the calculation result of the digital-to-analog converter, the quantization value of the sine wave sample is truncated to determine the sine wave sample value.

[0123] In some embodiments, the valid bits of the calculation result from the digital-to-analog converter include 16 bits.

[0124] In the field of microprocessor-based relay protection, the calculated sampled values ​​are generally either used as output signal data of a DAC (Digital-to-Analog Converter) or digitally encoded (such as SMV or FT3 messages). However, regardless of whether it's DAC output or encoded message transmission, the required effective bit length of the calculation result is only 16 bits. Therefore, it is also necessary to truncate the quantized values ​​of the sine wave sample. Please refer to... Figure 4The calculation results and quantization module 105 are used to truncate the lower 27 bits and the higher 1 bit of the 44-bit sine wave sample quantization value. The higher 1 bit is truncated because the highest bit of the DSP engine is a carry marker, which is meaningless when acquiring the sine wave sample value. In some embodiments, when the output result is to be retained as 32 bits, the lowest 11 bits and the highest 1 bit are truncated. This type of operation is a simple assignment operation for the FPGA and does not waste clock cycles.

[0125] Please refer to Figure 7 Other embodiments of this application disclose algorithmic flows for performing sine wave sampling value simulation calculations in a computer. Please refer to... Figure 8 and Figure 9 When the DSP engine is implemented using the DSP48 macrocell of the FPGA, two fixed operation modes are introduced: when SEL=0, P=A×B; when SEL=1, P=(DA)×B+C.

[0126] The algorithm flow for performing sine wave sampling value simulation calculations in a computer includes the following parts:

[0127] 300-IDLE state: IDLE means idle state. When the calculation of the signal is valid, the address of sintab is assigned the value phs_int, which represents the integer part of the phase input, and then it enters the next state.

[0128] 301 - Read sintab(n): In this state, wait for sintab to be read completely, increment sintab(n), assign a new address value phs_int+1, and then enter the next state.

[0129] 302 - Read sintab(n+1): In this state, wait for sintab to finish reading, assign the value sintab(n+1), and then enter the next state.

[0130] 303 - Initialize COMP: In this state, the DSP engine inputs are initialized, where SEL = '1'; A = sintab(n); B = phs_fra / 4; C = sintab(n) × 2 18 D = sintab(n+1), and then proceed to the next state.

[0131] 304-COMP Calculation Result: In this state, wait for the DSP engine to finish its operation. When the operation ends, assign the magnitude of the result to stab_val_comp. stab_val_comp represents the original phase quantization result. After discarding the last 25 bits and the first 1 bit, the phase quantization result sin(phase) is obtained. Then the state machine enters the next state.

[0132] 305 - Multiplier Initialization: In this state, the DSP engine is reinitialized, where SEL = '0'; A = range_int; B = sin(phase); C = 0; D = 0; and then the state machine enters the next state.

[0133] 306 - Multiplication Operation Completed: In this state, wait for the DSP engine to finish its operation. When the operation is finished, assign the result amplitude to stab_val_range. stab_val_range represents the quantization result of the original amplitude calculation. stab_val_range truncates 16 or 32 significant bits according to the system design requirements and uses them as the output of the entire sampled value simulation calculation module.

[0134] 307 - End of Calculation: In this state, all registers for the variables involved in the operation and calculation are cleared, and the next state is set to 300 - IDLE state to wait for the start of a new calculation cycle.

[0135] Please refer to Figure 10 Other embodiments of this application disclose an FPGA 10 for sine wave sampling simulation calculation, including a DSP engine 11, a ROM 12 and a processor 13, which are described in detail below.

[0136] The DSP engine 11 is used to obtain a preset sine wave phase and a preset sine wave amplitude. The preset sine wave phase includes the integer part of the preset sine wave phase and the fractional part of the preset sine wave phase. The preset sine wave amplitude includes the integer part of the preset sine wave amplitude.

[0137] In some embodiments, the DSP engine 11 quantizes the sine wave phase according to the data processing bits of the FPGA, then determines the data bits corresponding to the sine value lookup table according to the set division bits in the sine value lookup table, determines the integer bits of the quantized sine wave phase according to the data bits, and finally determines the integer part of the sine wave phase according to the integer bits.

[0138] In some embodiments, the DSP engine 11 quantizes the sine wave phase according to the data processing bits of the FPGA, then determines the data bits corresponding to the sine value lookup table according to the preset division bits in the sine value lookup table, determines the integer bits of the quantized sine wave phase according to the data bits, determines the initial decimal bits of the quantized sine wave phase according to the data processing bits and integer bits of the FPGA, determines the decimal bits corresponding to the preset decimal part of the sine wave phase according to the initial decimal bits of the quantized sine wave phase, and determines the preset decimal part of the sine wave phase according to the decimal bits corresponding to the preset decimal part of the sine wave phase.

[0139] ROM12 is used to store a sine value lookup table and to determine the corresponding integer quantized sine value parameter in the sine value lookup table based on the integer part of the preset sine wave phase.

[0140] In some embodiments, ROM12 obtains the integer part of a preset sine wave phase, then obtains the preset phase and preset division number from the sine value lookup table, and calculates the integer quantized sine value parameter using the following formula:

[0141]

[0142] Where x is any point in the integer part of the preset sine wave phase; sintab(x) is the integer quantized sine value parameter corresponding to any point in the integer part of the preset sine wave phase in the sine value lookup table; A is the preset phase in the sine value lookup table; B is the preset division number in the sine value lookup table; j is the number of multiplier bits in the DSP engine.

[0143] Processor 13 is used to acquire the fractional part of the sine wave phase and the integer quantized sine value parameter. Based on the preset fractional part of the sine wave phase, the integer quantized sine value parameter is linearly corrected to obtain the fractional quantized sine value parameter. Based on the integer quantized sine value parameter and the fractional quantized sine value parameter, the quantized phase sine value is calculated using the following formula:

[0144] sin(phase)=[sintab(n+1)-sintab(n)]×phs_fra+sintab(n)×2 i

[0145] Wherein, sin(phase) is the quantized phase sine value; sin is the sine function; n+1 is the (n+1)th point of the integer part of the preset sine wave phase; tab(n+1) is the value corresponding to the (n+1)th point in the sine value lookup table; sintab(n+1) is the integer quantized sine value parameter corresponding to the (n+1)th point in the sine value lookup table; n is the nth point of the preset integer part of the sine wave phase; tab(n) is the value corresponding to the nth point in the sine value lookup table; sintab(n) is the integer quantized sine value parameter corresponding to the nth point in the sine value lookup table; phs_fra is the fractional part of the preset sine wave phase; i is the number of decimal places corresponding to the fractional part of the preset sine wave phase.

[0146] The processor 13 is also configured to acquire the integer portion of the sine wave amplitude and determine the quantized amplitude based on the preset integer portion of the sine wave amplitude. In some embodiments, when all values ​​within the preset range of the FPGA's measurement amplitude are positive, the quantized amplitude is determined using the following formula:

[0147]

[0148] Where range_int is the quantized amplitude; C is the preset sine wave amplitude; D is the preset range of the FPGA's measurement amplitude, which is positive within the range; and k is the number of bits for the FPGA's data processing.

[0149] In some embodiments, when the preset range of the FPGA's measurement amplitude includes both positive and negative values, the quantized amplitude is determined using the following formula:

[0150]

[0151] Wherein, range_int is the quantized amplitude; C is the preset sine wave amplitude; D is the preset measurement amplitude range of the FPGA, which includes both positive and negative values; and k is the number of bits for FPGA data processing.

[0152] The processor 13 calculates the quantized value of the sine wave sample using the following formula, based on the quantized phase sine value and the quantized amplitude:

[0153] p = sin(phase) × range_int

[0154] Where p is the quantized value of the sine wave sample; sin(phase) is the quantized phase sine value; and range_int is the quantized amplitude.

[0155] The processor 13 further determines the sine wave sample value based on the sine wave sample quantization value. In some embodiments, the sine wave sample quantization value is obtained, and then truncated according to the valid bits of the calculation result from the digital-to-analog converter to determine the sine wave sample value. In some embodiments, the valid bits of the calculation result from the digital-to-analog converter include 16 bits.

[0156] Those skilled in the art will understand that all or part of the functions of the various methods in the above embodiments can be implemented by hardware or by computer programs. When all or part of the functions in the above embodiments are implemented by computer programs, the program can be stored in a computer-readable storage medium, which may include: read-only memory, random access memory, disk, optical disk, hard disk, etc., and the program is executed by a computer to achieve the above functions. For example, the program can be stored in the memory of a device, and when the program in the memory is executed by the processor, all or part of the above functions can be achieved. In addition, when all or part of the functions in the above embodiments are implemented by computer programs, the program can also be stored in a server, another computer, disk, optical disk, flash drive, or external hard drive, etc., and can be downloaded or copied to the memory of a local device, or the system of the local device can be updated. When the program in the memory is executed by the processor, all or part of the functions in the above embodiments can be achieved.

[0157] The above examples illustrate the present invention only to aid in understanding it and are not intended to limit the scope of the invention. Those skilled in the art can make various simple deductions, modifications, or substitutions based on the principles of this invention.

Claims

1. A method for simulating and calculating sinusoidal wave sampled values, characterized in that, include: Obtain a preset sine wave phase, wherein the preset sine wave phase includes an integer part of the preset sine wave phase and a fractional part of the preset sine wave phase; The integer quantized sine value parameter corresponding to the sine value lookup table is determined based on the integer part of the preset sine wave phase. The integer quantized sine value parameter is linearly corrected based on the fractional part of the preset sine wave phase to obtain the fractional quantized sine value parameter; Based on the integer quantization sine value parameter and the fractional quantization sine value parameter, the quantized phase sine value is calculated using the following formula: sin(phase)=[sintab(n+1)-sintab(n)]×phs_fra+sintab(n)×2 i Wherein, sin(phase) is the quantized phase sine value; sin is the sine function; n+1 is the (n+1)th point of the integer part of the preset sine wave phase; tab(n+1) is the value corresponding to the (n+1)th point in the sine value lookup table; sintab(n+1) is the integer quantized sine value parameter corresponding to the (n+1)th point in the sine value lookup table; n is the nth point of the integer part of the preset sine wave phase; tab(n) is the value corresponding to the nth point in the sine value lookup table; sintab(n) is the integer quantized sine value parameter corresponding to the nth point in the sine value lookup table; phs_fra is the fractional part of the preset sine wave phase; i is the number of decimal places corresponding to the fractional part of the preset sine wave phase. Obtain a preset sine wave amplitude value, wherein the preset sine wave amplitude value includes the integer part of the preset sine wave amplitude value, and determine the quantized amplitude value based on the integer part of the preset sine wave amplitude value; Based on the quantized phase sine value and the quantized amplitude, the quantized value of the sine wave sample is calculated using the following formula: p = sin(phase) × range_int Where p is the quantized value of the sine wave sample; sin(phase) is the quantized phase sine value; range_int is the quantized amplitude; The sine wave sampling value is determined based on the sine wave sampling quantization value.

2. The sine wave sampling value simulation calculation method as described in claim 1, characterized in that, The step of determining the integer quantized sine value parameter corresponding to the sine value lookup table based on the integer part of the preset sine wave phase includes: Obtain the integer part of the preset sine wave phase; Obtain the preset phase and preset division point from the sine value lookup table; The integer quantized sine value parameter corresponding to the integer part of the preset sine wave phase in the sine value lookup table is obtained by calculating the following formula: Where x is any point in the integer part of the preset sine wave phase; sintab(x) is the integer quantized sine value parameter corresponding to any point in the integer part of the preset sine wave phase in the sine value lookup table; A is the preset phase in the sine value lookup table; B is the preset division number in the sine value lookup table; j is the number of multiplier bits in the DSP engine.

3. The sine wave sampling value simulation calculation method as described in claim 2, characterized in that, The process of obtaining the integer part of the preset sine wave phase includes: The sine wave phase is quantized according to the data processing bit depth of the FPGA; The data bits corresponding to the sine lookup table are determined according to the preset division position; The integer bits of the quantized sine wave phase are determined based on the data bits. The integer part of the sine wave phase is determined based on the integer bits.

4. The sine wave sampling value simulation calculation method as described in claim 1, characterized in that, The fractional part of the preset sine wave phase includes: The sine wave phase is quantized according to the data processing bit depth of the FPGA; The data bits corresponding to the sine lookup table are determined according to the preset division position in the sine value lookup table; The integer bits of the quantized sine wave phase are determined based on the data bits. The initial decimal places of the quantized sine wave phase are determined based on the number of bits in the FPGA's data processing and the number of integer bits. The fractional part of the preset sine wave phase is determined based on the initial fractional part of the quantized sine wave phase. The fractional part of the preset sine wave phase is determined based on the fractional place corresponding to the fractional part of the preset sine wave phase.

5. The sine wave sampling value simulation calculation method as described in claim 1, characterized in that, The step of linearly correcting the integer quantized sine value parameter based on the fractional part of the preset sine wave phase to obtain the fractional quantized sine value parameter includes: When the preset sine wave phase is located between two adjacent positions in the preset division of the sine value lookup table, the integer quantized sine value parameter is the value corresponding to the first of the two adjacent positions in the preset division of the sine value lookup table; calculate the difference between the value corresponding to the second of the two adjacent positions in the preset division of the sine value lookup table and the value corresponding to the first of the two adjacent positions in the preset division of the sine value lookup table, and multiply the difference by the decimal part of the preset sine wave phase to obtain the fractional quantized sine value parameter.

6. The sine wave sampling value simulation calculation method as described in claim 1, characterized in that, The step of determining the quantized amplitude based on the integer part of the preset sine wave amplitude includes: The quantized amplitude is determined based on the integer part of the preset sine wave amplitude using the following formula: Wherein, range_int is the quantized amplitude; C is the preset sine wave amplitude; D is the preset range of the FPGA's measurement amplitude, which is positive within the range; and k is the number of bits in the DSP engine multiplier.

7. The sine wave sampling value simulation calculation method as described in claim 1, characterized in that, The step of determining the quantized amplitude based on the integer part of the preset sine wave amplitude includes: The quantized amplitude is determined based on the integer part of the preset sine wave amplitude using the following formula: Wherein, range_int is the quantized amplitude; C is the preset sine wave amplitude; D is the preset range of the FPGA's measurement amplitude, which includes both positive and negative values; and k is the number of bits in the DSP engine multiplier.

8. The sine wave sampling value simulation calculation method as described in claim 1, characterized in that, The step of determining the sine wave sampling value based on the sine wave sampling quantization value includes: Obtain the sine wave sampling quantization value; The quantized value of the sine wave is truncated based on the valid bits of the calculation result from the digital-to-analog converter to determine the sine wave sample value.

9. The sine wave sampling value simulation calculation method as described in claim 8, characterized in that, The calculation result of the digital-to-analog converter includes 16 valid bits.

10. An FPGA for sine wave sampling simulation calculation, characterized in that, include: The DSP engine is used to obtain a preset sine wave phase and a preset sine wave amplitude. The preset sine wave phase includes an integer part and a fractional part of the preset sine wave phase, and the preset sine wave amplitude includes an integer part of the preset sine wave amplitude. The ROM is used to store a sine value lookup table and determine the corresponding integer quantized sine value parameter in the sine value lookup table based on the integer part of the preset sine wave phase. The processor is configured to acquire the fractional part of the sine wave phase and the integer quantized sine value parameter, linearly correct the integer quantized sine value parameter based on the preset fractional part of the sine wave phase to obtain the fractional quantized sine value parameter, and calculate the quantized phase sine value based on the integer quantized sine value parameter and the fractional quantized sine value parameter using the following formula: sin(phase)=[sintab(n+1)-sintab(n)]×phs_fra+sintab(n)×2 i Wherein, sin(phase) is the quantized phase sine value; sin is the sine function; n+1 is the (n+1)th point of the integer part of the preset sine wave phase; tab(n+1) is the value corresponding to the (n+1)th point in the sine value lookup table; sintab(n+1) is the integer quantized sine value parameter corresponding to the (n+1)th point in the sine value lookup table; n is the nth point of the integer part of the preset sine wave phase; tab(n) is the value corresponding to the nth point in the sine value lookup table; sintab(n) is the integer quantized sine value parameter corresponding to the nth point in the sine value lookup table; phs_fra is the fractional part of the preset sine wave phase; i is the number of decimal places corresponding to the fractional part of the preset sine wave phase. The processor is further configured to obtain the integer part of the sine wave amplitude, determine the quantized amplitude based on the preset integer part of the sine wave amplitude, and calculate the quantized sine wave sample value based on the quantized phase sine value and the quantized amplitude using the following formula: p = sin(phase) × range_int Where p is the quantized value of the sine wave sample; sin(phase) is the quantized phase sine value; range_int is the quantized amplitude; The processor also determines the sine wave sampling value based on the sine wave sampling quantization value.

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