Enhanced Discrete-Time Feedforward Equalizer

Abstract

An N-tap feedforward equalizer (FFE) (100) includes: a group of N FFE taps coupled together in parallel; a filter (140) coupled between the (N-1)th FFE tap and the Nth FFE tap; and an adder coupled to the output of the group of N FFE taps. Each FFE tap includes a unique sample and hold (S / H) circuit (120, 130, 150) that generates a unique time-delay signal and a unique transconductance stage (125, 135, 155) that generates a unique transconductance output based on the unique time-delay signal. The filter causes the N-tap FFE to have characteristics greater than N taps. In some instances, the filter is a first-order high-pass filter that causes coefficients greater than N to have opposite polarity to the Nth coefficient. In some instances, the filter is a first-order low-pass filter that causes coefficients greater than N to have the same polarity as the Nth coefficient.

Description

Background Art

[0001] Equalization is the process of conditioning an electrical signal at a transmitter or receiver to compensate for channel-induced inter-symbol interference (ISI) and improve signal integrity. Feedforward equalization (FFE) is a common equalization technique that employs a finite impulse response (FIR) filter with a series of tap weights programmed to adjust the impulse and frequency response of the signal. The performance of FFE corresponds to the number of taps implemented. However, FFE taps can consume a lot of power, so that improving the performance of FFE comes at the expense of increased power consumption. Summary of the invention

[0002] A feedforward equalizer (FFE) includes: a group of N FFE taps coupled together in parallel; a filter coupled between the (N-1)th FFE tap and the Nth FFE tap; and an adder coupled to the output of the group of N FFE taps. Each FFE tap includes a unique sample and hold (S / H) circuit that generates a unique time-delay signal and a unique transconductance stage configured to generate a unique transconductance output based on the unique time-delay signal. The filter coupled between the (N-1)th FFE tap and the Nth FFE tap causes the FFE to have characteristics greater than N taps.

[0003] In some implementations, the filter is a first order high pass filter and coefficients greater than N have opposite polarity to the Nth coefficient. In some implementations, the filter is a first order low pass filter and coefficients greater than N have the same polarity as the Nth coefficient. In some implementations, a particular S / H circuit in a particular FFE tap includes a first track and hold (T / H) circuit and a second T / H circuit. At least one of the first and second T / H circuits may include a preamplifier and a switched emitter follower.

[0004] In some instances, the preamplifier includes a degeneration capacitor, the capacitance of the degeneration capacitor being selected to extend the bandwidth of the preamplifier. In some instances, the at least one of the first and second T / H circuits includes a feedforward capacitor coupled between the preamplifier and the switched emitter follower. The capacitance of the feedforward capacitor is selected to reduce hold mode feedthrough. For the Nth S / H circuit, the preamplifier of the first T / H circuit may include the filter, such as a filter capacitor, coupled between the (N-1)th FFE tap and the Nth FFE tap. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] For a detailed description of various examples, reference will be made to the accompanying drawings, in which:

[0006] Figure 1A feed-forward equalizer with extended taps is described.

[0007] Figure 2 Shown are graphs illustrating sample impulse responses of different filters in an ideal three-tap feedforward equalizer.

[0008] Figures 3A to 3B Description Figure 1 The tracking and holding amplifier used in the sample and hold circuit included in the feedforward equalizer shown in FIG. DETAILED DESCRIPTION

[0009] By including a passive filter before the Nth sample and hold (S / H) circuit, the described N-tap feedforward equalizer can have the characteristics of a greater than N-tap feedforward equalizer. The filter creates a tail of appropriate magnitude in the post-tap to simulate greater than N taps. Because the filter is passive, it does not consume any additional power. If the filter is a first-order high-pass filter, then the higher-order coefficients greater than N have the opposite polarity as the Nth coefficient. If the filter is a first-order low-pass filter, then the higher-order coefficients greater than N have the same polarity as the Nth coefficient. The filter can be a filter of any appropriate order. In some instances, the preamplifier in the master tracking and holding (T / H) circuit of the Nth S / H circuit includes the filter.

[0010] Figure 1 A feedforward equalizer 100 with an extended tap is illustrated. The feedforward equalizer 100 includes sample and hold (S / H) circuits 120, 130, and 150, a programmable filter 140, transconductance stages 125, 135, and 155, and a resistor RL. The S / H circuits 120, 130, and 150 receive a clock signal CLK 110. The S / H circuit 120 also receives an input signal Vin 105. The output of the S / H circuit 120 is provided to the transconductance stage 125 and the S / H circuit 130. The output of the S / H circuit 130 is provided to the transconductance stage 135 and the filter 140. The output of the filter 140 is provided to the S / H circuit 150. The output of the S / H circuit 150 is provided to the transconductance stage 155.

[0011] The outputs of transconductance stages 125, 135, and 155 are coupled to resistor RL, which is further coupled to supply voltage rail Vcc 115. Output signal Vout 160 is provided at a node at which the outputs of transconductance stages 125, 135, and 155 are coupled to resistor RL. S / H circuit 120 and transconductance stage 125 include a pioneer tap, S / H circuit 130 and transconductance stage 135 include a main tap, and S / H circuit 150 and transconductance stage 155 include a trailing tap. In this example, feedforward equalizer 100 is an N-tap feedforward equalizer, where N is equal to 3. However, in other examples, feedforward equalizer 100 may have four or more taps by including additional S / H circuits.

[0012] By creating a tail of appropriate magnitude in the tail taps using filter 140, the N-tap feedforward equalizer 100 can be enhanced to have characteristics of >N taps. Filter 140 can be a passive filter so that the inclusion of filter 140 in feedforward equalizer 100 does not substantially change the power consumption of feedforward equalizer 100. If filter 140 is a first order low pass filter, then the higher order coefficients greater than N have the same polarity as the Nth coefficient. If filter 140 is a first order high pass filter, then the higher order coefficients greater than N have the opposite polarity as the Nth coefficient. Filter 140 can be programmed using a network of variable resistors and capacitors and resistors and capacitors with switches for coupling and decoupling the network.

[0013] Figure 2 Show Description Figure 1 Graph 200 of sample impulse responses of different filters in the ideal three-tap feedforward equalizer 100 shown in FIG. The impulse at time 210 corresponds to the pioneer tap. The impulse at time 220 corresponds to the main tap. The impulse at time 230 corresponds to the first after-tap tap. Sample response 240 corresponds to the first order high pass filter 140, and the higher order coefficients greater than 3 have the opposite polarity as the third coefficient. Sample response 250 corresponds to the filter 140 with no additional taps and a transfer function equal to 1. Sample response 260 corresponds to the first order low pass filter 140, and the higher order coefficients greater than 3 have the same polarity as the third coefficient.

[0014] In order to obtain the desired filtering characteristics, the filter 140 can be a filter of any order. In the example where the filter 140 is a first-order low-pass filter, the Nth coefficient ctap(N) can be expressed as:

[0015]

[0016] Where Gm(N) represents the gain of the transconductance stage of the Nth tap, RL represents the resistance of the resistor RL, Tb represents the bit period of the input signal Vin 105, and τ represents the time constant of the filter 140. The time constant τ of the filter 140 may be selected based on the channel loss characteristics. The high-order coefficient ctap(n) (where n is greater than N) may be expressed as:

[0017]

[0018] In the example where filter 140 is a first order high pass filter, the Nth coefficient ctap(N) may be expressed as:

[0019]

[0020] Where Gm(N) represents the gain of the transconductance stage before the Nth tap. The higher-order coefficients ctap(n) (where n is greater than N) can be expressed as:

[0021]

[0022] Figure 3A To B, Figure 1 The S / H circuit included in the feedforward equalizer 100 shown in FIG. 1 is an example tracking and holding (T / H) amplifier 300 used in the S / H circuits 120, 130, and 150. The T / H amplifier 300 includes a preamplifier 340 having two switched emitter followers 350A-B. Figure 3A , the preamplifier 340 includes a degeneration capacitor Cs 360A coupled in parallel with a degeneration resistor Rs. The preamplifier 340 exhibits a pole at approximately:

[0023]

[0024] Where C1 represents the input capacitance of the switched emitter follower 350A or 350B and the pole at approximately:

[0025]

[0026] Where Gm represents the transconductance of transistors Q1 and Q2. Preamplifier 340 exhibits zero

[0027]

[0028] The capacitor Cs 360A can be selected so that the zero value under the following conditions is

[0029]

[0030] Offset the poles under the following

[0031]

[0032] The bandwidth of T / H amplifier 300A is thereby extended. Feedforward capacitors Cf 370A-B are coupled between preamplifier 340 and switched emitter followers 350A-B, respectively, and cancel or reduce holding mode feedthrough by opposing the effects of the base-emitter capacitance of transistors QEF1, QEF2, respectively.

[0033] Figure 3B The master T / H amplifier of the S / H circuit 150 is illustrated, which can be reconfigured so that the preamplifier 340 incorporates the filtering characteristics of the filter 140 and eliminates the need for a separate filtering circuit 140. In one configuration, the preamplifier 340 in the master T / H amplifier 300B omits the degeneration capacitor Cs 360B. In another configuration, the preamplifier 340 in the master T / H amplifier 300B includes the degeneration capacitor Cs 360B and an additional capacitor CL 380 coupled between the feed-forward capacitors Cf 370A and Cf 370B. In both configurations, the preamplifier 340 acts as the filter 140 in addition to being part of the master T / H amplifier of the S / H circuit 150.

[0034] The term "coupled" is used throughout the specification. The term may encompass connections, communications, or signal paths that achieve a functional relationship consistent with the present description. For example, if device A generates a signal to control device B to perform an action, then device A is coupled to device B in a first instance, or device A is coupled to device B through an intermediary component C in a second instance, provided that the intermediary component C does not substantially change the functional relationship between device A and device B such that device B is controlled by device A via the control signal generated by device A.

[0035] Modifications to the described embodiments are possible within the scope of the claims, and other embodiments are possible.

Claims

1. A feed-forward equalizer (FFE), comprising: A set of N FFE taps coupled together in parallel, wherein each of the N FFE taps comprises: a unique sample and hold (S / H) circuit configured to generate a unique time-delayed signal; and a unique transconductance stage configured to generate a unique transconductance output based on the unique time-delayed signal; a filter coupled between the (N-1)th FFE tap and the Nth FFE tap; and An adder coupled to the outputs of the set of N FFE taps.

2. The FFE of claim 1, wherein the filter comprises a first order high pass filter such that coefficients greater than N have opposite polarity to the Nth coefficient.

3. The FFE of claim 1, wherein the filter comprises a first-order low-pass filter such that coefficients greater than N have the same polarity as the Nth coefficient.

4. The FFE of claim 1, wherein a specific S / H circuit in a specific FFE tap comprises a first track and hold (T / H) circuit and a second T / H circuit.

5. The FFE of claim 4, wherein at least one of the first and second T / H circuits in the particular S / H circuit comprises: Preamplifier; and Switched emitter follower.

6. The FFE of claim 5, wherein the preamplifier includes a degeneration capacitor, wherein the capacitance of the degeneration capacitor is selected to extend the bandwidth of the preamplifier.

7. The FFE of claim 5, wherein at least one of the first and second T / H circuits further comprises a feed-forward capacitor coupled between the preamplifier and the switched emitter follower, wherein the capacitance of the feed-forward capacitor is selected to reduce hold mode feedthrough.

8. The FFE of claim 5, wherein the particular FFE tap is the Nth FFE tap, wherein the particular S / H circuit is the Nth S / H circuit, wherein the at least one of the first and second T / H circuits is the first T / H circuit, and wherein the preamplifier further comprises the filter coupled between the (N-1)th FFE tap and the Nth FFE tap.

9. The FFE of claim 8, wherein the preamplifier comprises a filter capacitor.

10. A device comprising: a set of N sample and hold (S / H) circuits coupled together in series; a filter coupled between the (N-1)th S / H circuit and the Nth S / H circuit; a set of N transconductance stages, wherein each transconductance stage is coupled to the output of a unique S / H circuit of the N S / H circuits; as well as An adder is coupled to the outputs of the N transconductance stages.

11. The apparatus of claim 10, wherein the filter comprises a first order high pass filter such that coefficients greater than N have opposite polarity to the Nth coefficient.

12. The apparatus of claim 10, wherein the filter comprises a first order low pass filter such that coefficients greater than N have the same polarity as the Nth coefficient.

13. The apparatus of claim 10, wherein the S / H circuits in the set of N S / H circuits comprise track-and-hold (T / H) circuits.

14. The apparatus of claim 13, wherein the T / H circuit comprises: a preamplifier coupled to an input of the T / H circuit; and A switched emitter follower is coupled to the output of the preamplifier and to the output of the T / H circuit.

15. The apparatus of claim 14, wherein the preamplifier comprises a degeneration capacitor, and wherein the T / H circuit further comprises a feed-forward capacitor coupled between the preamplifier and the switched emitter follower.

16. The apparatus of claim 14, wherein the S / H circuit is the Nth S / H circuit, wherein the preamplifier further comprises the filter.

17. A feed-forward equalizer (FFE), comprising: a first sample and hold (S / H) circuit configured to receive an input signal and a clock signal and output a first retiming signal; a first amplifier configured to receive the first retimed signal and output a first weighted signal; a second S / H circuit configured to receive the first retiming signal and the clock signal and output a second retiming signal; a second amplifier configured to receive the second retimed signal and output a second weighted signal; a filter configured to receive the second retimed signal and output a filtered signal; a third S / H circuit configured to receive the filtered signal and the clock signal and output a third retimed signal; a third amplifier configured to receive the third retimed signal and output a third weighted signal; as well as An adder is configured to combine the first, second and third weighted signals.

18. The FFE of claim 17, wherein the filter comprises a first order high pass filter such that equalization of the FFE is greater than three taps, wherein higher order coefficients beyond a third coefficient have opposite polarity to the third coefficient.

19. The FFE of claim 17, wherein the filter comprises a first order low pass filter such that equalization of the FFE is greater than three taps, wherein higher order coefficients beyond a third coefficient have the same polarity as the third coefficient.

20. The FFE of claim 17, wherein the third S / H circuit comprises a master track and hold (T / H) circuit and a slave T / H circuit.

21. The FFE of claim 20, wherein the master T / H circuit comprises: a preamplifier, wherein the preamplifier includes the filter; and Switching emitter follower.

22. The FFE of claim 21, wherein the preamplifier further comprises a degeneration capacitor, wherein The master T / H circuit further includes a feed-forward capacitor coupled between the preamplifier and the switched emitter follower.

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