An adaptive power sampling device and method for a pulsed radio frequency power supply

Abstract

The application provides an adaptive power sampling device and method for a pulse radio frequency power supply, wherein a sampling pre-processing circuit is connected with a signal input port and is used for filtering and amplifying an input signal; a first input end of a first analog comparator is connected with an output end of the pre-processing circuit; an output end of the first analog comparator and an input end of a first D / A converter are both connected with a processor; an output end of the first D / A converter is connected with a second input end of the first analog comparator; the processor adopts a dichotomic search successive approximation sampling mode, generates a digital comparison reference signal through the first D / A converter and inputs the second input end of the first analog comparator; the first analog comparator compares the sampling signal input through the first input end with the digital comparison reference signal and inputs the comparison result into the processor to determine an output state and obtain a corresponding sampling result; and in combination with a pulse synchronization signal, the adaptability and sampling efficiency are further improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of radio frequency power supply, in particular to an adaptive power sampling device and method for pulse radio frequency power supply. BACKGROUND

[0002] Radio frequency power supply is a radio frequency power source system that can provide certain energy, which is widely used in medical treatment, new material formation, light energy, scientific experiment and other fields.

[0003] The pulse repetition frequency range of common pulse radio frequency power supply is 1Hz-1MHz, and the duty cycle range is 0%-100%, so the width range of each pulse is 0us-1s. The power of the pulse radio frequency power supply is converted into a voltage signal after coupling and detection, and the voltage signal is processed into a suitable square wave signal (including a direct current level signal) after filtering, amplification and voltage division. The repetition frequency range of the square wave signal (including the direct current level signal) is also 1Hz-1MHz, and the duty cycle range is 0%-100%.

[0004] The power sampling of the pulse radio frequency power supply needs to sample the peak-to-peak value (Vp) of the processed square wave signal (including the direct current level signal). Then, according to the corresponding correction curve, the sampled voltage value is restored to the power value, so as to obtain the output power of the pulse radio frequency power supply. In order to adapt to the case that the repetition frequency and the duty cycle are variable in a large range, a high-speed ADC with a speed of ≥8Msps is required for sampling, and a high-speed processor with a speed of ≥400MIPS is required for calculating the quantized values after sampling. Although there are processors and ADCs on the market that meet the operation and sampling speed, the cost is high, the power consumption is large, and it is not convenient for small size integration. Therefore, a scheme is needed to reduce the power sampling cost, power consumption and size of the pulse radio frequency power supply. SUMMARY

[0005] The purpose of the present application is to provide an adaptive power sampling device and system for pulse radio frequency power supply, which can achieve the technical effect of reducing the power sampling cost, power consumption and size of the pulse radio frequency power supply.

[0006] In a first aspect, the embodiments of the present application provide an adaptive power sampling device for a pulsed radio frequency power supply, comprising a signal input port, a power supply module, a sampling pre-processing circuit, a first analog comparator, a processor and a first D / A converter; the sampling pre-processing circuit is connected with the signal input port, and is used for filtering and amplifying the input signal; the first input end of the first analog comparator is connected with the output end of the pre-processing circuit; the output end of the first analog comparator is connected with the processor; the input end of the first D / A converter is connected with the processor; the output end of the first D / A converter is connected with the second input end of the first analog comparator; the processor adopts a dichotomic search successive approximation sampling mode, generates a digital comparison reference signal through the first D / A converter and inputs the second input end of the first analog comparator; the first analog comparator compares the sampling signal input through the first input end with the digital comparison reference signal, inputs the comparison result into the processor to determine the output state, and obtains the corresponding sampling result; the power supply module is used for powering the elements in the first analog comparator, the processor, the first D / A converter and the sampling pre-processing circuit.

[0007] Further, the adaptive power sampling device further comprises a second analog comparator and a reference signal generation module; the first input end of the second analog comparator is connected with the output end of the pre-processing circuit; the output end of the second analog comparator is connected with the processor; the input end of the reference signal generation module is connected with the processor; the output end of the reference signal generation module is connected with the second input end of the second analog comparator; the processor acquires a pulse synchronization signal through the second analog comparator and the reference signal generation module, analyzes the pulse width and the duty cycle value of the pulse synchronization signal, and adjusts the sampling strategy according to the pulse width and the duty cycle.

[0008] Further, the reference signal generation module is any one of a D / A converter, a potentiometer or a voltage dividing resistor.

[0009] Further, the sampling pre-processing circuit comprises a first resistor, a second resistor, an amplifier and a filter circuit; the first end of the first resistor is connected with the signal input port; the first input end of the amplifier and the first end of the second resistor are both connected with the second end of the first resistor; the second end of the second resistor is grounded; the output end of the amplifier is connected with the second input end of the amplifier; the first end of the filter circuit is connected with the output end of the amplifier; and the second end of the filter circuit is connected with the first input end of the first analog comparator.

[0010] Further, the adaptive power sampling device further comprises a memory and a display connected with the processor.

[0011] Further, the adaptive power sampling device further comprises a plurality of types of communication interfaces connected with the processor.

[0012] Further, the power module comprises a power input interface; and a DC / DC converter connected with the power input interface.

[0013] In a second aspect, the present application provides an adaptive power sampling method for a pulsed radio frequency power supply, applied to the adaptive power sampling device described above, comprising:

[0014] Starting from the highest bit of the digital quantity required to be output by the processor, the processor sets the output voltage of the first D / A converter to half of the current remaining bit digital quantity, and inputs the second input end of the first analog comparator;

[0015] The first analog comparator compares the voltage Vin input by the first input end with the voltage Vdac input by the second input end, and sends the comparison result to the processor;

[0016] The processor determines the output state corresponding to each bit of the digital quantity in turn according to the comparison result; wherein if Vin>Vdac, the highest bit is 1; if VinVdac, the highest bit is 0;

[0017] When the lowest bit of the digital quantity is determined, the processor restores the voltage value according to the final output obtained according to the reference voltage of the first D / A converter, to obtain the final sampling result.

[0018] Further, the method further comprises: during the sampling process, the processor acquires a pulse synchronization signal through the reference signal generation module and the second analog comparator, and analyzes the pulse width and duty cycle value of the pulse synchronization signal, and adjusts the sampling strategy according to the pulse width and the duty cycle.

[0019] The present application can achieve the beneficial effects that: in the adaptive power sampling device, system and method provided by the present application, the input signal of the signal input port is sent to the first input end of the first analog comparator after being preprocessed by the sampling preprocessing circuit, and the comparison reference voltage input by the second input end of the first analog comparator can be adjusted by the processor through the output of the first D / A converter. The processor uses the binary search comparison algorithm to adjust the output of the first D / A converter according to the output state of the first analog comparator, so as to determine the pulse peak amplitude; and the same sampling precision as the traditional A / D converter method can be achieved (when the bit number of the D / A converter and the A / D converter is the same). In this way, the power sampling of the pulsed radio frequency power supply can be realized quickly without high-speed analog-digital converters and high-speed processors, which reduces the cost while ensuring the sampling efficiency.

[0020] In addition, the use of binary search successive approximation sampling can divide a complete sampling into several conversion periods, so the speed and performance requirements of the D / A converter, analog comparator and processor are much lower than the traditional A / D converter direct sampling technology. The processing speed requirement of the hardware is reduced, and the power consumption and implementation volume are also greatly reduced. Further, the binary search successive approximation adaptive sampling improves the efficiency balance and adaptability in different pulse width and duty cycle value ranges of the pulse signal on the basis of the binary search successive approximation sampling. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments of the present application. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0022] Figure 1 A topological structure schematic diagram of an adaptive power sampling device for a pulsed RF power supply provided by the embodiments of the present application.

[0023] Figure 2 A flowchart schematic diagram of an adaptive power sampling method for a pulsed RF power supply provided by the embodiments of the present application.

[0024] Figure legend: 100-adaptive power sampling device; 110-sampling preprocessing circuit; 111-filtering circuit; 120-power module; 130-processor; 140-reference signal generation module. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments of the present application will be described below in combination with the drawings in the embodiments of the present application. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. At the same time, in the description of the present application, the terms "first", "second", etc. are only used for distinguishing description, and cannot be understood as indicating or implying relative importance.

[0026] Please refer to Figure 1 , Figure 1 A topological structure schematic diagram of an adaptive power sampling device for a pulsed RF power supply provided by the embodiments of the present application.

[0027] In one embodiment, the present application provides an adaptive power sampling device 100 for a pulsed RF power supply, comprising a signal input port (INPUT), a power module 120, a sampling pre-processing circuit 110, a first analog comparator (U1A), a processor 130 and a first D / A converter (DAC1); the sampling pre-processing circuit 110 is connected to the signal input port (INPUT) for filtering and amplifying the input signal; the first input of the first analog comparator (U1A) is connected to the output of the pre-processing circuit; the output of the first analog comparator (U1A) is connected to the processor 130; the input of the first D / A converter (DAC1) is connected to the processor 130; the output of the first D / A converter (DAC1) is connected to the second input of the first analog comparator (U1A); the processor 130 uses a binary search successive approximation sampling method to generate a digital comparison reference signal through the first D / A converter (DAC1) and input the second input of the first analog comparator (U1A); the first analog comparator (U1A) compares the sampling signal input through the first input with the digital comparison reference signal and inputs the comparison result to the processor 130 to determine the output state and obtain the corresponding sampling result; the power module 120 is used to power the elements in the first analog comparator (U1A), the processor 130, the first D / A converter (DAC1) and the sampling pre-processing circuit 110.

[0028] In the above implementation process, after the input signal of the signal input port (INPUT) is processed by the sampling pre-processing circuit 110, it is sent to the first input of the first analog comparator (U1A), and at the same time, the processor 130 can adjust the digital adjustable comparison reference voltage (i.e. digital comparison reference signal) input to the second input of the first analog comparator (U1A) through the output of the first D / A converter (DAC1). As long as the input signal is higher than the comparison reference voltage (when the comparison reference voltage is the inverse input) or lower than the comparison reference voltage (when the comparison reference voltage is the same input), the first analog comparator (U1A) will generate a logic high level output. The processor 130 uses a binary search comparison algorithm to adjust the output of the first D / A converter (DAC1) according to the output state of the first analog comparator (U1A), i.e. to determine the pulse peak amplitude; and the same sampling accuracy as the traditional A / D converter can be achieved (when the bit number of the D / A converter and the A / D converter is the same).

[0029] In this way, without high-speed analog-to-digital converters and high-speed processors 130, the power sampling of the pulsed RF power supply can be quickly realized, while the cost, volume and power consumption of the sampling device are reduced.

[0030] In an embodiment, the adaptive power sampling device 100 further comprises a second analog comparator (U1B) and a reference signal generation module 140; a first input terminal of the second analog comparator (U1B) is connected with an output terminal of the pre-processing circuit; an output terminal of the second analog comparator (U1B) is connected with the processor 130; an input terminal of the reference signal generation module 140 is connected with the processor 130; an output terminal of the reference signal generation module 140 is connected with a second input terminal of the second analog comparator (U1B); the processor 130 acquires the pulse synchronization signal through the second analog comparator (U1B) and the reference signal generation module 140, and analyzes the pulse width and the duty cycle value of the pulse synchronization signal, and adjusts the sampling strategy according to the pulse width and the duty cycle value.

[0031] In the above implementation process, the processor 130 inputs a small threshold voltage to the second input terminal of the second analog comparator (U1B) through the reference signal generation module 140, and sends the output of the second analog comparator (U1B) as the pulse synchronization signal into the processor 130. As long as the input signal is higher than the threshold voltage (when the threshold voltage is the inverse input terminal) or lower than the threshold voltage (when the threshold voltage is the same phase input terminal), the second analog comparator (U1B) will generate a logic high level output, triggering the interrupt capture subprogram of the processor 130, to acquire the pulse width and the duty cycle effective value of the pulse synchronization signal. The processor 130 adopts different strategies for sampling according to different pulse width and duty cycle values, thereby improving the sampling efficiency and achieving the adaptability and balance of the sampling efficiency in a large range of pulse width and repetition frequency. The sampling strategy is divided into: when the pulse synchronization signal has a wide pulse width or a high repetition frequency, a blocking background running sampling method is adopted. When the pulse synchronization signal is narrow or has a low repetition frequency, a non-blocking foreground running sampling method is adopted.

[0032] In an embodiment, the reference signal generation module 140 is any one of a D / A converter, a potentiometer or a voltage dividing resistor. For example, if the reference signal generation module 140 selects a D / A converter, the D / A converter and the first D / A converter (DAC1) can be integrated in one IC chip. Specifically, the model of the IC chip can be MAX516, through which the structure of the device is simplified and the volume of the device is reduced.

[0033] In an embodiment, the sampling pre-processing circuit 110 comprises a first resistor (R1), a first resistor (R2), an amplifier (U2) and a filter circuit 111; a first end of the first resistor (R1) is connected with a signal input port (INPUT); a first input end of the amplifier (U2) and a first end of the first resistor (R2) are both connected with a second end of the first resistor (R1); a second end of the first resistor (R2) is grounded; an output end of the amplifier (U2) is connected with a second input end of the amplifier (U2); a first end of the filter circuit 111 is connected with the output end of the amplifier (U2); and a second end of the filter circuit 111 is connected with a first input end of the first analog comparator (U1A).

[0034] Exemplarily, the filter circuit 111 can be a multiple filter circuit composed of currently more commonly used filter circuits such as RC filter circuits and LC filter circuits, which can sufficiently remove interference signals. It should be noted that, if it is required to filter out the direct current part in the signal, a capacitor can be additionally arranged between the first input end of the amplifier (U2) and the first end of the first resistor (R1), and a capacitor can be additionally arranged at the output end of the amplifier (U2), so as to sufficiently filter out the direct current signal in the circuit through the two capacitors.

[0035] In an embodiment, the processor 130 samples the signal output by the analog comparator through a binary search successive approximation sampling mode. Through the binary search successive approximation sampling and the above-described device, adaptive adjustment can be performed in the sampling process, thereby improving the adaptability of the sampling.

[0036] In an embodiment, in order to facilitate the reading of the sampling data, the adaptive power sampling device 100 further comprises a memory and a display connected with the processor 130.

[0037] In an embodiment, the adaptive power sampling device 100 further comprises a plurality of types of communication interfaces connected with the processor 130. Exemplarily, the communication interfaces can comprise RS485 interfaces, RS232 communication interfaces, USB communication interfaces and the like. Through the set communication interfaces, data interaction with external devices can be facilitated, and various use requirements can be met.

[0038] In an embodiment, the power supply module 120 comprises a power supply input interface; and a DC / DC converter connected with the power supply input interface. Through the set power supply module 120, the power supply requirements of different components can be met.

[0039] In an embodiment, the present application further provides an adaptive power sampling system for a pulsed radio frequency power supply, which comprises the above-described adaptive power sampling device 100 and a background monitoring terminal connected with the adaptive power sampling device 100.

[0040] Please refer toFigure 2 , Figure 2 A flowchart of an adaptive power sampling method for a pulsed RF power supply is provided.

[0041] In one embodiment, the adaptive power sampling method for a pulsed RF power supply is provided to preprocess the output Vin of the circuit to the non-inverting input of the first analog comparator (U1A), and the output Vdac of the first D / A converter to the inverting input of the first analog comparator (U1A), as an example, and the specific content is described as follows.

[0042] S1. The processor sets the output voltage of the first D / A converter to half of the current remaining bit digital quantity from the highest bit of the digital quantity required by the processor, and inputs the second input of the first analog comparator;

[0043] S2. The first analog comparator compares the voltage Vin input to the first input with the voltage Vdac input to the second input, and sends the comparison result to the processor;

[0044] S3. The processor determines the output state corresponding to each bit of the digital quantity in turn according to the comparison result; wherein if Vin>Vdac, the highest bit is 1; if VinVdac, the highest bit is 0;

[0045] S4. When the lowest bit of the digital quantity is determined, the processor restores the output according to the final output to obtain the final sampling result.

[0046] In the above implementation process, as long as the input signal is higher than the comparison reference voltage (the comparison reference voltage is in the inverting input) or lower than the comparison reference voltage (the comparison reference voltage is in the non-inverting input), the first analog comparator (U1A) will generate a logic high level output, and the processor can determine the pulse peak amplitude by adjusting the output of the first D / A converter. When the comparison reference voltage is exceeded, the processor can capture the output state change of the first analog comparator (U1A).

[0047] Specifically, taking an 8-bit D / A converter as an example, the output Vin of the preprocessing circuit is input to the non-inverting input of the first analog comparator (U1A), and the output Vdac of the first D / A converter is input to the inverting input of the first analog comparator (U1A), and the conversion process is as follows:

[0048] The processor first sets the output voltage of the D / A converter to half of the 8-bit digital quantity, i.e. 10000000B;

[0049] If Vin>Vdac, the first analog comparator outputs a logic high level, and the processor sets the highest bit bit7 of the digital quantity to 1; if VinVdac, the first analog comparator outputs a logic low level, and the processor sets bit7 to 0; thus the highest bit is determined;

[0050] Next, the second highest bit is determined, and the processor sets the output voltage of the D / A converter to half of the low 7 bits, i.e. y1000000B (y is the determined bit);

[0051] If Vin>Vdac, the first analog comparator outputs a logic high level, and the processor sets the second highest bit bit6 of the digital quantity to 1; if VinVdac, the first analog comparator outputs a logic low level, and the processor sets bit6 to 0; thus the second highest bit is determined;

[0052] Next, bit5 is determined, and the processor sets the output voltage of the D / A converter to half of the low 6 bits, i.e. yy100000B (y is the determined bit);

[0053] If Vin>Vdac, the first analog comparator outputs a logic high level, and the processor sets bit5 of the digital quantity to 1; if VinVdac, the first analog comparator outputs a logic low level, and the processor sets bit5 to 0; thus bit5 is determined;

[0054] By analogy, until the processor determines the lowest bit bit0 of the digital quantity.

[0055] After the above operation is completed, the conversion is completed; the processor restores the obtained 8-bit digital quantity to a voltage value according to the reference voltage of the D / A converter, i.e. the sampling result.

[0056] In an embodiment, the above method further comprises: during the sampling process, the processor acquires a pulse synchronization signal through the reference signal generation module 140 and the second analog comparator (U1B), and analyzes the pulse width and the duty cycle value of the pulse synchronization signal, and adjusts the sampling strategy according to the pulse width and the duty cycle.

[0057] Specifically, as long as the input signal is higher (when the comparison reference voltage is at the inverting input terminal) or lower (when the comparison reference voltage is at the non-inverting input terminal) than the comparison reference voltage, the first analog comparator generates a logic high level output, triggers the interrupt capture subroutine of the processor, and obtains the pulse width and duty cycle effective value of the pulse sampling signal. In addition, the sampling strategy can be divided into: when the pulse synchronization signal pulse width is wide or the repetition frequency is high, the blocking background running sampling method is adopted; when the pulse synchronization signal pulse width is narrow or the repetition frequency is small, the non-blocking foreground running sampling method is adopted. Different strategies are used for adaptive sampling, which improves the sampling efficiency and achieves adaptability and balance of sampling efficiency in a large range of pulse width and repetition frequency.

[0058] To sum up, the embodiment of the present application provides an adaptive power sampling device and system for a pulse radio frequency power supply, which comprises a signal input port, a power supply module, a sampling pre-processing circuit, a first analog comparator, a processor and a first D / A converter. The sampling pre-processing circuit is connected with the signal input port and is used for filtering and amplifying the input signal. The first input terminal of the first analog comparator is connected with the output terminal of the pre-processing circuit. The output terminal of the first analog comparator is connected with the processor. The input terminal of the first D / A converter is connected with the processor. The output terminal of the first D / A converter is connected with the second input terminal of the first analog comparator. The processor adopts a dichotomy search successive approximation sampling method, generates a digital comparison reference signal through the first D / A converter and inputs the second input terminal of the first analog comparator. The first analog comparator compares the sampling signal input through the first input terminal with the digital comparison reference signal and inputs the comparison result to the processor to determine the output state and obtain the corresponding sampling result. The power supply module is used for supplying power to the elements in the first analog comparator, the processor, the first D / A converter and the sampling pre-processing circuit. In this way, the size, power consumption and cost of the sampling device are reduced.

[0059] The above is only a specific embodiment of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An adaptive power sampling device for a pulsed radio frequency power supply, characterized in that: It includes a signal input port, a power supply module, a sampling pre-processing circuit, a first analog comparator, a processor and a first D / A converter; The sampling preprocessing circuit is connected to the signal input port and is used to filter and amplify the input signal; the first input end of the first analog comparator is connected to the output end of the preprocessing circuit; the output end of the first analog comparator is connected to the processor; The input end of the first D / A converter is connected to the processor; the output end of the first D / A converter is connected to the second input end of the first analog comparator; the processor uses a binary search successive approximation sampling method to generate a digital comparison reference signal through the first D / A converter and input it into the second input end of the first analog comparator; the first analog comparator compares the sampling signal input from its first input end with the digital comparison reference signal, and inputs the comparison result into the processor to determine the output state and obtain the corresponding sampling result; the power supply module is used to power the first analog comparator, the processor, the first D / A converter and the components in the sampling preprocessing circuit.

2. The adaptive power sampling device according to claim 1, wherein: The adaptive power sampling device further includes a second analog comparator and a reference signal generating module; the first input terminal of the second analog comparator is connected to the output terminal of the preprocessing circuit; the output terminal of the second analog comparator is connected to the processor; The input end of the reference signal generating module is connected to the processor; The output end of the reference signal generation module is connected to the second input end of the second analog comparator; the processor obtains the pulse synchronization signal through the second analog comparator and the reference signal generation module, and analyzes the pulse width and duty cycle value of the pulse synchronization signal, and adjusts the sampling strategy according to the pulse width and the duty cycle value.

3. The adaptive power sampling device according to claim 2, wherein: The reference signal generating module is any one of a D / A converter, a potentiometer or a voltage divider resistor.

4. The adaptive power sampling device according to claim 1, wherein: The sampling preprocessing circuit includes a first resistor, a second resistor, an amplifier and a filter circuit; the first end of the first resistor is connected to the signal input port; the first input end of the amplifier and the first end of the second resistor are both connected to the second end of the first resistor; the second end of the second resistor is grounded; the output end of the amplifier is connected to the second input end of the amplifier; the first end of the filter circuit is connected to the output end of the amplifier; and the second end of the filter circuit is connected to the first input end of the first analog comparator.

5. The adaptive power sampling device according to claim 1, wherein: The processor samples the signal output by the analog comparator by using a binary search successive approximation sampling method.

6. The adaptive power sampling device according to claim 1, wherein: The adaptive power sampling device further includes a memory and a display connected to the processor.

7. The adaptive power sampling device according to claim 1, wherein: The adaptive power sampling device further includes various types of communication interfaces connected to the processor.

8. The adaptive power sampling device according to claim 1, wherein: The power supply module includes a power input interface; and a DC / DC converter connected to the power input interface.

9. An adaptive power sampling method for a pulsed radio frequency power supply, applied to the adaptive power sampling device according to any one of claims 1 to 8, comprising: Starting from the most significant bit of the digital quantity to be output by the processor, the output voltage of the first D / A converter is set by the processor to half of the current remaining digital quantity, and inputted into the second input terminal of the first analog comparator; The first analog comparator compares the voltage Vin inputted at the first input terminal with the voltage Vdac inputted at the second input terminal, and sends the comparison result to the processor; The processor determines the output state corresponding to each bit of the digital quantity in sequence according to the comparison result; wherein, if Vin>Vdac, the highest bit is 1; If Vin<Vdac, the highest bit is 0; After the least significant bit of the digital quantity is determined, the processor restores the final output to a voltage value according to the reference voltage of the first D / A converter to obtain a final sampling result.

10. The method according to claim 9, characterized in that The method further comprises: During the sampling process, the processor obtains the pulse synchronization signal through the reference signal generation module and the second analog comparator, analyzes the pulse width and duty cycle value of the pulse synchronization signal, and adjusts the sampling strategy according to the pulse width and the duty cycle value.

Images