A data transmission method and apparatus

Abstract

The application discloses a data transmission method and device, first, the DSP on-chip data area in the soul core processor is used to acquire the to-be-transmitted data length from the nonvolatile memory, then the to-be-transmitted data with the to-be-transmitted data length is extracted from the nonvolatile memory, and finally the transmission data is sent to the volatile memory or the DSP on-chip code storage area in the DSP processor. The method introduces the DSP on-chip data area in the soul core processor, not only can solve the problem that the existing soul core processor cannot self-start due to the fact that the code storage area cannot directly transmit data by guiding the to-be-transmitted data into the DSP on-chip code storage area, but also can guide the transmission data into the volatile memory to speed up the processing of the to-be-transmitted data, and the two can jointly realize the data mutual transmission function of the full area space of the soul core processor.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of data transmission, in particular to a data transmission method and device. BACKGROUND

[0002] A digital signal processor (DSP) is an embedded microprocessor chip often used in electronic devices, commonly used in system control and digital signal processing field, characterized by high clock frequency, fast operation speed, strong operation ability, widely used in military electronic field such as radar, electronic countermeasure and civil field such as audio and video, image. With the continuous development of chip technology, in order to consider the balance of performance and resource power consumption, based on digital signal processor, soul core HXDSP1041 emerges as the times require, which is designed by the thirty-eighth institute of China Electronics Technology Group Corporation, can complete 100 billion floating point operation in one second, the single core performance is 4 times higher than the performance of the same kind of chip on the current international market, and is successfully applied in early warning machine radar and other national defense scientific equipment, and becomes the first high-end independent digital signal processor widely used in national defense scientific equipment in China.

[0003] Due to the obvious difference between soul core HXDSP1041 and traditional digital signal processor in data transmission, the traditional digital signal processor can directly transmit data from the nonvolatile memory to the volatile memory or the internal DSP on-chip code storage area, but the nonvolatile memory connected to the soul core HXDSP1041 cannot directly transmit data to the internal DSP on-chip code storage area or the external volatile memory. Due to this defect, the off-line running program cannot be automatically started, which leads to the fact that the function of mutual transmission of all region data of the chip cannot be realized, thus greatly affecting the application of soul core HXDSP1041. SUMMARY

[0004] The present application aims at overcoming the shortcomings of the prior art, and provides a data transmission method and device, which solves the problems mentioned in the background.

[0005] The present application achieves the above-mentioned purpose by the following technical solutions:

[0006] In a first aspect, the present application provides a data transmission method applied to a DSP on-chip data area of a soul core processor, wherein the DSP on-chip data area is electrically connected with a nonvolatile memory, a volatile memory and a DSP on-chip code storage area respectively, and the method comprises the following steps:

[0007] Obtaining the length of to-be-transmitted data from the nonvolatile memory;

[0008] Extracting corresponding to-be-transmitted data according to the length of to-be-transmitted data;

[0009] send the to-be-transmitted data to the volatile memory, and / or the kernel program segment region.

[0010] Further, the step of extracting corresponding to-be-transmitted data according to the to-be-transmitted data length comprises:

[0011] judging whether the to-be-transmitted data length is greater than a preset data length;

[0012] if greater, extracting to-be-transmitted data of the preset data length;

[0013] if not greater, extracting to-be-transmitted data of the to-be-transmitted data length.

[0014] Further, after the step of sending the to-be-transmitted data to the volatile memory, and / or the kernel program segment region, the method further comprises:

[0015] if the remaining data length is greater than a preset data length, extracting to-be-transmitted data of the preset data length and sending the to-be-transmitted data to the volatile memory, and / or the kernel program segment region, until the remaining length is equal to 0, wherein the remaining length is the difference between the to-be-transmitted data length and the preset data length.

[0016] Further, the step of extracting corresponding to-be-transmitted data according to the to-be-transmitted data length further comprises:

[0017] extracting corresponding to-be-transmitted data according to the to-be-transmitted data length by a direct memory access (DMA) mode.

[0018] In a second aspect, an embodiment of the present application further provides a data transmission device, which is applied to a DSP in-die data area of a soul core processor, the DSP in-die data area is electrically connected with a non-volatile memory, a volatile memory and a DSP in-die code storage area respectively, and the device comprises:

[0019] a data length obtaining module, configured to obtain a to-be-transmitted data length from the non-volatile memory;

[0020] a first extracting module, configured to extract corresponding to-be-transmitted data according to the to-be-transmitted data length;

[0021] a data transmission module, configured to send the to-be-transmitted data to the volatile memory, and / or the DSP in-die code storage area.

[0022] Further, the first extracting module comprises:

[0023] A judging sub-module is configured to judge whether the length of the data to be transmitted is greater than a preset data length.

[0024] A extracting sub-module is configured to extract the data to be transmitted with the preset data length if the length of the data to be transmitted is greater than the preset data length.

[0025] If the length of the data to be transmitted is not greater than the preset data length, the extracting sub-module is configured to extract the data to be transmitted with the length of the data to be transmitted.

[0026] Further, the device further comprises:

[0027] A second extracting module is configured to, if the remaining data length is greater than the preset data length, extract the data to be transmitted with the preset data length and send the data to be transmitted to the volatile memory and / or the code storage area in the DSP in the DSP, until the remaining length is equal to 0, wherein the remaining length is the difference between the length of the data to be transmitted and the preset data length.

[0028] Further, the first extracting module further comprises:

[0029] A first extracting sub-module is configured to extract the corresponding data to be transmitted by a direct memory access (DMA) mode according to the length of the data to be transmitted.

[0030] The embodiment of the present application proposes a data transmission method, which first acquires the length of the data to be transmitted from the non-volatile memory by using the in-DSP data area in the soul core processor, then extracts the data to be transmitted with the length of the data to be transmitted from the non-volatile memory, and finally sends the transmission data to the volatile memory or the code storage area in the DSP in the DSP processor. The method introduces the in-DSP data area of the soul core processor, not only solves the problem that the existing soul core processor cannot be self-started due to the code storage area that cannot directly transmit data, but also can import the transmission data into the volatile memory to speed up the processing of the data to be transmitted, and both of them realize the data inter-transmission function of the full area space of the soul core processor.

[0031] The foregoing main scheme of the present application and each further selected scheme thereof can be freely combined to form multiple schemes, all of which are the schemes that can be adopted and claimed by the present application; and the present application can also be freely combined between (each non-conflict selection) selections and other selections. Those skilled in the art can understand that there are multiple combinations according to the existing technology and common knowledge after understanding the scheme of the present application, all of which are the technical schemes claimed by the present application, and here is not exhaustive. BRIEF DESCRIPTION OF DRAWINGS

[0032] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly introduced as follows. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be regarded as a limitation on the scope, and for those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0033] Figure 1 An application scenario of the data transmission method provided by the embodiments of the present application is shown.

[0034] Figure 2 A flowchart of the data transmission method provided by the embodiments of the present application is shown.

[0035] Figure 3 A flowchart of step S120 in the data transmission method provided by the embodiments of the present application is shown.

[0036] Figure 4 Another flowchart of the data transmission method provided by the embodiments of the present application is shown.

[0037] Figure 5 A structural diagram of the data transmission device provided by the embodiments of the present application is shown.

[0038] Figure: 10-DSP on-chip data area; 20-nonvolatile memory; 30-volatile memory; 40-DSP on-chip code storage area; 100-data transmission device; 101-data length acquisition module; 102-first extraction module; 103-data transmission module. DETAILED DESCRIPTION

[0039] The technical solutions in the embodiments of the present application will be described clearly and completely in the embodiments of the present application in combination with the drawings. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. The components of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations.

[0040] Therefore, the detailed description of the embodiments of the present application provided in the drawings below is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of the present application.

[0041] Digital signal processor (DSP) is an embedded microprocessor chip often used in electronic devices, commonly used in system control and digital signal processing field, its characteristics are high clock frequency, fast operation speed, and soul core is a 32-bit floating point military grade digital signal processor based on DSP, which is a full independent architecture design. In the application of traditional digital signal processor, the execution code is burned into the code storage, and after power on, it can be automatically loaded and run. Since the processor needs to expand the function in the application process, but the code storage space in the DSP chip is limited due to the limitation of the code capacity of the DSP chip, so the code exceeding the capacity of the DSP chip cannot run normally, therefore, the code needs to be put into the nonvolatile memory connected with the parallel port, which can be automatically loaded and run after power on of the chip. However, the nonvolatile memory connected with the soul core cannot directly transmit data with the internal DSP on-chip code storage area. Due to this defect, the off-line running program cannot be automatically started, and the nonvolatile memory connected with the soul core cannot directly transmit data with the volatile memory connected with the soul core, which leads to the failure of the function of transmitting data in the whole area, thus greatly affecting the application of the soul core.

[0042] In order to solve the above problems, the embodiment of the present application provides a data transmission method, which can not only solve the problem that the off-line running program cannot be automatically started, but also realize the function of transmitting data in the whole area. The specific implementation process of the data transmission method is described in detail as follows.

[0043] Please refer to Figure 1 , Figure 1 An application scenario of the data transmission method provided by the embodiment of the present application is shown. It includes a DSP on-chip data area, a nonvolatile memory, a volatile memory and a DSP on-chip code storage area. The DSP on-chip data area is connected with the nonvolatile memory and the volatile memory through parallel port, and the DSP on-chip data area and the DSP on-chip code storage area belong to the DSP processor, which is the internal connection of the DSP chip.

[0044] The DSP on-chip data area is the area for storing data in the DSP processor, and the DSP chip where the DSP on-chip data area is located integrates 6 pairs of high-speed Serdes interface and supports RapidIO, PCIe, Ethernet (gigabit) and JESD204B protocols. The DSP on-chip data area is used to request the length of the to-be-transmitted data from the externally connected nonvolatile memory, and to extract the corresponding to-be-transmitted data according to the length of the to-be-transmitted data and send it to the DSP on-chip code storage area or the volatile memory outside the DSP.

[0045] The non-volatile memory can be, but is not limited to, a programmable read-only memory (PROM), an electrically alterable read-only memory (EAROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory, and the like, which internally stores data required for self-starting of the chip, and is used to send the data length to be transmitted to a DSP in-die data area in the DSP processor, so that the DSP in-die data area can extract the data to be transmitted of the corresponding length according to the data length to be transmitted.

[0046] The volatile memory is a RAM memory, which can be, but is not limited to, a dynamic random access memory (DRAM) and a static random access memory (SRAM), and can store data, programs and operation results, and can directly exchange information with the CPU, and is used to receive the data to be transmitted sent from the DSP in-die data area.

[0047] The DSP in-die code storage area is an area for storing codes in the DSP processor, which can store all or part of the code segments required for self-starting of the chip, and is used to receive the data to be transmitted sent from the DSP in-die data area.

[0048] Next, please refer to Figure 2 , Figure 2 A flowchart of a data transmission method provided by an embodiment of the present application is shown. The data transmission method is applied to a DSP in-die data area of a soul core processor, and includes the following steps:

[0049] In step S110, the data length to be transmitted is obtained from the non-volatile memory.

[0050] Before obtaining the data length to be transmitted, the soul core processor must be closed first to start the program space protection function, and the purpose is to avoid the protected program being erased by the misoperation, and the specific steps are to set the register from the third BIT bit of the low bit to 1 to complete the closing of the program space protection function. After the system is powered on, the DSP in-die data area obtains the data length to be transmitted of the data required for self-starting of the chip or needing to be transmitted to the volatile memory from the non-volatile memory externally connected.

[0051] In step S120, the corresponding data to be transmitted is extracted according to the data length to be transmitted.

[0052] In step S130, the data to be transmitted is sent to the volatile memory and / or the DSP in-die code storage area.

[0053] The data to be transmitted can be an execution code or data required for running of the processor, and the embodiment of the present application is not limited thereto.

[0054] The DSP on-chip data area extracts the to-be-transmitted data of the to-be-transmitted data length from the non-volatile memory, and can send the data to the external volatile memory, or send the data to the DSP on-chip code storage area, or send the data to both the volatile memory and the DSP on-chip code storage area. Since the chip needs to be self-started, when the chip needs to execute code during self-starting, the to-be-transmitted data is the DSP program, and the DSP on-chip data area sends the to-be-executed code from the non-volatile memory to the DSP on-chip code storage area.

[0055] The volatile memory also has the characteristic of fast execution speed, so that the to-be-transmitted data is sent to the volatile memory through the DSP on-chip data area for execution, which can improve the running efficiency of the processor and ensure the data intercommunication function of the full-area time domain space of the chip.

[0056] On the basis of Figure 1 , refer to Figure 3 , Figure 3 Fig. 2 shows a flowchart of step S120 in the data transmission method provided by the embodiment of the present application. Step S120 will be described in detail as follows, and step S120 can include the following steps:

[0057] Step S121: judging whether the to-be-transmitted data length is greater than a preset data length.

[0058] Step S122: if yes, extracting to-be-transmitted data of the preset data length.

[0059] Step S123: if no, extracting to-be-transmitted data of the to-be-transmitted data length.

[0060] The preset data length can be set according to hardware conditions or according to the required data length, and the embodiment of the present application does not make any limitation on this. In a possible implementation manner, the preset data length is set as 0x40000 bytes, if the received to-be-transmitted data length is 0x20000 bytes, which is not greater than 0x40000 bytes, 0x20000 bytes of to-be-transmitted data is extracted first, if the received to-be-transmitted data length is 0x60000 bytes, which is greater than 0x40000 bytes, 0x40000 bytes of to-be-transmitted data is extracted first, and the remaining to-be-transmitted data is extracted only after the transmission of 0x40000 bytes of to-be-transmitted data is completed.

[0061] After judging the size of the to-be-transmitted data length and the preset data length, the remaining to-be-transmitted data is processed, refer to Figure 4 , Figure 4 Fig. 3 shows another flowchart of the data transmission method provided by the embodiment of the present application.

[0062] Step S140, in the presence of the remaining data length, if the remaining data length is greater than the preset data length, the preset data length of the to-be-transmitted data is extracted and sent to the volatile memory and / or the code storage area in the DSP chip until the remaining length is equal to 0, wherein the remaining length is the difference between the to-be-transmitted data length and the preset data length.

[0063] The remaining length is the difference between the to-be-transmitted data length and the preset data length, that is, the remaining data length after the to-be-transmitted data of the to-be-transmitted data length is extracted in the case that the to-be-transmitted data length is greater than the preset data length, and then step S121 is executed, but the judgment of the to-be-transmitted data length and the preset data length is replaced by the judgment of the remaining length and the preset data length, and the execution steps after the judgment are basically the same as the principles of steps S122 and S123, and will not be described here. When the remaining length is equal to 0, the program space protection function is opened.

[0064] Further, the corresponding to-be-transmitted data is extracted by a direct memory access (DMA) mode according to the to-be-transmitted data length.

[0065] Specifically, the direct memory access (Direct Memory Access, DMA) mode needs to be configured with parameters, each instruction occupies an instruction execution line, and each instruction execution line consumes 1 clock cycle. The specific steps of extracting the to-be-transmitted data of the to-be-transmitted data length by the mode are as follows:

[0066] Configure the DMA parameters: set the source X dimension length and the target X dimension length to be the to-be-transmitted data length, pad 16 bytes when the to-be-transmitted data length is less than 16 bytes, set the target Y dimension length to be 0, the target start address to be the source address, the target X dimension step to be 1, the source Y dimension length to be 1, the source Y dimension step to be 1, and set the DMA transmission mode control to be 0x200 and the DMA transmission enable to be 1.

[0067] Next, it is inquired whether the first BIT bit of the register HDMA_STAR from the lowest bit is 0. If it is not 0, it indicates that the data transmission by the DMA mode has been completed.

[0068] Compared with the prior art, the embodiment of the present application has the following beneficial effects:

[0069] First, not only the problem that the DSP code storage area in the soul core processor cannot directly transmit data with the non-volatile memory to cause the self-starting problem is solved, but also the transmission data can be imported into the volatile memory to improve the running efficiency of the processor, and the data intercommunication function of the full area space of the soul core processor is realized.

[0070] Secondly, the application does not need to change the original hardware design of the soul core processor, but uses the internal data space to realize the data intercommunication function of the whole area space, which greatly reduces the design cost of the chip.

[0071] To implement the above method embodiments and respective steps in various possible implementations, an implementation of a data transmission device is given below. Figure 5 , Figure 5 A block diagram of the data transmission device provided by the embodiment of the application is shown. The data transmission device is applied to a data area in a DSP chip, and comprises a data length acquisition module, a first extraction module and a data transmission module.

[0072] The data length acquisition module is configured to acquire the data length to be transmitted from a non-volatile memory.

[0073] The first extraction module is configured to extract the corresponding data to be transmitted according to the data length to be transmitted.

[0074] The data transmission module is configured to send the data to be transmitted to a volatile memory and / or a code storage area in the DSP chip.

[0075] Optionally, the first extraction module comprises:

[0076] The judgment sub-module is configured to judge whether the data length to be transmitted is greater than a preset data length.

[0077] The extraction sub-module is configured to extract the data to be transmitted of the preset data length if the data length to be transmitted is greater than the preset data length.

[0078] The extraction sub-module is configured to extract the data to be transmitted of the data length to be transmitted if the data length to be transmitted is not greater than the preset data length.

[0079] The data transmission device further comprises:

[0080] The second extraction module is configured to, in the case that there is a remaining data length, extract the data to be transmitted of the preset data length and send the data to be transmitted to the volatile memory and / or the code storage area in the DSP chip if the remaining data length is greater than the preset data length, until the remaining length is equal to 0, wherein the remaining length is the difference between the data length to be transmitted and the preset data length.

[0081] The first extraction module further comprises:

[0082] The first extraction sub-module is configured to extract the corresponding data to be transmitted by a direct memory access (DMA) mode according to the data length to be transmitted.

[0083] To sum up, the embodiment of the present application proposes a data transmission method, first, using the DSP on-chip data area in the DSP processor to obtain the data length to be transmitted from the non-volatile memory, then extracting the data to be transmitted with the data length to be transmitted from the non-volatile memory, and finally sending the transmission data to the volatile memory or the DSP on-chip code storage area in the DSP processor. The method introduces the DSP on-chip data area, not only can the data to be transmitted be introduced into the DSP on-chip code storage area to solve the problem that the existing soul core processor cannot be self-started due to the code storage area cannot directly transmit data, but also can the transmission data be introduced into the volatile memory to speed up the processing of the data to be transmitted, and both of them can realize the data inter-transmission function of the full area space of the soul core processor.

[0084] The above merely describes preferred embodiments of the present application and is not intended to limit the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A data transmission method, characterized by, The application is applied to a DSP on-chip data area of a soul core processor, the DSP on-chip data area is electrically connected with a non-volatile memory, a volatile memory and a DSP on-chip code storage area respectively, and the method comprises the following steps: acquiring a to-be-transmitted data length from the non-volatile memory; extracting corresponding to-be-transmitted data according to the to-be-transmitted data length; sending the to-be-transmitted data to the volatile memory and / or the DSP on-chip code storage area.

2. The data transmission method of claim 1, wherein, The step of extracting corresponding to-be-transmitted data according to the to-be-transmitted data length comprises the following steps: judging whether the to-be-transmitted data length is greater than a preset data length; if yes, extracting to-be-transmitted data of the preset data length; if no, extracting to-be-transmitted data of the to-be-transmitted data length.

3. The data transmission method of claim 2, wherein, After the step of sending the to-be-transmitted data to the volatile memory and / or the DSP on-chip code storage area, the method further comprises the following steps: if there is a remaining data length and the remaining data length is greater than a preset data length, extracting to-be-transmitted data of the preset data length and sending the to-be-transmitted data to the volatile memory and / or the DSP on-chip code storage area until the remaining data length is equal to 0, wherein the remaining data length is the difference between the to-be-transmitted data length and the preset data length.

4. The data transmission method of claim 1, wherein, The step of extracting corresponding to-be-transmitted data according to the to-be-transmitted data length further comprises the following step: extracting corresponding to-be-transmitted data according to the to-be-transmitted data length by a direct memory access (DMA) mode.

5. A data transmission apparatus characterized by comprising: The device is applied to a DSP on-chip data area of a soul core processor, the DSP on-chip data area is electrically connected with a non-volatile memory, a volatile memory and a DSP on-chip code storage area respectively, and the device comprises the following parts: a data length acquisition module, configured to acquire a to-be-transmitted data length from the non-volatile memory; a first extraction module, configured to extract corresponding to-be-transmitted data according to the to-be-transmitted data length; a data transmission module, configured to send the to-be-transmitted data to the volatile memory and / or the DSP on-chip code storage area.

6. The data transmission apparatus of claim 5, wherein The first extraction module comprises the following parts: a judgment sub-module, configured to judge whether the to-be-transmitted data length is greater than a preset data length; an extraction sub-module, configured to, if yes, extract to-be-transmitted data of the preset data length; if no, extract to-be-transmitted data of the to-be-transmitted data length.

7. The data transmission apparatus of claim 6, wherein The device further comprises the following part: a second extraction module, configured to, if there is a remaining data length and the remaining data length is greater than a preset data length, extract to-be-transmitted data of the preset data length and send the to-be-transmitted data to the volatile memory and / or the DSP on-chip code storage area until the remaining data length is equal to 0, wherein the remaining data length is the difference between the to-be-transmitted data length and the preset data length.

8. The data transmission apparatus of claim 5, wherein, The first extraction module further comprises the following part: a first extraction sub-module, configured to extract corresponding to-be-transmitted data according to the to-be-transmitted data length by a direct memory access (DMA) mode.

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