Bandgap voltage reference circuit
By employing bipolar junction transistors and current mirroring technology in CMOS processes for linear and curvature compensation, a temperature-independent reference voltage is generated, solving the temperature drift problem of bandgap voltage references in CMOS processes and achieving high-temperature stability of the reference voltage.
Patent Information
- Application Number
- CN202211274522.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-10-18
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2042-10-18
AI Technical Summary
The bandgap voltage reference under CMOS technology suffers from temperature drift. Existing technologies have failed to effectively compensate for curvature, resulting in significant temperature drift.
A bipolar junction transistor is used to generate a current with a positive temperature coefficient, and linearity and curvature compensation are performed through current branch and current mirror technology to generate a temperature-independent reference voltage.
It effectively reduced the temperature drift of the reference voltage from 9.3mV to 0.9mV, significantly improving temperature stability.
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Figure CN115599158B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of switching power supply, in particular to a bandgap voltage reference circuit. BACKGROUND
[0002] The voltage reference is an important module of a circuit system, which establishes an output voltage that is maintained constant under the changes of process, power voltage and environmental temperature (PVT) for the rest of the circuit modules, and is one of indispensable chips of the circuit system, and is widely applied. The bandgap voltage reference refers to a voltage reference with an output voltage close to the bandgap voltage of silicon, and the bandgap voltage of silicon is the bandgap voltage of silicon semiconductor material at 0K temperature, which is generally 1.17V. The bandgap voltage reference is generated by a BJT (Bipolar Junction Transistor, bipolar junction transistor). Due to the low common emitter amplification β of the BJT in the CMOS process, the BJT generates a large nonlinear error, which leads to a poor temperature drift of the bandgap voltage reference in the CMOS process compared with the bandgap voltage reference in the bipolar process. In addition, in the CMOS process, an operational amplifier is used to control the PNP tube of the bandgap reference core to generate a PTAT (Proportional to Absolute Temperature, proportional to absolute temperature) voltage, which again amplifies the error caused by the offset voltage of the operational amplifier, and further deteriorates the temperature drift of the bandgap voltage reference.
[0003] In order to solve the above problems, the prior art uses an NPN tube with a larger β relative to the PNP tube to reduce the error of β (β is the common emitter amplification of the transistor); and in order to avoid the influence of the offset voltage of the operational amplifier, a current mirror is used to generate the bandgap voltage reference. However, this method only compensates for the linear part of the base-emitter voltage V BE of the transistor, and does not compensate for the nonlinear term of the base-emitter voltage V BE of the transistor, that is, no curvature compensation is performed.
[0004] Therefore, a new bandgap voltage reference circuit needs to be proposed to solve the above problems. SUMMARY
[0005] In view of the above problems, the purpose of the present application is to provide a bandgap voltage reference circuit, which can perform curvature compensation on the reference voltage, thereby effectively reducing the temperature drift of the reference voltage.
[0006] According to an aspect of the present application, there is provided a bandgap voltage reference circuit, comprising a bandgap core module for generating a first current and a second current with positive temperature coefficient by using bipolar junction transistors; a current bias module for providing a bias current to the bandgap core module; and a reference voltage output module comprising a first current branch and a negative temperature coefficient voltage generation module connected in sequence, the first current branch being used for copying the second current, the reference voltage output module outputting a temperature-independent reference voltage by compensating a negative temperature coefficient voltage generated by the negative temperature coefficient voltage generation module using the second current, wherein the reference voltage output module further comprises a second current branch connected in parallel with the first current branch, the second current branch providing a first compensation current to an output node of the reference voltage by mirroring the second current, so as to eliminate the influence of common emitter amplification of the bipolar junction transistors.
[0007] Optionally, the reference voltage output module further comprises a third current branch connected in parallel with the first current branch, the third current branch providing a second compensation current to the output node by mirroring the bias current, so as to compensate a nonlinear part in the negative temperature coefficient voltage.
[0008] Optionally, the second current wherein Iptat is the first current, and β is the common emitter amplification of the bipolar junction transistor.
[0009] Optionally, the first compensation current I2 = 11 / β, wherein I1 is the second current, and β is the common emitter amplification of the bipolar junction transistor.
[0010] Optionally, the bias current wherein Iptat is the first current, and β is the common emitter amplification of the bipolar junction transistor.
[0011] Optionally, the second compensation current I3 = (x*I4) / β, wherein x is a mirroring ratio of the third current branch mirroring the bias current, I4 is the bias current, and β is the common emitter amplification of the bipolar junction transistor.
[0012] Optionally, the second current branch comprises a ninth transistor, a first end of which is connected to a power supply, and a control end of which is connected to the bandgap core module, for mirroring the second current and outputting; a current processing module, a first end of which is connected to a second end of the ninth transistor, and a second end of which is connected to the negative temperature coefficient voltage generation module, for generating the first compensation current according to an output current of the ninth transistor.
[0013] Optionally, the third current branch comprises a thirteenth transistor, a first end of which is connected to a power supply, a control end of which is connected to the current biasing module, and an output end of which is used for mirroring the biasing current and outputting; and a current processing module, an input end of which is connected to a second end of the thirteenth transistor, and an output end of which is connected to the negative temperature coefficient voltage generating module, and which is used for generating the second compensation current according to an output current of the thirteenth transistor.
[0014] Optionally, the second current branch and the third current branch share the current processing module.
[0015] Optionally, the current processing module comprises a fourth transistor, a first end of which is connected to the second end of the ninth transistor and the second end of the thirteenth transistor, and a second end of which is connected to ground; a tenth transistor, a first end of which is connected to a power supply, and a second end of which is connected to a control end; an eleventh transistor, a first end of which is connected to the second end of the tenth transistor, a control end of which is connected to the first end of the fourth transistor, and a second end of which is connected to the control end of the fourth transistor; and a twelfth transistor, a first end of which is connected to a power supply, a control end of which is connected to the control end of the tenth transistor, and a second end of which is connected to the negative temperature coefficient voltage generating module.
[0016] Optionally, the fourth transistor is an NPN transistor.
[0017] Optionally, the eleventh transistor is an NMOS transistor, and the ninth transistor, the tenth transistor, the twelfth transistor and the thirteenth transistor are PMOS transistors.
[0018] The bandgap voltage reference circuit comprises a current biasing module, a bandgap core module and a reference voltage output module, wherein the reference voltage output module comprises a first current branch and a negative temperature coefficient voltage generating module, the first current branch copies a second current generated by the bandgap core module and proportional to temperature, so as to compensate for a negative temperature coefficient voltage generated by the negative temperature coefficient voltage generating module, generate a reference voltage independent of temperature, and the second current branch provides a first compensation current to an output node of the reference voltage by mirroring the second current, so as to eliminate the influence of β on the reference voltage, effectively linearly compensate for the reference voltage, and reduce the temperature drift of the reference voltage.
[0019] In a preferred embodiment, the reference voltage output module further comprises a third current branch, the third current branch mirrors a biasing current generated by the current biasing module to provide a second compensation current to the output node of the reference voltage, and compensates for a nonlinear part of the negative temperature coefficient voltage, so as to curvature-compensate for the reference voltage. BRIEF DESCRIPTION OF DRAWINGS
[0020] The above and other objects, features and advantages of the present application will become more apparent from the following description of embodiments of the present application, taken in conjunction with the accompanying drawings, in which:
[0021] Figure 1 A circuit schematic of a bandgap voltage reference circuit according to the prior art is shown;
[0022] Figure 2 A temperature drift schematic of a bandgap voltage reference according to the prior art is shown;
[0023] Figure 3 A structural schematic of a bandgap voltage reference circuit according to an embodiment of the present application is shown;
[0024] Figure 4 A connection schematic of a reference voltage output module according to an embodiment of the present application is shown;
[0025] Figure 5 A temperature drift schematic of a bandgap voltage reference according to an embodiment of the present application is shown. DETAILED DESCRIPTION
[0026] Various embodiments of the present application will be described in detail with reference to the drawings, wherein like reference numerals represent like parts. The various embodiments of the present application are not drawn to scale, for clarity.
[0027] It should be understood that, in the following description, "circuitry" can include a single or multiple components of hardware, programmable circuitry, state machine circuitry, and / or elements storing instructions for execution by programmable circuitry. When an element or circuitry is referred to as being "connected to" another element, or "connected between" two nodes, it can be directly coupled to the other element or directly connected between the two nodes, or intervening elements can be present. In contrast, when an element is referred to as being "directly coupled to" or "directly connected to" another element, it implies that no intervening elements are present.
[0028] Also, certain terms have been used herein for brevity, clarity and precision in reference to certain embodiments of the application. A person of ordinary skill in the art will appreciate that hardware manufacturers can use terms that are different from those described herein. Terms are therefore not used to define the scope of inventive subject matter, but are merely used to facilitate description of elements of the inventive subject matter.
[0029] Furthermore, it is to be understood that the phraseology or terminology such as "first" and "second" etc. used in this document is only intended to distinguish one entity or operation from another entity or operation, without necessarily requiring or implying any actual such relationship or order between such entities or operations. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the presence of additional identical elements in the process, method, article, or apparatus that comprises the element.
[0030] In this application, a MOS transistor (Metal-Oxide-Semiconductor Field-Effect Transistor) comprises a first terminal, a second terminal and a control terminal, in the on state of the MOS transistor, current flows from the first terminal to the second terminal. The first terminal, the second terminal and the control terminal of a PMOS transistor are source, drain and gate respectively, and the first terminal, the second terminal and the control terminal of an NMOS transistor are drain, source and gate respectively. A transistor (also called a bipolar transistor) comprises a first terminal, a second terminal and a control terminal, in the on state of the transistor, current flows from the first terminal to the second terminal. The first terminal, the second terminal and the control terminal of a PNP transistor are emitter, collector and base respectively, and the first terminal, the second terminal and the control terminal of an NPN transistor are collector, emitter and base respectively.
[0031] Figure 1 A circuit schematic of a bandgap voltage reference circuit according to the prior art is shown as Figure 1 As shown, the bandgap voltage reference circuit 100 comprises a current bias module 110, a bandgap core module 120 and a reference voltage output module 130.
[0032] The bandgap core module 120 comprises a transistor M1, a transistor M2, a transistor Q1, a transistor Q2, a resistor R1 and transistors M6 and M7 for equalizing the collector currents of the transistors Q1 and Q2, the bandgap core module 120 generates a first current Iptat proportional to temperature using the transistors Q1 and Q2,
[0033]
[0034] wherein N represents the ratio of the areas of the emitters of the transistors Q1 and Q2, Vth is the thermal voltage, T is the temperature, k is the Boltzmann constant and q is the electronic charge.
[0035] The current bias module 110 includes transistors M3-M5 for providing bias current to bias the base currents of transistors Q1 and Q2.
[0036] The reference voltage output module 130 includes a negative temperature coefficient voltage generation module 131 and a transistor M8. The negative temperature coefficient voltage generation module 131 includes a transistor Q3 and a resistor R2. The transistor M8 is used to replicate the current on the transistor M7. This current passes through the resistor R2 to generate a PTAT voltage, which corresponds to the negative temperature coefficient voltage V generated by the negative temperature coefficient voltage generation module 131. BE The negative temperature coefficient is offset to provide a reference voltage V at the common node of transistor Q3 and transistor M8. BG2 This generates first-order temperature compensation, thereby providing a bandgap voltage reference.
[0037] The above circuit only works for negative temperature coefficient voltage V BE The linear portion of the voltage V was compensated, but the negative temperature coefficient voltage V was not compensated. BE The nonlinear terms in the circuit are not compensated, meaning no curvature compensation is performed. Furthermore, the current flowing through resistor R2 in the above circuit is equal to the collector current of transistor Q2, which is equal to the first current Iptat across resistor R1. (β is the common emitter amplification factor of the transistor) times. Since the β of the NPN transistor is small, this factor cannot be approximated as 1, resulting in a large error in the first-order temperature compensation.
[0038] Figure 2 A schematic diagram of the temperature drift of the bandgap reference voltage according to the prior art is shown. Figure 2 Chinese V BG1 The curve of the reference voltage without temperature compensation in the existing technology, V BG2 For the adoption of existing technologies Figure 1 The curve of the reference voltage after temperature compensation in the circuit, from Figure 2 It can be seen that the reference voltage V without temperature compensation BG1 The temperature drift is approximately 9.3mV, while the reference voltage V after temperature compensation using existing technology... BG2 The temperature drift is approximately 4.7mV, which is significantly lower than the temperature drift of the reference voltage compared to the circuit without temperature compensation, but a relatively serious temperature drift still exists.
[0039] Figure 3 A schematic diagram of a bandgap voltage reference circuit according to an embodiment of the present invention is shown, as follows: Figure 3 As shown, the present invention provides a bandgap voltage reference circuit 200, including a current bias module 210, a bandgap core module 220, and a reference voltage output module 230.
[0040] The bandgap core module 220 is configured to generate a first current Iptat proportional to temperature using bipolar junction transistors, and the first current Iptat is defined as follows:
[0041]
[0042] wherein N represents the ratio of the areas of the emitters of the transistors Q1 and Q2, is the thermal voltage, T is the temperature, k is the Boltzmann constant, and q is the electronic charge.
[0043] The bandgap core module 220 includes the transistor M6, the transistor M1 and the transistor Q1 connected in sequence between the power supply VDD and the ground, and the transistor M7, the transistor M2, the transistor Q2 and the resistor R1 connected in sequence between the power supply VDD and the ground, wherein the control terminals of the transistor M6 and the transistor M7 are connected, the control terminal of the transistor M7 is also connected to the second terminal thereof, the control terminals of the transistor M1 and the transistor M2 are connected, the control terminal of the transistor M1 is connected to the first terminal, the bases of the transistor Q1 and the transistor Q2 are connected to each other, the first current Iptat flows through the resistor R1, and the transistor M6 and the transistor M7 are configured to ensure that the collector currents of the transistor Q1 and the transistor Q2 are equal.
[0044] The current bias module 210 is configured to provide a bias current I4 to the bandgap core module 220 to bias the base currents of the transistor Q1 and the transistor Q2, and the bias current I4 is defined as follows:
[0045]
[0046] The current bias module 210 includes the transistor M3 and the transistor M4 connected in sequence between the power supply VDD and the ground, and the transistor M5 connected between the power supply VDD and the common node A of the transistor Q1 and the transistor Q2, wherein the control terminals of the transistor M3 and the transistor M5 are connected to each other, the second terminal of the transistor M3 is connected to the control terminal, and the control terminal of the transistor M4 is connected to the first terminal of the transistor M1 at the node B.
[0047] The reference voltage output module 230 includes the first current branch 2311 and the negative temperature coefficient voltage generation module 232 connected in sequence, the first current branch 2311 is configured to copy a second current I1 generated by the bandgap core module 220 according to the first current Iptat, and the reference voltage output module 230 compensates the negative temperature coefficient voltage V BE generated by the negative temperature coefficient voltage generation module 232 by using the second current I1 to output a reference voltage V BG independent of temperature. BG , wherein the intermediate node of the first current branch 2311 and the negative temperature coefficient voltage generation module 232 is the output node of the reference voltage V
[0048] The reference voltage output module 230 further comprises a second current branch 2312 in parallel with the first current branch 2311, the second current branch 2312 providing a first compensation current I2 to the output node by mirroring the second current I1, the first compensation current I2 being given by the following formula: BG
[0049]
[0050] The reference voltage output module 230 further comprises a third current branch 2313 in parallel with the first current branch 2311, the third current branch 2313 providing a second compensation current I3 to the output node by mirroring a bias current I4, the third current branch 2313 having a mirroring ratio of 1 : x with the bias current I4, the second compensation current I3 being given by the following formula:
[0051]
[0052] Due to the non-linear relationship between β and temperature, the second compensation current I3 has a non-linear temperature characteristic, by adjusting the value of x (x is a real number), the non-linear part of the negative temperature coefficient voltage V BE can be compensated, thereby curvature compensation of the reference voltage V BG is performed.
[0053] The temperature characteristic of the base-emitter voltage V BE of the transistor is given by the following formula (1):
[0054]
[0055] where V G0 is the bandgap voltage of silicon at 0K, V Tr is the thermal voltage at a reference temperature Tr, η is a constant related to the process, and the approximately equal sign is the Taylor expansion of the formula after the equal sign, the last two terms represent the first order term (or linear term) and the non-linear term related to temperature, respectively.
[0056] The β itself also has a non-linear characteristic related to temperature, which is given by the following formula (2):
[0057]
[0058] where β ∞ is the maximum common-emitter current gain, ΔE G is the emitter bandgap narrowing coefficient, which is related to the doping level of the emitter.
[0059] The reference voltage V BG obtained by the bandgap voltage reference circuit 200 according to the present application is given by the following formula (3):
[0060]
[0061] wherein the second term is the negative temperature coefficient voltage V BE and the temperature dependent linear term, whose sum with the fifth term can be cancelled by adjusting the ratio of the resistance R1 and the resistance R2, the third term is the negative temperature coefficient voltage V BE and the temperature dependent nonlinear term, whose sum with the fourth term can be cancelled by adjusting the value of the coefficient x, finally resulting in the reference voltage V BG .
[0062] Figure 4 A connection diagram of the reference voltage output module according to an embodiment of the present application is shown. As Figure 4 shown, the reference voltage output module 230 includes transistors M8-M13, triodes Q3-Q4 and a resistance R2, wherein the transistors M10-M12 and the triode Q4 constitute the current processing module 333, and the triode Q3 and the resistance R2 constitute the negative temperature coefficient voltage generating module 332.
[0063] The first current branch 2311 described above includes the transistor M8, the first end of the transistor M8 is connected to the power supply VDD, the control end is connected to the control end of the transistor M7, and the second end is connected to the first end of the triode Q3 in the negative temperature coefficient voltage generating module 332.
[0064] The second current branch 2312 described above includes the transistor M9 and the current processing module 333, the first end of the transistor M9 is connected to the power supply VDD, the control end is connected to the control end of the transistor M7, and the second end is connected to the current processing module 333.
[0065] The third current branch 2313 described above includes the transistor M13 and the current processing module 333, the first end of the transistor M13 is connected to the power supply VDD, the control end is connected to the control end of the transistor M5, and the second end is connected to the current processing module 333.
[0066] In the present embodiment, the second current branch 2312 and the third current branch 2313 share the current processing module 333, and in another embodiment, the second current branch 2312 and the third current branch 2313 can also not share the current processing module 333.
[0067] The first end of the transistor Q4 in the current processing module 333 is connected with the second end of the transistor M9 and the second end of the transistor M13, and the second end is grounded; the first end of the transistor M10 is connected with the power supply VDD, and the control end and the second end are connected; the first end of the transistor M11 is connected with the second end of the transistor M10, the second end is connected with the control end of the transistor Q4, and the control end is connected with the first end of the transistor Q4; the first end of the transistor M12 is connected with the power supply VDD, the second end is connected with the first end of the transistor Q3, and the control end is connected with the control end of the transistor M10.
[0068] The transistor M8 and the transistor M7 constitute a current mirror, the transistor M8 is used for copying the second current I1 of the transistor M7, and the second current I1 is output from the second end of the transistor M8 to the base of the transistor Q3.
[0069] The transistor M9 and the transistor M7 constitute a current mirror, the transistor M9 is used for 1:1 mirroring the second current I1 of the transistor M7, and the first compensation current I2 is obtained after the second current I1 is processed by the current processing module 333, and the first compensation current I2 is output from the second end of the transistor M12 to the base of the transistor Q3.
[0070] The transistor M13 and the transistor M5 constitute a current mirror, the transistor M13 is used for 1:x mirroring the bias current I4 of the transistor M5, and the second compensation current I3 is obtained after the bias current I4 is processed by the current processing module 333, and the second compensation current I3 is output from the second end of the transistor M12 to the base of the transistor Q3.
[0071] Further, in the present application, the transistors M1-M2, the transistor M4 and the transistor M11 are NMOS tubes, the transistors M3, the transistors M5-M10, the transistors M12-M13 are PMOS tubes, and the transistors Q1-Q4 are NPN tubes.
[0072] Figure 5 The temperature drift of the bandgap voltage reference according to the embodiment of the present application is shown in the figure, as Figure 5 The temperature drift of the reference voltage V BG is only 0.9mV, compared with 9.3mV and 4.7mV of the prior art, and the temperature drift of the reference voltage V BG is effectively improved.
[0073] The band gap voltage reference circuit provided by the embodiments of the present application comprises a current bias module, a band gap core module and a reference voltage output module, wherein the reference voltage output module comprises a first current branch and a negative temperature coefficient voltage generating module connected in sequence, the first current branch copies a second current 11 generated by the band gap core module and proportional to temperature to compensate for a negative temperature coefficient voltage generated by the negative temperature coefficient voltage generating module, and generates a reference voltage irrelevant to temperature, the second current branch provides a first compensation current 12 to an output node of the reference voltage through mirroring the second current 11 to eliminate the influence of beta on the reference voltage, thereby effectively linearly compensating for the reference voltage and reducing temperature drift of the reference voltage.
[0074] In addition, the reference voltage output module further comprises a third current branch, the third current branch mirrors a bias current generated by the current bias module to provide a second compensation current I3 to the output node of the reference voltage to compensate for a nonlinear part of the negative temperature coefficient voltage, thereby curvilinearly compensating for the reference voltage.
[0075] According to the embodiments of the present application as described above, these embodiments do not describe all the details and are not limited to the specific embodiments. Obviously, according to the above description, many modifications and changes can be made. The present description selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that those skilled in the art can well utilize the present application and make modifications and uses on the basis of the present application. The protection scope of the present application should be defined by the scope of the claims of the present application and their equivalents.
Claims
1. A bandgap voltage reference circuit, comprising: a bandgap core module configured to generate a first current and a second current with positive temperature coefficient by using bipolar junction transistors; a current bias module configured to provide a bias current to the bandgap core module; and a reference voltage output module comprising a first current branch and a negative temperature coefficient voltage generation module connected in sequence, the first current branch configured to replicate the second current, the reference voltage output module configured to output a temperature-independent reference voltage by compensating a negative temperature coefficient voltage generated by the negative temperature coefficient voltage generation module using the second current, wherein the reference voltage output module further comprises a second current branch connected in parallel with the first current branch, the second current branch configured to provide a first compensation current to an output node of the reference voltage by mirroring the second current to eliminate an effect of a common emitter amplification of the bipolar junction transistors, the reference voltage output module further comprises: a third current branch connected in parallel with the first current branch, the third current branch configured to provide a second compensation current to the output node by mirroring the bias current to compensate a non-linear part in the negative temperature coefficient voltage, the third current branch comprises: a thirteenth transistor having a first terminal connected to a power supply, a control terminal connected to the current bias module, and a second terminal configured to output a mirrored bias current; a current processing module having an input terminal connected to the second terminal of the thirteenth transistor and an output terminal connected to the negative temperature coefficient voltage generation module, and configured to generate the second compensation current according to an output current of the thirteenth transistor, the current processing module comprises: a fourth transistor having a first terminal connected to the second terminal of the thirteenth transistor and a second terminal connected to a ground; a tenth transistor having a first terminal connected to the power supply and a second terminal connected to a control terminal; an eleventh transistor having a first terminal connected to the second terminal of the tenth transistor, a control terminal connected to the first terminal of the fourth transistor, and a second terminal connected to the control terminal of the fourth transistor; a twelfth transistor having a first terminal connected to the power supply, a control terminal connected to the control terminal of the tenth transistor, and a second terminal connected to the negative temperature coefficient voltage generation module. 2.The bandgap voltage reference circuit of claim 1, wherein 3.The bandgap voltage reference circuit of claim 2, wherein the second current I1 where Iptat is the first current and β is the common emitter amplification factor of the bipolar junction transistor. the first compensation current I2=11 / β, wherein I1 is the second current and β is a common emitter amplification of the bipolar junction transistors. 4.The bandgap voltage reference circuit of claim 1, wherein 5.The bandgap voltage reference circuit of claim 4, wherein the bias current where Iptat is the first current and β is the common emitter amplification factor of the bipolar junction transistor. the second compensation current I3=(x*I4) / β, wherein x is a mirroring ratio of the third current branch mirroring the bias current, I4 is the bias current, and β is a common emitter amplification of the bipolar junction transistors. the second current branch comprises:
6. The bandgap voltage reference circuit of claim 1, wherein, a ninth transistor having a first terminal connected to the power supply, a second terminal connected to the first terminal of the fourth transistor, and a control terminal connected to the bandgap core module, and configured to mirror the second current and output a mirrored second current; and a sixth transistor having a first terminal connected to the power supply, a second terminal connected to the first terminal of the fourth transistor, and a control terminal connected to the bandgap core module, and configured to mirror the second current and output a mirrored second current. A current processing module, an input end of which is connected with the second end of the ninth transistor, and an output end of which is connected with the negative temperature coefficient voltage generating module, is configured to generate the first compensation current according to an output current of the ninth transistor.
7. The bandgap voltage reference circuit of claim 6, wherein, The second current branch and the third current branch share the current processing module.
8. The bandgap voltage reference circuit of claim 1, wherein, The fourth transistor is an NPN transistor.
9. The bandgap voltage reference circuit of claim 6, wherein, The eleventh transistor is an NMOS transistor, and the ninth transistor, the tenth transistor, the twelfth transistor and the thirteenth transistor are PMOS transistors.
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