A multi-chip parallel half-bridge IGBT module

Abstract

This invention discloses a multi-chip parallel half-bridge IGBT module. The invention adds an emitter signal copper layer, directly extracting the emitter voltage signal from the corresponding bonding wire cluster. This reduces the common-emitter parasitic inductance between the signal circuit and the power circuit, as well as the mutual inductance between the power circuit and the signal control circuit. It also reduces the voltage division of the signal control circuit by the common-emitter parasitic inductance, lowers the impact of power circuit current changes on signal control circuit voltage changes, and accelerates the drop rate of the chip's collector-emitter voltage during turn-on. This reduces chip losses during turn-on and helps improve the module's operating frequency.

Description

Technical Field

[0001] This invention relates to a multi-chip parallel half-bridge IGBT module, belonging to the field of power semiconductor device technology. Background Technology

[0002] The traditional layout of a multi-chip parallel half-bridge IGBT (Insulated Gate Bipolar Transistor) module is as follows: Figure 1 and 2 As shown, the system includes an upper bridge arm and a lower bridge arm. Each bridge arm includes four IGBT chip sets, and each IGBT chip set includes one IGBT chip and a freewheeling diode (FRD) connected in anti-parallel to the IGBT chip. The IGBT chips in the upper bridge arm are 4a-4d, and the corresponding freewheeling diodes are 5a-5d. The IGBT chips in the lower bridge arm are 6a-6d, and the corresponding freewheeling diodes are 7a-7d. Both the IGBT chips and the freewheeling diodes are soldered onto a copper-clad ceramic substrate. Figures 2 and 3 show the copper-clad ceramic substrates for the upper and lower bridge arms, respectively, connected on the front by bonding wire clusters. Figures 11a-11d show the bonding wire clusters for the upper bridge arm, and 12a-12d show the bonding wire clusters for the lower bridge arm. Terminals 13 and 16 are the gate signal terminals for the upper and lower bridge arms, respectively, while terminals 14 and 17 are the emitter signal terminals for the upper and lower bridge arms, respectively. The on / off state of the IGBT chips in the upper and lower bridge arms is controlled by drive signals. Specifically, the IGBT chip in the upper bridge arm is controlled by the gate signal terminal 13 and the emitter signal terminal 14. The gate control signal is connected to the chip gate via the path of gate signal terminal 13-copper foil-bonding wire-copper foil-gate bonding wire. The emitter control signal is connected to the chip emitter via the loop of emitter signal terminal 14-copper foil-bonding wire-copper foil-bonding wire, which is a relatively long path. The on / off state of the IGBT chip in the lower bridge arm is controlled by the gate signal terminal 17 and the emitter signal terminal 16. A copper-clad ceramic backing is soldered onto the metal substrate 1. The upper and lower bridge arms are connected to the external circuit through output terminal 10, positive terminal 20, and negative terminal 30, and are connected to the drive control circuit through the gate signal terminal and the emitter signal terminal.

[0003] Because the chips in the upper and lower bridge arms are centrally symmetrically arranged, their turn-on and turn-off curves are basically similar. Taking the upper bridge arm chipset as an example, after calculating and analyzing its parasitic inductance parameters, and further calculating and analyzing the switching process, the turn-on curves of the three chips are obtained as follows: Figure 3 As shown in the figure, there is a problem of slow collector-emitter voltage drop and high turn-on loss during the turn-on process, which is not conducive to further improving the turn-on speed of the IGBT module. Summary of the Invention

[0004] This invention provides a multi-chip parallel half-bridge IGBT module, which solves the problems disclosed in the background art.

[0005] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows:

[0006] A multi-chip parallel half-bridge IGBT module adds an emitter signal copper layer to a copper-clad ceramic substrate, directly leading out the emitter voltage signal of each IGBT chip from the corresponding bonding wire cluster, and transmitting the led-out emitter voltage signal to the emitter signal terminal through the emitter signal copper layer.

[0007] Add upper bridge arm emitter signal copper layer and lower bridge arm emitter signal copper layer to the copper-clad ceramic backing;

[0008] The emitter voltage signals of each IGBT chip in the upper bridge arm are directly led out from the corresponding bonding wire clusters, and the emitter voltage signals led out from the upper bridge arm are transmitted to the emitter signal terminals of the upper bridge arm through the emitter signal copper layer of the upper bridge arm.

[0009] The emitter voltage signals of each IGBT chip in the lower bridge arm are directly led out from the corresponding bonding wire clusters, and the emitter voltage signals led out from the lower bridge arm are transmitted to the emitter signal terminals of the lower bridge arm through the emitter signal copper layer of the lower bridge arm.

[0010] The emitter signal copper layer of the upper bridge arm is located outside the gate signal copper layer of the upper bridge arm.

[0011] The upper bridge arm emitter signal copper layer includes a first emitter signal copper layer and a second emitter signal copper layer connected by bonding wires. The two emitter signals of the upper bridge arm are respectively transmitted to the first emitter signal copper layer and the second emitter signal copper layer.

[0012] The emitter signal copper layer of the lower bridge arm is located outside the gate signal copper layer of the lower bridge arm.

[0013] The lower bridge arm emitter signal copper layer includes a third emitter signal copper layer and a fourth emitter signal copper layer connected by bonding wires. The two emitter signals of the lower bridge arm are transmitted to the third emitter signal copper layer and the fourth emitter signal copper layer, respectively.

[0014] The beneficial effects achieved by this invention are as follows: This invention adds an emitter signal copper layer, directly leading the emitter voltage signal from the corresponding bonding wire cluster, reducing the common emitter parasitic inductance between the signal circuit and the power circuit, as well as the mutual inductance between the power circuit and the signal control circuit. This reduces the voltage division of the signal control circuit by the common emitter parasitic inductance, reduces the impact of power circuit current changes on signal control circuit voltage changes, and makes the chip collector-emitter voltage drop faster during the turn-on process, reducing chip losses during the turn-on process and helping to improve the module's operating frequency. Attached Figure Description

[0015] Figure 1A 3D structural diagram of a traditional multi-chip parallel half-bridge IGBT module;

[0016] Figure 2 This is a layout diagram of a traditional multi-chip parallel half-bridge IGBT module;

[0017] Figure 3 The current curve of the four IGBT chips in the upper arm of a traditional multi-chip parallel half-bridge IGBT module during the turn-on process.

[0018] Figure 4 A schematic diagram of the parasitic inductance of a multi-chip parallel half-bridge IGBT module;

[0019] Figure 5 This is a layout diagram of the present invention;

[0020] Figure 6 This is a current curve diagram of the four IGBT chips in the upper bridge arm of the present invention during the turn-on process. Detailed Implementation

[0021] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and should not be used to limit the scope of protection of the present invention.

[0022] like Figure 4 As shown, by analyzing the impact of parasitic inductance of a half-bridge IGBT module on turn-on current sharing, the parasitic emitter inductance of the shared portion of the signal control circuit and power circuit is found (in the figure, Luc is the parasitic inductance of the collector-power terminal P of the upper bridge arm IGBT chip, Luk is the parasitic inductance of the cathode-power terminal P of the upper bridge arm FRD, Lug is the parasitic inductance of the gate-gate terminal UG of the upper bridge arm IGBT chip, Lsue is the parasitic inductance of the emitter terminal UE-emitter signal line of the upper bridge arm, Lpue is the shared parasitic inductance of the upper bridge arm emitter power / signal circuit, and Lue is the parasitic inductance of the upper bridge arm emitter power circuit). Ldc is the parasitic inductance of the collector-power terminal AC of the lower bridge arm IGBT chip, Ldk is the parasitic inductance of the cathode-power terminal AC of the lower bridge arm FRD, Ldg is the parasitic inductance of the gate-gate terminal DG of the lower bridge arm IGBT chip, Lsde is the parasitic inductance of the emitter terminal DE-emitter signal line of the lower bridge arm, Lpde is the shared parasitic inductance of the emitter power / signal circuit of the lower bridge arm, and Lde is the parasitic inductance of the emitter power circuit of the lower bridge arm. During the module switching process, the resistive current increases, which diverts a portion of the voltage, resulting in a slow rise in the actual gate-emitter voltage of the chip, affecting the module turn-on speed.

[0023] To achieve rapid activation, as an embodiment of the present invention, such as Figure 5As shown, a multi-chip parallel half-bridge IGBT module adds an emitter signal copper layer on a copper-clad ceramic substrate, directly leading out the emitter voltage signal of each IGBT chip from the corresponding bonding wire cluster, and the led-out emitter voltage signal is transmitted to the emitter signal terminal through the emitter signal copper layer.

[0024] By adding an emitter signal copper layer, the emitter voltage signal is directly led out from the corresponding bonding wire cluster, reducing the common emitter parasitic inductance between the signal circuit and the power circuit, as well as the mutual inductance between the power circuit and the signal control circuit. This reduces the voltage division of the signal control circuit by the common emitter parasitic inductance, reduces the impact of power circuit current changes on signal control circuit voltage changes, and makes the chip collector-emitter voltage drop faster during turn-on, reducing chip losses during turn-on and helping to improve the module's operating frequency.

[0025] Traditional half-bridge IGBT modules are shown below. Figure 1 and 2 In the diagram, the upper and lower bridge arms are connected to the external circuit via 10 as the output terminal, 20 as the positive terminal 20, and 30 as the negative terminal 30. 1 is a metal substrate, 2 is a copper-clad ceramic backing plate for the upper bridge arm, and 3 is a copper-clad ceramic backing plate for the lower bridge arm. 2 and 3 are both soldered onto 1, the upper bridge arm is soldered onto 2, and the lower bridge arm is soldered onto 3.

[0026] 4a-4d are the four IGBT chips of the upper bridge arm, which can be defined as the first, second, third, and fourth IGBT chips of the upper bridge arm, respectively. 5a-5d are four freewheeling diodes connected in anti-parallel with 4a-4d, which can be defined as the first, second, third, and fourth freewheeling diodes of the upper bridge arm, respectively. 11a-11d are four bonding wire clusters of the upper bridge arm, which can be defined as the first, second, third, and fourth bonding wire clusters of the upper bridge arm, respectively. The front sides of 4a and 5a, 4... b and 5b front sides, 4c and 5c front sides, and 4d and 5d front sides are connected by 11a to 11d respectively. 8a to 8d are four upper bridge arm gate bonding lines, which can be defined as the upper bridge arm first gate bonding line, upper bridge arm second gate bonding line, upper bridge arm third gate bonding line, and upper bridge arm fourth gate bonding line respectively. The gate signal of the corresponding IGBT chip is led out from 11a to 11d to the upper bridge arm gate signal copper layer 2a. The upper bridge arm gate signal copper layer 2a is connected to the upper bridge arm gate signal terminal 13 through the bonding lines. The upper bridge arm emitter control signal is connected to the chip emitter through a loop of emitter signal terminal 14-copper foil-bonding line-copper foil-bonding line, which is a relatively long path.

[0027] 6a-6d are the four IGBT chips of the lower bridge arm, which can be defined sequentially as the first, second, third, and fourth IGBT chips of the lower bridge arm. 7a-7d are four freewheeling diodes connected in anti-parallel to 6a-6d, which can be defined sequentially as the first, second, third, and fourth freewheeling diodes of the lower bridge arm. 12a-12d are connected as four lower bridge arm bonding wire clusters, which can be defined sequentially as the first, second, third, and fourth bonding wire clusters of the lower bridge arm. 6a and 7a are on the front side... The front sides of 6b and 7b, 6c and 7c, and 6d and 7d are connected by 12a to 12d respectively. 9a to 9d are four lower bridge arm gate bonding lines, which can be defined as the first lower bridge arm gate bonding line, the second lower bridge arm gate bonding line, the third lower bridge arm gate bonding line, and the fourth lower bridge arm gate bonding line, respectively. The gate signal of the corresponding IGBT chip is led out from 12a to 12d to the lower bridge arm gate signal copper layer 3a. The lower bridge arm gate signal copper layer 3a is connected to the lower bridge arm gate signal terminal 16 through the bonding lines. The lower bridge arm emitter control signal is connected to the chip emitter through a loop of emitter signal terminal 16-copper foil-bonding line-copper foil-bonding line, which is a relatively long path.

[0028] Figure 5 Is Figure 2 The improved distribution diagram involves adding an upper bridge arm emitter signal copper layer 15 and a lower bridge arm emitter signal copper layer 18 to the copper-clad ceramic substrate. The emitter voltage signals of each IGBT chip in the upper bridge arm are directly led out from the corresponding bonding wire clusters. The emitter voltage signals led out from the upper bridge arm are transmitted to the upper bridge arm emitter signal terminal 14 through the upper bridge arm emitter signal copper layer 15. Similarly, the emitter voltage signals of each IGBT chip in the lower bridge arm are directly led out from the corresponding bonding wire clusters. The emitter voltage signals led out from the lower bridge arm are transmitted to the lower bridge arm emitter signal terminal 17 through the lower bridge arm emitter signal copper layer 18.

[0029] To ensure that the chip arrangement remains unchanged, an upper bridge arm emitter signal copper layer 15 can be further provided on the outer side of the upper bridge arm gate signal copper layer 2a, and a lower bridge arm emitter signal copper layer 18 can be provided on the outer side of the lower bridge arm gate signal copper layer 3a.

[0030] Specific settings can be found as follows: Figure 5In the middle section, the upper bridge arm emitter signal copper layer 15 is divided into two segments, including a first emitter signal copper layer and a second emitter signal copper layer. The first emitter signal copper layer and the second emitter signal copper layer are connected by a bonding wire. The two emitter signals of the upper bridge arm are transmitted to the first emitter signal copper layer and the second emitter signal copper layer, respectively. Similarly, the lower bridge arm emitter signal copper layer 18 is divided into two segments, including a third emitter signal copper layer and a fourth emitter signal copper layer. The third emitter signal copper layer and the fourth emitter signal copper layer are connected by a bonding wire. The two emitter signals of the lower bridge arm are transmitted to the third emitter signal copper layer and the fourth emitter signal copper layer, respectively.

[0031] The distributed inductance of the improved module was calculated and substituted into the turn-on simulation circuit calculation to obtain the turn-on curves of the three improved chips, as shown below. Figure 6 As shown, the results indicate that the turn-on current rise time of the improved module is shortened from 250ns to 100ns, a reduction of approximately 60%. The step in collector-emitter voltage during the initial turn-on of the chip also disappears significantly, and the turn-on loss is reduced accordingly, which is beneficial for improving the operating frequency of the module.

[0032] Therefore, the above improvements reduce the shared parasitic inductance between the power circuit and the drive control circuit, reduce the mutual inductance between the power circuit and the signal control circuit, reduce the impact of power circuit current changes on signal control circuit voltage changes, and improve the rise speed of the chip gate-emitter voltage, thereby accelerating the module turn-on speed.

[0033] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A multi-chip parallel half-bridge IGBT module, characterized by, The emitter signal copper layer is additionally arranged on the copper clad ceramic substrate, and the emitter voltage signals of the IGBT chips are directly led out from the corresponding bonding wire bundles. The upper bridge arm emitter signal copper layer and the lower bridge arm emitter signal copper layer are additionally arranged on the copper clad ceramic substrate. The emitter voltage signals of the IGBT chips of the upper bridge arm are directly led out from the corresponding bonding wire bundles, and the emitter voltage signals led out from the upper bridge arm are transmitted to the upper bridge arm emitter signal terminal through the upper bridge arm emitter signal copper layer. The emitter voltage signals of the IGBT chips of the lower bridge arm are directly led out from the corresponding bonding wire bundles, and the emitter voltage signals led out from the lower bridge arm are transmitted to the lower bridge arm emitter signal terminal through the lower bridge arm emitter signal copper layer. The upper bridge arm emitter signal copper layer is located outside the upper bridge arm gate signal copper layer.

2. A multi-chip parallel half-bridge IGBT module according to claim 1, characterized in that The upper bridge arm emitter signal copper layer comprises a first emitter signal copper layer and a second emitter signal copper layer connected through a bonding wire, and the two emitter signals of the upper bridge arm are transmitted to the first emitter signal copper layer and the second emitter signal copper layer respectively.

3. The multi-chip parallel half-bridge IGBT module according to claim 1, characterized in that, The lower bridge arm emitter signal copper layer is located outside the lower bridge arm gate signal copper layer.

4. The multi-chip parallel half-bridge IGBT module according to claim 1 or 3, characterized in that, The lower bridge arm emitter signal copper layer comprises a third emitter signal copper layer and a fourth emitter signal copper layer connected through a bonding wire, and the two emitter signals of the lower bridge arm are transmitted to the third emitter signal copper layer and the fourth emitter signal copper layer respectively.

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