A High Out-of-Band Rejection Wideband Filtering Integrated Power Amplifier

Abstract

The present invention provides a high out-of-band rejection broadband filter integrated power amplifier. The filter integrated power amplifier includes: an input matching network component, wherein a first cascaded coupled line and a second cascaded coupled line are cascaded at an obliquely opposite port, a single-ended short-circuited coupled line is loaded at the input end of the first cascaded coupled line, a double-ended loaded open-circuited coupled line is loaded at another port on the same side of the output port of the first cascaded coupled line, and an open-circuited stub is loaded at the output end of the second cascaded coupled line; an output matching network component, wherein a third cascaded coupled line and a fourth cascaded coupled line are cascaded at an obliquely opposite port, an open-circuited stub is loaded at the input end of the third cascaded coupled line, a double-ended loaded open-circuited coupled line is loaded at another port on the same side of the input port of the fourth cascaded coupled line, and a single-ended short-circuited coupled line is loaded at the output end of the fourth cascaded coupled line; a stability network component, including a capacitor and a resistor; and a transistor. The present invention can increase transmission zeros through different types of loaded stubs, and improve the bandwidth and filtering performance of the filter integrated power amplifier.

Description

Technical Field

[0001] The present invention relates to the technical field of microwave transmission, and particularly to a high out-of-band rejection broadband filter integrated power amplifier. Background Art

[0002] In order to meet the diverse communication needs of users, multi-standard, multi-band, and multi-mode are becoming common features of mobile communication systems. Therefore, the usage of filters in the radio frequency front-end has increased significantly. Filters operating at higher frequencies usually bring higher insertion losses, which have a greater impact on the final output performance and efficiency. To improve the overall efficiency of the communication link and increase the circuit integration level, filter integrated power amplifiers are usually adopted. A filter integrated power amplifier can filter while amplifying the signal. The core of the filter integrated power amplifier is a filter integrated impedance transformer, which can achieve impedance matching within a specific frequency range for transistors and suppress signals within other frequency ranges, enabling the power amplifier to achieve the effect of filter integration. However, existing filter integrated power amplifiers are difficult to achieve high-performance and broadband characteristics. Summary of the Invention

[0003] In view of this, the embodiments of the present invention provide a high out-of-band rejection broadband filter integrated power amplifier, which solves the problems of low out-of-band rejection level and narrow bandwidth of the filter integrated power amplifier in the prior art.

[0004] The present invention provides a high out-of-band rejection broadband filter integrated power amplifier, comprising:

[0005] An input matching network component, the input matching network component comprising: a first cascaded coupled line, a second cascaded coupled line, a first single-ended short-circuited coupled line, a first double-ended loaded open-circuited coupled line, and a first open-circuit stub. The first cascaded coupled line and the second cascaded coupled line are cascaded at an oblique opposite port. The input end of the first cascaded coupled line is single-ended loaded with the first single-ended short-circuited coupled line and is short-circuited to ground through a corresponding oblique opposite port. The other port on the same side of the output port of the first cascaded coupled line is double-ended loaded with the first double-ended loaded open-circuited coupled line. The output end of the second cascaded coupled line is connected to the first open-circuit stub.

[0006] An output matching network component, the output matching network component comprising: a third cascaded coupled line, a fourth cascaded coupled line, a second open-circuit stub, a second double-ended loaded open-circuited coupled line, and a second single-ended short-circuited coupled line. The third cascaded coupled line and the fourth cascaded coupled line are cascaded at an oblique opposite port. The input end of the third cascaded coupled line is connected to the second open-circuit stub. The other port on the same side of the input port of the fourth cascaded coupled line is double-ended loaded with the second double-ended loaded open-circuited coupled line. The output end of the fourth cascaded coupled line is single-ended loaded with the second single-ended short-circuited coupled line and is short-circuited to ground through a corresponding oblique opposite port.

[0007] A stability network component, comprising: a chip capacitor and a first resistor. The input end of the chip capacitor is connected to the output end of the second cascaded coupling line. The output end of the chip capacitor is connected to the first end of the first resistor. The second end of the first resistor is connected to the first power supply transmission line;

[0008] A transistor. The gate side of the transistor is the input end and is connected to the first end of the first resistor through a first tuning line. The drain side of the transistor is the output end and is connected to the input end of the third cascaded coupling line through a second tuning line. The output end of the second tuning line is also connected to the second power supply transmission line. The transistor amplifies the power of the signal by adding a DC bias;

[0009] Wherein, the input matching network component, the output matching network component, the stability network component and the transistor are arranged on a set material substrate. The input end of the first cascaded coupling line is used to input a signal to be processed, and the output end of the fourth cascaded coupling line outputs the processed signal.

[0010] In some embodiments, the first power supply transmission line and the second power supply transmission line are respectively AC grounded through ground capacitors.

[0011] In some embodiments, the substrate is a dielectric substrate. The input matching network component, the output matching network component, the stability network component and the transistor are arranged on the top layer of the substrate. A metal ground layer is arranged on the bottom layer of the substrate. The input matching network component, the output matching network component, the stability network component and the transistor are connected to the metal ground layer through metal vias.

[0012] In some embodiments, the transistor is connected to a heat sink through a cut square hole on the dielectric substrate.

[0013] In some embodiments, the first open stub is composed of a first low-impedance transmission line and a first high-impedance transmission line. The impedance of the first low-impedance transmission line is lower than that of the first high-impedance transmission line. The output end of the second cascaded coupling line is connected to the input end of the first low-impedance transmission line. The output end of the first low-impedance transmission line is connected to the input end of the first high-impedance transmission line.

[0014] In some embodiments, the second open stub is composed of a second low-impedance transmission line and a second high-impedance transmission line. The impedance of the second low-impedance transmission line is lower than that of the second high-impedance transmission line. The input end of the third cascaded coupling line is connected to the input end of the second low-impedance transmission line. The output end of the second low-impedance transmission line is connected to the input end of the second high-impedance transmission line.

[0015] In some embodiments, the dielectric substrate is made of polytetrafluoroethylene fiberglass material.

[0016] In some embodiments, the thickness of the metal ground layer is 30 - 40 μm, and the thickness of the dielectric substrate is 0.5 - 0.6 mm.

[0017] In some embodiments, the transistor uses a gallium nitride high electron mobility transistor.

[0018] In some embodiments, the first power supply transmission line and the second power supply transmission line are also connected to a bypass capacitor for filtering.

[0019] The beneficial effects of the present invention are at least:

[0020] For the high out - of - band rejection broadband filtering integrated power amplifier of the present invention, by utilizing the impedance transformation and filtering characteristics of the microstrip coupled line, a first single - ended short - circuited coupled line, a first double - ended loaded open - circuited coupled line, and a first open - circuited stub are added to the input matching network component, and a second single - ended short - circuited coupled line, a second double - ended loaded open - circuited coupled line, and a second open - circuited stub are added to the output matching network component, creating three transmission zeros in the input matching network and the output matching network respectively. By changing the positions of the transmission zeros, a wider bandwidth and better out - of - band rejection effect are achieved, thereby improving the bandwidth and filtering performance of the filtering integrated power amplifier.

[0021] Furthermore, the high out - of - band rejection broadband filtering integrated power amplifier of the present invention can achieve a filtering effect while amplifying power, thereby reducing the insertion loss caused by adding an additional filter, and having good application prospects in the radio frequency front - end.

[0022] Furthermore, the matching structure based on the microstrip coupled line can produce a DC - blocking effect, reducing the use of DC - blocking capacitors, enhancing the stability of the circuit while reducing the assembly error during the circuit connection process.

[0023] Furthermore, the high out - of - band rejection broadband filtering integrated power amplifier of the present invention can suppress out - of - band signals, ensuring the stability of the filtering integrated power amplifier outside the operating frequency band, simplifying the structure of the stability network component, avoiding the problem of circuit instability caused by excessive stability network components, and improving the overall filtering performance of the filtering integrated power amplifier.

[0024] The additional advantages, objectives, and features of the present invention will be partially described below, and will become partially apparent to those of ordinary skill in the art after studying the following text, or can be learned from the practice of the present invention. The objectives and other advantages of the present invention can be achieved and obtained through the structures specifically pointed out in the specification and the drawings.

[0025] Those skilled in the art will understand that the objectives and advantages achievable with the present invention are not limited to those specifically described above, and the above and other objectives achievable with the present invention will be more clearly understood from the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The drawings described herein are used to provide a further understanding of the present invention, form a part of this application, and do not limit the present invention. The components in the drawings are not drawn to scale, but are only for showing the principles of the present invention. To facilitate showing and describing some parts of the present invention, the corresponding parts in the drawings may be enlarged, that is, may become larger relative to other components in the exemplary device actually manufactured according to the present invention. In the drawings:

[0027] Figure 1 It is a schematic structural diagram of a high out-of-band rejection broadband filtering integrated power amplifier according to an embodiment of the present invention.

[0028] Figure 2 It is the overall layout of a high out-of-band rejection broadband filtering integrated power amplifier according to an embodiment of the present invention.

[0029] Figure 3 It is the layout of the input part of a high out-of-band rejection broadband filtering integrated power amplifier according to an embodiment of the present invention.

[0030] Figure 4 It is the layout of the output part of a high out-of-band rejection broadband filtering integrated power amplifier according to an embodiment of the present invention.

[0031] Figure 5 It is a schematic diagram of the S-parameter simulation results of a high out-of-band rejection broadband filtering integrated power amplifier according to an embodiment of the present invention within the frequency range of 0 to 7 GHz.

[0032] Figure 6 It is a schematic diagram of the output index simulation results of a high out-of-band rejection broadband filtering integrated power amplifier according to an embodiment of the present invention within the frequency range of 3.2 to 3.7 GHz.

[0033] Figure 7 It is a schematic diagram of the S-parameter test results of a high out-of-band rejection broadband filtering integrated power amplifier according to an embodiment of the present invention within the frequency range of 0 to 7 GHz.

[0034] Figure 8 It is a schematic diagram of the output index test results of a high out-of-band rejection broadband filtering integrated power amplifier according to an embodiment of the present invention within the frequency range of 3.2 to 3.7 GHz.

[0035] Figure 9Schematic diagram of the test result of adjacent channel power ratio of the high out-of-band rejection broadband filter integrated power amplifier according to an embodiment of the present invention under the fourth-generation mobile technology LTE signal with a peak-to-average power ratio of 6 dB at 20 MHz. Detailed implementation manners

[0036] In order to make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below in conjunction with the implementation manners and the drawings. Herein, the illustrative implementation manners of the present invention and their descriptions are used to explain the present invention, but do not limit the present invention.

[0037] Herein, it should also be noted that in order to avoid obscuring the present invention due to unnecessary details, only the structures and / or processing steps closely related to the solution according to the present invention are shown in the drawings, while other details less related to the present invention are omitted.

[0038] It should be emphasized that the term "comprising / including" when used herein refers to the presence of features, elements, steps or components, but does not exclude the presence or addition of one or more other features, elements, steps or components.

[0039] Herein, it should also be noted that if not otherwise specified, the term "connection" in this document can not only refer to direct connection, but also represent indirect connection with an intermediate.

[0040] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the same reference numerals represent the same or similar components, or the same or similar steps.

[0041] With the continuous development of industry, the problem of energy shortage has become increasingly prominent, and each technical department is required to improve the energy utilization efficiency as much as possible. However, in the actual operation of the mobile communication network, in order to improve the transmission rate, the energy consumption generated is increasing continuously. The power amplifier is a high-energy-consuming device that consumes a large amount of energy in the mobile communication system. Its working efficiency has a great impact on the overall energy efficiency of the wireless system. Improving the efficiency of the power amplifier is of great significance for reducing the energy consumption of the mobile communication network. The latest communication standards adopt higher frequencies, wider bandwidths, and modulation methods with higher spectrum utilization rates, making the performance standards of power amplifiers more stringent. However, improving the frequency, bandwidth, and spectrum utilization rate of the power amplifier will all reduce the energy utilization efficiency, which leads to an increasing energy consumption of the mobile communication system.

[0042] The existing communication standards are developing rapidly, but the elimination speed of the existing communication standards is slow, and there are often situations where multiple communication standards coexist. To meet the diverse communication needs of users, multi-standard, multi-band, and multi-mode are becoming the common features of mobile communication systems. Based on this, the usage of filters in the radio frequency front-end has increased significantly. Filters operating at higher frequencies often bring higher insertion losses, which have a greater impact on the final output performance and efficiency. To improve the overall efficiency of the communication link and increase circuit integration, filter integrated power amplifiers are widely used. Filter integrated power amplifiers can filter signals while amplifying them. Filter integrated power amplifiers only amplify signals in specific frequency bands and suppress signals outside the target frequency band at the same time. The core of the filter integrated power amplifier is the filter integrated impedance transformer. This impedance transformer can achieve impedance matching for transistors within a specific frequency range and suppress signals within other frequencies, enabling the power amplifier to achieve the effect of filter integration. The existing types of filter integrated impedance transformers include cavity filters, dielectric integrated waveguides, etc. Although these impedance transformers have basic filtering effects, it is difficult to achieve high-performance and broadband filtering characteristics.

[0043] Therefore, the present invention provides a high out-of-band rejection broadband filter integrated power amplifier based on microstrip coupled lines. The microstrip coupled line filter integrated impedance transformer is a high-performance, low-cost, and miniaturized implementation method of the filter integrated impedance transformer. Based on the filter integrated impedance transformation characteristics of the coupled lines, this impedance transformer significantly improves its performance by cascading coupled lines and superimposing different microstrip lines or coupled lines at different ports. The filter integrated power amplifier designed based on the microstrip coupled line filter integrated impedance transformer has characteristics such as broadband and high out-of-band rejection, and has a smaller circuit area, which is beneficial for integration.

[0044] The present invention provides a high out-of-band rejection broadband filter integrated power amplifier, including:

[0045] An input matching network component, the input matching network component includes: a first cascaded coupled line, a second cascaded coupled line, a first single-ended short-circuited coupled line, a first double-ended loaded open-circuited coupled line, and a first open stub. The first cascaded coupled line and the second cascaded coupled line are cascaded at an obliquely opposite port; the input end of the first cascaded coupled line is single-ended loaded with the first single-ended short-circuited coupled line; the other port on the same side of the output port of the first cascaded coupled line is double-ended loaded with the first double-ended loaded open-circuited coupled line; the output end of the second cascaded coupled line is connected to the first open stub.

[0046] Output matching network components, the output matching network components include: a third cascaded coupling line, a fourth cascaded coupling line, a second open stub, a second double-ended loaded open coupled line, and a second single-ended shorted coupled line. The third cascaded coupling line and the fourth cascaded coupling line are cascaded at an oblique opposite port; the input end of the third cascaded coupling line is connected to the second open stub, and the other port on the same side of the input port of the fourth cascaded coupling line is double-ended loaded with the second double-ended loaded open coupled line, and the output end of the fourth cascaded coupling line is single-ended loaded with the second single-ended shorted coupled line.

[0047] Stable network components, including: a chip capacitor and a first resistor. The input end of the chip capacitor is connected to the output end of the second cascaded coupling line, the output end of the chip capacitor is connected to the first end of the first resistor, and the second end of the first resistor is connected to the first power supply transmission line.

[0048] A transistor, the gate side of the transistor is the input end and is connected to the first end of the first resistor through a first tuning line; the drain side of the transistor is the output end and is connected to the input end of the third cascaded coupling line through a second tuning line. The output end of the second tuning line is also connected to the second power supply transmission line. The transistor amplifies the power of the signal by adding a DC bias.

[0049] Among them, the input end of the first cascaded coupling line is used to input the signal to be processed, and the output end of the fourth cascaded coupling line outputs the processed signal.

[0050] In this embodiment, the first cascaded coupling line, the second cascaded coupling line, the third cascaded coupling line, and the fourth cascaded coupling line are used to provide basic impedance matching and filtering effects for the high out-of-band rejection broadband filter integrated power amplifier. By adjusting the width, length, and other characteristics of the first cascaded coupling line, the second cascaded coupling line, the third cascaded coupling line, and the fourth cascaded coupling line, the impedance transformation ratio of the filter integrated impedance transformer in the high out-of-band rejection broadband filter integrated power amplifier can be changed, so that the input and output impedances match the impedance required by the transistor. The first open stub and the second open stub are used to generate transmission zeros, further enhancing the selectivity of the input matching network component and the output matching network component for signal frequencies. The first single-ended shorted coupling line and the second single-ended shorted coupling line utilize the coupling characteristics of the coupling line to create a transmission zero closer to the operating frequency band than the shorted microstrip stub, strengthening the out-of-band roll-off speed of the impedance transformer and generating a transmission zero. The first double-ended loaded open coupling line and the second double-ended loaded open coupling line are equivalent to open stubs of the same length, which can be equivalently open at the center frequency and mismatched at other frequencies, used to enhance the selectivity for signal frequencies and generate transmission zeros. Thus, there are three transmission zeros in the input matching network component and the output matching network component respectively. By changing the positions of the transmission zeros, the bandwidth and filtering effect of the impedance transformer in the high out-of-band rejection broadband filter integrated power amplifier can be changed. The stability network component is located on the gate side of the transistor, used to enhance circuit stability, prevent oscillation, and assist input matching at the same time. The first tuning line and the second tuning line are used to adjust the impedances of the input matching network component and the output matching network component to the optimal impedance region required by the transistor. The transistor is used to modulate, rectify, and amplify the input signal.

[0051] In some embodiments, the first power supply transmission line and the second power supply transmission line are respectively AC grounded through ground capacitors.

[0052] In this embodiment, the ground capacitor is located at the AC grounding point of the power supply transmission line, producing an AC short-circuit effect to the ground, filtering the AC current in the circuit without affecting the operation of the circuit within the target frequency band, and providing a DC bias for the transistor.

[0053] In some embodiments, the substrate is a dielectric substrate. The input matching network component, the output matching network component, the stability network component, and the transistor are arranged on the top layer of the dielectric substrate, and a metal ground layer is arranged on the bottom layer of the substrate. The input matching network component, the output matching network component, the stability network component, and the transistor are connected to the metal ground layer through metal vias.

[0054] In some embodiments, the transistor is connected to the heat sink through a cut square hole on the dielectric substrate. The heat sink dissipates heat for the high out-of-band rejection broadband filter integrated power amplifier during operation, reducing the loss caused by overheating of the hardware of the high out-of-band rejection broadband filter integrated power amplifier during operation.

[0055] In some embodiments, the first open stub is composed of a first low-impedance transmission line and a first high-impedance transmission line. The impedance of the first low-impedance transmission line is lower than that of the first high-impedance transmission line. The output end of the second cascaded coupled line is connected to the input end of the first low-impedance transmission line, and the output end of the first low-impedance transmission line is connected to the input end of the first high-impedance transmission line.

[0056] In this embodiment, the first low-impedance transmission line and the first high-impedance transmission line are used to enhance the signal frequency selectivity of the overall first open stub, thereby improving the filtering effect of the first open stub.

[0057] In some embodiments, the second open stub is composed of a second low-impedance transmission line and a second high-impedance transmission line. The impedance of the second low-impedance transmission line is lower than that of the second high-impedance transmission line. The input end of the third cascaded coupled line is connected to the input end of the second low-impedance transmission line, and the output end of the second low-impedance transmission line is connected to the input end of the second high-impedance transmission line.

[0058] In this embodiment, the second low-impedance transmission line and the second high-impedance transmission line are used to enhance the signal frequency selectivity of the overall second open stub, thereby improving the filtering effect of the second open stub.

[0059] In some embodiments, the dielectric substrate is made of polytetrafluoroethylene fiberglass material.

[0060] In this embodiment, the dielectric substrate is made of RT5880 polytetrafluoroethylene fiberglass reinforced material produced by Rogers Corporation of the United States. The dielectric constant of this material within the operating frequency band is 2.2, and the loss constant is 0.009. This material has stable dielectric constant and loss constant, enabling the high out-of-band rejection broadband filter integrated power amplifier to have better operating efficiency.

[0061] In some embodiments, the thickness of the metal ground layer is 30 - 40 μm, and the thickness of the dielectric substrate is 0.5 - 0.6 mm.

[0062] In this embodiment, the thickness of the metal ground layer is 35 μm, and the thickness of the dielectric substrate is 0.508 mm. The metal ground layer with a thickness of 35 μm can better reduce the clutter interference brought by the grounding line in the circuit, and the dielectric substrate with a thickness of 0.508 mm has better signal transmission performance, thereby ensuring that the high out-of-band rejection broadband filter integrated power amplifier has higher operating efficiency.

[0063] In some embodiments, the transistor is a gallium nitride high electron mobility transistor.

[0064] In this embodiment, the gallium nitride high electron mobility transistor has good heat resistance, which can avoid the loss caused by excessive temperature during the operation of the filter. At the same time, the gallium nitride high electron mobility transistor has a high electron mobility, so that the out-of-band rejection broadband filter integrated power amplifier has a high output power.

[0065] In some embodiments, the first power supply transmission line and the second power supply transmission line are also connected to a bypass capacitor for filtering.

[0066] In this embodiment, the bypass capacitor filters out the high-frequency clutter in the input power supply and inputs the low-frequency wave in the input power supply into the transistor of the high out-of-band rejection broadband filter integrated power amplifier for power amplification.

[0067] The present invention will be described below in conjunction with specific embodiments:

[0068] The present invention provides a high out-of-band rejection broadband filter integrated power amplifier, as Figure 1 shown, including:

[0069] An input matching network component, the input matching network component includes: a first cascaded coupled line CL1I, a second cascaded coupled line CL2I, a first single-ended short-circuited coupled line CLSI, a first double-ended loaded open-circuited coupled line CLOI, and a first open stub. The input end of the first cascaded coupled line CL1I is single-ended loaded with the first single-ended short-circuited coupled line CLSI; the other port on the same side of the output port of the first cascaded coupled line CL1I is double-ended loaded with the first double-ended loaded open-circuited coupled line CLOI; the output end of the second cascaded coupled line CL2I is connected to the first open stub.

[0070] An output matching network component, the output matching network component includes: a third cascaded coupled line CL1O, a fourth cascaded coupled line CL2O, a second open stub, a second double-ended loaded open-circuited coupled line CLOO, and a second single-ended short-circuited coupled line CLSO. The third cascaded coupled line CL1O and the fourth cascaded coupled line CL2O are cascaded at an oblique opposite port; the input end of the third cascaded coupled line CL1O is connected to the second open stub, the other port on the same side of the input port of the fourth cascaded coupled line CL2O is double-ended loaded with the second double-ended loaded open-circuited coupled line CLOO, and the output end of the fourth cascaded coupled line CL2O is single-ended loaded with the second single-ended short-circuited coupled line CLSO.

[0071] Power supply network components, the power supply network components include: transmission lines and a plurality of grounding capacitors. The grounding capacitors are located at the AC grounding points of the transmission lines, generating an AC short - circuit effect to the ground and providing a DC bias for the transistor without affecting the operation of the circuit within the target frequency band. There is a power supply network component at each of the gate and drain of the transistor. The power supply network component on the gate side of the transistor is the transmission line TLG and a plurality of grounding capacitors, and the power supply network component on the drain side of the transistor is the transmission line TLD and a plurality of grounding capacitors.

[0072] Stable network components, the stable network components include: patch capacitors C1 and resistor R1, located at the gate of the transistor, used to enhance the circuit stability of the power amplifier and assist in input matching at the same time.

[0073] This embodiment of the high out - of - band rejection broadband filtering integrated power amplifier further includes: a transistor, a first tuning line TLTI and a second tuning line TLTO.

[0074] The operating frequency of this embodiment is from 3.2 GHz to 3.7 GHz. Both the input terminal 1 and the output terminal 2 are SMA connectors. The first power supply transmission line and the second power supply transmission line are connected to a 5.08 - mm - specification DC power supply socket to connect to the power supply to obtain the DC bias required for the operation of the transistor. The characteristic impedance of both the input port and the output port is 50 Ω. The dielectric substrate is RT5880, with a thickness of 0.508 mm, a relative dielectric constant εr value of 2.2, and a loss tangent tanδ value of 0.009. The width W1 of the input port and the width W19 of the output port are both 1.52 mm, and the length L1 of the input port and the length L19 of the output port are both 8 mm.

[0075] In this embodiment, as Figure 2 shown, the connection principle of each microstrip line and stub is: if they can be aligned and joined, a direct connection method is adopted; if they cannot be aligned and joined, or in the area where there is a width mutation, connection transition bands of different shapes and sizes are used for connection to achieve a smooth transition of impedance. Passive devices, including capacitors, inductors, resistors, etc., all use surface - mount devices with a specification of 0603. The length of the passive devices is 1.6 mm, and the width is 0.8 mm.

[0076] As Figure 3 shown, the input matching network component located after port 1 is composed of four microstrip coupled lines and two microstrip lines. The line width of each pair of coupled lines is the same. The name of each section of the circuit is in accordance with Figure 1Circuit naming in it. The width W2 of the first single-ended short-circuited coupled line CLSI is 0.6 mm, the length L2 is 16 mm, and the gap S2 is 0.1 mm. The width W3 of the first cascaded coupled line CL1I is 0.65 mm, the length L3 is 15.5 mm, and the gap S3 is 0.1 mm. In order to eliminate the reduction of high-frequency suppression caused by the inconsistent phase velocities of even and odd modes in the microstrip coupled line, several gap-increasing regions are equally spaced in the first cascaded coupled line CL1I and the second cascaded coupled line CL2I at the input. Among them, the increased gap SW3 of the first cascaded coupled line is 0.3 mm. The width W5 of the second cascaded coupled line CL2I is 0.85 mm, the length L5 is 15.85 mm, the gap S5 is 0.2 mm, and the increased gap SW5 of the second cascaded coupled line CL2I is 0.6 mm. The width W4 of the first open-circuit coupled line CLOI is 1.2 mm, the length L4 is 33.7 mm, it is bent, and the gap S4 is 0.1 mm. In the first open-circuit stub, the length L6 of the first low-impedance transmission line TL1I is 17 mm, the width W6 is 3 mm, the length L7 of the first high-impedance transmission line L2I is 16.8 mm, and the width W7 is 0.4 mm.

[0077] As Figure 3 shown, the parameters of the stabilization network component located at the back end of the input matching network component are: the chip capacitor C1 = 1 pF, the first resistor R1 = 47 Ω. The width W8 of the first power supply transmission line TLG is 0.8 mm, and the length L8 is 13.1 mm. The width W9 of the first tuning line TLTI is 4.6 mm, and the length L9 is 2.7 mm. There is a row of ground decoupling capacitors CG outside the first power supply transmission line. The capacitance value is not limited, but the capacitance value of each capacitor should be selected in different orders of magnitude to prevent all capacitors from resonating at the same frequency.

[0078] As Figure 4 shown, the width W11 of the second tuning line TLTO located behind the drain of the transistor is 5.3 mm, and the length L11 is 1.5 mm. In order to further improve the efficiency, a short stub for suppressing the third harmonic is loaded at the end of the second tuning line TLTO, and its length L12 is 5 mm, and the width W12 is 0.2 mm. The width W10 of the second power supply transmission line TLD is 1 mm, and the length L10 is 11.7 mm. There is a row of ground decoupling capacitors CD outside the second power supply transmission line. The capacitance value is not limited, but the capacitance value of each capacitor should be selected in different orders of magnitude to prevent all capacitors from resonating at the same frequency.

[0079] As Figure 4 shown, the output matching network component located in front of Port 2 is composed of four microstrip coupled lines and two microstrip lines. The line widths of each pair of coupled lines are the same. The name of each section of the circuit is in accordance with Figure 1Circuit naming in []. The length L13 of the second low-impedance transmission line TL1O in the second open stub is 19.1 mm, the width W13 is 2.5 mm, the length L14 of the second high-impedance transmission line TL2O is 17 mm, and the width W14 is 0.4 mm. The width W15 of the third cascaded coupled line CL1O is 0.7 mm, the length L15 is 16.2 mm, and the gap S15 is 0.4 mm. The width W17 of the second open coupled line CLOO is 1.2 mm, the length L17 is 34.3 mm, it is placed bent, and the gap S17 is 0.1 mm. The width W16 of the fourth cascaded coupled line CL2O is 0.6 mm, the length L16 is 16 mm, and the gap S16 is 0.15 mm. The width W18 of the second single-ended short-circuited coupled line CLSO is 0.5 mm, the length L18 is 16.15 mm, and the gap S18 is 0.1 mm.

[0080] The small-signal gain and input-port return loss small-signal simulation results of this embodiment are as Figure 5 shown. At 3.45 GHz, the small-signal gain of the power amplifier can reach 14.5 dB, the range where the gain is above 10 dB is from 3.06 GHz to 3.76 GHz, and the bandwidth reaches 0.7 GHz. Outside the passband, the power amplifier has a strong suppression effect on the input signal, showing excellent filtering characteristics. This embodiment has good small-signal performance.

[0081] The output index simulation results of this embodiment are as Figure 6 shown, specifically including the simulation results of gain, output power, and efficiency varying with frequency. At 3.45 GHz, the highest efficiency of the power amplifier is 56.8%, the output power is 39.78 dBm, and the gain is 11.41 dB. In the frequency range from 3.2 to 3.7 GHz, the efficiency is higher than 50%. This embodiment has good power efficiency performance and a relatively wide bandwidth within the operating frequency band.

[0082] The high out-of-band rejection broadband filtering integrated power amplifier of this embodiment has an overall circuit size of 64.8 mm × 94.2 mm. This circuit has the characteristic of miniaturization, which is beneficial for device packaging.

[0083] The small-signal gain and input-port return loss small-signal test results of the power amplifier in this embodiment are as Figure 7 shown. At 3.45 GHz, the small-signal gain of the power amplifier can reach 3.76 dB, the range where the gain is above 10 dB is from 3.07 GHz to 3.75 GHz, and the bandwidth reaches 0.68 GHz. Outside the passband, the power amplifier has a strong suppression effect on the input signal, showing excellent filtering characteristics. The test results of this embodiment are in good agreement with the simulation results, and it has good small-signal performance.

[0084] The test results of the output indicators of the power amplifier in this embodiment are as follows Figure 8 shown, specifically including the test results of the gain, output power, and efficiency varying with frequency. At 3.45 GHz, the maximum efficiency of the power amplifier is 59.86%, the output power is 39.87 dBm, and the gain is 10.7 dB. In the frequency range of 3.2 to 3.7 GHz, the efficiency is higher than 50%. This embodiment has good power efficiency performance and a relatively wide bandwidth within the operating frequency band.

[0085] The test results of the linearity indicators of the power amplifier in this embodiment are as follows Figure 9 shown. The power amplifier conducts adjacent channel power ratio (ACPR) tests under a fourth-generation mobile technology LTE signal with a peak-to-average power ratio (PAPR) of 6 dB at 20 MHz. In the case of digital pre-distortion activation (With DPD), the adjacent channel power ratio of the power amplifier in this embodiment can reach -47.8 dBc, meeting the operating standards of actual mobile communication systems.

[0086] In summary, the high out-of-band rejection broadband filtering integrated power amplifier of the present invention utilizes the impedance transformation and filtering characteristics of microstrip coupled lines. A first single-ended short-circuited coupled line, a first double-ended loaded open-circuited coupled line, and a first open stub are added to the input matching network component, and a second single-ended short-circuited coupled line, a second double-ended loaded open-circuited coupled line, and a second open stub are added to the output matching network component, creating three transmission zeros in the input matching network and the output matching network respectively. By changing the positions of the transmission zeros, a wider bandwidth and better out-of-band rejection effect are achieved, thereby improving the bandwidth and filtering performance of the filtering integrated power amplifier.

[0087] Furthermore, the high out-of-band rejection broadband filtering integrated power amplifier of the present invention can achieve a filtering effect while amplifying power, thereby reducing the insertion loss caused by adding an additional filter, and has good application prospects in the radio frequency front end.

[0088] Furthermore, the matching structure based on microstrip coupled lines can produce a DC blocking effect, reducing the use of DC blocking capacitors, enhancing the stability of the circuit while reducing the assembly error during the circuit connection process.

[0089] Furthermore, the high out-of-band rejection broadband filtering integrated power amplifier of the present invention can suppress out-of-band signals, ensuring the stability of the filtering integrated power amplifier outside the operating frequency band, simplifying the structure of the stability network component, avoiding the problem of circuit instability caused by excessive stability network components, and improving the overall filtering performance of the filtering integrated power amplifier.

[0090] An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the foregoing edge computing server deployment method are implemented. The computer-readable storage medium may be a tangible storage medium, such as a random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, register, floppy disk, hard disk, removable storage disk, CD-ROM, or any other form of storage medium well-known in the technical field.

[0091] Those of ordinary skill in the art should understand that the various exemplary components, systems, and methods described in conjunction with the embodiments disclosed herein can be implemented in hardware, software, or a combination of both. Specifically, whether to implement in hardware or software depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention. When implemented in hardware, it can be, for example, an electronic circuit, an application-specific integrated circuit (ASIC), appropriate firmware, a plug-in, a functional card, and so on. When implemented in software, the elements of the present invention are programs or code segments used to perform the required tasks. The program or code segment can be stored in a machine-readable medium or transmitted through a data signal carried in a carrier wave on a transmission medium or a communication link.

[0092] It should be clear that the present invention is not limited to the specific configurations and processes described above and illustrated in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and illustrated as examples. However, the method process of the present invention is not limited to the specific steps described and illustrated. Those skilled in the art can make various changes, modifications, and additions, or change the order between steps after understanding the spirit of the present invention.

[0093] In the present invention, the features described and / or illustrated for one embodiment can be used in the same or similar manner in one or more other embodiments, and / or combined with the features of other embodiments or replace the features of other embodiments.

[0094] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, various changes and modifications can be made to the embodiments of the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A high out-of-band rejection broadband filtering integrated power amplifier, characterized in that, Comprising: An input matching network component, the input matching network component comprising: a first cascaded coupled line, a second cascaded coupled line, a first single-ended shorted coupled line, a first differential loaded open coupled line, and a first open stub. The first cascaded coupled line and the second cascaded coupled line are cascaded at an oblique opposite port. The input end of the first cascaded coupled line is single-ended loaded with the first single-ended shorted coupled line and shorted to ground through the corresponding oblique opposite port. The other port on the same side of the output port of the first cascaded coupled line is differential loaded with the first differential loaded open coupled line. The output end of the second cascaded coupled line is connected to the first open stub. An output matching network component, the output matching network component comprising: a third cascaded coupled line, a fourth cascaded coupled line, a second open stub, a second differential loaded open coupled line, and a second single-ended shorted coupled line. The third cascaded coupled line and the fourth cascaded coupled line are cascaded at an oblique opposite port. The input end of the third cascaded coupled line is connected to the second open stub. The other port on the same side of the input port of the fourth cascaded coupled line is differential loaded with the second differential loaded open coupled line. The output end of the fourth cascaded coupled line is single-ended loaded with the second single-ended shorted coupled line and shorted to ground through the corresponding oblique opposite port. A stability network component, comprising: a chip capacitor and a first resistor. The input end of the chip capacitor is connected to the output end of the second cascaded coupled line. The output end of the chip capacitor is connected to the first end of the first resistor. The second end of the first resistor is connected to a first power supply transmission line. A transistor, the gate side of the transistor being the input end and connected to the first end of the first resistor through a first tuning line. The drain side of the transistor is the output end and connected to the input end of the third cascaded coupled line through a second tuning line. The output end of the second tuning line is also connected to a second power supply transmission line. The transistor amplifies the power of the signal by adding a DC bias. Wherein, the input matching network component, the output matching network component, the stability network component, and the transistor are disposed on a set material substrate. The input end of the first cascaded coupled line is used to input a signal to be processed. The output end of the fourth cascaded coupled line outputs the processed signal.

2. The high-band-out-of-band rejection broadband filtering integrated power amplifier according to claim 1, wherein The first power supply transmission line and the second power supply transmission line are respectively AC grounded through ground capacitors.

3. The high-band-out-of-band rejection broadband filter integrated power amplifier according to claim 1, characterized in that, The substrate is a dielectric substrate. The input matching network component, the output matching network component, the stability network component, and the transistor are disposed on the top layer of the substrate. A metal ground layer is disposed on the bottom layer of the substrate. The input matching network component, the output matching network component, the stability network component, and the transistor are connected to the metal ground layer through metal vias.

4. The high out-of-band rejection broadband filter integrated power amplifier according to claim 3, wherein The transistor is connected to a heat sink through a cut square hole on the dielectric substrate.

5. The high-band-out-of-band rejection broadband filtering integrated power amplifier according to claim 1, characterized in that The first open stub is composed of a first low-impedance transmission line and a first high-impedance transmission line. The impedance of the first low-impedance transmission line is lower than that of the first high-impedance transmission line. The output end of the second cascaded coupled line is connected to the input end of the first low-impedance transmission line, and the output end of the first low-impedance transmission line is connected to the input end of the first high-impedance transmission line.

6. The high out-of-band rejection broadband filtering integrated power amplifier according to claim 1, wherein The second open stub is composed of a second low-impedance transmission line and a second high-impedance transmission line. The impedance of the second low-impedance transmission line is lower than that of the second high-impedance transmission line. The input end of the third cascaded coupled line is connected to the input end of the second low-impedance transmission line, and the output end of the second low-impedance transmission line is connected to the input end of the second high-impedance transmission line.

7. The high out-of-band rejection broadband filter integrated power amplifier according to claim 3, characterized in that, The dielectric substrate is made of polytetrafluoroethylene glass fiber material.

8. The high-band-out-of-band rejection broadband filter integrated power amplifier according to claim 7, wherein The thickness of the metal ground layer is 30 - 40 μm, and the thickness of the dielectric substrate is 0.5 - 0.6 mm.

9. The high-band-out-of-band rejection broadband filtering integrated power amplifier according to claim 1, characterized in that, The transistor uses a gallium nitride high electron mobility transistor.

10. The high out-of-band rejection broadband filter integrated power amplifier according to claim 2, wherein The first power supply transmission line and the second power supply transmission line are also connected to bypass capacitors for filtering.

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