A true random number generator circuit

Abstract

The application discloses a true random number generator circuit and belongs to the field of novel storage and computing technology. The application uses the delay time of the opening of a volatile resistive switching device as a random source, builds a simple TRNG circuit, and only uses one inverter, T flip-flop, D flip-flop and XOR gate, without comparators, amplifiers, capacitors, clocks and the like, so that the circuit area and power consumption can be reduced. Compared with the conventional CMOS circuit and the TRNG based on the novel memory device reported at present, the application uses the volatile resistive switching device to build the TRNG, has the advantages of simple circuit structure, no need of post-calibration processing circuit and fast random number generation rate, and realizes the high-speed and reliable TRNG.

Description

Technical Field

[0001] This invention relates to the field of novel storage and computing technologies, specifically to a true random number generator circuit design. Background Technology

[0002] The Internet of Things (IoT) is a vast network integrating information sensing and communication. With the rapid development of IoT technology, the number of intelligent electronic devices has exploded, posing significant challenges to the security of information transmission and storage. To effectively address issues such as information leakage and theft, a robust and reliable information security system is needed. Information security can be ensured through encryption technology during transmission and storage. Random number generation is fundamental to the entire encryption system; key algorithms, security protocols, and key generation all rely on the application of random numbers. Therefore, generating high-quality, independent, and unpredictable random numbers is the core and guarantee of information security technology.

[0003] A random number generator is a hardware device that generates random number sequences. Based on the characteristics of the generated random number sequences, they can be divided into true random number generators (TRNGs) and pseudo random number generators (PRNGs). Pseudo random number generators generate random numbers based on specific algorithms and logic processing, producing pseudo random numbers with periodicity and predictability. Although pseudo random number generators have a simple structure and a fast random number generation rate, because the generation algorithm uses a seed as the initial state, and the algorithm itself is deterministic, once the seed is determined, the output result can be completely reproduced and predicted. For systems with high security requirements, using pseudo random number generators makes them vulnerable to attacks, compromising system security. True random number generators, on the other hand, generate random numbers based on the inherent randomness of physical processes. Compared to pseudo random numbers, the random sequences generated by true random number generators are independent and unpredictable, and cannot be accurately predicted using mathematical algorithms. This significantly improves system security; therefore, building a high-quality and reliable true random number generator is crucial for ensuring the security of hardware systems. CMOS-based random number generators typically utilize thermal noise from oscillators, resistor-amplifier-analog / digital converter chains, and metastable components with capacitive feedback as sources of random entropy. Other sources include random telegraph noise, current disturbances after oxide soft breakdown, and time-dependent oxide breakdown processes. However, traditional CMOS-based TRNG circuits are complex, requiring additional calibration circuits to eliminate biases and ensure the randomness of the generated sequences, resulting in significant hardware costs and power consumption. TRNGs built using novel memory devices, such as resistive random access memory (RRAM) and magnetic tunnel junctions (MTJs), leverage their inherent randomness and offer advantages such as low area cost and low power consumption.

[0004] However, current RRAM-based TRNGs still face significant challenges in terms of random number generation rate, reliability, and circuit overhead. For example, using the random noise of RRAM read current as a random source requires high-precision extraction circuitry and additional complex calibration circuitry to improve the uniformity of the generated random sequence; using write time fluctuations of diffused RRAM as a random source faces issues of low speed and durability. Therefore, realizing a higher-speed, more reliable, and structurally simpler TRNG is of great significance. Summary of the Invention

[0005] To address the problems existing in the prior art, this invention proposes a true random number generator circuit. It utilizes the turn-on delay time of a volatile resistive switching device as the random source to construct a true random number generator. Compared with traditional TRNGs based on CMOS circuits and currently reported TRNGs based on novel memory devices, this invention, by constructing a TRNG using a volatile resistive switching device, has the advantages of simple circuit structure, no need for post-calibration processing circuits, and fast random number generation rate, achieving a high-speed and reliable TRNG.

[0006] The technical solution of the present invention is as follows:

[0007] A true random number generator circuit is characterized by using the turn-on delay time of a volatile resistive switching device as a random source, connecting the volatile resistive switching device in series with a fixed resistor, amplifying the response current of the volatile resistive switching device through voltage division by the fixed resistor, and leading out the voltage division at one end of the fixed resistor to the clock control signal of a T flip-flop. A series of pulses with the same amplitude and width are input to a volatile resistive switching device. A T flip-flop is used to detect whether the response current of the volatile resistive switching device reaches a threshold. When the volatile resistive switching device is turned on and the response current exceeds the threshold, the generated pulse voltage is higher than the trigger voltage of the T flip-flop, causing the signal of the T flip-flop to flip. Its output terminal is connected to the input terminal of a D flip-flop. The D flip-flop is used to store the previous state of the T flip-flop. The falling edge of the input pulse signal generates an opposite signal through an inverter, which is used as the trigger clock signal of the D flip-flop. The output signals of the T flip-flop and the D flip-flop are led out and connected to an XOR gate to obtain a 0 / 1 random bit stream signal indicating whether the volatile resistive switching device is turned on. That is, when the outputs of the T flip-flop and the D flip-flop are opposite, the random bit is "1"; when the outputs of the T flip-flop and the D flip-flop are the same, the random bit is "0".

[0008] Furthermore, this invention uses a volatile resistive switching device to generate a random source. This volatile resistive switching device employs either a bridge random access memory (CBRAM) or a threshold switch (TS) device. The CBRAM's threshold voltage fluctuates within different cycles due to inherent fluctuations in its internal conductive filaments. When a certain voltage is applied to the threshold switch device, the phase change material reaches its threshold transition temperature under the thermal effect of the current, undergoing an insulator-metal transition (IMT), changing from an initial insulating state to a metallic conductive state. The current increases instantaneously, and after the voltage is removed, the device returns to its initial high-resistivity state. Due to thermal disturbances, the device's current-voltage curve and the corresponding operating voltage exhibit a random distribution.

[0009] Furthermore, applying pulses of fixed amplitude and width to a volatile resistive switching device (RSD) results in a turn-on delay of approximately tens to hundreds of microseconds. Due to the inherent random fluctuations within the RSD, the turn-on delay also exhibits a random distribution. Therefore, by utilizing the randomness of the RSD's operating voltage and turn-on time, multiple identical pulses are applied to the device, causing fluctuations in the response current under different pulses. A threshold standard is set based on the magnitude of the response current corresponding to each pulse. If the current exceeds this threshold, the RSD turns on, generating a corresponding "1" bit; conversely, if the response current is below the threshold, it remains off, generating a corresponding "0" bit. By adjusting the amplitude or width of the applied pulse, the probability of "1" in the final generated random sequence can be adjusted. A larger pulse amplitude or width results in a higher probability of the RSD turning on, and a higher proportion of "1" in the final random sequence.

[0010] The random source used in the true random number generator of this invention is a resistive switching device with typical volatile characteristics, including bridge random access memory (CBRAM), threshold switch (TS) devices, etc. The intermediate dielectric layer of the threshold switch device can be a phase change material with insulator-metal transition (IMT) properties, such as VO₂O₃. x NbO x wait.

[0011] The present invention aims to propose a true random number generator (TRNG) that utilizes the probabilistic turn-on of volatile resistive switching devices to achieve a simple circuit structure and a high random number generation rate, which is of great significance for building a hardware security system.

[0012] The technical effects of this invention are as follows:

[0013] 1. Compared with existing TRNGs based on novel storage devices, this invention utilizes the probabilistic turn-on of volatile resistive switching devices as a random source, eliminating the need for additional reset operations. Furthermore, since the turn-on delay time of volatile resistive switching devices is approximately tens of nanoseconds to hundreds of microseconds, the operation is simple and the random number generation rate is fast.

[0014] 2. Due to its simple circuit structure, this invention only uses one inverter, T flip-flop, D flip-flop, and XOR gate, eliminating the need for comparators, amplifiers, capacitors, clocks, etc., which can reduce circuit area and power consumption. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of a true random number generator circuit according to the present invention. Detailed Implementation

[0016] The present invention will be further clearly and completely described below with reference to the accompanying drawings and specific embodiments.

[0017] This invention utilizes the probabilistic turn-on of a volatile resistive switching device (RSD) as a random source. Specifically, under a certain voltage scan, the current of the RSD responds to a sudden increase when it exceeds a threshold voltage. During the voltage retracement process, the current drops sharply at a voltage below the threshold voltage, returning to the initial high-resistivity state. Due to the inherent fluctuations within the device during the switching process, the current-voltage curve exhibits random fluctuations under multiple DC voltage scans, with the corresponding threshold voltage randomly distributed within a certain range. This provides the basis for the probabilistic turn-on of the device under a fixed pulse. Applying a pulse of a certain amplitude and width to the RSD results in a delay in turn-on, ranging from tens of nanoseconds to hundreds of microseconds. Applying consecutive identical pulses to the device produces a randomized delay time. Therefore, this randomness of the physical process can be used as a random source, combined with a subsequent random bitstream extraction circuit, to construct a complete random number generator.

[0018] Figure 1 This is a structural diagram of a true random number generator circuit according to the present invention. A volatile resistive device is connected in series with a fixed resistor. The voltage divider at one end of the fixed resistor is then connected to the clock control signal of a T flip-flop. The input of the T flip-flop is always connected to a high-voltage signal, and its output is connected to the input of a D flip-flop. The falling edge of the input pulse signal generates an opposite signal through an inverter, which is used as the trigger clock signal for the D flip-flop. The output signals of the T and D flip-flops are connected to an XOR gate to obtain a 0 / 1 random bit stream signal indicating whether the volatile resistive device is turned on.

[0019] A series of pulses of equal amplitude and width are input to a volatile resistive switching device (VPS). The device randomly turns on with each pulse. A voltage divider with fixed resistors amplifies the VPS's response current, which is then input to the subsequent detection and extraction circuit. A T flip-flop detects whether the device's response current reaches a threshold. When the device turns on and the response current exceeds the threshold, the generated pulse voltage is higher than the T flip-flop's trigger voltage, causing the T flip-flop's signal to flip. The falling edge of the input pulse signal generates an inverted signal, which serves as the trigger clock signal for a D flip-flop. The D flip-flop stores the previous state of the T flip-flop. When the rising edge of the input pulse arrives, the T flip-flop captures the device's response state and stores the response signal "0" / "1". When the falling edge of the input pulse arrives, this information is stored in the D flip-flop. When the rising edge of the next input pulse arrives, the device's second response state is stored as 1 bit information in the T flip-flop, while the D flip-flop still stores the previous information. The outputs of the T and D flip-flops are XORed using an XOR gate to obtain a random bit stream indicating whether the device is on or off. If the device is turned on, the T flip-flop and D flip-flop output opposite values, resulting in a random bit of "1". If the device is not turned on, the T flip-flop and D flip-flop output the same value, resulting in a random bit of "0".

[0020] This embodiment fully and in detail illustrates the implementation principle and circuit structure of TRNG based on volatile switching devices. Compared with TRNG based on traditional CMOS and other new memory devices, it has significantly reduced hardware costs and a simpler operation method, realizing a high-speed and reliable TRNG.

[0021] Finally, it should be noted that the purpose of disclosing the embodiments is to help further understand the present invention. However, those skilled in the art will understand that various substitutions and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. Therefore, the present invention should not be limited to the content disclosed in the embodiments, and the scope of protection of the present invention is defined by the scope of the claims.

Claims

1. A true random number generator circuit, characterized in that, Using the turn-on delay time of a volatile resistive switching device (VRS) as a random source, the VRS is connected in series with a fixed resistor. Through voltage division by the fixed resistor, the response current of the VRS is amplified. The voltage division at one end of the fixed resistor is connected to the clock control signal of a T flip-flop. A series of pulses with the same amplitude and width are input to the VRS. The T flip-flop detects whether the response current of the VRS reaches a threshold. When the VRS turns on and the response current exceeds the threshold, the generated pulse voltage is higher than the trigger voltage of the T flip-flop, causing the T flip-flop signal to flip. Its output is connected to the input of a D flip-flop, which stores the previous state of the T flip-flop. The falling edge of the input pulse signal generates an opposite signal through an inverter, which is used as the trigger clock signal for the D flip-flop. The output signals of the T and D flip-flops are connected to an XOR gate to obtain a 0 / 1 random bit stream signal indicating whether the VRS is turned on. That is, when the outputs of the T and D flip-flops are opposite, the random bit is "1"; when the outputs of the T and D flip-flops are the same, the random bit is "0".

2. The true random number generator circuit as described in claim 1, characterized in that, The volatile resistive switching device is a threshold switch (TS) device.

3. The true random number generator circuit as described in claim 1, characterized in that, The volatile resistive switching device adopts a bridge random access memory (CBRAM) structure.

4. The true random number generator circuit as described in claim 2, characterized in that, The intermediate dielectric layer of the threshold switching device is made of a phase change material with insulator-metal transition properties.

5. The true random number generator circuit as described in claim 4, characterized in that, The phase change material is VO x or NbO x .

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