A PCIe switching circuit switching method and device supporting multi-mode switching

Abstract

The present invention provides a PCIe switching circuit switching method and device supporting multi-mode switching, which compares the communication rates of the incoming port and the outgoing port of the currently received switching transaction, and parses the transaction type and the data payload length included in the switching transaction; selects the store-and-forward switching mode and switches to the outgoing port in the store-and-forward mode; for the completion transactions and memory write request packets with data payloads that need to be switched from the incoming port to the outgoing port and the data payload length is greater than one double word, according to the comparison result of the communication rates of the incoming port and the outgoing port, the length of the carried data payload is selected to be switched in the cut-through switching or store-and-forward mode; based on the PCIe switching circuit, the currently switched transaction is written into the cache, and the information of the currently selected transaction switching mode is stored in the cache while the transaction is written into the cache; the switching mode of the current transaction is determined according to the read transaction switching information. The present application automatically and dynamically selects the switching mode of the current switching transaction by hardware, improving the switching performance of the device.

Description

Technical Field

[0001] The present invention belongs to the field of integrated circuit design, and particularly relates to a PCIe switch circuit switching method and device supporting multi-mode switching. Background Art

[0002] The PCIe bus is the third-generation high-performance IO bus introduced after the first-generation EISA, ISA, VESA buses and the second-generation AGP, PCI, PCI-X buses, and is widely used in computer devices; in a PCIe device, the PCIe switch circuit is used to interconnect and communicate multiple electronic components or modules. The PCIe switch circuit generally has two or more PCIe ports, which depend on the link capabilities of the peer devices connected to the ports. Each port can be trained to different link widths and rates for transaction switching.

[0003] The transactions that need to be switched inside the PCIe switch circuit include memory transactions, IO transactions, configuration transactions, and message transactions. Among them, memory write requests and message transactions are forwarded transactions (Posted TLP) and do not require feedback completion packets; IO transactions, configuration transactions, and memory read requests are non-forwarded transactions (Non-Posted TLP, NP TLP) and require return of completion packets (Completion TLP); PCIe switch circuits with complex functions generally support two switching modes: cut-through and store-and-forward. Cut-through mode switching outputs the data packet from the output port without receiving the entire data packet, thus having the advantage of low switching latency, but having the disadvantage of high data retransmission and occupying link bandwidth after a tail error; store-and-forward mode switching is to receive and store the entire data packet and then output it from the output port. The switching latency is large, but the data retransmission occupies less link bandwidth after a tail data error.

[0004] There are few literatures on the implementation mechanism of PCIe switch circuits. From the perspective of applications, existing PCIe switch circuits that support both cut-through and store-and-forward switching modes only provide a global control register bit, and the circuit is fixedly configured by a configuration device such as user software to work in a certain switching mode, which cannot meet the user's differentiated switching requirements for different ports and transactions in actual applications, thus affecting the switching performance of the entire device. Summary of the Invention

[0005] Aiming at the problems existing in the prior art, the present invention provides a PCIe switch circuit switching method and device supporting multi-mode switching, which automatically and dynamically selects the switching mode of the current switching transaction by hardware, improving the switching performance of the device.

[0006] The present invention is realized through the following technical solutions:

[0007] A PCIe switching circuit switching method supporting multi-mode switching includes the following steps:

[0008] S1: Compare the communication rates of the incoming port and the outgoing port of the currently received switching transaction, and parse the transaction type and the data payload length included in the switching transaction;

[0009] S2: Select the store-and-forward switching mode for all NP transaction packets, completion packets without data payload, message request packets, completion packets with data payload length not greater than one double word, and memory write request packets that need to be switched from the incoming port to the outgoing port, and switch them to the outgoing port in the store-and-forward mode;

[0010] S3: For the completion transaction with data payload and data payload length greater than one double word and the memory write request packet that need to be switched from the incoming port to the outgoing port, select the cut-through switching or store-and-forward mode according to the comparison result of the communication rates of the incoming port and the outgoing port to switch the length of the carried data payload;

[0011] S4: Write the currently switched transaction using the cut-through mode or the store-and-forward mode into the cache, and store the selected current transaction switching mode information in the cache while writing the transaction into the cache;

[0012] S5: Determine the switching mode of the current transaction according to the read transaction switching information. If it is the cut-through mode, the completion transaction with data payload and the Mwr transaction entering from the incoming port are switched to the outgoing port in the cut-through mode, otherwise the transaction is forwarded in the store-and-forward mode.

[0013] Further, when judging to select the cut-through switching or the store-and-forward mode in step S3, if the communication rate of the incoming port is greater than or equal to the communication rate of the outgoing port, select the cut-through switching mode for the completion packet with data payload and data payload length greater than one double word and the memory write request packet entering from the incoming port;

[0014] If the communication rate of the incoming port is less than the communication rate of the outgoing port, select the cut-through mode to switch when the length of the data payload of the completion packet with data payload and the memory write request packet that need to be switched from the incoming port to the outgoing port exceeds the threshold, otherwise select the store-and-forward mode to switch.

[0015] Further, the threshold of the data payload length is determined by the ratio of the communication rates of the incoming port and the outgoing port, and the smaller the ratio, the larger the threshold value.

[0016] Further, when an error occurs during the writing process of the transaction in step S4, if the current transaction is selected as the store-and-forward switching mode, clear the cached part of the current transaction in the cache and no longer store the remaining part of the current transaction;

[0017] If the current transaction is selected to be in cut-through switching mode, continue to receive the current transaction and mark an error flag at the end of the transaction in the buffer when the current transaction reception ends.

[0018] Furthermore, the switching mode of the internal transactions of the PCIe switching circuit is related to the incoming and outgoing ports for switching, the type of switched transaction, and the length of the data payload included, and its switching mode is a dynamic switching mode.

[0019] Furthermore, for the switching lines composed of the same incoming port and outgoing port, if they are different transactions, the switching modes in the PCIe switching circuit may be different;

[0020] When the link communication rates of the incoming port and the outgoing port remain unchanged, if it is the same transaction within the same switching line, its switching mode is the same;

[0021] When the link communication rate of the incoming port or the outgoing port changes due to link re-training, if it is the same transaction within the same switching line, its switching mode may be different from that before the communication rate change.

[0022] A PCIe switching circuit switching device supporting multi-mode switching includes:

[0023] A write and buffer module, used for writing switched transaction packets, and generating switching mode information based on the packet information and the input / output port rate comparison information output by the rate comparison query module while writing, and writing the current transaction packet and the switching mode information into the buffer simultaneously;

[0024] A packet parsing module, used for receiving various switched transactions entering the PCIe switching circuit from the port controller of the incoming port, parsing the type, data payload length, and target outgoing port of the transaction according to the transaction header information and detecting the correctness of the transaction, and sending the switched transaction with no error detected in the transaction header information, its parsing result, and the detected error status to the write and buffer module;

[0025] A rate comparison query table module, used for obtaining the current communication rates of each port in the PCIe switching circuit and comparing the rates of different incoming and outgoing ports, and sending the communication rate comparison result of the incoming and outgoing ports corresponding to the transaction received by the current incoming port to the write and buffer module;

[0026] A read and switching module, used for reading the switched transaction and its switching mode information stored in the write and buffer module, selecting the switching mode of the current transaction according to the switching mode information and starting the switching opportunely;

[0027] An outgoing end receiving module, used for receiving the switched transaction packet from the read and switching module, and sending the transaction packet to the port controller for transmission according to the interface requirements of the port controller.

[0028] Further, the writing and caching module is used to make a judgment when the packet parsing module detects errors such as ECRC during the writing process of the current transaction. If the current transaction selects the store-and-forward switching mode, the cached part of the current transaction in the cache is cleared and the remaining part of the current transaction is no longer stored;

[0029] If the current transaction selects the cut-through switching mode, the current transaction continues to be received, and an error flag bit is marked at the end of the transaction in the cache when the reception of the current transaction ends.

[0030] Further, the reading and switching module is used to immediately start switching when the cut-through mode is selected according to the read switching mode information, or wait until the data in the cache reaches a preset quantity, and then read and switch the current transaction cache to the out-port receiving module;

[0031] When the store-and-forward mode is selected, after the entire transaction packet is stored in the cache, the transaction is read and switched to the out-port receiving module; when the error flag bit at the end of the transaction read by the reading and switching module in the cache is valid, the error information is notified to the out-port receiving module.

[0032] Further, the reading and switching module is used to generate switching mode information indicating the store-and-forward switching mode for all NP transaction packets, completion packets without data payloads, message request packets, completion packets with a data payload length not greater than one double word, and memory write request packets that need to be switched from the in-port to the out-port.

[0033] Compared with the prior art, the present invention has the following beneficial technical effects:

[0034] The present invention provides a PCIe switching circuit switching method and apparatus supporting multi-mode switching. Based on the comparison of the communication rates of the input and output ports of the PCIe switching circuit, the transaction type of the switching transaction, and the data payload length included, the switching mode of the current switching transaction is automatically and dynamically selected by hardware. It can support two switching methods, the cut-through mode and the store-and-forward mode, and the switching mode is automatically and dynamically selected by the communication rate ratio of the input and output ports, the switching transaction type, and the data payload length included, without software configuration. At the same time, for switching lines where the communication rate of the input port is greater than or equal to that of the output port, the cut-through switching mode is automatically selected, giving play to the advantages of small switching delay and high efficiency of the cut-through mode. Secondly, for NP transaction packets, completion packets without data payloads, message request packets, completion packets with a data payload length not greater than one double word, and memory write request packets, since they have no data payload or only one double word data payload, the additional switching delay caused by selecting the store-and-forward switching mode compared to the cut-through mode is almost negligible, but it avoids the occupation of the output port bandwidth by transaction retransmission when a transaction tail check error occurs, improving the performance of the apparatus. At the same time, for completion packets and memory write request packets with a data payload length greater than one double word on lines where the communication rate of the input port is less than that of the output port, the PCIe switching circuit automatically selects the switching mode according to the data payload length of the transaction. For transaction packets that have not reached the data payload threshold, the store-and-forward mode is adopted, and for transaction packets that exceed the data payload threshold, the cut-through switching mode is used for switching. Different port rate ratios have different data payload thresholds, which not only ensures that the entire PCIe device centered on the PCIe switching circuit has a moderate average data exchange delay, but also avoids excessive occupation of the link bandwidth when a transaction tail error occurs during the exchange of transaction packets with a large data payload in the store-and-forward mode, thus improving the switching performance of the PCIe device as a whole. Finally, both the cut-through mode and the store-and-forward mode write the current switching transaction into the cache, avoiding the logical overhead caused by the two switching modes using different paths for switching and simplifying the control. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 It is a flowchart of a PCIe switching circuit switching method supporting multi-mode switching according to the present invention;

[0036] Figure 2 It is a schematic diagram of a PCIe switching circuit in a specific embodiment of the present invention;

[0037] Figure 3 It is a schematic diagram of a PCIe switching circuit switching apparatus supporting multi-mode switching according to the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0038] The following further elaborates on the present invention in detail in combination with specific embodiments, which is an explanation rather than a limitation of the present invention.

[0039] To enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative work shall fall within the scope of protection of the present invention.

[0040] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and do not necessarily need to be used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0041] The present invention provides a PCIe switching circuit switching method supporting multi-mode switching, as Figure 1 shown, including the following steps:

[0042] S1: Compare the communication rates of the input port and the output port of the currently received switching transaction, and parse the transaction type and the data payload length included in the switching transaction;

[0043] S2: Select the store-and-forward switching mode for all NP transaction packets, completion packets without data payload, message request packets, completion packets with data payload length not greater than one double word, and memory write request packets that need to be switched from the input port to the output port, and switch them to the output port in the store-and-forward mode;

[0044] S3: For the completion transactions and memory write request packets with data payload and data payload length greater than one double word that need to be switched from the input port to the output port, according to the comparison result of the communication rates of the input port and the output port, select the cut-through switching or store-and-forward mode for the length of the data payload carried and perform switching;

[0045] S4: Write the currently switched transaction using the cut-through mode or the store-and-forward mode into the cache, and store the selected current transaction switching mode information in the cache while writing the transaction into the cache;

[0046] S5: Determine the switching mode of the current transaction according to the transaction exchange information read. If it is the cut-through mode, the completion transaction and Mwr transaction with data payload entering from this input port are switched to this output port in the cut-through mode; otherwise, forward this transaction in the store-and-forward mode.

[0047] Preferably, when determining whether to select the cut-through switching or the store-and-forward mode in step S3, if the communication rate of the input port is greater than or equal to the communication rate of the output port, select the cut-through switching mode for the completion packet and memory write request packet with data payload entering from this input port and the data payload length being greater than one double word;

[0048] If the communication rate of the input port is less than the communication rate of the output port, when the length of the data payload carried by the completion packet and memory write request packet with data payload entering from this input port and needing to be switched to this output port exceeds the threshold, select the cut-through mode for switching; otherwise, select the store-and-forward mode for switching.

[0049] Preferably, the threshold of the data payload length is determined by the ratio of the communication rates of the input port and the output port, and the smaller the ratio, the larger the threshold value.

[0050] Preferably, when an error occurs during the writing process of the transaction in step S4, if the current transaction is selected as the store-and-forward switching mode, clear the cached part of the current transaction in the cache and no longer store the remaining part of the current transaction;

[0051] If the current transaction is selected as the cut-through switching mode, continue to receive the current transaction and mark an error flag bit at the tail of the transaction in the cache when the current transaction reception ends.

[0052] Preferably, the switching mode of the internal transaction of the PCIe switching circuit is related to the switching input and output ports, the switching transaction type, and the data payload length included, and its switching mode is a dynamic switching mode.

[0053] Preferably, for the switching line composed of the same input port and output port, if they are different transactions, the switching modes in the PCIe switching circuit may be different;

[0054] When the link communication rates of the input port and the output port remain unchanged, if it is the same transaction in the same switching line, then their switching modes are the same;

[0055] When the link communication rate of the input port or the output port changes due to link re-training, if it is the same transaction in the same switching line, then its switching mode may be different from that before the communication rate change.

[0056] The present invention provides a PCIe switching circuit switching device supporting multi-mode switching, as Figure 2 shown, including:

[0057] A write and cache module, which is used to write an exchange transaction packet, and while writing, generate exchange mode information based on the packet information and the input / output port rate comparison information output by the rate comparison query module, and write the current transaction packet and the exchange mode information into the cache at the same time;

[0058] A packet parsing module, which is used to receive various exchange transactions entering the PCIe switching circuit from the port controller of the input port, parse the type, data payload length and target output port of the transaction according to the transaction header information, detect the correctness of the transaction, and send the exchange transaction whose transaction header information is not detected as an error, its parsing result, and the detected error status to the write and cache module;

[0059] A rate comparison query table module, which is used to obtain the current communication rate of each port in the PCIe switching circuit, compare the rates of different input ports and output ports, and send the communication rate comparison result of the input port and output port corresponding to the transaction received by the current input port to the write and cache module;

[0060] A read and exchange module, which is used to read the exchange transaction and its exchange mode information stored in the write and cache module, select the exchange mode of the current transaction according to the exchange mode information, and start the exchange opportunely;

[0061] An output end receiving module, which is used to receive the exchange transaction packet from the read and exchange module, and send the transaction packet to the port controller for sending according to the interface requirements of the port controller.

[0062] Preferably, the write and cache module is used to make a judgment when the packet parsing module detects an error such as ECRC in the transaction during the writing process of the current transaction. If the current transaction selects the store-and-forward switching mode, the cache part of the current transaction in the cache is cleared and the remaining part of the current transaction is no longer stored;

[0063] If the current transaction selects the cut-through switching mode, the current transaction continues to be received, and an error flag bit is marked at the end of the transaction in the cache when the current transaction reception ends.

[0064] Preferably, the read and exchange module is used to immediately start the exchange according to the read exchange mode information in the cut-through mode or wait until the data in the cache reaches a preset quantity, then read the current transaction cache and exchange it to the output end receiving module;

[0065] In the store-and-forward mode, when the entire transaction packet is stored in the cache, the transaction is read and exchanged to the output end receiving module; when the error flag bit at the end of the transaction read by the read and exchange module in the cache is valid, the error information is notified to the output end receiving module.

[0066] Preferably, the reading and switching module is configured to generate switching mode information indicating a store-and-forward switching mode for all NP transaction packets, completion packets without data payloads, message request packets, completion packets with a data payload length not greater than one double word, and memory write request packets that need to be switched from the ingress port to the egress port.

[0067] The present invention provides a preferred embodiment as follows:

[0068] As Figure 3 shown, this PCIe switching circuit has a total of eight ports. The physical layer, port controller of each port are connected to the switching device and also to other application logics; in this embodiment, the physical layer and port controller of each port are responsible for receiving character information sent by the peer device from the PCIe physical link, submitting transaction packets that need to be switched and forwarded to other ports to the switching device, and after the switching device dynamically selects an appropriate switching mode, switching the transaction to the physical layer and port controller of other ports; the switching device outputs the detected transaction error status to other application logics. Figure 1 The other application logics in do not belong to the content of the present invention. They are only for cooperating to illustrate the principle of the circuit of the embodiment of the present invention. They refer to any other functions that do not belong to PCIe transaction switching. For example, they can be a logical set including interrupt handling functions, configuration functions, fault handling functions, etc. There is no limitation here. To highlight the content of the present invention, the other application logics will not be elaborated further.

[0069] As Figure 2 shown, a switching device of a PCIe switching circuit supporting multi-mode switching is composed of a packet parsing module at the ingress port, a writing and caching module, a rate comparison lookup table module, a reading and switching module, and an egress receiving module at the egress port, and supports two switching modes: cut-through and store-and-forward;

[0070] The packet parsing module is configured to receive various switching transactions entering the PCIe switching circuit from the port controller at the ingress port, parse the type of the transaction according to the Fmt[2:0] and Type[4:0] fields in the transaction header, parse the data payload length according to the Length[9:0] field in the transaction header, determine the target egress port according to information such as the address, Requester ID, Completer ID, and Type[2:0] field in the transaction header, and perform correctness detection of the transaction according to transaction information such as the data link layer and transaction layer ECRC check results provided by the port controller, send the switching transaction with no error detected in the packet header, its parsing result, and the detected error status TLPErr to the writing and caching module, and at the same time send the error detected in the packet header or data payload part to the fault handling logic in other application logics located outside the switching device;

[0071] The rate comparison query table module is used to obtain the current communication rate of each port in the PCIe switching circuit based on the "negotiated link width" and "current link rate" status fields in the link status register of each port, compare the rates of different input and output ports, and send the communication rate ratio FPrate of the input and output ports corresponding to the transaction received by the current input port to the write and cache module; the maximum link width of the port in this embodiment is 8, and the maximum unidirectional communication rate is 5Gbps×8 = 40Gbps. All ports can negotiate to a single-channel link width and a single-channel link rate of 2.5Gbps. As analyzed in Table 1, the communication rate comparison value FPrate of the input and output ports in this embodiment is designed to be 4 bits, which can represent five cases: 1 / 16, 1 / 8, 1 / 4, 1 / 2, and 1 / 1.

[0072] Table 1

[0073]

[0074]

[0075] The write and cache module is used to write the switched transaction packet into the cache module. While writing, it generates the switching mode information SFthrld based on the packet information output by the packet parsing module and the input / output port rate comparison information FPrate output by the rate comparison query module, and writes the generated switching mode information SFthrld into the cache at the same time when writing the current transaction packet into the cache; when the TLPErr output by the packet parsing module received during the writing process of the transaction is valid: if the current transaction is selected as the store-and-forward switching mode, clear the cached part of the current transaction in the cache and no longer store the remaining part of the current transaction; if the current transaction is selected as the cut-through switching mode, continue to receive the current transaction and mark the error flag bit TLPErr at the end of the transaction in the cache when the current transaction reception ends.

[0076] For NP transaction packets, completion packets without data payloads, message request packets, completion packets with data payload lengths not greater than one double word (DW), and memory write request packets (MWr), the generated switching mode information SFthrld is 0011, indicating the store-and-forward mode; for completion packets and memory write request packets with data payloads that need to be switched from the input port to the output port and have data payload lengths greater than one double word:

[0077] 1) When the communication rate of the input port is greater than or equal to the communication rate of the output port, the switching mode information SFthrld generated by the write and cache module for the above-mentioned completion packets and memory write request packets with data payloads that enter from the input port and have data payload lengths greater than one double word is 0000, indicating the cut-through mode;

[0078] 2) When the communication rate of the input port is less than that of the output port, for the complete packets and MWr transaction packets with data payloads that need to be switched from the input port to the output port and the length of the data payload is greater than one double word, when the length of the data payload carried by them exceeds the threshold, the generated switching mode information SFthrld is equal to the input-output port communication rate comparison code Fprate, indicating the cut-through mode; otherwise, the generated switching mode information SFthrld is 0011, indicating the store-and-forward mode; the threshold of the data payload length depends on the communication rate ratio of the input port and the output port represented by Fprate. When the rate ratio represented by Fprate is greater than or equal to 1 / 4, the threshold of the data payload length is 128 bytes. When the rate ratio represented by Fprate is 1 / 8, the threshold of the data payload length is 512 bytes; when the rate ratio represented by Fprate is 1 / 16, the threshold of the data payload length is 1024 bytes;

[0079] The read and switch module is used to read the switching transactions and their switching mode information stored in the write and cache module, select the switching mode of the current transaction according to the switching mode information and start switching opportunistically: when the read switching mode information SFthrld is 0000, indicating that the cut-through mode is selected and the communication rate of the input port is greater than or equal to that of the output port, immediately start switching and read the remaining part of the transaction to switch to the output port; when the read SFthrld is 0011, it indicates that the store-and-forward mode is selected, and when the complete transaction packet is stored in the cache, read and switch it to the output receiving module; when the read SFthrld is 1000, 1100, 1110, 1111, it indicates that the cut-through mode is selected and the communication rate of the input port is less than that of the output port. When the amount of data Lstore stored in the cache and the data length Ltlp indicated by the length field of the transaction satisfy the condition of Lstore≥Ltlp×SFthrld / 16, read and switch the complete transaction with data payload and P transaction to the output receiving module;

[0080] Further, when the tail error flag bit TLPErr of the transaction in the cache read by the read and switch module is valid, the read and switch module notifies the output receiving module of the valid information of TLPErr in the form of a signal;

[0081] The output receiving module is used to receive the switched transaction packets from the read and switch module and send the transaction packets to the port controller for transmission according to the interface requirements of the port controller; when receiving the tail of the transaction packet, if the read and switch module notifies that the transaction TLPErr is valid by a signal, the output receiving module enables the error indication signal of the port controller when sending the current transaction packet to the port controller, so that the port controller ends the current transaction packet with the EDB (End Data Bad) symbol.

[0082] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A PCIe switching circuit switching method supporting multi-mode switching, characterized in that, Including the following steps: S1: Compare the communication rates of the incoming port and the outgoing port of the currently received switching transaction, and parse the transaction type and the data payload length included in the switching transaction; S2: Select the store-and-forward switching mode for all NP transaction packets, completion packets without data payload, message request packets, completion packets with a data payload length not greater than one double word, and memory write request packets that need to be switched from the incoming port to the outgoing port, and switch them to the outgoing port in the store-and-forward mode; S3: For the completion transactions with a data payload and a data payload length greater than one double word and memory write request packets that need to be switched from the incoming port to the outgoing port, select the cut-through switching or store-and-forward mode according to the comparison result of the communication rates of the incoming port and the outgoing port to perform the switching for the length of the carried data payload; S4: Write the currently switched transaction using the cut-through mode or the store-and-forward mode into the cache, and store the selected current transaction switching mode information in the cache while writing the transaction into the cache; S5: Determine the switching mode of the current transaction according to the read transaction switching information. If it is the cut-through mode, the completion transactions with a data payload and MWr transactions entering from the incoming port are switched to the outgoing port in the cut-through mode, otherwise they are forwarded in the store-and-forward mode.

2. The switching method of a PCIe switching circuit supporting multi-mode switching according to claim 1, wherein When judging and selecting the cut-through switching or store-and-forward mode in step S3, if the communication rate of the incoming port is greater than or equal to the communication rate of the outgoing port, select the cut-through switching mode for the completion packets with a data payload and a data payload length greater than one double word and memory write request packets entering from the incoming port; If the communication rate of the incoming port is less than the communication rate of the outgoing port, select the cut-through mode for the completion packets with a data payload and memory write request packets entering from the incoming port and needing to be switched to the outgoing port when the length of the carried data payload exceeds the threshold, otherwise select the store-and-forward mode for the switching.

3. The switching method of a PCIe switching circuit supporting multi-mode switching according to claim 2, wherein The threshold of the data payload length is determined by the ratio of the communication rates of the incoming port and the outgoing port, and the smaller the ratio, the larger the threshold value.

4. The switching method of a PCIe switching circuit supporting multi-mode switching according to claim 1, wherein When an error occurs during the writing process of the transaction in step S4, if the current transaction is selected as the store-and-forward switching mode, clear the cached part of the current transaction in the cache and no longer store the remaining part of the current transaction; If the current transaction is selected as the cut-through switching mode, continue to receive the current transaction and mark an error flag at the end of the transaction in the cache when the current transaction reception ends.

5. The switching method of a PCIe switching circuit supporting multi-mode switching according to claim 1, characterized in that, The switching mode of the internal transaction of the PCIe switching circuit is related to the incoming and outgoing ports for switching, the switching transaction type, and the data payload length included, and its switching mode is a dynamic switching mode.

6. The switching method of a PCIe switching circuit supporting multi-mode switching according to claim 1, wherein For the switching lines composed of the same incoming port and outgoing port, if they are different transactions, the switching modes in the PCIe switching circuit may be different; When the link communication rates of the incoming port and the outgoing port remain unchanged, if it is the same transaction in the same switching line, its switching mode is the same; When the link communication rate of the incoming port or the outgoing port changes due to link re-training, if it is the same transaction in the same switching line, its switching mode may be different from that before the communication rate change.

7. A PCIe switching circuit switching device supporting multi-mode switching, characterized in that, A switching method for a PCIe switching circuit supporting multi-mode switching according to any one of claims 1-6, comprising: A write and cache module, configured to write an exchange transaction packet, and generate exchange mode information based on the packet information and the input / output port rate comparison information output by the rate comparison query module while writing, and write the current transaction packet and the exchange mode information into the cache simultaneously; A packet parsing module, configured to receive various exchange transactions entering the PCIe switching circuit from the port controller of the input port, parse the type, data payload length, and target output port of the transaction according to the transaction header information, detect the correctness of the transaction, and send the exchange transaction with undetected errors in the transaction header information, its parsing result, and the detected error status to the write and cache module; A rate comparison query table module, configured to obtain the current communication rate of each port in the PCIe switching circuit and compare the rates of different input ports and output ports, and send the communication rate comparison result of the input port and output port corresponding to the transaction received by the current input port to the write and cache module; A read and exchange module, configured to read the exchange transaction and its exchange mode information stored in the write and cache module, select the exchange mode of the current transaction according to the exchange mode information, and start the exchange opportunely; An output end receiving module, configured to receive the exchange transaction packet from the read and exchange module, and send the transaction packet to the port controller for sending according to the interface requirements of the port controller.

8. The PCIe switch circuit switching device supporting multi-mode switching according to claim 7, characterized in that, The write and cache module is configured to make a judgment when the packet parsing module detects errors such as ECRC in the current transaction during the writing process of the current transaction. If the current transaction selects the store-and-forward switching mode, the cache part of the current transaction in the cache is cleared and the remaining part of the current transaction is no longer stored; If the current transaction selects the cut-through switching mode, the current transaction continues to be received, and an error flag bit is marked at the end of the transaction in the cache when the reception of the current transaction ends.

9. The PCIe switch circuit switching device supporting multi-mode switching according to claim 7, characterized in that The read and exchange module is configured to immediately start the exchange according to the read exchange mode information when the cut-through mode is selected, or wait until the data in the cache reaches a preset quantity, and then read and exchange the current transaction cache to the output end receiving module; When the store-and-forward mode is selected, after the entire transaction packet is stored in the cache, the transaction is read and exchanged to the output end receiving module; When the error flag bit at the end of the transaction in the cache read by the read and exchange module is valid, the error information is notified to the output end receiving module.

10. The PCIe switch circuit switching device supporting multi-mode switching according to claim 7, characterized in that, The read and exchange module is configured to generate exchange mode information indicating the store-and-forward switching mode for all NP transaction packets, completion packets without data payloads, message request packets, completion packets with a data payload length not greater than one double word, and memory write request packets that need to be exchanged from the input port to the output port.

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