Power failure detection circuit and server device

By using programmable logic devices in the server to record and output power detection signals, the problem of difficult power fault diagnosis without BMC devices is solved, and efficient location and diagnosis of power faults are achieved.

CN115639900BActive Publication Date: 2026-02-27HANGZHOU HIKVISION DIGITAL TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202211232043.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-30
Publication Date
2026-02-27
Estimated Expiration
2042-09-30

AI Technical Summary

Technical Problem

In server systems, the absence of a BMC device makes it difficult to effectively locate motherboard problems, leading to difficulties in diagnosing power supply failures.

Method used

By setting up programmable logic devices in the server, power detection signals are recorded and stored, and when a fault detection signal is received from the panel buttons, a power detection signal is output to the signal output interface to realize fault location of power status.

Benefits of technology

When a server device experiences a startup anomaly, the fault detection signal output from the panel buttons can be reused to output power status information and locate the fault, thereby reducing hardware diagnostic costs and improving the efficiency of fault location.

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Abstract

The application discloses a power failure detection circuit and a server device. The power failure detection circuit comprises a signal recording end connected with a mainboard power supply of the server device, a panel key input end connected with a panel key of the server device, a signal output end connected with an external interface of the server device, a programmable logic device, a signal recording interface of the programmable logic device connected with the signal recording end, a panel key access interface of the programmable logic device connected with the panel key input end, and a signal output interface of the programmable logic device connected with the signal output end. The programmable logic device records and stores a power detection signal output by the signal recording end. The programmable logic device is further used for reading and outputting the power detection signal to the signal output interface when receiving a failure detection key signal accessed by the panel key input end.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of server, in particular to a power failure detection circuit and a server device. BACKGROUND

[0002] With the continuous development of server technology, the function is also more and more perfect, and the diagnosis function of the system plays an important role in solving the server problem. At present, the power-on diagnosis in the server system usually depends on the BMC (Baseboard Management Controller) device, and the cooperation of BMC and CPLD (Complex Programmable Logic Device) can improve the fault positioning ability of hardware. If the BMC device is not set, the problem on the server mainboard cannot be positioned. SUMMARY

[0003] The main purpose of the present application is to provide a power failure detection circuit and a server device, which aims to reuse and receive the fault detection key signal of the panel key output to realize the fault positioning of the power situation information.

[0004] To achieve the above purpose, the present application provides a power failure detection circuit, which comprises:

[0005] A signal recording end is used for connecting with the mainboard power supply of the server device;

[0006] A panel key input end is used for connecting with the panel key of the server device;

[0007] A signal output end is used for connecting with the external interface of the server device;

[0008] A programmable logic device, the signal recording interface of the programmable logic device is connected with the signal recording end, the panel key access interface of the programmable logic device is connected with the panel key input end, and the signal output interface of the programmable logic device is connected with the signal output end;

[0009] The programmable logic device records and stores the power detection signal output by the signal recording end; the programmable logic device is also used for reading and outputting the power detection signal to the signal output interface when receiving the fault detection key signal accessed by the panel key input end.

[0010] As an example, the programmable logic device comprises:

[0011] A signal recording storage circuit is connected with the signal recording end, and the signal recording storage circuit is used for receiving and storing the power detection signal through the signal recording end;

[0012] a signal output control circuit connected with the signal recording storage circuit and the panel key input end respectively, the signal output control circuit being configured to read and output the power detection signal to the signal output interface when receiving the fault detection key signal inputted by the panel key input end.

[0013] As an example, the signal recording storage circuit comprises:

[0014] a signal recording module connected with the signal recording end, the signal recording storage circuit being configured to receive the power detection signal through the signal recording end;

[0015] a storage module connected with the signal recording module, the storage module being configured to store the power detection signal.

[0016] As an example, the signal output control circuit comprises:

[0017] a signal output module connected in series between the storage module and the signal output end;

[0018] a control module, a signal receiving end of the control module being connected with the panel key input end, a control end of the control module being connected with a controlled end of the signal output module, the control module being configured to control the signal output module to read and output the power detection signal to the signal output interface when receiving the fault detection key signal inputted by the panel key input end.

[0019] As an example, the programmable logic device further comprises an interface switching circuit, a first transmission end of the interface switching circuit being connected with the signal output module, a second transmission end of the interface switching circuit being configured to be connected with a controller of a server device, an output end of the interface switching circuit being connected with the signal output interface.

[0020] The control module is further configured to control the first transmission end of the interface switching circuit to be in communication with the signal output interface to output the power detection signal to the signal output interface when receiving the fault detection key signal inputted by the panel key input end.

[0021] As an example, the signal output control circuit is further connected with the controller of the server device, the signal output control circuit being further configured to control the second transmission end of the interface switching circuit to be in communication with the signal output interface to receive system information outputted by the controller of the server device and output the system information to the signal output interface when receiving the start feedback signal outputted by the controller of the server device.

[0022] As an example, the signal recording storage circuit is further connected with a controller of a server device through the signal recording terminal; the signal recording storage circuit is further configured to output the standby signal to the signal output terminal through the standby signal outputted by the controller of the server device.

[0023] The signal output control circuit is further configured to read and output the standby signal to the signal output terminal when receiving a fault detection key signal inputted by the panel key input terminal.

[0024] As an example, the signal output control circuit is further connected with a controller of a server device, and the signal output control circuit is further configured to read and output the power detection signal to the signal output terminal when receiving a viewing control signal outputted by the controller of the server device.

[0025] As an example, the power fault detection circuit further comprises:

[0026] an enable signal output terminal configured to be connected with a mainboard power supply of a server device;

[0027] The programmable logic device is further configured to output a power enable signal to the mainboard power supply of the server device through the enable signal output terminal.

[0028] As an example, the signal output terminal of the programmable logic device is a serial port.

[0029] And / or, the programmable logic device is a CPLD.

[0030] As an example, the power fault detection circuit further comprises:

[0031] a standby power supply connected with the programmable logic device.

[0032] The present application also provides a server device, which comprises a mainboard power supply, a panel key and a power fault detection circuit as described above.

[0033] The signal recording terminal of the power fault detection circuit is connected with the mainboard power supply, and the panel key input terminal of the power fault detection circuit is connected with the panel key.

[0034] As an example, the server device further comprises a controller connected with the signal output control circuit of the power fault detection circuit; the controller is configured to control the signal output control circuit to read and output the power detection signal to the signal output terminal when receiving a viewing control signal outputted by the controller of the server device.

[0035] The application records and stores the power detection signal output by the signal recording end through the programmable logic device, and reads and outputs the power detection signal to the signal output interface when receiving the fault detection key signal output by the panel key. BRIEF DESCRIPTION OF DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description only show some of the embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of the drawings shown.

[0037] Figure 1 The circuit structure schematic diagram of an embodiment of the application of the power supply fault detection circuit applied to the server device.

[0038] Explanation of reference numerals:

[0039] Label Name Label Name 100 Programmable logic device 122 Control module 110 Signal record storage circuit 130 Interface switching circuit 111 Signal record module 200 Mainboard power supply 112 Storage module 300 Panel key 120 Signal output control circuit 400 Controller 121 Signal output module 500 RS232 interface chip

[0040] The implementation, functional features and advantages of the present application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0041] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0042] It should be noted that if the present application involves directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement condition, etc. between the components in a certain posture (as shown in the drawings), if the certain posture changes, the directional indications will also change accordingly.

[0043] In addition, if the description of "first", "second" and the like is involved in the embodiments of the present application, the description of "first", "second" and the like is only for the purpose of description, and cannot be understood as indicating or implying the relative importance of the indicated technical features or implicitly indicating the number of the indicated technical features. Therefore, the features limited by "first", "second" can be explicitly or implicitly included at least one of the features. In addition, the technical solutions of various embodiments can be combined with each other, but it must be based on the realization of ordinary skilled in the art, when the combination of technical solutions appears contradictory or unachievable, it should be considered that the combination of technical solutions does not exist, and is not within the protection scope required by the present application.

[0044] The term "and / or" herein is only a description of the association relationship of the associated objects, which means that there can be three kinds of relationships, for example, A and / or B can represent the existence of A alone, the existence of A and B at the same time, and the existence of B alone. In addition, the character " / " herein generally represents that the front and rear associated objects are in an "or" relationship.

[0045] The present application provides a power failure detection circuit, which can be applied to a server, and realizes power failure positioning of the server by using panel keys of the server.

[0046] Reference Figure 1 In an embodiment of the present application, the power failure detection circuit comprises:

[0047] A signal recording end is used for connecting with a mainboard power supply 200 of a server device;

[0048] A panel key input end is used for connecting with a panel key 300 of the server device;

[0049] A signal output end is used for connecting with an external interface of the server device;

[0050] A programmable logic device 100, a signal recording interface of the programmable logic device 100 is connected with the signal recording end, a panel key 300 interface of the programmable logic device 100 is connected with the panel key input end, and a signal output interface of the programmable logic device 100 is connected with the signal output end; wherein,

[0051] The programmable logic device 100 records and stores a power detection signal output by the signal recording end; the programmable logic device 100 is further used for reading and outputting the power detection (Power Good) signal to the signal output interface when receiving a failure detection key signal input by the panel key input end.

[0052] The power failure detection circuit further comprises:

[0053] an enable signal output terminal, configured to be connected with a mainboard power supply 200 of the server device;

[0054] The programmable logic device 100 is further configured to output a power enable signal to the mainboard power supply 200 of the server device through the enable signal output terminal.

[0055] A standby power supply (not shown in the figure) is connected with the programmable logic device 100. The standby power supply, i.e., the stand-by power supply, is different from the mainboard power supply 200, and can supply power to the programmable logic device 100 and other devices when the server is powered off, in standby mode, or in the case of power failure, to ensure the normal use of basic functions of the server.

[0056] In the embodiment, the programmable logic device 100 can be a CPLD (Complex Programmable Logic Device), a PLD (Programmable Logic Device), or an FPGA (Field Programmable Gate Array). The power failure detection circuit of the embodiment is applied to a server device, which has a shell, a mainboard and the mainboard power supply 200 arranged in the shell, functional modules arranged on the mainboard, and a panel button 300 arranged on the shell. The programmable logic device 100 in the embodiment can be arranged on the mainboard of the server device, and can be connected with the panel button 300, the mainboard power supply 200, and a controller 400 arranged on the mainboard. The programmable logic device 100 can receive a key instruction, such as a power-on instruction or a power-off instruction, output by the panel button 300 when the panel button 300 is triggered by a user. The programmable logic device 100 can output a power enable (Power En) signal to the mainboard power supply 200 according to the received power-on instruction, to make the mainboard power supply 200 power on. The mainboard power supply 200 can supply power to the functional modules and integrated chips on the mainboard. It can be understood that the panel button 300 can be configured as a power-on button or a power-off button when it is working normally, and can be configured as a fault checking button when the server is powered on abnormally. That is, the panel button 300 can be multiplexed in function, and as an example, different key combinations can be combined into a specific key combination sequence by different numbers of single key presses, different numbers of key presses, and different key press durations, to control the output of the mainboard power supply 200 to an external interface. The external interface can be used to connect external devices, such as a PC client or an external display device, which can be used to display the problem power supply of the mainboard of the server.

[0057] In the process of powering on the mainboard power supply 200, the mainboard power supply 200 feeds back a power detection (Power Good) signal about the power-on condition of the power supply to the programmable logic device 100, that is, a PowerGood signal: a power state monitoring signal. The programmable logic device 100 records and stores the power detection signal fed back by the mainboard power supply 200, and the power detection signal can be used to determine whether the power supply is normal. For example, when the mainboard power supply 200 is normally powered on, the mainboard power supply 200 can feed back a high-level power detection signal, and when the mainboard power supply 200 is powered on abnormally, the mainboard power supply 200 can feed back a low-level power detection signal. The mainboard power supply 200 is provided with multiple power supply outputs, and for each power supply output, a power detection signal can be output. When the power supply information is viewed, it can be seen which power supply has failed, and thus the fault problem can be located.

[0058] When the server device has a power failure, the mainboard power supply 200 cannot start up, and thus cannot supply power to the functional modules on the mainboard, so that the server device cannot start up and work normally, which can result in the server device not being able to start up normally. If the server device is provided with a BMC device (Baseboard Management Controller) 400 on the mainboard, the BMC and the CPLD can work together to perform the function of fault location of hardware. If the server device is not provided with a BMC on the mainboard, the mainboard fault cannot be diagnosed, and the server device needs to be disassembled for repair.

[0059] Therefore, the present embodiment uses a hardware structure in which the panel key 300 outputs a key instruction to the programmable logic device 100, receives a fault detection key signal (KEY) generated by the user triggering the panel key 300, and when the fault detection key signal is received, the programmable logic device 100 outputs the stored power detection signal to the external interface of the server device, such as a serial port, a network port, etc., so as to transmit the power supply condition to the receiving device of the user, and the maintenance personnel can directly receive the information through the external receiving device to locate the power supply fault.

[0060] In actual application, the user sends a start-up instruction through the panel button 300 on the shell, or sends a start-up instruction to the server device through remote start or other ways, which can be output to the mainboard power supply 200 after being received by the enable control module 122 on the mainboard and generating a power enable signal, or the signal level of the power button changes when the panel button 300 of the server is pressed or the server receives the start-up instruction sent remotely, at which time the key signal of the power button is sent to the programmable logic device 100, which records and generates a power enable signal and then outputs it to the mainboard power supply 200. The mainboard power supply 200 starts power-up when receiving the power enable signal, and feeds back the power detection signal in the power-up process to the programmable logic device 100, which records and stores the power detection signal and the power enable signal. If the mainboard power supply 200 fails to power up, the user can send a fault checking instruction through the panel button 300 on the shell, that is, a fault detection button signal to the programmable logic device 100, which outputs the stored power detection signal to the external interface of the server device when receiving the fault detection button signal, so that the user can receive the information through an external receiving device to obtain the specific situation of the abnormality and locate the power failure. When the mainboard power supply 200 powers up normally, the server device can start working normally, and the user can also choose whether to check the power supply of the mainboard power supply 200 according to the needs, at which time the user can send a power checking instruction to the controller 400 of the server device, or send a start-up instruction through the panel button 300 on the shell to trigger the programmable logic device to send the power supply information to the external receiving device to complete the checking of the power supply, which is not limited here.

[0061] The present application sets a programmable logic device 100, and records and stores the power detection signal output by the signal recording end, so as to read and output the power detection signal to the signal output interface when receiving the fault detection button signal output by the panel button 300. The present application realizes the multiplexing and receiving of the fault detection button signal output by the panel button 300 to realize the output and checking of the power supply information and the power failure positioning when the server device fails to start.

[0062] Reference Figure 1 In an embodiment of the present application, the programmable logic device 100 includes:

[0063] The signal recording and storage circuit 110 is connected with the signal recording end, and is used to receive and store the power detection signal through the signal recording end;

[0064] The signal output control circuit 120 is connected with the signal recording storage circuit 110 and the panel key input end respectively, and is configured to read and output the power detection signal to the signal output interface when receiving the fault detection key signal input by the panel key input end.

[0065] In this embodiment, the signal recording storage circuit 110 can record and store the power detection signal output during the power-on process of the mainboard power supply 200. The power detection signal can be represented by high and low levels. The mainboard power supply 200 can be provided with multiple power supplies. According to the power-on state of each power supply, a power detection signal can be output. The signal recording storage circuit 110 can store these power detection signals respectively. The signal recording storage circuit 110 can also record and store the power enable signal output by the programmable logic device 100. The signal output control circuit 120 can identify the key signal output by the panel key input end. In different working conditions, according to the received key signal, the corresponding action is responded, for example, when the server device is working normally, the corresponding state information is output according to the received key signal, and when the server starts abnormally, the user triggers the fault detection key signal through the panel key 300. The signal output control circuit 120 reads and outputs the power detection signal to the signal output interface. In some embodiments, the signal output control circuit 120 can also read the power enable signal and output it to the signal output interface, so that the user can locate the power failure according to the power detection signal and the power enable signal.

[0066] As an example, the signal recording storage circuit 110 includes:

[0067] The signal recording module 111 is connected with the signal recording end. The signal recording storage circuit 110 is configured to receive the power detection signal through the signal recording end.

[0068] The storage module 112 is connected with the signal recording module 111 and is configured to store the power detection signal.

[0069] In the embodiment, the signal recording module 111 is configured to sample and record the signal at the signal recording end, and the storage module 112 is configured to store the power detection signal. The signal recording module 111 writes the power detection signal into the storage module 112, and the storage module 112 can also store software code information of the CPLD, pre-defined state information, and the like. The signal recording module 111 can be implemented by using an ADC sampling circuit, a register, and the like. The ADC sampling circuit acquires the power detection signal output by the power board and outputs the power detection signal to the register for temporary storage, and can also output the power detection signal to a storage medium, such as a memory, to store the power detection signal output by the power board during operation. The storage module 112 can be implemented by using a storage medium, such as a memory.

[0070] With reference to Figure 1 In an embodiment of the present application, the signal output control circuit 120 includes:

[0071] a signal output module 121 connected in series between the storage module 112 and the signal output end;

[0072] a control module 122, a signal receiving end of the control module 122 being connected to the panel key input end, a control end of the control module 122 being connected to a controlled end of the signal output module 121, and the control module 122 being configured to, when receiving a fault detection key signal input by the panel key input end, control the signal output module 121 to read and output the power detection signal to the signal output interface.

[0073] In the embodiment, the signal output module 121 can convert the information stored in the storage module 112 into information of the external interface type accessed by the signal output interface, for example, the signal output interface of the CPLD is a serial port, and the RS232 interface chip 500 is connected thereto, and then the signal output module 121 can convert the stored signal into a signal supporting the RS232 protocol. The control module 122 can receive the key instruction output by the panel key 300, or receive the control instruction output by the controller 400 on the server device, and output the corresponding state information in response to the instructions. In the embodiment, the panel key 300 can output a fault detection key signal, and the control module 122 can control the signal output module 121 to work when receiving the fault detection key signal, read the stored power supply detection signal, power supply enable signal and the like from the storage module 112, and output to the signal output interface, so as to output the power supply detection signal, power supply enable signal and the like to the external interface through the signal output interface. The signal output module 121 can be implemented by using an interface conversion circuit and the like. The control module 122 can be the control center of the programmable logic device 100, and can be implemented by using a logic array, a product term selection matrix, an I / O controller and a programmable interconnection array integrated in the programmable logic device 100.

[0074] With reference to Figure 1 In an embodiment of the present application, the programmable logic device 100 further comprises an interface switching circuit 130, a first transmission end of the interface switching circuit 130 is connected with the signal output module 121, a second transmission end of the interface switching circuit 130 is used for being connected with the controller 400 of the server device, and an output end of the interface switching circuit 130 is connected with the signal output interface.

[0075] The control module 122 is further used for, when receiving the fault detection key signal accessed by the panel key input end, controlling the first transmission end of the interface switching circuit 130 to be in communication with the signal output interface, so as to output the power supply detection signal to the signal output interface.

[0076] The signal output control circuit 120 is further connected with the controller 400 of the server device, and the signal output control circuit 120 is further used for, when receiving the start feedback signal output by the controller 400 of the server device, controlling the second transmission end of the interface switching circuit 130 to be in communication with the signal output interface, so as to receive the system information output by the controller 400 of the server device and output to the signal output interface.

[0077] In this embodiment, the interface switching circuit 130 corresponds to a single-pole double-throw switch. When the server device is working normally, the second transmission end of the interface switching circuit 130 and the signal output interface are set to be normally connected, that is, the controller 400 of the server device and the signal output interface are in a connected state by default. When the server device is normally powered on, the controller 400 is powered by the mainboard power supply 200, and initialization and other start-up work are completed. For example, after the BOOT boot program successfully guides the controller 400 to start, the controller 400 communicates with the signal output interface through the channel of the second transmission end, and outputs user serial port information or system serial port information (CPU UART) to the outside. Alternatively, the connection state of the interface switching circuit 130 can be controlled by the controller 400. When the server device is normally powered on, the controller 400 is powered by the mainboard power supply 200, and initialization and other start-up work are completed. For example, after the BOOT boot program successfully guides the controller 400 to start, the controller 400 outputs a start-up feedback signal to the programmable logic device 100, and the programmable logic device 100 switches the interface switching circuit 130 to be connected to the signal output interface through the second transmission end, so that the controller 400 can output user serial port information or system serial port information (CPU UART) to the outside. In the case of abnormal power-on of the server device, the control module 122 can control the first transmission end of the interface switching circuit 130 to be connected to the signal output interface through the fault detection key signal triggered by the panel key 300, so that the output module reads and outputs the power supply detection signal to the signal output interface. Without changing the connection relationship of the programmable logic device 100 and other components in the server device, that is, the hardware architecture, the user serial port information or system serial port information in the normal state and the power supply information in the abnormal state can be outputted by setting the interface switching circuit 130 in the programmable logic device 100, which is beneficial to reduce the cost of the server device and also solves the problem of difficult positioning of internal faults of a single board.

[0078] With reference to Figure 1 In an embodiment of the present application, the signal output control circuit 120 is also connected to the controller 400 of the server device. The signal output control circuit 120 is also used to read and output the power supply detection signal to the signal output interface when receiving the view control signal output by the controller 400 of the server device, that is, the control signal.

[0079] It can be understood that based on the actual application requirements, the power supply information or system function may be normal, or the server device part function is abnormal, does not affect the main function of the server device use, the user needs to check whether the system exists abnormal power failure and the like. At this time, the user can send a viewing instruction to the controller 400 through a user input device, such as a mouse, a keyboard, or a remote control and the like. The controller 400 can output a control signal to the signal output control circuit 120 to control the output control circuit to output the stored power supply detection signal when receiving the viewing instruction.

[0080] With reference to Figure 1 In an embodiment of the present application, the signal recording storage circuit 110 is further connected with the controller 400 of the server device through the signal recording end; the signal recording storage circuit 110 is further used for outputting a sleep signal output by the controller 400 of the server device through the signal recording end.

[0081] The signal output control circuit 120 is further used for reading and outputting the sleep signal to the signal output interface when receiving the fault detection key signal input through the panel key input end.

[0082] In the embodiment, the mainboard power supply 200 can supply power to the controller 400, and the number of the controller 400 on the mainboard can be multiple, and the mainboard power supply 200 provides a power supply for each controller 400 respectively. When the mainboard power supply 200 is powered on to the controller 400, the controller 400 will output a sleep signal, i.e. a sleep signal: the sleep state indication signal of the controller 400, which can be used to determine whether the corresponding controller 400 is powered on successfully. When the user triggers the fault detection key signal through the panel key 300, the signal output control circuit 120 outputs the recorded sleep signal, power detection signal and power enable signal to the external interface of the server device for the user to check the power supply of the single board power supply, i.e. the mainboard power supply 200 and the power-on condition of the CPU.

[0083] The present application further provides a server device.

[0084] With reference to Figure 1 The server device comprises a mainboard power supply 200, a panel key 300 and a power failure detection circuit as described above.

[0085] The signal recording end of the power failure detection circuit is connected with the mainboard power supply 200, and the panel key input end of the power failure detection circuit is connected with the panel key 300.

[0086] The detailed structure of the power failure detection circuit can refer to the above-mentioned embodiments, which will not be described here again. It can be understood that, since the above-mentioned power failure detection circuit is used in the server device of the present application, the embodiments of the server device of the present application include all the technical solutions of all the embodiments of the above-mentioned power failure detection circuit, and the technical effects achieved are also completely the same, which will not be described here again.

[0087] In the embodiment, the mainboard power supply 200 is used to output power supply to the functional modules on the mainboard to supply power to these functional modules. The power supply voltage of each functional module can be the same or different, for example, the power supply voltage of some functional modules such as integrated chips can be 3.3V or 5V, and therefore the mainboard power supply 200 can provide the required voltage for each functional module. In the process of powering on the mainboard power supply 200, when each power supply branch in the mainboard power supply 200 is in a connected state (i.e. connected to the input voltage), and the input voltage reaches the preset voltage, the mainboard power supply 200 can send out a high-level power detection signal indicating "normal power supply". When the input voltage does not reach the preset voltage, a low-level power detection signal indicating "power failure" signal can be sent out. The panel key 300 can be used for the on / off of the server device, setting of the working mode, etc., and in actual application, it can be set according to the type of the server and the functions to be realized, which is not limited here. The panel can be provided with on / off keys, UID (User Identification) keys, etc. The UID key can be used to identify the specified server machine by lighting the UID indicator lamp, thereby facilitating the operation and maintenance personnel. The number of panel keys 300 can be one or more, and in the embodiment, the fault detection key signal can be triggered based on one panel key 300 or multiple combinations. When triggered based on one panel key 300, the key has at least two functions, one of which is to trigger the fault detection key signal, and the other is the original function. When multiple combinations are used, the key signal sequence can be generated by a specific key combination on the device panel to trigger the fault detection key signal. When the server device starts abnormally, the present application reuses the original panel key of the product, and realizes the single board fault diagnosis by using the cooperation of the key combination and the CPLD, which reduces the cost and solves the problem of difficult positioning of the internal fault of the single board.

[0088] Reference Figure 1 In an embodiment of the present application, the server device further comprises a controller 400, and the controller 400 is connected with the signal output control circuit 120 of the power failure detection circuit; when receiving an information query instruction, the controller 400 controls the signal output control circuit 120 to read and output the power detection signal to the signal output interface when receiving the viewing control signal output by the controller 400 of the server device.

[0089] In the embodiment, the controller 400 can be a CPU, a single-chip microcomputer or other similar functional component, and the number of the controller 400 is one or more, and the power supply of the multiple controllers 400 can be the same or different. When the server is working normally, that is, the mainboard power supply 200 powers on the controller 400, successfully starts, and completes initialization and other work, the controller 400 can output a boot ok signal to the programmable logic device 100 in the power failure detection circuit, and the programmable logic device 100 detects the boot ok signal of the controller 400, and the default control interface switching circuit 130 is connected to the controller 400 and the signal output interface to realize the output of the user serial port information or the system serial port information. When the customer wants to view the power supply information on the single board or the system function, or there is an abnormality in the system, the programmable logic device 100 can be controlled by the control signal of the controller 400 to output the stored power supply detection signal, so that the user can view whether there is an abnormal power failure and the like. When the device cannot start, the controller 400 outputs a sleep signal to the programmable logic device 100, and the programmable logic device 100 detects the boot ok signal of the controller 400 as invalid level, and at this time the programmable logic device 100 can connect the interface switching circuit 130 to the output control circuit and the signal output interface. The user can input a specific key combination sequence to the output control circuit of the programmable logic device 100 through the specific key combination sequence on the device panel, that is, the failure detection key signal, and the output control circuit recognizes the key sequence instruction to output the single board power supply detection signal, the power enable signal and the sleep signal of the CPU when the boot feedback is invalid.

[0090] The above is only an optional embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structural transformation, direct / indirect application in other related technical fields based on the inventive concept of the present application and the content of the specification and drawings are included in the patent protection scope of the present application.

Claims

1. A power failure detection circuit, characterized by, The power failure detection circuit comprises: a signal recording end for connecting with a mainboard power supply of the server device; a panel key input end for connecting with a panel key of the server device; a signal output end for connecting with an external interface of the server device; a programmable logic device, a signal recording interface of the programmable logic device being connected with the signal recording end, a panel key access interface of the programmable logic device being connected with the panel key input end, and a signal output interface of the programmable logic device being connected with the signal output end; the programmable logic device records and stores the power detection signal output by the signal recording end; the programmable logic device is further used for reading and outputting the power detection signal to the signal output interface when receiving the failure detection key signal accessed by the panel key input end; the programmable logic device comprises: a signal recording storage circuit connected with the signal recording end, the signal recording storage circuit being used for receiving and storing the power detection signal through the signal recording end; a signal output control circuit connected with the signal recording storage circuit and the panel key input end respectively, the signal output control circuit being used for reading and outputting the power detection signal to the signal output interface when receiving the failure detection key signal accessed by the panel key input end; an interface switching circuit, a first transmission end of the interface switching circuit being connected with the signal output control circuit, a second transmission end of the interface switching circuit being connected with a controller of the server device, and an output end of the interface switching circuit being connected with the signal output interface; the signal output control circuit is further used for controlling the first transmission end of the interface switching circuit to be in communication with the signal output interface to output the power detection signal to the signal output interface when receiving the failure detection key signal accessed by the panel key input end; the signal output control circuit is further connected with the controller of the server device, and the signal output control circuit is further used for controlling the second transmission end of the interface switching circuit to be in communication with the signal output interface to receive the system information output by the controller of the server device and output to the signal output interface when receiving the start feedback signal output by the controller of the server device.

2. The power failure detection circuit of claim 1, wherein, the signal recording storage circuit comprises: a signal recording module connected with the signal recording end, the signal recording storage circuit being used for receiving the power detection signal through the signal recording end; a storage module connected with the signal recording module and used for storing the power detection signal.

3. The power failure detection circuit of claim 2, wherein, the signal output control circuit comprises: a signal output module arranged in series between the storage module and the signal output end; a control module, a signal receiving end of the control module being connected with the panel key input end, a control end of the control module being connected with a controlled end of the signal output module, and the control module being used for controlling the signal output module to read and output the power detection signal to the signal output interface when receiving the failure detection key signal accessed by the panel key input end.

4. The power failure detection circuit of claim 3, wherein, The first transmission end of the interface switching circuit is connected with the signal output module; The control module is further configured to, when receiving a fault detection key signal input through the panel key input end, control the first transmission end of the interface switching circuit to be in communication with the signal output interface, so as to output the power detection signal to the signal output interface.

5. The power failure detection circuit of claim 1, wherein, The signal recording storage circuit is further connected with a controller of a server device through the signal recording end, and is further configured to output a standby signal output by the controller of the server device through the signal recording end. The signal output control circuit is further configured to, when receiving the fault detection key signal input through the panel key input end, read and output the standby signal to the signal output interface. The signal output control circuit is further connected with the controller of the server device, and is further configured to, when receiving a viewing control signal output by the controller of the server device, read and output the power detection signal to the signal output interface.

6. A power failure detection circuit as claimed in any one of claims 1-5, characterized in that, The power fault detection circuit further comprises: an enable signal output end configured to be connected with a mainboard power supply of the server device; The programmable logic device is further configured to output a power enable signal to the mainboard power supply of the server device through the enable signal output end. The power fault detection circuit further comprises: a standby power supply connected with the programmable logic device.

7. A server device, characterized by The server device comprises a mainboard power supply, a panel key and the power fault detection circuit according to any one of claims 1-6. The signal recording end of the power fault detection circuit is connected with the mainboard power supply, and the panel key input end of the power fault detection circuit is connected with the panel key.

8. The server device of claim 7, wherein, The server device further comprises a controller connected with the signal output control circuit of the power fault detection circuit, and the controller is configured to, when receiving an information query instruction, control the signal output control circuit to, when receiving a viewing control signal output by the controller of the server device, read and output the power detection signal to the signal output interface.

Citation Information

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