A method and apparatus for soft decoding of a rotary transformer
By oversampling and error compensation of the sine and cosine signals of the resolver soft decoder, the problems of amplitude, zero-position offset and phase error in the resolver soft decoder are solved, and the accurate calculation of resolver angle and speed is realized, thereby improving the efficiency and reliability of motor control.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- WEIDIS MOTOR TECH (WUHU) CO LTD
- Filing Date
- 2022-10-25
- Publication Date
- 2026-07-03
AI Technical Summary
In existing technologies, the sine and cosine signals of resolver soft decoding have amplitude errors, zero-position offsets, and phase errors, which lead to inaccurate angle output of the software phase-locked loop, affecting the control efficiency of permanent magnet synchronous motors and potentially causing motor runaway.
By oversampling the sine and cosine signals from the resolver feedback by N times, the zero-position offset, amplitude, and phase difference of the envelope are calculated, and error compensation is performed. Finally, the corrected values are sent to the phase-locked loop to calculate the resolver's angle and rotational speed.
Accurate compensation for errors in the resolver sine and cosine signals improves the efficiency of motor control and avoids motor runaway problems caused by errors.
Smart Images

Figure CN115655190B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of motor technology, specifically relating to a calibration method and apparatus for soft decoding of resolvers. Background Technology
[0002] Because software decoding of resolvers does not require additional hardware chips, it has been increasingly widely used in electric drive products for new energy vehicles in recent years. However, inconsistencies exist between the resolver itself and the hardware sampling circuit. Furthermore, the software processing of the resolver's sine and cosine envelopes suffers from inaccurate zero-position offsets, leading to errors in the final resolver sine and cosine signals obtained through software de-envelopment: amplitude error, zero-position offset, and phase error. These three types of errors affect the linearity of the angle output of the software phase-locked loop, directly reducing efficiency for permanent magnet synchronous motor control and potentially causing motor runaway in severe cases. Therefore, how to compensate for these errors and accurately obtain the amplitude, zero-position, and phase difference of the resolver's sine and cosine envelopes has become a technical problem that needs to be solved in the current technology. Summary of the Invention
[0003] The purpose of this invention is to provide a calibration method for resolver soft decoding, which solves the technical problem in the prior art where the resolver sine and cosine signals obtained by software de-envelope have errors, making it impossible to accurately obtain the amplitude, zero offset, and phase difference of the resolver sine and cosine envelope surface through decoding.
[0004] The calibration method for resolver soft decoding includes: sampling the envelope surfaces of the sine and cosine feedback signals of the resolver feedback at N times the oversampling frequency to obtain sine and cosine oversampled signals; processing the sine and cosine oversampled signals to obtain the zero-position offset of the resolver sine and cosine envelope signals; processing the sine and cosine oversampled signals to obtain the amplitude of the resolver sine and cosine envelope surfaces; processing the sine and cosine oversampled signals to obtain the phase deviation of the resolver sine and cosine envelope surfaces; compensating the resolver sine and cosine envelope surfaces using the calculated amplitude, zero-position offset, and phase deviation; and sending the compensated signals into a phase-locked loop to obtain the resolver angle and rotation speed information.
[0005] Preferably, the process includes the following steps:
[0006] Step 1: Perform N-harmonic oversampling on the sine and cosine envelope surfaces of the resolver feedback;
[0007] Step 2: Average the sine and cosine oversampled signals respectively to obtain the zero-position offset of the sine and cosine envelope surfaces;
[0008] Step 3: Calculate the coefficients of the first-order DFT series for the sine and cosine oversampled signals to obtain the D-axis and Q-axis components of the sine and cosine envelope surfaces, respectively.
[0009] Step 4: Sum the squares of the D and Q axis components of the obtained sine and cosine, and then take the square root to obtain the amplitudes of the sine and cosine respectively.
[0010] Step 5: Perform arctangent operations on the D and Q axis components of the obtained sine and cosine to obtain the initial phase of the sine and cosine envelope surfaces in the DQ axis system.
[0011] Step 6: Subtract the initial sine and cosine phases to obtain the phase difference between the sine and cosine phases;
[0012] Step 7: Based on the zero-position offset of the sine and cosine envelopes obtained from calibration and the amplitude of the sine and cosine, perform amplitude and zero-position offset compensation on the original sine and cosine envelopes to obtain the standardized sine and cosine.
[0013] Step 8: Perform phase compensation on the per-unit value scalated in Step 7 using the obtained phase difference to obtain the correction values for the sine and cosine signals;
[0014] Step 9: Input the calculated correction value into the phase-locked loop to calculate the angle and speed of the resolver.
[0015] Preferably, in step 1, oversampling at N times the frequency and maintaining M complete cycles results in N*M sine and cosine oversampled signals. Let X(i) and Y(i) (i = 1, 2, 3…N*M) represent the sine and cosine oversampled signals, respectively.
[0016] Preferably, in step 2, the zero-position offset of the sine and cosine envelope surfaces is calculated. sin and Offset cos The formula is:
[0017]
[0018] Preferably, in step 3, the sine and cosine oversampled signals are multiplied by a unit discrete sine and cosine trigonometric function sequence of the same frequency, and then multiplied by 2 / (M*N) to obtain the Amp components of the sine and cosine envelope planes on the D and Q axes, respectively. sin_d Amp sin_q Amp cos_d Amp cos_q The specific formula is as follows:
[0019]
[0020] Preferably, in step 4, the amplitudes Amp of the sine and cosine sines are... sin Amp cos The specific formula is as follows:
[0021]
[0022] Preferably, in step 5, the initial phase θ of the sine and cosine envelope planes in the DQ axis system... sin θ cos The specific formula is as follows:
[0023]
[0024] In step 6, the phase difference between the sine and cosine... The formula is:
[0025] Preferably, in step 7, the zero offsets of the sine and cosine envelopes are respectively Offset. sin Offset cos The amplitudes of the sine and cosine are respectively Amp sin Amp sin Standardized sine and cosine Sin unit cos unit The specific formula is:
[0026]
[0027] In step 8, the correction values Sin and cosine signals are... cmpst cos cmpst The specific formula is:
[0028]
[0029] The present invention also provides an apparatus for implementing the above-described calibration method for resolver soft decoding, comprising a drag module, a sampling module, an error compensation module, and a phase-locked loop module. The error compensation module is used to implement the above-described calibration method for resolver soft decoding, calculate the sine and cosine amplitudes, zero-position offset, and phase difference of the resolver to be calibrated, and output the corrected sine and cosine signals.
[0030] Preferably, the dragging module is used to drag the controller to be calibrated at a fixed speed and stabilize it at the calibration speed; the sampling module is used to oversample the sine and cosine envelope signals of the resolver feedback at N times the sampling frequency to obtain the signal to be processed; the phase-locked loop module performs phase-locked calculation on the compensated and corrected sine and cosine signals to obtain the angle and speed of the resolver.
[0031] The present invention has the following advantages: The present invention performs a series of calculations on the oversampled sine and cosine oversampled signals to obtain accurate amplitude, zero offset and phase difference. Then, it can compensate for the errors of the processed sine and cosine signals based on the three errors calculated in the above process, and finally obtain the corrected sine and cosine signals (i.e., correction values). The angle and speed of the resolver are calculated by phase-locked loop on the correction values, and the results are accurate, which effectively ensures the efficiency of the motor and overcomes the problem of reduced efficiency or even loss of control of motor control due to the large errors of the above three types. Attached Figure Description
[0032] Figure 1 This is a schematic diagram of an apparatus for implementing a calibration method for resolver soft decoding according to the present invention.
[0033] Figure 2 for Figure 1 The flowchart shows the calibration method implemented by the error compensation module in the structure shown. Detailed Implementation
[0034] The following detailed description of the embodiments, with reference to the accompanying drawings, will further illustrate the specific implementation of the present invention, in order to help those skilled in the art to have a more complete, accurate, and thorough understanding of the inventive concept and technical solutions of the present invention.
[0035] like Figure 1-2 As shown, this invention provides a calibration method for resolver soft decoding, comprising the following steps: sampling the envelope surfaces of the sine and cosine feedback signals of the resolver feedback at N times the oversampling frequency to obtain sine and cosine oversampled signals; processing the sine and cosine oversampled signals to obtain the zero-position offset (i.e., bias) of the resolver sine and cosine envelope signals; processing the sine and cosine oversampled signals to obtain the amplitude of the resolver sine and cosine envelope surfaces; processing the sine and cosine oversampled signals to obtain the phase deviation of the resolver sine and cosine envelope surfaces; compensating the resolver sine and cosine envelope surfaces using the calculated amplitude, zero-position offset, and phase deviation; and sending the compensated signals into a phase-locked loop to obtain the resolver angle and rotation speed information.
[0036] Specifically, the above content includes the following steps.
[0037] Step 1: Oversample the sine and cosine envelopes of the resolver feedback by N times, and retain them for M complete cycles. This yields N*M sine and cosine oversampled signals. Let X(i) and Y(i) (i = 1, 2, 3…N*M) represent the sine and cosine oversampled signals, respectively.
[0038] Step 2: Averaging the sine and cosine oversampled signals separately yields the zero-offset of the sine and cosine envelopes. sin and Offset cosThe formula is:
[0039]
[0040] Step 3: Perform dot product operations on the sine and cosine oversampled signals with unit discrete sine and cosine trigonometric function sequences of the same frequency, and then multiply by 2 / (M*N). Essentially, this calculates the coefficients of the first-order DFT series. This yields the Amp components of the sine and cosine envelope surfaces along the D and Q axes, respectively. sin_d Amp sin_q Amp cos_d Amp cos_q The specific formula is as follows:
[0041]
[0042] Step 4: Sum the squares of the D-axis and Q-axis components of the sine and cosine obtained in Step 3, and then take the square root to obtain the amplitudes Amp of the sine and cosine, respectively. sin Amp cos The specific formula is as follows:
[0043]
[0044] Step 5: Perform arctangent operations on the D and Q axis components of the sine and cosine obtained in Step 3 to obtain the initial phase θ of the sine and cosine envelope surfaces in the DQ axis system. sin θ cos The specific formula is as follows:
[0045]
[0046] Step 6: Subtract the initial sine and cosine phases calculated in Step 5 to obtain the phase difference between the sine and cosine phases. The formula is:
[0047] Step 7: Based on the zero offset of the sine and cosine envelope surfaces obtained from calibration. sin Offset cos And the amplitudes of the sine and cosine (Amp) sin Amp sin Amplitude and zero-point offset compensation are performed on the original sine and cosine envelopes to obtain the per-unit sine and cosine sines. unit cos unit The specific formula is as follows:
[0048]
[0049] Step 8: Perform phase compensation on the per-unit value obtained in Step 7 using the phase difference obtained in Step 5 to obtain the correction value Sin for the sine and cosine signals. cmpst cos cmpst The specific formula is as follows:
[0050]
[0051] Step 9: Calculate the correction value Sin obtained in Step 8. cmpst cos cmpst The angle and speed of the resolver are calculated by feeding the data into the phase-locked loop.
[0052] To implement the above calibration method, the present invention also provides an apparatus for implementing the above calibration method, comprising: a drag module, a sampling module, an error compensation module, and a phase-locked loop module. The specific functions of each module are as follows.
[0053] The drag module is used to drag the controller to be calibrated at a fixed speed and stabilize it at the calibrated speed, such as 1000 RPM.
[0054] The sampling module is used to oversample the sine and cosine envelope signals of the resolver feedback at N times the sampling frequency to obtain the signal to be processed.
[0055] The error compensation module is used to implement the calibration method for resolver soft decoding described above, calculate the sine and cosine amplitudes, zero offset, and phase difference of the resolver to be calibrated, and output the corrected sine and cosine signals.
[0056] The phase-locked loop module performs phase-locked calculations on the compensated and corrected sine and cosine signals to obtain the angle and speed of the resolver.
[0057] The core of the above structure is the error compensation module. This module implements the calibration method provided by the present invention to compensate for the error of the resolver sine and cosine signals, including compensation for three types of errors: amplitude error, zero position offset, and phase error. The corrected sine and cosine signals are then output for the phase-locked loop module to perform phase-locking calculations. The resolver angle and speed obtained are correct and reliable, overcoming the problem of reduced efficiency or even motor runaway caused by errors in the existing technology of resolver soft decoding.
[0058] The present invention has been described above by way of example with reference to the accompanying drawings. Obviously, the specific implementation of the present invention is not limited to the above-described manner. Any non-substantial improvements made using the inventive concept and technical solution of the present invention, or the direct application of the inventive concept and technical solution of the present invention to other occasions without modification, are all within the protection scope of the present invention.
Claims
1. A calibration method for resolver soft decoding, characterized in that: include: The envelope surfaces of the sine and cosine feedback signals of the resolver feedback are sampled at an oversampling frequency of N times to obtain the sine and cosine oversampled signals; The oversampled sine and cosine signals are processed to obtain the zero-position offset of the resolver's sine and cosine envelope signals; the oversampled sine and cosine signals are processed to obtain the amplitude of the resolver's sine and cosine envelope surfaces; the oversampled sine and cosine signals are processed to obtain the phase deviation of the resolver's sine and cosine envelope surfaces; the calculated amplitude, zero-position offset, and phase deviation are used to compensate for the resolver's sine and cosine envelope surfaces, and the compensated signals are sent to a phase-locked loop to obtain the resolver's angle and rotational speed information; Specifically, the following steps are included: Step 1: Perform N-harmonic oversampling on the sine and cosine envelope surfaces of the resolver feedback; Step 2: Average the sine and cosine oversampled signals respectively to obtain the zero-position offset of the sine and cosine envelope surfaces; Step 3: Calculate the coefficients of the first-order DFT series for the sine and cosine oversampled signals to obtain the D-axis and Q-axis components of the sine and cosine envelope surfaces, respectively. Step 4: Sum the squares of the D and Q axis components of the obtained sine and cosine, and then take the square root to obtain the amplitudes of the sine and cosine respectively. Step 5: Perform arctangent operations on the D and Q axis components of the obtained sine and cosine to obtain the initial phase of the sine and cosine envelope surfaces in the DQ axis system. Step 6: Subtract the initial sine and cosine phases to obtain the phase difference between the sine and cosine phases; Step 7: Based on the zero-position offset of the sine and cosine envelopes obtained from calibration and the amplitude of the sine and cosine, perform amplitude and zero-position offset compensation on the original sine and cosine envelopes to obtain the standardized sine and cosine. Step 8: Perform phase compensation on the per-unit value scalated in Step 7 using the obtained phase difference to obtain the correction values for the sine and cosine signals; Step 9: Input the calculated correction value into the phase-locked loop to calculate the angle and speed of the resolver.
2. The calibration method for resolver soft decoding according to claim 1, characterized in that: In step 1, oversampling with an N-fold frequency is performed and M complete cycles are maintained, thus obtaining N*M sine and cosine oversampled signals; using These represent the sine and cosine oversampled signals, respectively.
3. The calibration method for resolver soft decoding according to claim 2, characterized in that: In step 2, the zero-position offset of the sine and cosine envelope planes is calculated. and The formula is: 。 4. The calibration method for resolver soft decoding according to claim 3, characterized in that: In step 3, the sine and cosine oversampled signals are multiplied by a dot product of the unit discrete sine and cosine trigonometric function sequences of the same frequency, and then multiplied by... The D-axis and Q-axis components of the sine and cosine envelope surfaces were obtained. , The specific formula is as follows: 。 5. The calibration method for resolver soft decoding according to claim 4, characterized in that: In step 4, the amplitudes of the sine and cosine... The specific formula is as follows: 。 6. The calibration method for resolver soft decoding according to claim 5, characterized in that: In step 5, the initial phase of the sine and cosine envelope planes in the DQ axis system The specific formula is as follows: In step 6, the phase difference between the sine and cosine... The formula is: .
7. The calibration method for resolver soft decoding according to claim 6, characterized in that: In step 7, the zero-position offsets of the sine and cosine envelope planes are respectively , The amplitudes of the sine and cosine are respectively , Standardized sine and cosine The specific formula is: ; in, and These are the original sine and cosine envelopes, respectively; In step 8, the correction values for the sine and cosine signals The specific formula is:
8. An apparatus for implementing a calibration method for resolver soft decoding according to any one of claims 1-7, characterized in that: It includes a drag module, a sampling module, an error compensation module, and a phase-locked loop module. The error compensation module is used to implement a calibration method for resolver soft decoding according to any one of claims 1-7, calculate the sine and cosine amplitudes, zero-position offset, and phase difference of the resolver to be calibrated, and output the corrected sine and cosine signals.
9. The apparatus for implementing a calibration method for resolver soft decoding according to claim 8, characterized in that: The dragging module is used to drag the controller to be calibrated at a fixed speed and stabilize it at the calibration speed; the sampling module is used to oversample the sine and cosine envelope signals of the resolver feedback at N times the sampling frequency to obtain the signal to be processed; the phase-locked loop module performs phase-locked calculation on the compensated and corrected sine and cosine signals to obtain the angle and speed of the resolver.
Citation Information
Patent Citations
Motor control method and device, electronic device and storage medium
CN111555669A