Heat treatment equipment
By adjusting the position and diameter of the crystal base support pin, a heat treatment device is designed according to the pulse width changes of the flash, which solves the problem of wafer warping and rupture during the flash annealing process, and achieves stable heating of the wafer.
Patent Information
- Application Number
- CN202180035426.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-05-29
- Filing Date
- 2021-05-25
- Publication Date
- 2025-08-22
- Estimated Expiration
- 2041-05-25
AI Technical Summary
During the flash annealing process, the sharp rise in the surface of the semiconductor wafer causes warping and rupture, especially when high-energy flash irradiation, the back stress concentration leads to the wafer rupture.
By adjusting the position and diameter of the support pin on the crystal holder, a heat treatment device is designed according to the pulse width changes of the flash, using multiple support pins to form set circles of different diameters on the crystal holder, and equipped with a pin moving mechanism to adapt to different pulse widths and reduce chip deformation.
It effectively prevents the cracking of the semiconductor wafer during flash irradiation, ensuring the stability and integrity of the wafer.
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Figure CN115668455B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a heat treatment apparatus for heating a thin plate-shaped precision electronic substrate (hereinafter referred to as a "substrate") such as a semiconductor wafer by irradiating the substrate with a flash of light. Background Art
[0002] Flash lamp annealing (FLA), which heats semiconductor wafers in an extremely short time, has attracted much attention in the semiconductor device manufacturing process. Flash lamp annealing is a heat treatment technology that uses a xenon flash lamp (hereinafter referred to as a "flash lamp") to irradiate the surface of a semiconductor wafer with a flash of light, raising the temperature of the semiconductor wafer surface within an extremely short period of time (less than a few milliseconds).
[0003] Xenon flash lamps emit light from the ultraviolet to near-infrared region, with shorter wavelengths than conventional halogen lamps, roughly aligning with the fundamental absorption band of silicon semiconductor wafers. Therefore, when a xenon flash lamp irradiates a semiconductor wafer, less light is transmitted, allowing the wafer to be heated rapidly. Furthermore, it has been shown that extremely short flash irradiation times of a few milliseconds or less can selectively increase the temperature near the surface of the semiconductor wafer.
[0004] Flash lamp annealing is used for processes requiring extremely short heating times, typically for activating impurities implanted into semiconductor wafers. By irradiating the surface of a semiconductor wafer implanted with impurities by ion implantation with a flash lamp, the surface temperature of the semiconductor wafer can be raised to the activation temperature in a very short time, allowing only the impurities to be activated without causing deep diffusion.
[0005] In a heat treatment apparatus using a flash lamp, as typically disclosed in Patent Documents 1 and 2, for example, a flash lamp is used to irradiate a semiconductor wafer while the semiconductor wafer is supported by a plurality of support pins provided upright on a susceptor.
[0006] [Prior art literature]
[0007] [Patent Document]
[0008] Patent Document 1: Japanese Patent Application Laid-Open No. 2009-164451
[0009] Patent Document 2: Japanese Patent Application Laid-Open No. 2014-157968 Summary of the Invention
[0010] [Problems to be Solved by the Invention]
[0011] However, because the flash lamp instantly irradiates the surface of the semiconductor wafer with extremely high energy, the surface temperature of the semiconductor wafer rises rapidly in an instant, while the backside temperature does not rise to the same degree. Consequently, rapid thermal expansion occurs only on the surface of the semiconductor wafer, causing the semiconductor wafer to deform in a manner that causes the surface to warp convexly. As a result, particularly when the flash energy is increased, stress concentration occurs on the backside of the semiconductor wafer, causing the semiconductor wafer to crack.
[0012] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a heat treatment apparatus that can prevent cracking of a substrate even during flash irradiation.
[0013] [Technical means to solve the problem]
[0014] In order to solve the above-mentioned problems, the first aspect of the invention is a heat treatment device that heats a substrate by irradiating a flash onto the substrate, and includes: a chamber that accommodates the substrate; a crystal base that holds the substrate in the chamber; a plurality of support pins that are arranged on the crystal base to support the substrate; and a flash lamp that irradiates a flash onto the substrate held by the crystal base; and the setting positions of the plurality of support pins on the crystal base vary according to the pulse width of the flash irradiated from the flash lamp.
[0015] In addition, the second aspect is a heat treatment apparatus according to the first aspect, wherein the plurality of support pins are arranged in a circular ring shape on the crystal base, and the shorter the pulse width, the larger the diameter of the setting circle where the plurality of support pins are arranged.
[0016] In addition, the third aspect is a heat treatment device according to the second aspect, wherein when the pulse width is less than 0.8 milliseconds, the diameter of the setting circle is greater than 93% of the diameter of the substrate; when the pulse width is greater than 0.8 milliseconds and less than 5 milliseconds, the diameter of the setting circle is greater than 83% of the diameter of the substrate and less than 93%; when the pulse width is greater than 5 milliseconds and less than 10 milliseconds, the diameter of the setting circle is greater than 77% of the diameter of the substrate and less than 83%; when the pulse width is greater than 10 milliseconds and less than 20 milliseconds, the diameter of the setting circle is greater than 73% of the diameter of the substrate and less than 77%; when the pulse width is greater than 20 milliseconds, the diameter of the setting circle is less than 73% of the diameter of the substrate.
[0017] A fourth aspect is the heat treatment apparatus according to any one of the first to third aspects, further comprising a pin moving mechanism that changes positions of the plurality of support pins according to the pulse width.
[0018] Furthermore, a fifth aspect is a heat treatment apparatus according to the fourth aspect, wherein the crystal base is provided with a plurality of narrow grooves along a radial direction, and the pin moving mechanism slides the plurality of support pins along the plurality of narrow grooves.
[0019] [Effects of the Invention]
[0020] According to the heat treatment apparatus described in aspects 1 to 5, the positions of the plurality of support pins on the crystal base are different according to the pulse width of the flash emitted from the flash lamp. Therefore, even if the substrate is rapidly deformed during flash irradiation, cracking of the substrate can be prevented. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 It is a longitudinal sectional view showing the structure of the heat treatment apparatus of the present invention.
[0022] Figure 2 It is a perspective view showing the overall appearance of the holding portion.
[0023] Figure 3 This is a plan view of the crystal seat.
[0024] Figure 4 This is a cross-sectional view of the crystal seat.
[0025] Figure 5 It is a plan view of the transfer mechanism.
[0026] Figure 6 It is a side view of the transfer mechanism.
[0027] Figure 7 It is a plan view showing the arrangement of multiple halogen lamps.
[0028] Figure 8 This is a diagram illustrating the pulse width of a flash of light emitted from a flash lamp.
[0029] Figure 9 A diagram illustrating a setting circle on which substrate supporting pins are provided.
[0030] Figure 10 This is a graph showing the correlation between the pulse width that can reduce cracks in a semiconductor wafer and the diameter of the setting circle.
[0031] Figure 11 This is a graph showing the relationship between pulse width and the diameter of the setting circle.
[0032] Figure 12 It is a plan view of the crystal base according to the second embodiment.
[0033] Figure 13 This is a diagram showing a state in which the substrate supporting pins are slidably moved relative to the slots of the crystal base. DETAILED DESCRIPTION
[0034] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0035] <First embodiment>
[0036] First, the overall structure of the heat treatment apparatus of the present invention will be described. Figure 1 It is a longitudinal sectional view showing the structure of the heat treatment apparatus 1 of the present invention. Figure 1 The heat treatment apparatus 1 is a flash lamp annealing apparatus that heats a disk-shaped semiconductor wafer W as a substrate by flash irradiating the semiconductor wafer W. The size of the semiconductor wafer W to be processed is not particularly limited, and is, for example, φ300 mm or φ450 mm. Figure 1 In the following drawings, the size and number of each component are exaggerated or simplified as necessary to facilitate understanding.
[0037] Heat treatment apparatus 1 includes a chamber 6 for accommodating semiconductor wafers W; a flash heating unit 5 housing multiple flash lamps FL; and a halogen heating unit 4 housing multiple halogen lamps HL. Flash heating unit 5 is located above chamber 6, while halogen heating unit 4 is located below. Heat treatment apparatus 1 also includes a holding unit 7 within chamber 6 for holding semiconductor wafers W in a horizontal position, and a transfer mechanism 10 for transferring semiconductor wafers W between holding unit 7 and the outside of the apparatus. Heat treatment apparatus 1 also includes a control unit 3 for controlling the various operating mechanisms within halogen heating unit 4, flash heating unit 5, and chamber 6 to heat treat semiconductor wafers W.
[0038] The chamber 6 is constructed by attaching quartz chamber windows to the top and bottom of a cylindrical chamber side portion 61. The chamber side portion 61 is generally cylindrical with openings at the top and bottom. The upper opening is sealed by an upper chamber window 63, and the lower opening is sealed by a lower chamber window 64. The upper chamber window 63, forming the top of the chamber 6, is a disc-shaped member made of quartz and functions as a quartz window that transmits the flash light emitted from the flash heater 5 into the chamber 6. Furthermore, the lower chamber window 64, forming the bottom of the chamber 6, is also a disc-shaped member made of quartz and functions as a quartz window that transmits the light from the halogen heater 4 into the chamber 6.
[0039] In addition, a reflection ring 68 is installed on the upper part of the inner wall of the chamber side portion 61, and a reflection ring 69 is installed on the lower part. The reflection rings 68 and 69 are both formed in a circular ring shape. The upper reflection ring 68 is installed by being inserted from the upper side of the chamber side portion 61. On the other hand, the lower reflection ring 69 is installed by being inserted from the lower side of the chamber side portion 61 and fixed with screws (not shown). In other words, the reflection rings 68 and 69 are both installed in the chamber side portion 61 so as to be freely assembled and detachable. The inner space of the chamber 6, that is, the space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61, and the reflection rings 68 and 69 is defined as the heat treatment space 65.
[0040] By attaching reflection rings 68 and 69 to chamber side portion 61, a recess 62 is formed on the inner wall surface of chamber 6. Specifically, recess 62 is formed by the central portion of the inner wall surface of chamber side portion 61 where reflection rings 68 and 69 are not attached, the lower end surface of reflection ring 68, and the upper end surface of reflection ring 69. Recess 62 is formed in a circular ring shape along the horizontal direction on the inner wall surface of chamber 6, surrounding holding portion 7 that holds semiconductor wafer W. Chamber side portion 61 and reflection rings 68 and 69 are formed from a metal material (e.g., stainless steel) that exhibits excellent strength and heat resistance.
[0041] Furthermore, a transport opening (furnace port) 66 for loading and unloading semiconductor wafers W into and out of the chamber 6 is formed on the chamber side 61. The transport opening 66 can be opened and closed by a gate valve 185. The transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transport opening 66, semiconductor wafers W can be loaded into and unloaded from the heat treatment space 65 through the recess 62 from the transport opening 66. Furthermore, when the gate valve 185 closes the transport opening 66, the heat treatment space 65 in the chamber 6 becomes a sealed space.
[0042] Furthermore, through-holes 61a and 61b are formed in the chamber side portion 61. Through-hole 61a is a cylindrical hole used to guide infrared light emitted from the upper surface of the semiconductor wafer W, which is held by the crystal susceptor 74 described below, to the upper radiation thermometer 25. Meanwhile, through-hole 61b is a cylindrical hole used to guide infrared light emitted from the lower surface of the semiconductor wafer W to the lower radiation thermometer 20. Through-holes 61a and 61b are arranged at an angle relative to the horizontal direction, with the axis of the through-hole intersecting the main surface of the semiconductor wafer W held by the crystal susceptor 74. A transparent window 26 made of calcium fluoride is attached to the end of through-hole 61a facing the heat treatment space 65. This window transmits infrared light within the wavelength range measurable by the upper radiation thermometer 25. The upper radiation thermometer 25 receives infrared light emitted from the upper surface of the semiconductor wafer W through the transparent window 26 and measures the temperature of the upper surface of the semiconductor wafer W based on the intensity of the infrared light. Furthermore, a transparent window 21 made of barium fluoride is attached to the end of the through-hole 61b facing the heat treatment space 65. The window 21 transmits infrared light in the wavelength range measurable by the lower radiation thermometer 20. The lower radiation thermometer 20 receives infrared light emitted from the lower surface of the semiconductor wafer W through the transparent window 21 and measures the temperature of the lower surface of the semiconductor wafer W based on the intensity of the infrared light.
[0043] In addition, a gas supply hole 81 for supplying processing gas to the heat treatment space 65 is formed on the upper part of the inner wall of the chamber 6. The gas supply hole 81 is provided at an upper side position relative to the recess 62, and may also be provided at the reflection ring 68. The gas supply hole 81 is connected to the gas supply pipe 83 through a buffer space 82 formed in a circular ring shape inside the side wall of the chamber 6. The gas supply pipe 83 is connected to the processing gas supply source 85. In addition, a valve 84 is inserted midway along the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is fed from the processing gas supply source 85 to the buffer space 82. The processing gas flowing into the buffer space 82 flows in a manner that expands in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81, and is supplied from the gas supply hole 81 toward the heat treatment space 65. The processing gas supply source 85 supplies an inert gas such as nitrogen (N2) or argon (Ar), or a reactive gas such as oxygen (O2), ozone (O3), or hydrogen (H2), or a mixed gas of the above gases as a processing gas into the chamber 6.
[0044] On the other hand, a gas exhaust hole 86 for discharging the gas in the heat treatment space 65 is formed at the lower part of the inner wall of the chamber 6. The gas exhaust hole 86 is provided at a lower side position relative to the recess 62, and may also be provided at the reflection ring 69. The gas exhaust hole 86 is connected to the gas exhaust pipe 88 through a buffer space 87 formed in a circular ring shape inside the side wall of the chamber 6. The gas exhaust pipe 88 is connected to the exhaust portion 190. In addition, a valve 89 is inserted midway along the path of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 through the buffer space 87 toward the gas exhaust pipe 88. In addition, a plurality of gas supply holes 81 and gas exhaust holes 86 may be provided along the circumference of the chamber 6, or may be in the shape of a narrow groove.
[0045] A gas exhaust pipe 191 for exhausting the gas in the heat treatment space 65 is also connected to the front end of the transfer opening 66. The gas exhaust pipe 191 is connected to the exhaust unit 190 via a valve 192. By opening the valve 192, the gas in the chamber 6 can be exhausted through the transfer opening 66.
[0046] The exhaust section 190 is equipped with a vacuum pump. By operating the exhaust section 190 and opening the valves 89 and 192, the gas in the chamber 6 is exhausted from the gas exhaust pipes 88 and 191 to the exhaust section 190. When no gas is supplied from the gas supply hole 81, the gas in the enclosed space, i.e., the heat treatment space 65, is exhausted through the exhaust section 190. This reduces the pressure in the chamber 6 to a pressure lower than atmospheric pressure.
[0047] Figure 2 This is a perspective view showing the overall appearance of the holding portion 7. The holding portion 7 is configured to include a base ring 71, a connecting portion 72, and a crystal seat 74. The base ring 71, the connecting portion 72, and the crystal seat 74 are all formed of quartz. In other words, the entire holding portion 7 is formed of quartz.
[0048] The base ring 71 is a quartz component with an arc shape and a portion missing from the circular ring. The missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 described below and the base ring 71. The base ring 71 is placed on the bottom surface of the recess 62 and supported by the wall surface of the chamber 6 (see Figure 1 ). On the upper surface of the base ring 71, a plurality of connecting parts 72 (four in this embodiment) are erected along the circumferential direction of the annular shape. The connecting parts 72 are also quartz parts and are fixed to the base ring 71 by welding.
[0049] The crystal susceptor 74 is supported by four connecting portions 72 provided on the base ring 71 . Figure 3 74 is a plan view of the crystal base 74. Figure 4This is a cross-sectional view of a crystal susceptor 74. The crystal susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular, flat member formed of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. In other words, the holding plate 75 has a larger planar dimension than the semiconductor wafer W.
[0050] A guide ring 76 is provided on the peripheral edge of the upper surface of the retaining plate 75. The guide ring 76 is a ring-shaped component having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is φ300 mm, the inner diameter of the guide ring 76 is φ320 mm. The inner periphery of the guide ring 76 is provided as a conical surface that widens upward from the retaining plate 75. The guide ring 76 is formed of the same quartz as the retaining plate 75. The guide ring 76 may be welded to the upper surface of the retaining plate 75, or may be fixed to the retaining plate 75 by a separately processed pin or the like. Alternatively, the retaining plate 75 and the guide ring 76 may be processed as an integral component.
[0051] The area on the upper surface of the retaining plate 75 that is closer to the inside of the guide ring 76 is provided as a planar retaining surface 75a for retaining the semiconductor wafer W. A plurality of substrate support pins 77 are provided upright on the retaining surface 75a of the retaining plate 75. In this embodiment, a total of 12 substrate support pins 77 are provided upright at 30° intervals along a circle that is concentric with the outer circumference of the retaining surface 75a (the inner circumference of the guide ring 76). The diameter of the circle in which the 12 substrate support pins 77 are arranged (the distance between opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W. Each substrate support pin 77 is formed of quartz. The plurality of substrate support pins 77 can be provided on the upper surface of the retaining plate 75 by welding, or can be processed integrally with the retaining plate 75.
[0052] return Figure 2 The four connecting portions 72 erected on the base ring 71 are fixed to the periphery of the retaining plate 75 of the crystal base 74 by welding. That is, the crystal base 74 and the base ring 71 are fixedly connected by the connecting portions 72. With the base ring 71 of the retaining portion 7 thus supported by the wall of the chamber 6, the retaining portion 7 is installed in the chamber 6. When the retaining portion 7 is installed in the chamber 6, the retaining plate 75 of the crystal base 74 is in a horizontal position (a position in which the normal line is aligned with the vertical direction). In other words, the retaining surface 75a of the retaining plate 75 forms a horizontal plane.
[0053] The semiconductor wafer W loaded into the chamber 6 is placed and held in a horizontal position on the crystal susceptor 74 of the holding portion 7 mounted in the chamber 6. At this time, the semiconductor wafer W is supported and held on the crystal susceptor 74 by twelve substrate support pins 77 erected on the holding plate 75. More strictly speaking, the upper ends of the twelve substrate support pins 77 contact the lower surface of the semiconductor wafer W, thereby supporting the semiconductor wafer W. Because the height of the twelve substrate support pins 77 (the distance from the upper ends of the substrate support pins 77 to the holding surface 75a of the holding plate 75) is uniform, the twelve substrate support pins 77 can support the semiconductor wafer W in a horizontal position.
[0054] Furthermore, the semiconductor wafer W is supported by a plurality of substrate support pins 77 at predetermined intervals from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Therefore, the guide ring 76 prevents horizontal positional deviation of the semiconductor wafer W supported by the plurality of substrate support pins 77.
[0055] In addition, if Figure 2 and Figure 3 As shown, an opening 78 is formed vertically through the holding plate 75 of the crystal susceptor 74. Opening 78 is provided so that the lower radiation thermometer 20 can receive radiation light (infrared light) emitted from the lower surface of the semiconductor wafer W. Specifically, the lower radiation thermometer 20 receives the light emitted from the lower surface of the semiconductor wafer W through the opening 78 and the transparent window 21 attached to the through hole 61b of the chamber side portion 61, thereby measuring the temperature of the semiconductor wafer W. Furthermore, four through-holes 79 are formed in the holding plate 75 of the crystal susceptor 74, through which the ejector pins 12 of the transfer mechanism 10 described below pass to transfer the semiconductor wafer W.
[0056] Figure 5 It is a plan view of the transfer mechanism 10. In addition, Figure 6 : is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arms 11 are formed into an arc shape along the substantially annular recess 62. Two ejector pins 12 are erected on each transfer arm 11. The transfer arms 11 and the ejector pins 12 are made of quartz. Each transfer arm 11 can be rotated by a horizontal moving mechanism 13. The horizontal moving mechanism 13 enables a pair of transfer arms 11 to be in a transfer action position ( Figure 5 The solid line position) and the retreat position ( Figure 5 As the horizontal moving mechanism 13, each transfer arm 11 can be rotated separately by a separate motor, or a link mechanism can be used to rotate a pair of transfer arms 11 in conjunction with one motor.
[0057] In addition, the pair of transfer arms 11 can be lifted and lowered together by the lifting mechanism 14 and the horizontal moving mechanism 13. When the lifting mechanism 14 raises the pair of transfer arms 11 to the transfer action position, a total of four ejector pins 12 pass through the through holes 79 (see Figure 2 、 3 ), and the upper end of the ejector pin 12 protrudes from the upper surface of the crystal base 74. On the other hand, the lifting mechanism 14 lowers the pair of transfer arms 11 to the transfer action position and extracts the ejector pin 12 from the through hole 79. When the horizontal moving mechanism 13 moves the pair of transfer arms 11 in a manner to open them, each transfer arm 11 moves to a retreat position. The retreat position of the pair of transfer arms 11 is directly above the base ring 71 of the holding portion 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retreat position of the transfer arm 11 becomes the inner side of the recess 62. In addition, an exhaust mechanism (not shown) is also provided near the location where the drive portion (horizontal moving mechanism 13 and lifting mechanism 14) of the transfer mechanism 10 is provided, and is configured to discharge the gas around the drive portion of the transfer mechanism 10 to the outside of the chamber 6.
[0058] return Figure 1 Two radiation thermometers (pyrometers in this embodiment) are provided in the chamber 6: a lower radiation thermometer 20 and an upper radiation thermometer 25. The lower radiation thermometer 20 is provided obliquely below the semiconductor wafer W held by the crystal base 74. The lower radiation thermometer 20 receives infrared light emitted from the lower surface of the semiconductor wafer W and measures the temperature of the lower surface based on the intensity of the infrared light. On the other hand, the upper radiation thermometer 25 is provided obliquely above the semiconductor wafer W held by the crystal base 74. The upper radiation thermometer 25 receives infrared light emitted from the upper surface of the semiconductor wafer W and measures the temperature of the upper surface based on the intensity of the infrared light. The upper radiation thermometer 25 has an optical component made of InSb (indium antimonide) so that it can cope with the rapid temperature change of the upper surface of the semiconductor wafer W at the moment of being irradiated with the flash light.
[0059] The flash heating unit 5, which is located above the chamber 6, is configured to include a light source including a plurality of (30 in this embodiment) xenon flash lamps FL on the inside of a housing 51, and a reflector 52 provided to cover the top of the light source. Furthermore, a light irradiation window 53 is mounted on the bottom of the housing 51 of the flash heating unit 5. The light irradiation window 53 constituting the bottom of the flash heating unit 5 is a plate-shaped quartz window made of quartz. Since the flash heating unit 5 is located above the chamber 6, the light irradiation window 53 faces the upper chamber window 63. The flash lamp FL irradiates the heat treatment space 65 with flash light from above the chamber 6 through the light irradiation window 53 and the upper chamber window 63.
[0060] The flash lamps FL are rod-shaped lamps, each having a long cylindrical shape. They are arranged in a planar configuration with their longitudinal directions parallel to the main surface of the semiconductor wafer W held by the holder 7 (i.e., in the horizontal direction). Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane. The area where the flash lamps FL are arranged is larger than the planar dimensions of the semiconductor wafer W.
[0061] The xenon flash lamp FL consists of a cylindrical glass tube (discharge tube) filled with xenon gas. Its ends are equipped with an anode and cathode connected to a capacitor; and a trigger electrode is attached to the outer circumference of the glass tube. Because xenon gas is an electrical insulator, even if charge accumulates in the capacitor, electricity does not flow through the glass tube under normal conditions. However, when a high voltage is applied to the trigger electrode, breaking the insulation, the electricity stored in the capacitor instantly flows through the glass tube, exciting the atoms or molecules of the xenon gas and emitting light. This xenon flash lamp FL is characterized by the conversion of the electrostatic energy previously stored in the capacitor into extremely short light pulses, lasting from 0.1 to 100 milliseconds. This allows it to emit extremely intense light compared to continuously lit light sources like halogen lamps HL. In other words, the flash lamp FL is a pulsed light lamp that emits light instantaneously, for a very short period of less than one second. Furthermore, the flash lamp FL's emission duration can be adjusted by adjusting the coil constant of the lamp power supply that powers the flash lamp FL.
[0062] Furthermore, a reflector 52 is provided above the multiple flash lamps FL so as to entirely cover them. The basic function of the reflector 52 is to reflect the flash light emitted from the multiple flash lamps FL toward the heat treatment space 65. The reflector 52 is formed from an aluminum alloy plate, and its surface (the side facing the flash lamps FL) is roughened by sandblasting.
[0063] The halogen heating unit 4, located below the chamber 6, has a plurality (40 in this embodiment) of halogen lamps HL built into a housing 41. The halogen heating unit 4 heats the semiconductor wafer W by irradiating a heat treatment space 65 with light from the plurality of halogen lamps HL through a lower chamber window 64 from below the chamber 6.
[0064] Figure 7 This is a plan view showing the arrangement of a plurality of halogen lamps HL. 40 halogen lamps HL are arranged in two sections, upper and lower. 20 halogen lamps HL are provided in the upper section close to the holding portion 7, and 20 halogen lamps HL are also provided in the lower section further away from the holding portion 7 than the upper section. Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. The 20 halogen lamps HL in both the upper and lower sections are arranged in parallel with each other along the main surface of the semiconductor wafer W held by the holding portion 7 (i.e., in the horizontal direction) along their respective length directions. Therefore, the plane formed by the arrangement of the halogen lamps HL in both the upper and lower sections is a horizontal plane.
[0065] In addition, if Figure 7 As shown, the density of the halogen lamps HL in the upper and lower sections facing the peripheral portion is higher than in the area facing the center of the semiconductor wafer W held by the holding portion 7. In other words, the pitch of the halogen lamps HL in the upper and lower sections facing the peripheral portion is shorter than that in the central portion of the lamp arrangement. Therefore, when the halogen heating unit 4 heats the semiconductor wafer W with light, a greater amount of light can be irradiated to the peripheral portion, where the temperature is more likely to drop.
[0066] The upper halogen lamps HL and the lower halogen lamps HL are arranged in a grid pattern, so that the longitudinal directions of the 20 halogen lamps HL in the upper and lower sections are perpendicular to each other.
[0067] The halogen lamp HL is a filament-type light source that emits light by energizing a filament disposed inside a glass tube, causing the filament to incandescent. A gas formed by introducing a trace amount of halogen elements (alkali, bromine, etc.) into an inert gas such as nitrogen or argon is sealed inside the glass tube. By introducing the halogen element, the breakage of the filament can be suppressed and the temperature of the filament can be set to a high temperature. Therefore, the halogen lamp HL has the characteristics of a long life and the ability to continuously irradiate strong light compared to a conventional incandescent lamp. In other words, the halogen lamp HL is a continuously lit lamp that emits light continuously for at least one second. In addition, since the halogen lamp HL is a rod-shaped lamp, it has a long life, and by arranging the halogen lamp HL in a horizontal direction, the radiation efficiency to the semiconductor wafer W above is excellent.
[0068] Furthermore, in the housing 41 of the halogen heating unit 4, a reflector 43 ( Figure 1 The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65 side.
[0069] The control unit 3 controls the various operating mechanisms provided in the heat treatment apparatus 1. The hardware configuration of the control unit 3 is similar to that of a general computer. Specifically, the control unit 3 includes a CPU (a circuit that performs various calculations), a dedicated read-only memory (ROM) that stores basic programs, a freely readable RAM (RAM) that stores various information, and a magnetic disk that pre-stores control software and data. The CPU of the control unit 3 executes a specific processing program to perform processing in the heat treatment apparatus 1.
[0070] In addition to the above-described configuration, the heat treatment apparatus 1 includes various cooling mechanisms to prevent excessive temperature increases in the halogen heating unit 4, the flash heating unit 5, and the chamber 6 due to the heat energy generated by the halogen lamp HL and the flash lamp FL during heat treatment of the semiconductor wafer W. For example, a water cooling pipe (not shown) is provided in the walls of the chamber 6. Furthermore, the halogen heating unit 4 and the flash heating unit 5 employ an air-cooling mechanism that creates an internal gas flow to dissipate heat. Furthermore, air is supplied to the gap between the upper chamber window 63 and the lamp radiation window 53 to cool the flash heating unit 5 and the upper chamber window 63.
[0071] Next, the processing sequence for semiconductor wafers W in heat treatment apparatus 1 will be described. The semiconductor wafers W to be processed here are semiconductor substrates to which impurities (ions) have been added by ion implantation. These impurities are activated by flash irradiation heating (annealing) in heat treatment apparatus 1. The processing steps in heat treatment apparatus 1 described below are performed by control of the various operating mechanisms of heat treatment apparatus 1 by control unit 3.
[0072] First, before processing the semiconductor wafer W, the gas supply valve 84 is opened, and the exhaust valve 89 is opened to start the gas supply and exhaust in the chamber 6. When the valve 84 is opened, nitrogen gas is supplied from the gas supply hole 81 to the heat treatment space 65. When the valve 89 is opened, the gas in the chamber 6 is exhausted from the gas exhaust hole 86. As a result, the nitrogen gas supplied from the upper portion of the heat treatment space 65 in the chamber 6 flows downward and is exhausted from the lower portion of the heat treatment space 65.
[0073] Furthermore, by opening valve 192, the gas within chamber 6 is also exhausted from transfer opening 66. Furthermore, the gas surrounding the drive unit of transfer mechanism 10 is also exhausted by an exhaust mechanism (not shown). Furthermore, while heat treatment apparatus 1 is heat treating semiconductor wafers W, nitrogen gas is continuously supplied to heat treatment space 65, with the supply amount being appropriately varied depending on the process step.
[0074] Next, gate valve 185 is opened, thereby releasing transfer opening 66. A transfer robot outside the apparatus then carries the semiconductor wafer W, to be processed, into heat treatment space 65 within chamber 6 through transfer opening 66. At this point, there is a concern that gases from outside the apparatus may be introduced into the heat treatment space 65 as the semiconductor wafer W is carried in. However, since nitrogen gas is continuously supplied to chamber 6, it flows out of transfer opening 66, minimizing the introduction of such gases.
[0075] The semiconductor wafer W loaded by the transfer robot advances to a position directly above the holding portion 7 and stops. Then, the pair of transfer arms 11 of the transfer mechanism 10 move horizontally from the retracted position to the transfer operation position and then rise. The ejector pins 12 pass through the through-holes 79 and protrude from the upper surface of the holding plate 75 of the crystal susceptor 74 to receive the semiconductor wafer W. At this time, the ejector pins 12 rise to a position above the upper ends of the substrate support pins 77.
[0076] After the semiconductor wafer W is placed on the ejector pins 12, the transfer robot withdraws from the heat treatment space 65, and the transfer opening 66 is closed by the gate valve 185. Then, the pair of transfer arms 11 descends, and the semiconductor wafer W is transferred from the transfer mechanism 10 to the crystal base 74 of the holding portion 7 and held horizontally from below. The semiconductor wafer W is supported and held on the crystal base 74 by a plurality of substrate support pins 77 arranged upright on the holding plate 75. In addition, the semiconductor wafer W is held on the holding portion 7 with the surface on which the patterning is completed and the impurities are implanted as the upper surface. A specific gap is formed between the back surface (the main surface opposite to the front surface) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75a of the holding plate 75. The pair of transfer arms 11, which have descended to the bottom of the crystal base 74, retreat to a retreat position, i.e., to the inside of the recess 62, using the horizontal movement mechanism 13.
[0077] After the semiconductor wafer W is held horizontally from below by the crystal holder 74 of the quartz holding portion 7, the 40 halogen lamps HL of the halogen heating portion 4 are simultaneously illuminated to begin preheating (auxiliary heating). The halogen light emitted from the halogen lamps HL passes through the lower chamber window 64 formed of quartz and the crystal holder 74 and irradiates the lower surface of the semiconductor wafer W. The semiconductor wafer W is preheated by receiving light from the halogen lamps HL, and its temperature rises. In addition, since the transfer arm 11 of the transfer mechanism 10 retreats to the inside of the recess 62, it does not become an obstacle to the heating by the halogen lamps HL.
[0078] The temperature of the semiconductor wafer W, which has been heated by the light irradiation from the halogen lamp HL, is measured by the lower radiation thermometer 20. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3. The control unit 3 controls the output of the halogen lamp HL while monitoring whether the temperature of the semiconductor wafer W, which has been heated by the light irradiation from the halogen lamp HL, has reached a specific preheating temperature T1. That is, the control unit 3 feedback-controls the output of the halogen lamp HL based on the measurement value of the lower radiation thermometer 20 so that the temperature of the semiconductor wafer W reaches the preheating temperature T1. The preheating temperature T1 is set to approximately 200°C to 800°C, preferably approximately 350°C to 600°C (600°C in the present embodiment), so that there is no concern about the diffusion of impurities added to the semiconductor wafer W due to heat.
[0079] After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, when the temperature of the semiconductor wafer W measured by the lower radiation thermometer 20 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL to maintain the temperature of the semiconductor wafer W approximately at the preheating temperature T1.
[0080] By performing such preheating with the halogen lamps HL, the entire semiconductor wafer W is uniformly heated to the preheating temperature T1. During the preheating stage with the halogen lamps HL, the temperature of the peripheral portion of the semiconductor wafer W, where heat is more easily dissipated, tends to be lower than that of the central portion. However, the halogen lamps HL of the halogen heating unit 4 are arranged at a higher density in the area facing the peripheral portion than in the area facing the central portion of the substrate W. Consequently, the amount of light irradiated to the peripheral portion of the semiconductor wafer W, where heat is more easily dissipated, increases, thereby achieving a uniform in-plane temperature distribution across the semiconductor wafer W during the preheating stage.
[0081] When the temperature of the semiconductor wafer W reaches the preheating temperature T1 and a specific time has elapsed, the flash lamp FL of the flash heating unit 5 flash-irradiates the surface of the semiconductor wafer W held on the wafer base 74. At this time, part of the flash light emitted from the flash lamp FL is directly emitted into the chamber 6, while another part is temporarily reflected by the reflector 52 and then emitted into the chamber 6. This flash light irradiation flashes the semiconductor wafer W.
[0082] Because flash heating is performed using flash light from the flash lamp FL, the surface temperature of the semiconductor wafer W can be raised quickly. Specifically, the flash light emitted by the flash lamp FL converts electrostatic energy previously stored in a capacitor into extremely short light pulses, with an irradiation time of approximately 0.1 to 100 milliseconds. The surface temperature of the semiconductor wafer W, flash-heated by the flash light from the flash lamp FL, instantly rises to a treatment temperature T2 exceeding 1000°C. After the impurities implanted into the semiconductor wafer W are activated, the surface temperature rapidly drops. Thus, in the heat treatment apparatus 1, the surface temperature of the semiconductor wafer W can be raised and lowered in a very short time, enabling activation of the impurities implanted into the semiconductor wafer W while suppressing thermal diffusion. Furthermore, because the time required for impurity activation is significantly shorter than the time required for thermal diffusion, activation can be completed even within a short time of approximately 0.1 to 100 milliseconds, preventing diffusion.
[0083] After the flash heat treatment is completed, the halogen lamp HL is turned off after a specific period of time. This causes the semiconductor wafer W to rapidly cool from the preheating temperature T1. The temperature of the semiconductor wafer W during cooling is measured by the lower radiation thermometer 20, and the measurement result is transmitted to the control unit 3. The control unit 3 monitors whether the temperature of the semiconductor wafer W has fallen below the specific temperature as measured by the lower radiation thermometer 20. After the temperature of the semiconductor wafer W has fallen below the specific temperature, the pair of transfer arms 11 of the transfer mechanism 10 again move horizontally from the retracted position and rise to the transfer operation position. This causes the ejector pins 12 to protrude from the upper surface of the crystal susceptor 74, receiving the heat-treated semiconductor wafer W from the crystal susceptor 74. Next, the transfer opening 66, previously closed by the gate valve 185, is opened, and the semiconductor wafer W placed on the ejector pins 12 is removed from the chamber 6 by a transfer robot outside the apparatus, completing the heat treatment of the semiconductor wafer W in the heat treatment apparatus 1.
[0084] However, when the flash lamp FL irradiates the semiconductor wafer W, the surface temperature of the semiconductor wafer W instantly rises to the processing temperature T2, exceeding 1000°C. However, the instantaneous backside temperature does not rise as much from the preheating temperature T1. This results in a momentary temperature difference between the top and bottom surfaces of the semiconductor wafer W. As a result, only the top surface of the semiconductor wafer W experiences rapid thermal expansion, while the backside experiences almost no thermal expansion. This causes the semiconductor wafer W to instantly warp, with the top surface becoming convex. This can cause the semiconductor wafer W to crack, and the probability of cracking is particularly high if the semiconductor wafer W has a defect.
[0085] The inventors of this application conducted intensive research and discovered that cracking of the semiconductor wafer W can be reduced by varying the placement positions of the plurality of substrate support pins 77 on the crystal susceptor 74 according to the pulse width of the flash light emitted from the flash lamp FL. The present invention was completed based on this finding. The diameter of the circle in which the plurality of substrate support pins 77 are placed is increased as the flash light pulse width is shortened.
[0086] Figure 8 1 is a diagram illustrating the pulse width of the flash emitted from the flash lamp FL. Typically, when the flash lamp FL emits a flash once, the intensity of the flash changes as follows: Figure 8 The pulse shown. Figure 8 In a pulse, the peak intensity is the highest intensity P. The so-called "pulse width" refers to the half-height width of the pulse. Figure 8 In FIG. 1 , the time tp from the time t1 when the pulse intensity increases and reaches the half-height (P / 2) of the maximum intensity P to the time t2 when the pulse intensity decreases and reaches the half-height of the maximum intensity P is the pulse width.
[0087] Figure 9This figure illustrates the arrangement circle in which the substrate support pins 77 are arranged. As described above, in this embodiment, twelve substrate support pins 77 are arranged in a circular pattern on the crystal susceptor 74 at intervals of 30°. The circle formed by the plurality of substrate support pins 77 arranged in a circular pattern is an arrangement circle 98. The diameter of arrangement circle 98 is naturally smaller than the diameter of the semiconductor wafer W. Specifically, if the diameter of the semiconductor wafer W is φ300 mm, the radius of arrangement circle 98 is 150 mm or less.
[0088] Figure 10 This graph shows the correlation between the pulse width, which reduces cracking in semiconductor wafers W, and the diameter of setting circle 98. As shown in the graph, the shorter the pulse width of the flashlight irradiated from the flash lamp FL, the greater the radius of setting circle 98, which reduces cracking in the semiconductor wafer W. The pulse width of the flashlight irradiated from the flash lamp FL is determined by process conditions. Process conditions define the processing procedures and conditions for semiconductor wafers W. Therefore, when the pulse width specified in the process conditions is short, using a susceptor 74 with a large setting circle 98 diameter and equipped with multiple substrate support pins 77 can reduce cracking in the semiconductor wafer W during flash irradiation.
[0089] Figure 11 This diagram more specifically shows the relationship between the pulse width and the diameter of setting circle 98, which can reduce cracks in semiconductor wafer W. As a prerequisite, the diameter of semiconductor wafer W is φ300 mm. If the pulse width of the flash light emitted by flash lamp FL is less than 0.8 milliseconds, cracks in semiconductor wafer W during flash irradiation can be reduced by setting the radius of setting circle 98 to greater than 140 mm (i.e., setting the radius of setting circle 98 to greater than 93% of the radius of semiconductor wafer W). The upper limit of the radius of setting circle 98 is 150 mm.
[0090] Furthermore, when the flash pulse width is 0.8 milliseconds or longer and less than 5 milliseconds, if the radius of the setting circle 98 is greater than 125 mm and less than 140 mm (i.e., if the radius of the setting circle 98 is greater than 83% and less than 93% of the radius of the semiconductor wafer W), cracking of the semiconductor wafer W can be reduced. When the pulse width is 5 milliseconds or longer and less than 10 milliseconds, if the radius of the setting circle 98 is greater than 115 mm and less than 125 mm (i.e., if the radius of the setting circle 98 is greater than 77% and less than 83% of the radius of the semiconductor wafer W), cracking of the semiconductor wafer W can be reduced. When the pulse width is 10 milliseconds or longer and less than 20 milliseconds, if the radius of the setting circle 98 is greater than 110 mm and less than 115 mm (i.e., if the radius of the setting circle 98 is greater than 73% and less than 77% of the radius of the semiconductor wafer W), cracking of the semiconductor wafer W can be reduced. Furthermore, when the pulse width is greater than 20 milliseconds, if the radius of the setting circle 98 is set to less than 110 mm (that is, if the radius of the setting circle 98 is set to less than 73% of the radius of the semiconductor wafer W), the cracking of the semiconductor wafer W can be reduced.
[0091] If the semiconductor wafer W is held along the Figure 11 The crystal susceptor 74 having a plurality of substrate support pins 77 arranged on the arrangement circle 98 of the radius shown can prevent the semiconductor wafer W from being broken even if the semiconductor wafer W is momentarily warped during flash irradiation.
[0092] In the first embodiment, the shorter the pulse width of the flash light emitted from the flash lamp FL, the larger the diameter of the arrangement circle 98 in which the plurality of substrate support pins 77 are arranged. If the flash light is emitted from the flash lamp FL while the semiconductor wafer W is supported by the plurality of substrate support pins 77, even if the semiconductor wafer W is rapidly deformed by the flash light emission, cracking of the semiconductor wafer W can be prevented.
[0093] <Second embodiment>
[0094] Next, a second embodiment of the present invention will be described. The overall structure of the heat treatment apparatus 1 of the second embodiment is the same as that of the first embodiment. Furthermore, the processing steps for the semiconductor wafer W of the second embodiment are also the same as those of the first embodiment. The second embodiment differs from the first embodiment in the structure of the crystal susceptor 74 and the plurality of substrate support pins 77.
[0095] Figure 12This is a plan view of the crystal base 74a of the second embodiment. The overall shape and material of the crystal base 74a are the same as those of the crystal base 74 of the first embodiment. The crystal base 74a of the second embodiment is provided with 12 narrow slots 97. The 12 narrow slots 97 are arranged at equal intervals of 30°. The 12 narrow slots 97 are arranged along the radial direction of the roughly circular crystal base 74a, from the outer peripheral end of the crystal base 74a toward the center. The width of each narrow slot 97 is less than 8 mm and is larger than the width of the substrate support pin 77. In addition, the length of each narrow slot 97 can be set to an appropriate value, preferably at least 50 mm.
[0096] Figure 13 This figure shows how the substrate support pins 77 are slid relative to the slots 97 of the crystal susceptor 74a. In the second embodiment, twelve substrate support pins 77 are movably provided. Each of the twelve substrate support pins 77 is slidably moved back and forth along the slots 97 by the pin moving mechanism 94. Because the slots 97 are provided radially along the crystal susceptor 74a, the substrate support pins 77 also move radially along the crystal susceptor 74a. The upper ends of the substrate support pins 77 protrude upward from the upper surface of the crystal susceptor 74a.
[0097] The positions of the substrate support pins 77 in the second embodiment are the same as those in the first embodiment. Specifically, the pin moving mechanism 94 moves the positions of the substrate support pins 77 so that the shorter the pulse width of the flash light emitted from the flash lamp FL, the larger the diameter of the setting circle 98 in which the plurality of substrate support pins 77 are set. More specifically, the substrate support pins 77 are positioned so that the correlation between the pulse width of the flash light and the radius of the setting circle 98 is as follows: Figure 11 It is feasible to set the radius of circle 98 to be as follows based on the pulse width specified in the process conditions. Figure 11 In the embodiment shown in the figure, the control unit 3 controls the pin moving mechanism 94 to move the plurality of substrate supporting pins 77 .
[0098] In the second embodiment, although the plurality of substrate support pins 77 are configured to be movable, the shorter the pulse width of the flash light emitted from the flash lamp FL, the larger the diameter of the installation circle 98 in which the plurality of substrate support pins 77 are installed. Therefore, as in the first embodiment, when flash light is emitted while the semiconductor wafer W is supported by the plurality of substrate support pins 77, even if the semiconductor wafer W is rapidly deformed by the flash light emission, cracking of the semiconductor wafer W can be prevented.
[0099] <Example of Change>
[0100] While the embodiments of the present invention have been described above, various modifications other than those described above are possible without departing from the spirit of the present invention. For example, in the above embodiment, twelve substrate support pins 77 are provided on the crystal base 74. However, this is not limiting. The number of substrate support pins 77 can be three or more, and may be four or eight. In the second embodiment, the crystal base 74a is provided with the same number of slots 97 as the number of substrate support pins 77.
[0101] In the above embodiment, the flash heating unit 5 includes 30 flash lamps FL. However, this is not a limitation and the number of flash lamps FL can be any number. Furthermore, the flash lamps FL are not limited to xenon flash lamps and can also be krypton flash lamps. Furthermore, the number of halogen lamps HL included in the halogen heating unit 4 is not limited to 40 and can be any number.
[0102] In addition, in the above embodiment, a filament-type halogen lamp HL is used as a continuous-lighting lamp that emits light continuously for more than 1 second to preheat the semiconductor chip W, but this is not limited to this. A discharge-type arc lamp (such as a xenon arc lamp) can also be used as a continuous-lighting lamp instead of the halogen lamp HL to perform preheating.
[0103] Explanation of symbols
[0104] 1 Heat treatment device
[0105] 3. Control Unit
[0106] 4 Halogen heating unit
[0107] 5 Flash heating unit
[0108] 6 chambers
[0109] 7. Maintaining part
[0110] 10 Transfer mechanism
[0111] 65 heat treatment space
[0112] 74,74a Crystal seat
[0113] 75 retaining plate
[0114] 77 Substrate support pin
[0115] 94 pin moving mechanism
[0116] 97 slots
[0117] 98 Set Circle
[0118] 190 Exhaust
[0119] FL flash
[0120] HL halogen lamp
[0121] W semiconductor wafer.
Claims
1. A heat treatment apparatus for heating a substrate by irradiating a flash of light onto the substrate, comprising: a chamber for receiving a substrate; a crystal base for holding the substrate in the chamber; a plurality of supporting pins, disposed on the crystal base, for supporting the substrate; and a flash lamp for irradiating a flash of light onto the substrate held by the crystal holder; The plurality of support pins on the crystal base are arranged at different positions according to the pulse width of the flash light irradiated from the flash lamp; and The plurality of support pins are arranged in a circular ring shape on the crystal base, The shorter the pulse width, the larger the diameter of the setting circle on which the plurality of support pins are set; The arrangement circle is a circle formed by the plurality of support pins arranged in a circular ring shape.
2. The heat treatment device according to claim 1, wherein When the pulse width is less than 0.8 milliseconds, the diameter of the setting circle is greater than 93% of the diameter of the substrate. When the pulse width is 0.8 milliseconds or more and less than 5 milliseconds, the diameter of the setting circle is greater than 83% and less than 93% of the diameter of the substrate. When the pulse width is 5 milliseconds or more and less than 10 milliseconds, the diameter of the setting circle is greater than 77% and less than 83% of the diameter of the substrate. When the pulse width is 10 milliseconds or more and less than 20 milliseconds, the diameter of the setting circle is greater than 73% and less than 77% of the diameter of the substrate. When the pulse width is greater than or equal to 20 milliseconds, the diameter of the setting circle is less than or equal to 73% of the diameter of the substrate.
3. The heat treatment device according to claim 1 or 2, further comprising: The pin moving mechanism changes the positions of the plurality of support pins according to the pulse width.
4. The heat treatment device according to claim 3, wherein The crystal seat is provided with a plurality of narrow slots along the radial direction. The pin moving mechanism slides the plurality of support pins along the plurality of slots.
Citation Information
Patent Citations
Heat treatment equipment
JP2009164451A
Heat treatment method, heat treatment device, and susceptor
JP2014157968A
Method of supporting silicon wafer
JP2003338505A
Heat treatment susceptor and heat treatment device
JP2017139315A