Delay measurement method, apparatus, device, system, storage medium and chip

Abstract

The disclosure relates to a latency measurement method, device, equipment, system, storage medium and chip, and relates to the field of wireless network equipment. The method comprises the following steps: obtaining a first count value of a first test device at a measurement start time; the measurement start time is a time after the counters of the first test device and the second test device are cleared and restarted; the clearing time of the counter of the first test device is the same as the clearing time of the second test device, or the time difference between the clearing time of the counter of the first test device and the clearing time of the second test device is an integral multiple of a synchronization period; obtaining a first time stamp corresponding to the first count value according to the counting period of the first test device; and determining the relative latency between the first test device and the second test device according to the first time stamp and a second time stamp of the second test device. Through the above scheme, the synchronization accuracy between the devices to be measured is higher, and the latency measurement is more accurate.

Description

Technical Field

[0001] This disclosure relates to the field of wireless network equipment, and more particularly to a delay measurement method, apparatus, device, system, storage medium, and chip. Background Technology

[0002] With the increasing prevalence of wireless network applications, several wireless network technologies have emerged, such as Bluetooth, Thread (a home IoT communication protocol), and Zigbee. To test the relative latency between different devices, it is usually necessary to synchronize the time of the devices under test. However, in wireless networks, due to the large number of devices and their potentially dispersed physical distribution, wireless transmission latency is significant, making it difficult to maintain accurate time synchronization between different devices. This makes it challenging to accurately assess the relative latency of the devices. Summary of the Invention

[0003] To overcome the problems existing in related technologies, this disclosure provides a delay measurement method, apparatus, device, system, storage medium, and chip.

[0004] According to a first aspect of the present disclosure, a time delay measurement method is provided, applied to a first test device, the method comprising:

[0005] The first count value of the first test device is obtained at the measurement start time; the measurement start time is the time after the counter of the first test device is cleared and restarted, and the counter of the second test device is cleared and restarted. The clearing time of the counter of the first test device is the same as the clearing time of the counter of the second test device, or the time difference between the clearing time of the counter of the first test device and the clearing time of the counter of the second test device is an integer multiple of the synchronization period.

[0006] Based on the counting cycle of the first test device, obtain the first timestamp corresponding to the first count value;

[0007] The relative time delay between the first test device and the second test device is determined based on the first timestamp and the second timestamp of the second test device; wherein the second timestamp is the timestamp corresponding to the second count value of the second test device obtained at the start time of the time delay measurement.

[0008] According to a second aspect of the present disclosure, a time delay measurement apparatus is provided, applied to a first test device, the apparatus comprising:

[0009] The first acquisition device is configured to acquire a first count value of the first test device at the measurement start time; the measurement start time is the time after the counter of the first test device is cleared and restarted, and the counter of the second test device is cleared and restarted, the clearing time of the counter of the first test device is the same as the clearing time of the counter of the second test device, or the time difference between the clearing time of the counter of the first test device and the clearing time of the counter of the second test device is an integer multiple of the synchronization period.

[0010] The second acquisition device is configured to acquire a first timestamp corresponding to the first count value according to the counting period of the first test device;

[0011] The determining device is configured to determine the relative time delay between the first test device and the second test device based on the first timestamp and the second timestamp of the second test device; wherein the second timestamp is the timestamp corresponding to the second count value of the second test device acquired at the start time of the time delay measurement.

[0012] According to a third aspect of the present disclosure, a time delay measurement system is provided, the system comprising: a synchronization device, a first measurement device, and a second measurement device, wherein the synchronization device is connected to the first measurement device and the second measurement device;

[0013] The synchronization device is configured to send two output signals to the first measuring device and the second measuring device respectively; the two output signals are any two adjacent output signals output by the synchronization device.

[0014] The first measuring device is configured to determine the counting period of the first testing device based on the count values ​​when two output signals are received, and after the counter of the first testing device is cleared and the timing is restarted, to obtain the first count value of the first testing device at the start of the measurement, and to obtain the first timestamp corresponding to the first count value based on the counting period of the first testing device.

[0015] The second measuring device is configured to determine the counting period of the second testing device based on the count values ​​when two output signals are received, and after the counter of the second testing device is cleared and the timing is restarted, to obtain the second count value of the second testing device at the start of the measurement, and to obtain the second timestamp corresponding to the second count value based on the counting period of the second testing device;

[0016] The first measuring device and the second measuring device are further configured to determine the relative time delay between the first testing device and the second testing device based on the first timestamp and the second timestamp.

[0017] According to a fourth aspect of the present disclosure, an electronic device is provided, comprising:

[0018] A memory on which computer programs are stored;

[0019] A processor is configured to execute the computer program in the memory to implement the steps of the delay measurement method provided in the first aspect of this disclosure.

[0020] According to a fifth aspect of the present disclosure, a computer-readable storage medium is provided that stores computer program instructions thereon, which, when executed by a processor, implement the steps of the delay measurement method provided in the first aspect of the present disclosure.

[0021] In the above technical solution, a first count value of the first test device is obtained at the measurement start time; the measurement start time is the time after the counter of the first test device is cleared and restarted, and after the counter of the second test device is cleared and restarted, the clearing time of the counter of the first test device is the same as the clearing time of the counter of the second test device, or the time difference between the clearing time of the counter of the first test device and the clearing time of the counter of the second test device is an integer multiple of the synchronization period; a first timestamp corresponding to the first count value is obtained according to the counting period of the first test device; the relative time delay between the first test device and the second test device is determined according to the first timestamp and the second timestamp of the second test device; wherein, the second timestamp is the timestamp corresponding to the second count value of the second test device obtained at the time delay measurement start time. The above method avoids the problem of large delays caused by the dispersed physical distribution of equipment, and enables higher synchronization accuracy between the devices under test, making the delay measurement more accurate. Furthermore, since the reset time of the counters of the first test device and the second test device is the same or an integer multiple of the synchronization period, this relatively synchronized counting period method allows for the measurement of different devices in batches without having to connect all the devices, thus achieving time-sharing measurement. Attached Figure Description

[0022] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0023] Figure 1 This is a flowchart illustrating a time delay measurement method according to an exemplary embodiment;

[0024] Figure 2 This is a flowchart illustrating another time delay measurement method according to an exemplary embodiment;

[0025] Figure 3This is a flowchart illustrating another time delay measurement method according to an exemplary embodiment;

[0026] Figure 4 This is a schematic diagram illustrating a relative time delay according to an exemplary embodiment;

[0027] Figure 5 This is a schematic diagram illustrating another relative time delay according to an exemplary embodiment;

[0028] Figure 6 This is a block diagram illustrating a time delay measurement device according to an exemplary embodiment;

[0029] Figure 7 This is a block diagram illustrating a time delay measurement system according to an exemplary embodiment;

[0030] Figure 8 This is a block diagram illustrating an electronic device 800 according to an exemplary embodiment;

[0031] Figure 9 This is a block diagram illustrating an electronic device 900 according to an exemplary embodiment. Detailed Implementation

[0032] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.

[0033] It is understood that in this disclosure, "multiple" refers to two or more, and other quantifiers are similar. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. The singular forms "a," "the," and "the" are also intended to include the plural forms unless the context clearly indicates otherwise.

[0034] It is further understood that the terms "first," "second," etc., are used to describe various types of information, but this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another, and do not indicate a specific order or degree of importance. In fact, the expressions "first," "second," etc., are completely interchangeable. For example, without departing from the scope of this disclosure, a first test device may also be referred to as a second test device, and similarly, a second test device may also be referred to as a first test device.

[0035] It is further understood that although operations are described in a specific order in the accompanying drawings in the embodiments of this disclosure, this should not be construed as requiring these operations to be performed in the specific order or serial order shown, or requiring all of the shown operations to be performed to obtain the desired result. In certain environments, multitasking and parallel processing may be advantageous.

[0036] It should be noted that all actions involving the acquisition of signals, information, or data in this application are carried out in compliance with the relevant data protection laws and policies of the country where the application is located, and with the authorization granted by the owner of the relevant device.

[0037] Figure 1 A flowchart illustrating a time delay measurement method according to an exemplary embodiment is shown, such as... Figure 1 As shown, the delay measurement method can be used for a first test device, which can be any terminal device. The first test device is connected to a second test device and a synchronization device. The method can include the following steps.

[0038] S101, acquire the first count value of the first test device at the measurement start time; the measurement start time is the time after the counter of the first test device is cleared and restarted, and the counter of the second test device is cleared and restarted, the clearing time of the counter of the first test device is the same as the clearing time of the second test device, or the time difference between the clearing time of the counter of the first test device and the clearing time of the second test device is an integer multiple of the synchronization period.

[0039] The synchronization device can connect to two or more test devices, and the first test device and the second test device can be any two of the test devices connected to the synchronization device.

[0040] For example, the synchronization device can be any device capable of periodically outputting signals. This synchronization device may include an internal counter and an output interface. The test device can be any terminal device requiring delay testing. This test device may include an internal counter and an input interface. The output interface of the synchronization device is used to connect to the input interface of the test device. Furthermore, the synchronization device and the test device can be independent devices or different modules or units within the same device.

[0041] In one implementation, the clock frequency of the counter of the first test device and the clock frequency of the counter of the second test device can be the same, and the counting period of the first test device and the counting period of the second test device can be the same.

[0042] Alternatively, in another implementation, the clock frequency of the counter of the first test device and the clock frequency of the counter of the second test device may be different. Since the clock frequency is different, the counting period of the first test device and the counting period of the second test device will be different. Therefore, in the case where the clock frequency of the counter of the first test device and the clock frequency of the counter of the second test device are different, it is necessary to calculate the counting period of the first test device and the second test device respectively.

[0043] For example, the synchronization device can send two consecutive output signals to the first test device and the second test device respectively. The first test device calculates its counting period based on the count values ​​when it receives the two output signals, as described in step S104 below. After the first test device determines its own counting period, in order to keep synchronized with the output signal transmission period of the synchronization device, it needs to reset its counter and restart the timing. Similarly, after receiving two consecutive output signals from the synchronization device, the second test device determines its counting period based on the count values ​​when it receives the two output signals, resets its counter, and restarts the timing. To keep the counting of the first test device and the second test device synchronized, the reset time of the first test device's counter needs to be the same as the reset time of the second test device, or the time difference between the reset times of the first and second test devices needs to be an integer multiple of the synchronization period.

[0044] After both the first and second test devices are reset to zero and restarted counting, the counting cycles of the first and second test devices are synchronized with the output signal transmission cycle of the synchronization device. Under these circumstances, measurement can begin. The measurement can begin at any time after both the first and second test devices are reset to zero and restarted counting.

[0045] The measurement start time can be triggered by a control command. After both the first and second test devices are reset to zero and restarted, feedback information can be sent to a synchronization device. Upon receiving the feedback information from the first and second test devices, the synchronization device sends a measurement start command to both devices. The time when the first and second test devices receive this measurement start command is recorded as the measurement start time. Alternatively, the control command can be sent by other electronic devices. Since there may be a relative time delay between the first and second test devices, the time when they receive the measurement start command may differ. Therefore, the measurement start times of the first and second test devices may differ. Thus, the first test device acquires a first count value at the measurement start time, and the second test device acquires a second count value at the measurement start time. The count value of the first test device refers to the count value of its counter at the measurement start time, and similarly, the count value of the second test device refers to the count value of its counter at the measurement start time.

[0046] S102, based on the counting cycle of the first test device, obtain the first timestamp corresponding to the first count value.

[0047] For example, the first test device converts the first count value into a first timestamp corresponding to the first count value based on the counting period of the first test device. Similarly, the second test device converts the second count value into a second timestamp corresponding to the second count value based on the counting period of the second test device.

[0048] S103, determine the relative time delay between the first test device and the second test device based on the first timestamp and the second timestamp sent by the second test device.

[0049] For example, the time difference between the first timestamp and the second timestamp can be used as the relative delay between the first test device and the second test device. In one embodiment, the first test device can receive the second timestamp sent by the second test device and execute step S103, or the first test device can send the first timestamp to the second test device, and the second test device can determine the relative delay, or the first test device and the second test device can send the first timestamp and the second timestamp to other devices respectively, and the other devices can determine the relative delay. The other devices can be the synchronization device, other test devices connected to the synchronization device, or any other third-party device.

[0050] The above method avoids the problem of large delays caused by the dispersed physical distribution of equipment, and enables higher synchronization accuracy between the devices under test, making the delay measurement more accurate. Furthermore, since the reset time of the counters of the first test device and the second test device is the same or an integer multiple of the synchronization period, this relatively synchronized counting period method allows for the measurement of different devices in batches without having to connect all the devices, thus achieving time-sharing measurement.

[0051] Optionally, Figure 2 This is a flowchart illustrating another time delay measurement method according to an exemplary embodiment, such as... Figure 2 As shown, if the clock frequencies of the counters of the first device and the second device are different, the method may further include the following before step S101:

[0052] Step S104: Based on the count value of the first test device when it receives the first output signal and the second output signal sent by the synchronization device, determine the counting period of the first test device.

[0053] Wherein, the first output signal and the second output signal are any two adjacent output signals output by the synchronization device, and the synchronization period is the output signal transmission period of the synchronization device.

[0054] In step S105, in response to the second output signal, the counter of the first test device is cleared and the timing is restarted.

[0055] Optionally, Figure 3 This is a flowchart illustrating another time delay measurement method according to an exemplary embodiment, such as... Figure 3 As shown, step S104 above may include the following steps:

[0056] S1041, Obtain the third count value of the counter of the first test device when the first output signal sent by the synchronization device is received.

[0057] S1042, Obtain the fourth count value of the counter of the first test device when the second output signal sent by the synchronization device is received.

[0058] S1043, the difference between the fourth count value and the third count value is determined as the first counting cycle.

[0059] S1044, the upper limit of the counter of the first test device is set to a preset multiple of the first counting cycle, and the preset multiple is an integer multiple.

[0060] The first and second output signals can be pulse signals issued by the synchronization device. The counter in the synchronization device has the function of generating an interrupt. The first and second output signals can be interrupt signals issued by the synchronization device. The interrupt signal can be a pulse signal. For example, when the synchronization device reaches a preset value, it generates an interrupt signal as an output signal and sends it to the measuring device. Then the synchronization device restarts counting and generates an interrupt signal again when the count value reaches the preset value, and so on.

[0061] For example, both the synchronization device and the test device are equipped with counters. The clock source for these counters can be a high-frequency external crystal oscillator. The actual counting frequency after frequency division is denoted as Freq. The upper limit of the counter on the synchronization device can be denoted as Period, where Period = Freq * N, and the unit is ticks (count value), where N is the number of seconds. Whenever the counter value of the synchronization device reaches Period, an interrupt is generated, and an output signal is sent to the test device. Therefore, the output signal transmission period of the synchronization device is this Period. Period must be greater than the maximum delay previously estimated by the measurement device.

[0062] When the first test device receives the first output signal, it records the current first count value of its counter as `startTick`. When the first test device receives the second output signal, it records the current second count value of its counter as `stopTick`. Therefore, the first counting period of the first test device is: `stopTick - startTick`, which can be denoted as `tickPeriod`. Furthermore, the upper limit of the counter's count can be set as: `TopTick = 0xFFFFFFFF / (tickPeriod * tickPeriod)`, where 0x represents hexadecimal and " / " represents floating-point operation. That is, the upper limit of the counter's count is obtained by multiplying the hexadecimal value of `FFFFFFFF` by `tickPeriod` in floating-point calculation, and then multiplying the result by `tickPeriod`. The `tickPeriod` may differ between different test devices, but when converted to physical time, it is the same as the output signal transmission period (Period) of the synchronization device. The starting point of the counters of different test devices all fall on integer multiples of this period.

[0063] Optionally, after obtaining the first count value, the method for determining the corresponding first timestamp based on the first count value may include:

[0064] The first timestamp is designated as timeStamp1, and timeStamp1 can be calculated using the following formula:

[0065] timestamp=(tick % tickPeriod) / tickPeriod * Period (1)

[0066] Where timestamp represents a timestamp, tick represents the current counter value of the test device, tickPeriod is the counting period of the test device, Period is the output signal transmission period of the aforementioned synchronization device, % represents the modulo operation, and / represents floating-point operation. Substituting the first count value into tick in formula (1) and the counting period of the first test device into tickPeriod in formula (1), the first timestamp timeStamp1 can be calculated by formula (1).

[0067] Similarly, the second test device can perform the same method as the first test device described above to obtain the second counting period of the second measuring device. For example, the second test device can determine the counting period of the second test device based on the count value of the second test device when it receives the third output signal and the fourth output signal sent by the synchronization device.

[0068] Similar to the method performed by the first test device, the second test device first acquires the fifth count value of its counter when it receives the third output signal sent by the synchronization device, and the sixth count value of its counter when it receives the fourth output signal sent by the synchronization device. The difference between the sixth count value and the fifth count value is then determined as the second counting period. The upper limit of the counter's count is then set to a preset multiple of the second counting period, where the preset multiple is an integer multiple. The specific calculation method is the same as that performed by the first test device and will not be elaborated further.

[0069] Optionally, the second test device, after determining its counting period based on the count value of the second test device upon receiving the third and fourth output signals from the synchronization device, resets the counter and restarts the timing process according to the method described above.

[0070] After the counter of the first test device is cleared and restarted, the start time of the restart of the counter of the first test device is set to the time when the second output signal is received. After the counter of the second test device is cleared and restarted, the start time of the restart of the counter of the second test device is set to the time when the fourth output signal is received.

[0071] After obtaining the counting cycle and the second count value of the second test device, the second timestamp timeStamp2 corresponding to the second count value can be calculated by the method shown in the above formula (1).

[0072] It should be noted that the counters of the first and second test devices mentioned above restart counting when they reach the upper limit of the counter. Therefore, the relative delay between the first timestamp timeStamp1 and the second timestamp timeStamp2 calculated from the first and second count values ​​is less than one period.

[0073] In one implementation, the first output signal and the third output signal are the same signal, and the second output signal and the fourth output signal are the same signal. In this case, it can be understood that the synchronization device synchronously sends the first output signal and the second output signal to the first test device and the second test device.

[0074] Alternatively, in another implementation, the time difference between the first and third output signals is N times the transmission period of the output signal of the synchronization device, where N is a positive integer. In this case, it can be understood that the output signals sent by the synchronization device to the first and second test devices are not sent simultaneously. However, the two output signals received by the first and second test devices are different signals. But since the time difference is N times the transmission period of the synchronization device's output signal, both the two output signals received by the first and second test devices are synchronized with the transmission period of the synchronization device's output signal.

[0075] Since the relative delay between the first timestamp (timeStamp1) and the second timestamp (timeStamp2) calculated by the above formula (1) is less than one period, there is no restriction on the time interval between acquiring the first count value of the first test device and acquiring the second count value of the second test device. That is, in this embodiment, time-division measurement of the first test device and the second test device can be realized. Furthermore, through this time-division measurement, when there are many measurement devices, different measurement devices can be connected to the synchronization device in batches for measurement, thereby solving the problem of insufficient interfaces when there are many measurement devices.

[0076] Optionally, step S103 above, which describes determining the relative delay between the first test device and the second test device based on the first timestamp and the second timestamp sent by the second test device, includes:

[0077] The first timestamp and the second timestamp are sent to the target device so that the target device can determine the relative delay based on the first timestamp and the second timestamp. The target device can be the second test device, or it can be another device besides the first device and the second test device. For example, the target device can be the aforementioned second test device, or it can be a third-party device used to calculate the relative delay. For example, the relative delay can be determined in the following way:

[0078] If the first timestamp is less than the second timestamp, the relative delay is the difference between the second timestamp and the first timestamp.

[0079] If the first timestamp is greater than the second timestamp, the above relative delay is the difference between the sum of the first timestamp and the output signal transmission period and the first timestamp.

[0080] For example, since the relative delay between the first and second timestamps is less than the output signal transmission period of a synchronization device (Period), it can be assumed that the first timestamp is earlier than the second timestamp. Therefore, the relative delay can be expressed as:

[0081] 1) such as Figure 4 As shown, in the case where the first timestamp is less than the second timestamp:

[0082] Relative delay = Second timestamp – First timestamp

[0083] 2) such as Figure 5 As shown, when the first timestamp > the second timestamp:

[0084] Relative delay = second timestamp + synchronization period - first timestamp, where the synchronization period refers to the Period mentioned above.

[0085] Through the above method, the first and second test devices can calculate the counting period based on the output signal sent by the synchronization device. After calculating the counting period, the count is reset and restarted, achieving synchronization of the counting periods between different test devices. This allows for the measurement of the relative delay between the first and second test devices while maintaining synchronized counting periods. Compared to related technologies that calculate relative delay by publishing time synchronization messages via a wireless network, this method avoids the problem of large delays caused by the dispersed physical distribution of devices, resulting in higher synchronization accuracy and more accurate delay measurement between the devices under test. Furthermore, by using relative synchronization of counting periods, it is not necessary to connect all the test devices when there are many devices; instead, different test devices can be measured in batches, achieving time-sharing measurement and solving the problem of insufficient interfaces when there are many test devices.

[0086] Figure 6This is a block diagram illustrating a time delay measurement device according to an exemplary embodiment. (Refer to...) Figure 6 The delay testing device 600 includes: a first acquisition module 601, a second acquisition module 602, and a determination module 603.

[0087] The first acquisition module 601 is configured to acquire a first count value of the first test device at the measurement start time; the measurement start time is the time after the counter of the first test device is cleared and restarted, and after the counter of the second test device is cleared and restarted, wherein the clearing time of the counter of the first test device is the same as the clearing time of the counter of the second test device, or the time difference between the clearing time of the counter of the first test device and the clearing time of the counter of the second test device is an integer multiple of the synchronization period.

[0088] The second acquisition module 602 is configured to acquire the first timestamp corresponding to the first count value according to the counting period of the first test device;

[0089] The determining module 603 is configured to determine the relative time delay between the first test device and the second test device based on the first timestamp and the second timestamp of the second test device; wherein the second timestamp is the timestamp corresponding to the second count value of the second test device acquired at the start time of the time delay measurement.

[0090] Optionally, the delay measurement device further includes:

[0091] The determination submodule is configured to determine the counting period of the first test device based on the count value of the first test device when the first output signal and the second output signal sent by the synchronization device are received; wherein the first output signal and the second output signal are any two adjacent output signals output by the synchronization device, and the synchronization period is the output signal transmission period of the synchronization device;

[0092] The reset module is configured to reset and restart the timing of the counter of the first test device in response to the second output signal.

[0093] Optionally, the determining submodule includes:

[0094] The first acquisition submodule is configured to acquire the third count value of the counter of the first test device when the first output signal sent by the synchronization device is received;

[0095] The second acquisition submodule is configured to acquire the fourth count value of the counter of the first test device when the second output signal sent by the synchronization device is received;

[0096] The period determination submodule is configured to determine the first counting period of the first test device based on the third count value and the fourth count value.

[0097] Optionally, this cycle determines the submodule, which is configured as follows:

[0098] The difference between the fourth count value and the third count value is determined as the first counting period;

[0099] The upper limit of the counter of the first test device is set to a preset multiple of the first counting cycle, and the preset multiple is an integer multiple.

[0100] Optionally, the second determining module 603 may include:

[0101] The delay determination submodule is configured to send the first timestamp to the target device so that the target device can determine the relative delay based on the first timestamp and the second timestamp of the second test device. The target device is the second test device, or it is another device other than the first device and the second test device.

[0102] Alternatively, the second timestamp sent by the second test device can be received, and the relative delay can be determined based on the first timestamp and the second timestamp.

[0103] Optionally, the second test device determines its counting period based on the count value of the second test device when it receives the third and fourth output signals sent by the synchronization device, and then resets the counter and restarts the timing.

[0104] After the counter of the first test device is cleared and restarted, the start time of the restart of the counter of the first test device is set to the time when the second output signal is received;

[0105] After the counter of the second test device is cleared and restarted, the start time of the restart of the counter of the second test device is set to the time when the fourth output signal is received;

[0106] Wherein, the first output signal and the third output signal are the same signal, and the second output signal and the fourth output signal are the same signal; or, the time difference between the first output signal and the third output signal is N times the output signal transmission period of the synchronization device.

[0107] Optionally, the first timestamp and the second timestamp are timestamps converted to the same output signal transmission period;

[0108] If the first timestamp is less than the second timestamp, the relative delay is the difference between the second timestamp and the first timestamp;

[0109] If the first timestamp is greater than the second timestamp, the relative delay is the difference between the sum of the first timestamp and the output signal transmission period and the first timestamp.

[0110] Through the above method, the first and second test devices can calculate the counting period based on the output signal sent by the synchronization device. After calculating the counting period, the count is reset and restarted, achieving synchronization of the counting periods between different test devices. This allows for the measurement of the relative delay between the first and second test devices while maintaining synchronized counting periods. Compared to related technologies that calculate relative delay by publishing time synchronization messages via a wireless network, this method avoids the problem of large delays caused by the dispersed physical distribution of devices, resulting in higher synchronization accuracy and more accurate delay measurement between the devices under test. Furthermore, by using relative synchronization of counting periods, it is not necessary to connect all the test devices when there are many devices; instead, different test devices can be measured in batches, achieving time-sharing measurement and solving the problem of insufficient interfaces when there are many test devices.

[0111] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0112] This disclosure also provides a computer-readable storage medium having stored thereon computer program instructions that, when executed by a processor, implement the steps of the delay measurement method provided in this disclosure.

[0113] Figure 7 This is a block diagram illustrating a time delay measurement system according to an exemplary embodiment. (Refer to...) Figure 7 The system includes: a synchronization device 1, a first measuring device 2, and a second measuring device 3, wherein the synchronization device 1 is connected to the first measuring device and the second measuring device; optionally, the time delay measurement system may also include more measuring devices (such as...). Figure 7 (The synchronous device 1 is a measuring device connected by a dashed line).

[0114] Synchronization device 1 is configured to send two output signals to the first measuring device 2 and the second measuring device 3 respectively; the two output signals are any two adjacent output signals output by the synchronization device.

[0115] The first measuring device 2 is configured to determine the counting period of the first testing device 2 based on the count values ​​when two output signals are received, and after the counter of the first testing device 2 is cleared and the timing is restarted, to obtain the first count value of the first testing device 2 at the start of the measurement, and to obtain the first timestamp corresponding to the first count value based on the counting period of the first testing device 2.

[0116] The second measuring device 3 is configured to determine the counting period of the second testing device 3 based on the count values ​​when two output signals are received, and after the counter of the second testing device 3 is cleared and the timing is restarted, to obtain the second count value of the second testing device 3 at the start of the measurement, and to obtain the second timestamp corresponding to the second count value based on the counting period of the second testing device 3.

[0117] The first measuring device 2 and the second measuring device 3 are also configured to determine the relative time delay between the first measuring device 2 and the second measuring device 3 based on the first timestamp and the second timestamp.

[0118] Optionally, such as Figure 7 As shown, the system also includes: target device 4;

[0119] The first measuring device 1 is also configured to send a first timestamp to the target device 4, so that the target device 4 can determine the relative delay based on the first timestamp and the second timestamp of the second testing device, wherein the target device 4 is the second testing device, or is another device other than the first device and the second testing device. Figure 7 (Taking the target device 4 as an example, which is a device other than the first device and the second test device); or, the first measuring device 1 is also configured to receive the second timestamp sent by the second test device and determine the relative delay based on the first timestamp and the second timestamp;

[0120] The second measuring device 2 is further configured to send a second timestamp to the target device 4 so that the target device can determine the relative delay based on the first timestamp and the second timestamp. The target device 4 is the first test device 1 or other devices. Alternatively, the second measuring device 2 is further configured to receive the first timestamp sent by the first test device 1 and determine the relative delay based on the second timestamp and the first timestamp.

[0121] Optionally, the two output signals received by the first measuring device 2 are the same as the two output signals received by the second measuring device 3;

[0122] Alternatively, the two output signals received by the first measuring device 2 are different from the two output signals received by the second measuring device 3, and the time difference between the two output signals received by the first measuring device 2 and the two output signals received by the second measuring device 3 is N times the transmission period of the output signal of the synchronization device 1.

[0123] Through the above method, the first and second test devices can calculate the counting period based on the output signal sent by the synchronization device. After calculating the counting period, the count is reset and restarted, achieving synchronization of the counting periods between different test devices. This allows for the measurement of the relative delay between the first and second test devices while maintaining synchronized counting periods. Compared to related technologies that calculate relative delay by publishing time synchronization messages via a wireless network, this method avoids the problem of large delays caused by the dispersed physical distribution of devices, resulting in higher synchronization accuracy and more accurate delay measurement between the devices under test. Furthermore, by using relative synchronization of counting periods, it is not necessary to connect all the test devices when there are many devices; instead, different test devices can be measured in batches, achieving time-sharing measurement and solving the problem of insufficient interfaces when there are many test devices.

[0124] Figure 8 This is a block diagram illustrating an electronic device 800 according to an exemplary embodiment. For example, the electronic device 800 may be the aforementioned test device or synchronization device, and may be a mobile phone, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness device, personal digital assistant, etc.

[0125] Reference Figure 8 The electronic device 800 may include one or more of the following components: processing component 802, memory 804, power supply component 806, multimedia component 808, audio component 810, input / output (I / O) interface 812, sensor component 814, and communication component 816.

[0126] Processing component 802 typically controls the overall operation of electronic device 800, such as operations associated with display, telephone calls, data communication, camera operation, and recording operations. Processing component 802 may include one or more processors 820 to execute instructions to complete all or part of the steps of the time delay measurement method. Furthermore, processing component 802 may include one or more modules to facilitate interaction between processing component 802 and other components. For example, processing component 802 may include a multimedia module to facilitate interaction between multimedia component 808 and processing component 802.

[0127] Memory 804 is configured to store various types of data to support the operation of electronic device 800. Examples of this data include instructions for any application or method operating on electronic device 800, contact data, phonebook data, messages, pictures, videos, etc. Memory 804 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0128] Power supply component 806 provides power to various components of electronic device 800. Power supply component 806 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 800.

[0129] Multimedia component 808 includes a screen that provides an output interface between the electronic device 800 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of the touch or swipe action but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 808 includes a front-facing camera and / or a rear-facing camera. When the electronic device 800 is in an operating mode, such as a shooting mode or a video mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0130] Audio component 810 is configured to output and / or input audio signals. For example, audio component 810 includes a microphone (MIC) configured to receive external audio signals when electronic device 800 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 804 or transmitted via communication component 816. In some embodiments, audio component 810 also includes a speaker for outputting audio signals.

[0131] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0132] Sensor assembly 814 includes one or more sensors for providing state assessments of various aspects of electronic device 800. For example, sensor assembly 814 can detect the on / off state of electronic device 800, the relative positioning of components such as the display and keypad of device 800, changes in position of electronic device 800 or a component of electronic device 800, the presence or absence of user contact with electronic device 800, orientation or acceleration / deceleration of electronic device 800, and temperature changes of electronic device 800. Sensor assembly 814 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 814 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 814 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.

[0133] Communication component 816 is configured to facilitate wired or wireless communication between electronic device 800 and other devices. Electronic device 800 can access wireless networks based on communication standards, such as WiFi, 2G, or 3G, or combinations thereof. In one exemplary embodiment, communication component 816 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 816 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0134] In an exemplary embodiment, the electronic device 800 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components for performing a time delay measurement method.

[0135] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 804 including instructions that can be executed by a processor 820 of an electronic device 800 to perform a delay measurement method. For example, the non-transitory computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, or optical data storage device, etc.

[0136] The aforementioned device can be a standalone electronic device or a part of a standalone electronic device. For example, in one embodiment, the device can be an integrated circuit (IC) or a chip, wherein the integrated circuit can be a single IC or a collection of multiple ICs; the chip can include, but is not limited to, the following types: GPU (Graphics Processing Unit), CPU (Central Processing Unit), FPGA (Field Programmable Gate Array), DSP (Digital Signal Processor), ASIC (Application Specific Integrated Circuit), SOC (System on Chip), etc. The aforementioned integrated circuit or chip can be used to execute executable instructions (or code) to implement the aforementioned delay measurement method. The executable instructions can be stored in the integrated circuit or chip or obtained from other devices or equipment. For example, the integrated circuit or chip includes a processor, memory, and an interface for communicating with other devices. The executable instruction can be stored in the processor, and when the executable instruction is executed by the processor, the above-mentioned delay measurement method is implemented; or, the integrated circuit or chip can receive the executable instruction through the interface and transmit it to the processor for execution to implement the above-mentioned delay measurement method.

[0137] In another exemplary embodiment, a computer program product is also provided, the computer program product comprising a computer program executable by a programmable device, the computer program having a code portion for performing the above-described delay measurement method when executed by the programmable device.

[0138] Figure 9 This is a block diagram illustrating an electronic device 900 according to an exemplary embodiment. For example, the electronic device 900 can be provided as a server, and can serve as the aforementioned synchronization device or measurement device. (Refer to...) Figure 9 The electronic device 900 includes a processing component 922, which further includes one or more processors, and memory resources represented by a memory 932 for storing instructions, such as application programs, that can be executed by the processing component 922. The application programs stored in the memory 932 may include one or more modules, each corresponding to a set of instructions. Furthermore, the processing component 922 is configured to execute instructions to perform the aforementioned delay measurement method.

[0139] Electronic device 900 may also include a power supply component 926 configured to perform power management of electronic device 900, a wired or wireless network interface 950 configured to connect electronic device 900 to a network, and an input / output (I / O) interface 958. Electronic device 900 can operate on an operating system, such as Windows Server, stored in memory 932. TM Mac OS X TM Unix TM Linux TM FreeBSD TM Or similar.

[0140] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of this disclosure. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0141] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A method of measuring a time delay, characterized by, The method is applied to a first test device, and comprises: obtaining a first count value of the first test device at a measurement start time; the measurement start time is a time after a counter of the first test device and a counter of a second test device are cleared and restarted, and the clearing time of the counter of the first test device is the same as the clearing time of the second test device, or the time difference between the clearing time of the counter of the first test device and the clearing time of the second test device is an integral multiple of a synchronization period; obtaining a first time stamp corresponding to the first count value according to a count period of the first test device; determining a relative time delay between the first test device and the second test device according to the first time stamp and a second time stamp of the second test device; the second time stamp is a time stamp corresponding to a second count value of the second test device at the time delay measurement start time.

2. The method of claim 1, wherein, The first test device and the second test device are connected with a synchronization device, and in the case that the clock frequencies of the counter of the first test device and the counter of the second test device are different, the method further comprises: determining the count period of the first test device based on the count value of the first test device when receiving a first output signal and a second output signal sent by the synchronization device; the first output signal and the second output signal are any two adjacent output signals output by the synchronization device, and the synchronization period is the output signal sending period of the synchronization device; clearing and restarting the counter of the first test device in response to the second output signal.

3. The method of claim 2, wherein, The determination of the count period of the first test device based on the count value of the first test device when receiving the first output signal and the second output signal sent by the synchronization device comprises: obtaining a third count value of the counter of the first test device when receiving the first output signal sent by the synchronization device; obtaining a fourth count value of the counter of the first test device when receiving the second output signal sent by the synchronization device; determining the first count period of the first test device based on the third count value and the fourth count value.

4. The method of claim 3, wherein, The determination of the first count period of the first test device based on the third count value and the fourth count value comprises: determining the difference between the fourth count value and the third count value as the first count period; setting the upper limit value of the counter of the first test device as a preset multiple of the first count period, and the preset multiple is an integral multiple.

5. The method of claim 1, wherein, The determination of the relative time delay between the first test device and the second test device according to the first time stamp and the second time stamp of the second test device comprises: sending the first time stamp to a target device, so that the target device determines the relative time delay according to the first time stamp and the second time stamp of the second test device; the target device is the second test device, or is another device outside the first test device and the second test device. Alternatively, the second test device sends the second timestamp, and the first test device determines the relative time delay according to the first timestamp and the second timestamp.

6. The method of claim 2, wherein, The second test device is configured to clear the counter and restart the timing after determining the counting period of the second test device based on the counting value of the second test device when receiving the third output signal and the fourth output signal sent by the synchronization device. The first test device is configured to set the starting time of the restarted timing of the counter of the first test device as the time when the second output signal is received after the counter of the first test device is cleared and restarted. The second test device is configured to set the starting time of the restarted timing of the counter of the second test device as the time when the fourth output signal is received after the counter of the second test device is cleared and restarted. The first output signal and the third output signal are the same signal, and the second output signal and the fourth output signal are the same signal; or the time difference between the first output signal and the third output signal is N times of the output signal sending period of the synchronization device, and the time difference between the first output signal and the third output signal is N times of the output signal sending period of the synchronization device, where N is a positive integer.

7. The method of claim 1, wherein, The first timestamp and the second timestamp are converted to the same output signal sending period. In the case that the first timestamp is less than the second timestamp, the relative time delay is the difference between the second timestamp and the first timestamp. In the case that the first timestamp is greater than the second timestamp, the relative time delay is the difference between the first timestamp and the sum of the first timestamp and the output signal sending period.

8. A time delay measurement apparatus characterized by comprising: The device is applied to a first test device, and the device comprises: The first obtaining device is configured to obtain a first counting value of the first test device at a measurement start time; the measurement start time is a time after the counter of the first test device is cleared and restarted, and the counter of the second test device is cleared and restarted, and the clearing time of the counter of the first test device is the same as the clearing time of the second test device, or the time difference between the clearing time of the counter of the first test device and the clearing time of the second test device is an integral multiple of a synchronization period; The second obtaining device is configured to obtain a first timestamp corresponding to the first counting value according to the counting period of the first test device; The determining device is configured to determine a relative time delay between the first test device and the second test device according to the first timestamp and a second timestamp of the second test device; the second timestamp corresponds to a second counting value of the second test device at the measurement start time.

9. A latency measurement system, characterized by The system comprises a synchronization device, a first test device and a second test device, and the synchronization device is connected with the first test device and the second test device. The first test device is configured to obtain a first count value of the first test device at a measurement start time, and obtain a first time stamp corresponding to the first count value according to a count period of the first test device; The second test device is configured to obtain a second count value of the second test device at the measurement start time, and obtain a second time stamp corresponding to the second count value according to a count period of the second test device; wherein the measurement start time is a time after the counters of the first test device and the second test device are cleared and restarted, the clearing time of the counter of the first test device is the same as the clearing time of the counter of the second test device, or the time difference between the clearing time of the counter of the first test device and the clearing time of the counter of the second test device is an integral multiple of a synchronization period; The first test device and the second test device are further configured to determine the relative time delay between the first test device and the second test device according to the first time stamp and the second time stamp.

10. The system of claim 9, wherein, The first test device and the second test device are connected with a synchronization device, in the case that the clock frequencies of the counters of the first test device and the second test device are different, the synchronization device is configured to send two output signals to the first test device and the second test device respectively; the two output signals are any two adjacent output signals output by the synchronization device, and the synchronization period is the output signal sending period of the synchronization device; The first test device is configured to determine the count period of the first test device according to the count values at the time when the two output signals are received, and clear and restart the counter of the first test device in response to the received two output signals; The second test device is configured to determine the count period of the second test device according to the count values at the time when the two output signals are received, and clear and restart the counter of the second test device in response to the received two output signals.

11. The system of claim 10, wherein, The two output signals received by the first test device are the same as the two output signals received by the second test device; Alternatively, the two output signals received by the first test device are different from the two output signals received by the second test device, and the time difference between the two output signals received by the first test device and the two output signals received by the second test device is N times of the output signal sending period of the synchronization device.

12. The system according to any one of claims 9-11, wherein The first test device is further configured to send the first timestamp to a target device for the target device to determine the relative time delay according to the first timestamp and the second timestamp of the second test device, the target device being the second test device, or being another device other than the first test device and the second test device; or, receive the second timestamp sent by the second test device, and determine the relative time delay according to the first timestamp and the second timestamp. The second test device is further configured to send the second timestamp to the target device for the target device to determine the relative time delay according to the first timestamp and the second timestamp of the second test device, the target device being the first test device, or being the other device; or, receive the first timestamp sent by the first test device, and determine the relative time delay according to the second timestamp and the first timestamp.

13. An electronic device, comprising: The method comprises: a memory having stored thereon a computer program; a processor configured to execute the computer program in the memory to implement the steps of the method of any one of claims 1-7.

14. A computer-readable storage medium having stored thereon computer program instructions, wherein, The program instructions, when executed by the processor, implement the steps of the method of any one of claims 1-7.

15. A chip, characterized by The apparatus comprises a processor and an interface; the processor is configured to read instructions to implement the method of any one of claims 1-7.

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