Circuit arrangement for LED matrix lamp

Abstract

The invention relates to a circuit arrangement (5), comprising: an LED chain (LED1, LED2, LED3, LED4, LED5), the LED chain comprising a plurality of LEDs; bypass switch elements (Q1, Q2, Q3, Q4, Q5), wherein each LED is assigned to one of the bypass switch elements, and each of the bypass switch elements has a driver terminal (PWM1, PWM2, PWM3, PWM4, PWM5), wherein each of the bypass switch elements is designed to bypass the LED in the LED chain associated with the bypass switch element based on a voltage at the driver terminal associated with the bypass switch element; and a switch, wherein the driver terminals of the bypass switch elements are connected to the switch via a common node (Z), the switch being designed to discharge a capacitor (Cb) of a constant current source (2) that can be connected to the LED chain based on a voltage applied to the node. The invention also relates to a circuit (1) comprising the circuit arrangement (5).

Description

[0001] The invention relates to a circuit arrangement, in particular a circuit arrangement for a light emitting diode (LED) matrix lamp, and to a circuit in which a constant current source and a supply voltage are connected to the circuit arrangement.

[0002] LEDs (light emitting diodes) are increasingly being used for lighting purposes due to their efficiency, compact and stable design, and long life.

[0003] LEDs are usually operated with a constant current, which is why LED series circuits are particularly suitable for economical operation of several LEDs with only one constant current source. In automotive applications, for example, individual LED pixel control may be required to implement a matrix light function.

[0004] US 2013 / 0313973 A1 discloses a method of individually and cost-effectively addressing LEDs by diverting the LED current as required to switch the corresponding LEDs on and off via FETs connected in parallel with the LEDs, for example by means of pulse width modulation (PWM), in particular dimming PWM. Some chip manufacturers provide highly integrated IC drivers that support LED bypass control.

[0005] This creates the following problem: in the phase when the LED chain is "shortened" (because a certain element in the chain is missing) as if by bridging the individual LEDs, the voltage drops rapidly and the energy stored in capacitor C1 with the constant current source inevitably causes an overshoot of the LED current. So to speak, the LED current suddenly rises.

[0006] Therefore, a capacitor associated with the constant current source is necessary, as it reduces the current ripple in the LED supply line (relevant for electromagnetic compatibility (EMC)) and in the LED itself. Capacitor values ​​can range from 1 μF to 4.7 μF. However, these values ​​result in highly significant LED current peaks, which can damage the LED design. In this case, current peaks of the power LEDs of a maximum of 1 A to 3 A are provided.

[0007] US 8 203 283 B2 is concerned with the problem of overcurrent when dynamically bypassing LEDs in a chain comprising parallel capacitors - i.e., the problem of LED current peaks occurring at the moment when the output voltage drops. Here, the capacitor associated with the constant current source is replaced by several capacitors connected in parallel with the individual LEDs. The discharge of these capacitors is accomplished by switches provided separately for this purpose. Thus, the formation of LED current peaks is prevented.

[0008] This solution is simple and efficient, but it has certain drawbacks. For example, it is physically difficult to populate multiple capacitors in parallel with individual LEDs, where the capacitors are placed together with the bypass switches on their own LED substrate PCB (printed circuit board) from different electronics manufacturers.

[0009] Furthermore, the total capacitance seen by the driving LED current source (e.g., buck controller) at its output may be variable. Since several capacitors are connected in series at the converter output, the total capacitance decreases as the output voltage and power increase. This conflicts with EMC and stability considerations, i.e., good buffer storage and low output ripple.

[0010] Additionally, the discharge current of the “distributed” capacitor at high output power is an additional load on the bypass switch, which could potentially damage the bypass FET, which has a capacitance value of 470 nF to 1 μF or more.

[0011] Compared to US 8 203 283 B2, the capacitors acting as output capacitors of the constant current source are therefore arranged directly in the power section of the corresponding LED driver (usually a buck converter) to ensure a minimum current loop and thus minimum electromagnetic emissions. However, US 8 203 283 B2 suggests that the distributed capacitors should be placed together with the LEDs or bypass switches, rather than with the converter itself.

[0012] The object of the present invention is to at least partially eliminate these disadvantages. In particular, the current overshoot should be limited.

[0013] The object is achieved by a circuit arrangement. The circuit arrangement has a light emitting diode (LED) chain. The LED chain has a number of LEDs. The circuit arrangement also has a bypass switch element. Each LED in the LED chain is assigned to one of the bypass switch elements. In addition, the bypass switch elements each have a driver terminal. Each bypass switch element is designed to bypass the LED in the LED chain associated with the bypass switch element based on the voltage at the driver terminal associated with the bypass switch element. The circuit arrangement also has a switch. The driver terminals of the bypass switch elements are connected to the switch via a common node. The switch is designed to discharge a capacitor that can be connected, is to be connected, or is connected to a current source (e.g., a constant current source) of the LED chain based on the voltage applied to the node.

[0014] This allows to significantly reduce the current increase. Therefore, the output ripple can also be reduced.

[0015] The bypass switch element may be a bypass switch arranged to bypass the associated LED in terms of current, so that no current or very little current flows through the associated LED. The bypass may be provided by a PWM connected to the driver terminals. The PWM may work in conjunction to assign a light function in the sense of a lighting function to one of the LED chains. This allows different light modes to be achieved by switching individual LEDs on and / or off.

[0016] The switch may be a component that can be set to two states: open and closed. For example, in one state, a capacitor to be connected / connectable to a current source of an LED chain may be connected to ground potential via the switch. In another state, a capacitor to be connected / connectable to a current source of an LED chain may be isolated from ground potential (DC) by means of the switch.

[0017] An LED chain can be understood as LEDs connected in sequence. Consecutive LEDs in an LED chain can each share a connection point.

[0018] The light emitting diode (LED) may be in the form of at least one individually packaged LED, or in the form of at least one LED chip with one or more light emitting diodes, or in the form of a micro-LED or nano-LED (smart dust). A plurality of LED chips may be mounted on a common base ("substrate") and form one LED, or they may be attached individually or together, for example, to a circuit board (e.g. FR4, metal core circuit board, etc.) ("CoB" = chip on board). The at least one LED may be equipped with at least one individual and / or common optical unit for beam guidance, for example, with at least one Fresnel lens or collimator. Instead of or in addition to inorganic LEDs (e.g. based on AlInGaN or InGaN or AlInGaP), organic LEDs (OLEDs, for example polymer OLEDs) may also be used in general.

[0019] The LED chip can emit directly or with an upstream phosphor. Alternatively, the light-emitting component can be a laser diode or a laser diode arrangement. It is also conceivable to provide an OLED light-emitting layer or multiple OLED light-emitting layers or OLED light-emitting areas. The emission wavelength of the light-emitting component can be in the ultraviolet, visible or infrared spectral range. The LED chip can emit white light within the standardized ECE white field of the automotive industry, for example by means of a blue light emitter and a yellow / green light converter.

[0020] Particularly advantageous configurations can be found in the dependent claims.

[0021] In particular, a resistor and a diode may be connected in series between each driver terminal of the bypass element and the node. Furthermore, the anode of the diode may be connected to the node.

[0022] Therefore, a voltage detector in the form of a diode may be provided to enable efficient actuation of the switch.

[0023] In a further configuration, the switch may be a field effect transistor (FET).A driver terminal of the bypass switch element may be connected to a gate terminal of the FET via a common node.

[0024] This allows the power-saving switch to be integrated into the circuit arrangement.

[0025] Furthermore, the drain terminal of the FET may be connected to a parallel circuit consisting of a capacitor and a resistor. The FET may be designed to discharge the capacitor that may be connected, to be connected or connected to a current source of the LED chain via the parallel circuit based on the voltage applied to the node.

[0026] The discharge speed of a capacitor which can be connected, to be connected or connected to a current source of an LED chain can be set by selecting an RC parallel circuit or an associated time constant.

[0027] The source terminal of the FET may also be connected to ground potential. This allows an efficient switch to be provided.

[0028] The differentiator may be connected between the switch and the node. The gate driver may also be placed between the differentiator and the switch. The gate driver may be designed to amplify the output signal of the differentiator and pass the amplified output signal to the switch to actuate the switch. In this case, the differentiator may have an operational amplifier / comparator. The operational amplifier / comparator may be able to be connected to a supply voltage. The operational amplifier / comparator may have two input terminals. One input terminal may be designed to be supplied with a reference voltage. The other input terminal may be connected to a high pass filter.

[0029] Thus, an improved upstream connection of the switch may be provided.

[0030] Likewise, the circuit arrangement may also have a resistor. A first terminal of the resistor may be connected to the node. A second terminal of the resistor may be arranged to be connected or connectable to a supply voltage.

[0031] In this way, suitable voltage detection can be provided by means of the resistor and the series circuit consisting of a resistor and a diode for each branch leading from the node to the driver terminals, so as to detect the voltage state of the driver circuit and to switch the switch according to this state, so that the capacitor of the current source can be discharged via the switch without generating an overcurrent through the LED. The node can be located exactly between the resistor to be connected to the supply voltage and the series circuit consisting of a resistor and a diode for each branch leading from the node to the driver terminals.

[0032] A high pass filter can have a capacitor and a resistor. The capacitor can be connected between the node and the other input terminal of the operational amplifier / comparator. The resistor can be connected between the other input terminal of the operational amplifier / comparator and the ground potential. This is how a differentiator works.

[0033] Furthermore, the operating voltage terminals of the operational amplifier / comparator can be designed to be connected to the supply voltage or the ground potential, respectively. For example, one operating terminal is thus connected to the ground potential, while the other operating terminal is thus connected to the supply voltage.

[0034] In this case, the voltage at each driver terminal may refer to ground potential. The voltages at the driver terminals may also be equal.

[0035] The object is also achieved by a circuit. The circuit has a circuit arrangement as described above. In addition, the circuit can have the above-mentioned current source and the above-mentioned supply voltage. In the case of this circuit, both are connected to corresponding connection points of the circuit arrangement, as described above and is also clear to a person skilled in the art. Therefore, the supply voltage can be directly connected to the components defined above. This also applies to the current source and the associated capacitor.

[0036] It is clear to those skilled in the art that the explanations set forth herein can be implemented using hardware circuits, software means or a combination thereof. The software means can be associated with a programmed microprocessor or general purpose computer, ASIC (Application Specific Integrated Circuit) and / or DSP (Digital Signal Processor).

[0037] For example, a current source, in particular a constant current source, and a driver circuit or a bypass switch element may be partially implemented as a computer, a logic circuit, an FPGA (field programmable gate array), a processor (e.g., including a microprocessor, a microcontroller (µC), or a vector processor) / core (may be integrated in or used by a processor) / CPU (central processing unit; of which there may be several processor cores), an FPU (floating point unit), an NPU (numerical processing unit), an ALU (arithmetic logic unit), a coprocessor (an additional microprocessor that supports a main processor (CPU)), a GPGPU (general purpose computing on a graphics processing unit), a parallel computer (for performing arithmetic operations simultaneously, in particular performing arithmetic operations on multiple main processors and / or graphics processors), or a DSP.

[0038] Even if some of the above aspects have been described with respect to a circuit arrangement, these aspects may also apply to the circuit. Likewise, the above aspects with respect to the circuit may apply in a corresponding manner to the circuit arrangement.

[0039] If a component is "connected" to another component, it may mean that it is directly connected to the other component or directly connected to the other component; however, it should be noted that there may be another component between the two. On the other hand, if a component is "directly connected" to another component, it means that there are no other components between the two.

[0040] The present invention will be described in more detail below with reference to exemplary embodiments. In the accompanying drawings:

[0041] Figure 1 A schematic diagram of a circuit having a constant current source and a circuit arrangement provided for the circuit is shown.

[0042] Figure 2 A schematic diagram showing a simulation when the circuit arrangement is used.

[0043] The drawings are merely schematic in nature and are solely for understanding the invention. Further details and aspects are mentioned in conjunction with the embodiments described above or below. Figure 1 The embodiment shown in may have one or more optional additional features corresponding to one or more aspects related to the concepts presented above with respect to the above-described embodiments.

[0044] Additionally, spatially relative terms such as "below," "beneath," "below," "above," "left," "left side," "right," "right side," etc. may be used herein to simply describe the relationship of one element or structure to one or more other elements or structures depicted in the drawings. Spatially relative terms are intended to encompass other orientations of the component in use or operation in addition to the orientation depicted in the drawings. The components may be oriented in different ways (rotated 90 degrees or at different orientations) and the spatially relative descriptors used herein may be interpreted accordingly.

[0045] The circuit arrangement 5 and the circuit 1 will now be described based on an embodiment.

[0046] The principle of the invention is to use a suitable electronic circuit system - referred to herein as circuit arrangement 5 - to reduce the amplitude of the LED current peaks occurring during dynamic bypassing of the individual LEDs in the chain (LED1, LED2, LED3, LED4, LED5) until the LED specifications are met in terms of the permissible LED current peaks.

[0047] The circuit 5 for detecting the peak current of the LED operates as follows. Pulse width modulation (PWM) voltage sources (PWM1, PWM2, PWM3, PWM4, PWM5) are connected to the resistor R6 via resistors (R1, R2, R3, R4, R5) and diodes (D1, D2, D3, D4, D5), which are also referred to as driver terminals in this document, and which drive bypass transistors (Q1, Q2, Q3, Q4, Q5), which can also be designed at least partially as bypass switching elements in this document, (these can be microcontroller pins, in particular timer outputs).

[0048] The superposition of the currents through the resistors (R1, R2, R3, R4, R5) caused by the timing of the PWM signals (PWM1, PWM2, PWM3, PWM4, PWM5) generates a voltage swing on the resistor R6. Therefore, the voltage at the anode of (D1, D2, D3, D4, D5) provides information about each rising or falling edge of the PWM signals (PWM1, PWM2, PWM3, PWM4, PWM5). This voltage can then be evaluated via differentiators Cd, Rd and comparator / op-amp O3, so that each time the LED bypass transistors (Q1, Q2, Q3, Q4, Q5) are driven (PWMx is set to "high") and thus the LED chain voltage is forced to be shortened, a positive voltage pulse is generated at the output of the comparator O3. This pulse is specified by the gate driver Dc, is amplified and drives the FET Qc.

[0049] The role of FET Qc is to quickly discharge capacitor Cb connected in parallel with the LED chain (LED1, LED2, LED3, LED4, LED5) via capacitor Cc and resistor Rc and thus protect the LEDs from overcurrent in case the LED chain is inevitably shortened.

[0050] The output capacitor Cb of the constant current converter or constant current source 2 is discharged by the FET Qc and the RC element composed of the capacitor Cc and the resistor Rc.

[0051] By fine-tuning the time constant of the RC element, the discharge depth and speed can be adapted to the specific LED current requirements. On the other hand, the duration of the discharge pulse can be set by appropriate selection of the differentiator components Cd, Rd and the comparator reference c_ref, in such a way that the LED overcurrent is reduced to the desired extent.

[0052] The main advantage of the LED current peak detector circuit 4 is that it does not require any information about the timing (pulse width, frequency or phase offset) of the individual PWM signals (PWM1, PWM2, PWM3, PWM4, PWM5) to derive information when the LED chain "shortening" occurs and generate the current peak value based on this. Therefore, the proposed LED current peak detector circuit 4 is independent of the application software that controls the individual PWM (PWM1, PWM2, PWM3, PWM4, PWM5).

[0053] The pulse duration, period and phase offset of the PWM signals ( PWM1 , PWM2 , PWM3 , PWM4 , PWM5 ) can be deliberately selected in such a way that the control pulses frequently “overlap” and thus frequently lead to a shortening of the LED chain and an LED overcurrent in the LED bypass circuit 3 .

[0054] At each falling edge of the LED chain voltage V(OUT) a control pulse for discharging the FET Qc (ie at the gate of the FET Qc) is generated by the gate driver Dc.

[0055] The length of the control pulse is proportional to the negative voltage swing of the chain voltage V(out) and is derived from the anode voltage of the diodes (D1, D2, D3, D4, D5) and converted by differentiators Cd, Rd to a voltage fed to comparator O3. Using a suitable reference voltage c_ref, comparator O3 generates a control pulse for the downstream FET Qc.

[0056] In this example, the LED chain (LED1, LED2, LED3, LED4, LED5) is driven by a constant current source 2, which is also referred to as a "hysteretic buck converter". However, this can also be, for example, a boost or SEPIC converter or an active current source, for example formed by an operational amplifier and a transistor. The number of LEDs per "segment", that is to say the number of LEDs between the drain and the source of one of the FETs (Q1, Q2, Q3, Q4, Q5) can also be greater than one. This leads to larger voltage swings and LED overcurrents. A capacitor Cb, which is responsible for the LED ripple current limitation and the EMC performance, is connected in parallel with the current source. The capacitor Cb can be considered as part of the constant current source 2 or can be part of it. As in Figure 1 It can be seen that, in addition, the following elements can form part of the constant current source 2. An input voltage Vin for generating an input current (input), an input capacitor C3, a first switch S1, a second switch S2, a first comparator O1, a second comparator O2, which are respectively connected to a high voltage Vhi and a low voltage Vlo and fed by a supply voltage Vc, a trigger RS, a resistor Rsns and a coil Lb.

[0057] The LEDs (LED1, LED2, LED3, LED4, LED5) are bypassed via parallel switches (Q1, Q2, Q3, Q4, Q5) to enable dimming PWM (PWM1, PWM2, PWM3, PWM4, PWM5) to be implemented in the LED matrix control system.

[0058] Figure 2 Shows the use of Figure 1 Schematic diagram of a simulation of the circuit arrangement 5 mentioned in FIG.

[0059] The simulation shows that by using the proposed circuit arrangement 5, the LED current specification is maintained without overcurrent peaks. With each falling edge of the LED chain voltage V(out) (corresponding to a shortening of the LED chain), a short discharge pulse is generated which discharges the output capacitor of the constant current converter and thus prevents overcurrent peaks. The energy stored in the output capacitor Cb is thereby converted into heat in the FET Qc.

[0060] Exemplary values ​​for the various components may be as follows: Lb is 22 μH, Cb is 1 μF, I_LED is 1 A, R1, R2, R3, R4, R5 are 5 kΩ, R6 is 5 kΩ, D1, D2, D3, D4, D5 are 1N914, Cd is 330 pF, Rd is 10 kΩ, c_ref is 75 mV, Cc is 10 μF, Rc is 10 Ω, Qc is N-FET, 90 mΩ, 6nC, LED1 is 3, LED2 is 2, LED3 is 2, LED4 is 4, and LED5 is 1.

[0061] The power consumption may be in the range of 1 W, for example, approximately 1.1 W.

[0062] The efficiency of the circuit arrangement 5 is significantly increased by the connection between the resistor Rc, the capacitor Cc and the capacitor Cb.

[0063] It should be noted that the constant current source 2 driving the LEDs (LED1, LED2, LED3, LED4, LED5) - for example, a DC-DC converter or another active current source - is designed to operate with a short circuit at the output, because the proposed circuit arrangement 5 short-circuits the output via the Rdson of the FET Qc in order to convert the energy stored in the output capacitor Cb into heat as quickly as possible.

[0064] The hysteretic buck converter shown here meets this requirement. The frequency of the coil current I(Lb) varies according to the amplitude of the LED chain voltage V(out) and becomes lower in the event of a short circuit at the output. However, since the frequency of the coil current varies, the LED current I(LED1, LED2, LED3, LED4, LED5) is still calibrated to a certain value, for example, 1 A, even with different residual ripples.

[0065] The circuit arrangement 5 offers the following advantages.

[0066] The proposed circuit arrangement 5 eliminates LED current peaks quickly and effectively. Thus, LED current peak limiting can be provided.

[0067] The proposed circuit 5 is cost effective. The comparator operates close to ground potential and is therefore inexpensive. Furthermore, the clamp FET Qc can have a high on-resistance RDSon. This can save power and therefore cost.

[0068] The proposed circuit arrangement 5 can be designed and optimized according to the specific situation (number of LEDs, allowed amplitude of LED current) to improve efficiency or to play a more restrictive role by appropriately selecting components. This increases the flexibility of the circuit.

[0069] The proposed circuit arrangement 5 does not require any information about the timing (pulse width, frequency or phase shift) of the individual PWM signals in order to obtain information about when a “shortfall” of the LED chain and thus a current peak occurs. The circuit arrangement can therefore be correspondingly autonomous.

[0070] The proposed circuit arrangement 5 can therefore be completely independent of the application software controlling the respective PWM.

[0071] List of Reference Numerals

[0072] Circuit 1

[0073] Constant current source 2

[0074] LED bypass circuit 3

[0075] LED current peak detector circuit 4

[0076] Circuit device 5

[0077] LED current peak detector circuit 6

[0078] LED chain LED1...LED5

[0079] FET Q1…Q5, S1, Qc

[0080] Driver voltage PWM1...PWM5

[0081] Resistors R1…R6, Rc, Rd, Rsns

[0082] Diodes D1...D5

[0083] Supply voltage Vc

[0084] Trigger RS

[0085] Input voltage Vin

[0086] Capacitors C1...C3, Cb, Cd, Cc

[0087] Gate driver Dc

[0088] Operational amplifier / comparator O1...O3

[0089] Coil Lb

[0090] Voltage source Vhi, Vlo

[0091] Reference voltage Cref

[0092] Public Node Z

Claims

1. A circuit device (5), comprising: An LED chain (LED1, LED2, LED3, LED4, LED5), the LED chain comprising a plurality of LEDs; Bypass switching elements (Q1, Q2, Q3, Q4, Q5), where Each LED in the LED chain is assigned to one of the bypass switch elements (Q1, Q2, Q3, Q4, Q5), and the bypass switch elements (Q1, Q2, Q3, Q4, Q5) each have a driver terminal (PWM1, PWM2, PWM3, PWM4, PWM5), wherein each of the bypass switch elements (Q1, Q2, Q3, Q4, Q5) is designed to bypass the LED in the LED chain (LED1, LED2, LED3, LED4, LED5) associated with the bypass switch element based on a voltage at the driver terminal (PWM1, PWM2, PWM3, PWM4, PWM5) associated with the bypass switch element; and A switch (Qc) wherein driver terminals (PWM1, PWM2, PWM3, PWM4, PWM5) of the bypass switching elements (Q1, Q2, Q3, Q4, Q5) are connected to the switch (Qc) via a common node (Z), wherein the switch (Qc) is designed to discharge a capacitor (Cb) of a current source (2) that can be connected to the LED chain (LED1, LED2, LED3, LED4, LED5) based on a voltage applied to the node (Z).

2. The circuit arrangement (5) as claimed in claim 1, wherein: Resistors (R1, R2, R3, R4, R5) and diodes (D1, D2, D3, D4, D5) are connected in series between each driver terminal (PWM1, PWM2, PWM3, PWM4, PWM5) of the bypass switching elements (Q1, Q2, Q3, Q4, Q5) and the node (Z).

3. The circuit arrangement (5) as claimed in claim 2, wherein: The anodes of the diodes (D1, D2, D3, D4, D5) are connected to the node (Z).

4. The circuit arrangement (5) as claimed in any one of the preceding claims, wherein: The switch is a field effect transistor FET (Qc), and the driver terminals (PWM1, PWM2, PWM3, PWM4, PWM5) of the bypass switch elements (Q1, Q2, Q3, Q4, Q5) are connected to the gate terminal of the FET (Qc) via the common node (Z).

5. The circuit arrangement (5) as claimed in claim 4, wherein: The drain terminal of the FET (Qc) is connected to a parallel circuit consisting of a capacitor (Cc) and a resistor (Rc), wherein the FET (Qc) is designed to discharge the capacitor (Cb) of the current source (2) which may be connected to the LED chain (LED1, LED2, LED3, LED4, LED5) via the parallel circuit based on the voltage applied to the node (Z).

6. The circuit arrangement (5) as claimed in claim 4 or 5, wherein: The source terminal of the FET (Qc) is connected to ground potential.

7. The circuit arrangement (5) as claimed in any one of the preceding claims, wherein: A differentiator is connected between the switch and the node (Z).

8. The circuit arrangement (5) as claimed in claim 7, wherein: A gate driver (Dc) is arranged between the differentiator and the switch and is designed to amplify the output signal of the differentiator and to transfer the amplified output signal to the switch in order to actuate the switch.

9. The circuit arrangement (5) as claimed in claim 7 or 8, wherein: The differentiator has an operational amplifier / comparator (O3) which can be connected to a supply voltage (Vc), wherein the operational amplifier / comparator (O3) has two input terminals, wherein one input terminal is designed to be supplied with a reference voltage (c_ref) and the other input terminal is connected to a high-pass filter.

10. The circuit arrangement (5) as claimed in claim 9, wherein: The circuit device (5) also has: A resistor (R6), wherein a first terminal of the resistor (R6) is connected to the node (Z), and wherein a second terminal of the resistor (R6) is connectable to the supply voltage (Vc).

11. The circuit arrangement (5) as claimed in claim 9 or 10, wherein: The high-pass filter has a capacitor (Cd) and a resistor (Rd), wherein the capacitor (Cc) is connected between the node (Z) and the other input terminal of the operational amplifier / comparator (O3), and wherein the resistor (Rd) is connected between the other input terminal of the operational amplifier / comparator (O3) and the ground potential.

12. The circuit arrangement (5) as claimed in any one of claims 9 to 11, wherein: The operating voltage terminal of the operational amplifier / comparator (O3) is designed to be connected to the supply voltage (Vc) or the ground potential, respectively.

13. The circuit arrangement (5) as claimed in any one of the preceding claims, wherein: The voltage at the individual driver terminals (PWM1, PWM2, PWM3, PWM4, PWM5) refers to this ground potential.

14. The circuit arrangement (5) as claimed in any one of the preceding claims, wherein: The voltages at these driver terminals (PWM1, PWM2, PWM3, PWM4, PWM5) are equal.

15. A circuit (1) comprising a current source (2) and a circuit arrangement (5) as claimed in any one of the preceding claims.

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