Silicon nanowire gyroscope and its processing technology

Abstract

The present invention relates to a silicon nanowire gyroscope and its processing technology. The silicon nanowire gyroscope includes an SOI silicon wafer, which includes a top silicon layer, a middle buried oxide layer, and a bottom silicon body layer. A silicon nitride film is provided on the surface of the top silicon layer. The top silicon layer forms a suspended mass block and three silicon nanowires connected thereto, with the silicon nanowires distributed along the circumference of the mass block. A silicon nitride film is attached to the surfaces of the mass block and the silicon nanowires. Positive and negative electrodes conductively connected to the silicon body are provided on the top silicon layer. The SOI silicon wafer also has an isolation trench etched from the silicon nitride film to the buried oxide layer to achieve physical isolation between the positive and negative electrodes. The silicon nanowire gyroscope of the present invention has a conical mass block supported by three silicon nanowires and a silicon nitride film as the structure of the gyroscope. Single crystal silicon nanowires are used as sensitive units instead of traditional piezoresistors. Since the piezoresistance coefficient of silicon nanowires is higher than that of piezoresistors, the gyroscope has higher sensitivity.

Description

Technical Field

[0001] The present invention belongs to the technical field of gyroscopes, and in particular relates to a silicon nanowire gyroscope and a processing technology thereof. Background Art

[0002] Currently, the most commonly used detection methods for gyroscopes are capacitive and piezoresistive. The piezoresistive method is based on the piezoresistive effect of highly doped silicon. However, due to the small resistance strain coefficient of silicon varistors, as sensor sizes decrease, varistors using traditional doping processes can no longer meet the requirements of modern high-sensitivity testing. Summary of the Invention

[0003] Based on the above-mentioned deficiencies in the prior art, the purpose of the present invention is to provide a silicon nanowire gyroscope and its processing technology, which uses silicon nanowires instead of traditional piezoresistors as the detection method of the gyroscope, and has higher sensitivity.

[0004] In order to achieve the above object of the invention, the present invention adopts the following technical solutions:

[0005] A silicon nanowire gyroscope includes an SOI silicon wafer, the SOI silicon wafer including a top silicon layer, a middle buried oxide layer, and a bottom silicon layer. A silicon nitride film is provided on the surface of the top silicon. The top silicon wafer includes a suspended proof mass and three silicon nanowires connected thereto. The silicon nanowires are distributed along the circumference of the proof mass. The surfaces of the proof mass and the silicon nanowires are both adhered with a silicon nitride film.

[0006] Positive and negative electrodes conductively connected to the bulk silicon are provided on the top silicon layer;

[0007] The SOI silicon wafer also has an isolation channel etched from the silicon nitride film to the buried oxide layer to achieve physical isolation between the positive and negative electrodes.

[0008] As a preferred solution, the electrode is a gold electrode.

[0009] The present invention also provides a process for processing a silicon nanowire gyroscope as described in any of the above solutions, comprising the following steps:

[0010] S1. Prepare a silicon nitride film on the top silicon surface of the SOI silicon wafer to form a dense dielectric mask layer;

[0011] S2. Transferring a small triangular pattern by a photolithography process, and simultaneously etching the silicon nitride at the small triangular pattern by an RIE process to form a small triangular window; dry-etching the top silicon at the small triangular window to the buried oxide layer to form a vertical small triangular groove, and oxidizing the vertical small triangular groove based on a self-limiting thermal oxidation process;

[0012] S3. Transfer the large triangle pattern by photolithography, and simultaneously etch the silicon nitride at the large triangle pattern by RIE to form a large triangle window; dry-etch the top silicon at the large triangle window to the buried oxide layer to form three vertical large triangle grooves of the same depth;

[0013] S4. Anisotropic wet etching is performed on the vertical large triangular grooves to form hexagonal etching grooves, and a single crystal silicon thin-wall structure is formed between two adjacent hexagonal etching grooves, and a relative pyramidal structure appears between the three hexagonal etching grooves;

[0014] S5. After the silicon wafer is oxidized based on a self-limiting thermal oxidation process, a single-crystal silicon nanowire is formed at the top center of the single-crystal silicon nanowall;

[0015] S6. Etching silicon nitride at two target locations on the silicon wafer to form square windows, implanting boron ions into the square windows and then annealing them, and then fabricating positive and negative electrodes in the corresponding areas.

[0016] S7. Making isolation trenches at appropriate locations on the silicon wafer to achieve physical isolation between the positive and negative electrodes;

[0017] S8. Use a BOE etching process to remove the oxidized single crystal silicon thin wall to release the single crystal silicon nanowires and mass blocks.

[0018] As a preferred solution, in step S1, the silicon nitride film is produced by using a low-stress CVD film growth technology, and the thickness of the silicon nitride film is 50 nm to 5 μm.

[0019] As a preferred solution, in step S2, the small triangle pattern is replaced by a circle or a square.

[0020] As a preferred solution, in step S4, the wet etching solution is a 10-100° C., 10-80 wt % KOH solution, and the wet etching time is 5 minutes to 10 hours.

[0021] As a preferred solution, in step S4, the preset width of the formed single crystal silicon thin-wall structure is less than 1 μm.

[0022] As a preferred solution, in step S5, the width of the formed single crystal silicon nanowires is 10 to 800 nm.

[0023] As a preferred solution, in step S6, the boron ion implantation process is as follows: the ion implantation energy is 5 to 100 KeV, and the ion implantation dose is 0.1E15 cm -2 ~10E15cm -2 The annealing temperature is 200-4000°C, and the annealing time is 5 minutes to 10 hours.

[0024] As a preferred solution, the SOI silicon wafer is of (111) type.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] The silicon nanowire gyroscope of the present invention has a conical mass block supported by three silicon nanowires and a silicon nitride film, which realizes innovation in device structure. Single-crystal silicon nanowires are used instead of traditional piezoresistors as sensitive units. Since the piezoresistance coefficient of silicon nanowires is higher than that of piezoresistors, the silicon nanowire gyroscope has higher sensitivity. Most of the current silicon nanowire structure devices lack protection measures for the silicon nanowires, and the silicon nanowires are prone to breakage, resulting in a lack of long-term stability. The present invention cleverly retains the silicon nitride film, so that it can protect the silicon nanowires and prevent the silicon nanowires from breaking due to various reasons, thereby greatly improving the device yield.

[0027] The present invention uses SOI silicon wafers. Since the entire silicon nanowire device is located on the oxide layer (i.e., buried oxide layer), the device and the bulk silicon of the silicon wafer substrate are in an insulating state. By etching the silicon wafer to the oxide layer to make the isolation channel of the device, the positive and negative poles of the device can be physically isolated, achieving a good insulation effect.

[0028] The special design of the silicon nanowire and mass block structure of the silicon nanowire gyroscope of the present invention enables the gyroscope to operate normally even when the angular acceleration value is large, thereby realizing the preparation of a gyroscope with an ultra-large range.

[0029] The invention has simple process, all process flows belong to traditional micro-machining process, the cost is low, and large-scale production of gyroscopes can be realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 Schematic diagram of fabricating a silicon nitride film on top silicon in accordance with embodiment 1 of the present invention;

[0031] Figure 2 Schematic diagram of making triangular etching grooves on a silicon wafer in Example 1 of the present invention;

[0032] Figure 3 Schematic diagram of a tilted hexagonal etching groove obtained by wet etching a triangular groove in Example 1 of the present invention;

[0033] Figure 4 Schematic diagram of thermal oxidation of silicon nanowalls to form silicon nanowires according to Example 1 of the present invention;

[0034] Figure 5 Schematic diagram of manufacturing gold electrodes and isolation channels according to Example 1 of the present invention;

[0035] Figure 6It is a side view of the silicon nanowire-supported proof mass after the entire structure is released according to Example 1 of the present invention.

[0036] Figure 7 1 is a schematic structural diagram of a silicon nanowire gyroscope according to Example 1 of the present invention;

[0037] Figure 8 This is a photograph of a triangular groove after wet etching according to Example 1 of the present invention;

[0038] Figure 9 This is a photograph of a triangular groove formed after wet etching according to Example 2 of the present invention. DETAILED DESCRIPTION

[0039] To more clearly illustrate the embodiments of the present invention, specific embodiments of the present invention will be described below with reference to the accompanying drawings. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings and other embodiments can be obtained based on these drawings without inventive efforts.

[0040] Example 1:

[0041] The silicon nanowire gyroscope of this embodiment primarily comprises silicon nanowires 8, a silicon nitride film 1, a proof mass 9, gold electrodes 12, and an SOI silicon wafer. Specifically, the SOI silicon wafer comprises a top silicon layer 2, a buried oxide layer 3, and a bottom silicon layer 4. The top silicon layer is coated with a silicon nitride film 1. The top silicon layer 2 houses a suspended proof mass 9 and three connected silicon nanowires 8, which are distributed along the periphery of the proof mass 9. The silicon nitride film 1 is adhered to the surfaces of both the proof mass 9 and the silicon nanowires 8.

[0042] In this embodiment, the top silicon layer 2 is provided with positive and negative electrodes, namely gold electrodes 12, which are conductively connected to the bulk silicon 4. In addition, the SOI silicon wafer also has an isolation trench 11 etched from the silicon nitride film to the buried oxide layer to achieve physical isolation between the positive and negative electrodes.

[0043] When the gyroscope is subjected to external angular acceleration, the mass block 9 rotates in the direction of the angular acceleration, causing the silicon nanowire 8 supporting the mass block to deform. The deformation causes the conductivity of the silicon nanowire to change, and then outputs a changed signal, which is output through the gold electrode 12.

[0044] The following will be combined with the Figure 1-6 , a detailed description is given of the processing technology of the silicon nanowire gyroscope of this embodiment, which specifically includes the following steps:

[0045] 1. First, a (111) type SOI silicon wafer with a top silicon thickness of 50nm-5μm is selected, and a layer of silicon nitride film 1 with a thickness of 50nm-5μm is prepared on the top silicon surface using low stress CVD film growth technology to form a dense dielectric mask layer. The triangular pattern is transferred by photolithography, and the RIE process is performed at the same time to etch the silicon nitride film at the pattern to form a triangular window 14. The side length of the triangular window 14 is 1-50μm. The silicon at the triangular window 14 is dry-etched to prepare a vertical triangular groove that is etched to the buried oxide layer; then the photoresist is removed, and the vertical triangular groove is oxidized based on a self-limiting thermal oxidation process, such as Figure 1 and Figure 2 shown.

[0046] 2. Three triangular windows 5 are formed in the silicon nitride film layer 1 by photolithography, and the three windows are dry-etched until the silicon oxide layer 3 of the silicon wafer is etched to form vertical triangular grooves with uniform depth, and then the photoresist is removed; Figure 2 shown.

[0047] 3. Perform anisotropic wet etching on the silicon wafer in a 10-80 wt% KOH solution at 10-100°C for 5 minutes to 10 hours. The three triangular grooves in step 2 will be etched into hexagonal grooves with each sidewall belonging to the {111} crystal plane family, as shown in FIG. Figure 3 and 8 As shown. A single-crystal silicon thin-wall structure 7 with a preset width of less than 1 μm is formed between two adjacent hexagonal etching grooves. A relative cone structure appears between the three hexagonal etching grooves. The cone structure located above is the mass block 9 of the accelerometer (wherein, the suspension of the mass block requires two processes: one is the interruption of the small triangle, and the other is the subsequent BOE removal of the oxidized single-crystal silicon thin-wall structure to completely interrupt it, thereby achieving the suspension of the mass block). Figure 3 and Figure 6 shown.

[0048] 4. After the silicon wafer is oxidized by the self-limiting thermal oxidation process, a single-crystal silicon nanowire 8 is formed at the top center of the single-crystal silicon nanowall 7; Figure 4 shown.

[0049] 5. Etch silicon nitride to form square windows in the upper left and lower right corners of the chip. Implant boron ions into the square windows and then anneal them. The ion implantation energy is 5-100 KeV and the ion implantation metering is 0.1E15 cm -2 -10E15cm -2The annealing temperature is 200-4000℃ and the annealing time is 5 minutes to 10 hours. Then, a gold electrode 12 is made in the area. Then, the silicon wafer is etched to the oxide layer at the appropriate position of the silicon wafer to make the isolation channel 11 of the device to achieve physical isolation between the positive and negative electrodes of the device; Figure 5 shown.

[0050] 6. Use a buffer oxide etching solution (BOE) etching process to remove the oxidized single-crystal silicon nanowire walls from step 4, releasing the entire structure. The resulting structure is a gyroscope structure consisting of three silicon nanowires and a silicon nitride film supporting a conical mass block.

[0051] Example 2:

[0052] The silicon nanowire gyroscope of this embodiment is different from that of embodiment 1 in that:

[0053] like Figure 9 As shown, the arrangement positions of the three triangular windows are different, and the structures related to the three triangular windows are adjusted accordingly; for other structures, please refer to Example 1;

[0054] The processing technology of the silicon nanowire gyroscope is adaptively adjusted according to the different arrangement positions of the three triangular windows. The specific steps can be referred to Example 1.

[0055] The above description is only a detailed description of the preferred embodiments and principles of the present invention. For ordinary technicians in this field, based on the ideas provided by the present invention, there may be changes in the specific implementation methods, and these changes should also be considered as the scope of protection of the present invention.

Claims

1. A process for processing a silicon nanowire gyroscope, characterized in that: The silicon nanowire gyroscope includes an SOI silicon wafer, which includes a top silicon layer, a middle buried oxide layer and a bottom silicon layer, and a silicon nitride film is provided on the surface of the top silicon layer; wherein the top silicon layer forms a suspended mass block and three silicon nanowires connected thereto, and the silicon nanowires are distributed along the circumference of the mass block; the surfaces of the mass block and the silicon nanowires are both attached with a silicon nitride film; wherein the SOI silicon wafer is a (111) type; when the gyroscope is subjected to an external angular acceleration, the mass block rotates in the direction of the angular acceleration, causing the silicon nanowire supporting the mass block to deform, and the deformation causes the conductivity of the silicon nanowire to change, thereby outputting a changing signal; Positive and negative electrodes conductively connected to the bulk silicon are provided on the top silicon layer; The SOI silicon wafer also has an isolation channel etched from the silicon nitride film to the buried oxide layer to achieve physical isolation between the positive and negative electrodes; The processing technology comprises the following steps: S1. Prepare a silicon nitride film on the top silicon surface of the SOI silicon wafer to form a dense dielectric mask layer; S2. Transferring a small triangular pattern by a photolithography process, and simultaneously etching the silicon nitride at the small triangular pattern by an RIE process to form a small triangular window; dry-etching the top silicon at the small triangular window to the buried oxide layer to form a vertical small triangular groove, and oxidizing the vertical small triangular groove based on a self-limiting thermal oxidation process; S3. Transfer the large triangle pattern by photolithography, and simultaneously etch the silicon nitride at the large triangle pattern by RIE to form a large triangle window; dry-etch the top silicon at the large triangle window to the buried oxide layer to form three vertical large triangle grooves of the same depth; S4. Anisotropic wet etching is performed on the vertical large triangular grooves to form hexagonal etching grooves, each sidewall of which belongs to the {111} crystal plane family. A single crystal silicon thin-wall structure with a preset width of less than 1 μm is formed between two adjacent hexagonal etching grooves, and an opposing pyramidal structure appears between the three hexagonal etching grooves. S5. After the silicon wafer is oxidized based on a self-limiting thermal oxidation process, a single-crystal silicon nanowire is formed at the top center of the single-crystal silicon nanowall; S6. Etching silicon nitride at two target locations on the silicon wafer to form square windows, implanting boron ions into the square windows and then annealing them, and then fabricating positive and negative electrodes in the corresponding areas. S7. Making isolation trenches at appropriate locations on the silicon wafer to achieve physical isolation between the positive and negative electrodes; S8. Use BOE etching process to remove the oxidized single crystal silicon thin wall to release the single crystal silicon nanowires and mass blocks.

2. The process for manufacturing a silicon nanowire gyroscope according to claim 1, wherein: In the step S1, the silicon nitride film is produced by using a low-stress CVD film growth technology, and the thickness of the silicon nitride film is 50 nm to 5 μm.

3. The process for manufacturing a silicon nanowire gyroscope according to claim 1, wherein: In step S2, the small triangle pattern is replaced by a circle or a square.

4. The process for manufacturing a silicon nanowire gyroscope according to claim 1, wherein: In step S4, the wet etching solution is a 10-80 wt% KOH solution at 10-100° C., and the wet etching time is 5 minutes to 10 hours.

5. The process for manufacturing a silicon nanowire gyroscope according to claim 1, wherein: In step S5, the width of the formed single crystal silicon nanowires is 10 to 800 nm.

6. The process for manufacturing a silicon nanowire gyroscope according to claim 1, wherein: In step S6, the boron ion implantation process is as follows: the ion implantation energy is 5 to 100 KeV, and the ion implantation dose is 0.1E15 cm -2 ~10E15cm -2 The annealing temperature is 200-4000°C, and the annealing time is 5 minutes to 10 hours.

7. The process for manufacturing a silicon nanowire gyroscope according to claim 1, wherein: The electrode is a gold electrode.

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