A constant current source circuit with self-calibration function and self-calibration method thereof

Abstract

The present invention discloses a constant current source circuit with a self-calibration function and a self-calibration method thereof. The calibration method comprises: a PWM wave generating current drive circuit is connected to a current load circuit for driving self-calibration and generates an output current load voltage; the output current load voltage is sent to a high / low limit comparison circuit, and compared with the high / low limit comparison reference voltage sent from a high / low limit comparison reference voltage circuit in the comparison circuit and outputs a digital waveform; the output digital waveform is sent to a duty cycle detection circuit of the comparison circuit to detect the waveform duty cycle, and the detected duty cycle is sent to a current driving PWM wave generation and duty cycle adjustment circuit. The present invention is suitable for self-calibration of a PWM wave generating current drive circuit, has low cost, good stability and good precision.

Description

Technical Field

[0001] The invention relates to a constant current source loop with a self-calibration function and a self-calibration method thereof, belonging to the technical field of industrial control. Background Art

[0002] In industrial production control, especially in continuous production processes, it is often necessary to control physical quantities such as temperature, pressure, and flow. These physical quantities vary continuously over time. In the control field, these physical quantities that vary continuously over time are called analog quantities.

[0003] Current signals are widely used in industrial sensors due to their strong anti-interference capabilities, resistance to external interference, and ability to be transmitted remotely. Because the distance between the site and the control room is long and the ground resistance of the connecting wires is high, using a voltage source for remote transmission would result in significant errors due to the voltage divider between the wire resistance and the input resistance of the receiving instrument. However, using a constant current source for remote transmission ensures that the current in the loop does not change with wire length as long as the transmission loop does not branch, thus ensuring transmission accuracy.

[0004] The industry generally uses a variety of methods to generate drive current signals, such as using dedicated digital-to-analog conversion chip devices that can directly generate current signals, using discrete components to build current output circuits, and using PWM waves in combination with discrete components to achieve current output.

[0005] Among them, the use of PWM waves to generate current loops through PWM waves to achieve current drive output is widely used because of its low cost and simple principle. The accuracy can usually reach 0.1 level, which can meet the needs of most industrial applications.

[0006] However, the initial accuracy of the PWM wave-generating current loop often fails to directly meet the design accuracy requirements. Therefore, the loop must be calibrated before shipment. This allows the loop to record and store internal parameter values ​​(usually the PWM wave duty cycle) that meet the accuracy requirements. This internal parameter value is then used during subsequent operation to output the current signal and meet the output design requirements. For example, if the accuracy requirement for a PWM wave-generating current loop is 0.1, but the device's output accuracy is only 0.2 after factory welding, failing the 0.1 requirement, the output must be calibrated at zero and full scale to return the output accuracy to the 0.1 requirement.

[0007] To ensure the output accuracy of the circuit, the industry usually uses the following methods:

[0008] 1. When designing circuits, high-precision components that exceed the design accuracy requirements are used. After production, modules and devices meet the design requirements with their initial accuracy, eliminating the need for additional calibration. However, these circuits are difficult to design, require high-precision and consistent components, and are expensive.

[0009] 2. If the initial accuracy of the circuit exceeds the required accuracy limit, manually fine-tune the PWM duty cycle. When the output signal accuracy enters the required accuracy range, record the PWM duty cycle at that moment. Repeat this operation for both zero and full scale. Subsequently, when the circuit is operating, use the recorded zero and full scale duty cycles as the reference values ​​for the zero and full scale duty cycles to obtain a circuit that meets the accuracy requirements. This type of operation requires manual calibration of the circuit at the factory to meet the design accuracy requirements. Furthermore, after years of field use, the current output accuracy may exceed the limit again due to aging and accuracy changes of some components within the circuit. To restore the output to meet the accuracy requirements, the circuit is usually returned to the factory for a second inspection, which is relatively unfeasible. Summary of the Invention

[0010] The purpose of the present invention is to overcome the deficiencies in the prior art, provide a constant current source circuit with a self-calibration function and a self-calibration method thereof, and solve technical problems.

[0011] To achieve the above object, the present invention is implemented by adopting the following technical solutions:

[0012] In a first aspect, the present invention provides a constant current source circuit with a self-calibration function, comprising:

[0013] A PWM wave generating current driving circuit is connected to a current driving PWM wave generating and duty cycle adjusting circuit, and is used to generate a driving current and send it to a current load circuit for self-calibration;

[0014] A current load circuit for self-calibration is connected to the PWM wave generating current drive circuit, and is used to receive the drive current, generate the output current load voltage and send it to the high / low limit comparison circuit;

[0015] The high / low limit comparison circuit is connected to the current load circuit for self-calibration, and is used to receive the output current load voltage and compare it with the high / low limit comparison reference voltage sent by the high / low limit comparison reference voltage circuit, and output a digital waveform to the comparison circuit output digital waveform duty cycle detection circuit;

[0016] A high / low limit comparison reference voltage circuit is connected to the high / low limit comparison circuit, and is used to generate a high / low limit comparison reference voltage and send it to the high / low limit comparison circuit;

[0017] The comparison circuit outputs a digital waveform duty cycle detection circuit, which is connected to the high / low limit comparison circuit, and is used to receive the digital waveform, detect the digital waveform duty cycle, and send the detected digital waveform duty cycle to the current drive PWM wave generation and duty cycle adjustment circuit;

[0018] The current-driven PWM wave generation and duty cycle adjustment loop is connected to the comparison loop output digital waveform duty cycle detection loop, and is used to detect the digital waveform duty cycle and compare it with a preset digital waveform duty cycle reference value. The duty cycle of the PWM wave output by the current-driven PWM wave generation and duty cycle adjustment loop is adjusted according to the comparison difference, thereby changing the driving current size, and then changing the duty cycle of the digital waveform output by the comparison loop until the digital waveform duty cycle reaches the digital waveform duty cycle reference value range.

[0019] In a second aspect, the present invention provides a self-calibration method for a constant current source circuit with a self-calibration function, comprising:

[0020] The PWM wave generating current driving circuit generates a driving current and sends the driving current to the current load circuit for self-calibration;

[0021] The current load loop for self-calibration receives the driving current, generates an output current load voltage and sends it to the high / low limit comparison loop;

[0022] The high / low limit comparison circuit receives the output current load voltage and compares it with the high / low limit comparison reference voltage sent by the high / low limit comparison reference voltage circuit, and outputs a digital waveform to the comparison circuit output digital waveform duty cycle detection circuit;

[0023] The comparison circuit outputs a digital waveform; the duty cycle detection circuit receives the digital waveform, detects the duty cycle of the digital waveform, and sends the detected duty cycle of the digital waveform to the current drive PWM wave generation and duty cycle adjustment circuit;

[0024] The current-driven PWM wave generation and duty cycle adjustment loop receives the digital waveform duty cycle and compares it with a preset digital waveform duty cycle reference value. According to the comparison result, the PWM wave duty cycle output by the current-driven PWM wave generation and duty cycle adjustment loop is adjusted, thereby changing the driving current size, and then changing the digital waveform duty cycle output by the comparison loop until the digital waveform duty cycle reaches the digital waveform duty cycle reference value range.

[0025] Furthermore, the driving current generated by the PWM wave generating current driving circuit is a direct current, which exhibits a sawtooth wave / sine wave characteristic with the same frequency as the PWM wave near the effective value of the output current;

[0026] The output current load voltage is a DC voltage, which exhibits a sawtooth wave / sine wave characteristic with the same frequency as the PWM wave near the effective value of the voltage.

[0027] Furthermore, the high / low limit comparison circuit receives the output current load voltage and compares it with the high / low limit comparison reference voltage sent by the high / low limit comparison reference voltage circuit, and outputs a digital waveform, including:

[0028] When the output current load voltage is less than the high / low limit comparison reference voltage, the high / low limit comparison circuit outputs a logic low voltage;

[0029] When the output current load voltage is greater than the high / low limit comparison reference voltage, the high / low limit comparison circuit outputs a logic high voltage;

[0030] When the sawtooth / sine wave peak or trough of the output current load voltage is far away from the high / low limit comparison reference voltage, the high / low limit comparison circuit output is in the form of a single level;

[0031] When the peak or trough of the sawtooth / sine wave of the output current load voltage crosses the high / low limit comparison reference voltage in a certain direction, the high / low limit comparison circuit output flips. At this time, within one cycle of the sawtooth / sine wave, the high / low limit comparison circuit output undergoes two level flips, and the high / low limit comparison circuit outputs a digital waveform. The digital waveform output by the high / low limit comparison circuit will have different duty cycles depending on the amplitude and duration of the sawtooth / sine wave peak or trough of the output current load voltage crossing the comparison reference voltage.

[0032] Furthermore, the high / low limit comparison reference voltage sent by the high / low limit comparison reference voltage circuit includes:

[0033] The lower limit comparison reference voltage value is the product of the theoretical lower limit value of the drive output current and the current load for self-calibration;

[0034] The high limit comparison reference voltage value is the product of the theoretical value of the high limit of the drive output current and the current load for self-calibration.

[0035] Furthermore, the comparison circuit outputs a digital waveform, and the duty cycle detection circuit receives the digital waveform. When detecting the duty cycle of the digital waveform, the digital waveform is de-jittered and filtered, and multi-cycle detection is performed to obtain more accurate duty cycle data.

[0036] Furthermore, the current-driven PWM wave generation and duty cycle adjustment loop receives the digital waveform duty cycle and compares it with a preset digital waveform duty cycle reference value, and adjusts the PWM wave duty cycle output by the current-driven PWM wave generation and duty cycle adjustment loop according to the comparison result, thereby changing the driving current, and further changing the digital waveform duty cycle output by the comparison loop until the digital waveform duty cycle reaches the digital waveform duty cycle reference value range, including:

[0037] The current-driven PWM wave generation and duty cycle adjustment loop compares the actual value of the duty cycle of the digital waveform output by the comparison loop with the reference value of the duty cycle of the digital waveform output by the comparison loop corresponding to the high / low limit drive current, calculates the difference, and if the difference is greater than the preset threshold, adjusts and changes the duty cycle of the current-driven PWM wave in a step-by-step manner to change the effective value of the drive current output, thereby changing the difference between the two input terminals of the comparator, thereby changing the duty cycle of the comparison output digital waveform, until the duty cycle of the digital waveform output by the comparison loop reaches the reference value range of the duty cycle of the digital waveform output by the comparison loop.

[0038] Furthermore, the current-driven PWM wave generation and duty cycle adjustment loop adjusts the duty cycle of the current-driven PWM wave in a stepping manner, and the size of the step value is positively correlated with the size of the deviation of the actual value of the duty cycle of the digital waveform output by the comparison loop from the reference value of the duty cycle of the digital waveform output by the comparison loop.

[0039] Furthermore, after the duty cycle of the digital waveform output by the comparison loop reaches the reference value range of the duty cycle of the digital waveform output by the comparison loop, the current-driven PWM wave duty cycle at this time is stored, and the saved current-driven PWM wave duty cycle value can be used as the high / low limit current output duty cycle value in subsequent work.

[0040] Furthermore, each design case needs to use multiple data samples according to its actual circuit to obtain a reference value for the duty cycle of the comparison circuit output digital waveform that meets the final design accuracy requirements, and use this reference value to calibrate other cases of the same design.

[0041] Compared with the prior art, the present invention has the following beneficial effects:

[0042] The present invention provides a constant current source circuit with a self-calibration function and a self-calibration method thereof. The circuit can realize a factory self-calibration function without the need for manual fine adjustment of the PWM wave duty cycle, so that the circuit meets the design accuracy requirements when it leaves the factory. At the same time, if the circuit needs to be calibrated again when used on a construction site, the calibration can be automatically completed by installing a simple drive current external self-calibration load circuit, without the need for complex manual step calibration operations, and the circuit output accuracy can be maintained persistently. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 The overall and local enlarged schematic diagram of the driving current generated by the PWM wave;

[0044] Figure 2 This is a schematic diagram of a PWM wave generation drive current loop calibration method commonly used in the prior art;

[0045] Figure 3 The self-calibration design scheme and implementation diagram of the PWM wave generation circuit of the present invention;

[0046] Figure 4 A schematic diagram of a constant current source circuit with a self-calibration function and a calibration method thereof provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0047] The present invention will be further described below in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and are not intended to limit the scope of protection of the present invention.

[0048] Example 1

[0049] like Figure 4 As shown, this embodiment introduces a constant current source circuit with a self-calibration function, including:

[0050] A PWM wave generating current driving circuit is connected to a current driving PWM wave generating and duty cycle adjusting circuit, and is used to generate a driving current and send it to a current load circuit for self-calibration;

[0051] A current load circuit for self-calibration is connected to the PWM wave generating current drive circuit, and is used to receive the drive current, generate the output current load voltage and send it to the high / low limit comparison circuit;

[0052] The high / low limit comparison circuit is connected to the current load circuit for self-calibration, and is used to receive the output current load voltage and compare it with the high / low limit comparison reference voltage sent by the high / low limit comparison reference voltage circuit, and output a digital waveform to the comparison circuit output digital waveform duty cycle detection circuit;

[0053] A high / low limit comparison reference voltage circuit is connected to the high / low limit comparison circuit, and is used to generate a high / low limit comparison reference voltage and send it to the high / low limit comparison circuit;

[0054] The comparison circuit outputs a digital waveform duty cycle detection circuit, which is connected to the high / low limit comparison circuit, and is used to receive the digital waveform, detect the digital waveform duty cycle, and send the detected digital waveform duty cycle to the current drive PWM wave generation and duty cycle adjustment circuit;

[0055] The current-driven PWM wave generation and duty cycle adjustment loop is connected to the comparison loop output digital waveform duty cycle detection loop, and is used to receive the digital waveform duty cycle and compare it with a preset digital waveform duty cycle reference value. According to the comparison result, the PWM wave duty cycle output by the current-driven PWM wave generation and duty cycle adjustment loop is adjusted, thereby changing the driving current size, and then changing the digital waveform duty cycle output by the comparison loop until the digital waveform duty cycle reaches the digital waveform duty cycle reference value range.

[0056] Example 2

[0057] like Figure 4As shown, this embodiment provides a self-calibration method for a constant current source circuit with a self-calibration function according to Embodiment 1, comprising:

[0058] The PWM wave generating current driving circuit generates a driving current and sends the driving current to the current load circuit for self-calibration;

[0059] The current load loop for self-calibration receives the driving current, generates an output current load voltage and sends it to the high / low limit comparison loop;

[0060] The high / low limit comparison circuit receives the output current load voltage and compares it with the high / low limit comparison reference voltage sent by the high / low limit comparison reference voltage circuit, and outputs a digital waveform to the comparison circuit output digital waveform duty cycle detection circuit;

[0061] The comparison circuit outputs a digital waveform; the duty cycle detection circuit receives the digital waveform, detects the duty cycle of the digital waveform, and sends the detected duty cycle of the digital waveform to the current drive PWM wave generation and duty cycle adjustment circuit;

[0062] The current-driven PWM wave generation and duty cycle adjustment loop receives the digital waveform duty cycle and compares it with a preset digital waveform duty cycle reference value. According to the comparison result, the PWM wave duty cycle output by the current-driven PWM wave generation and duty cycle adjustment loop is adjusted, thereby changing the driving current size, and then changing the digital waveform duty cycle output by the comparison loop until the digital waveform duty cycle reaches the digital waveform duty cycle reference value range.

[0063] The self-calibration method for a constant current source circuit with a self-calibration function provided in this embodiment specifically involves the following steps:

[0064] The PWM wave generation current drive circuit is connected to the current load circuit for driving self-calibration and generates an output current load voltage; the output current load voltage is sent to the high / low limit comparison circuit, and is compared with the high / low limit comparison reference voltage sent by the high / low limit comparison reference voltage circuit in the comparison circuit and outputs a digital waveform; the comparison output digital waveform is sent to the comparison circuit output digital waveform duty cycle detection circuit to detect the waveform duty cycle, and the detected duty cycle is sent to the current drive PWM wave generation and duty cycle adjustment circuit.

[0065] Although the drive current generated by the PWM wave generating current drive circuit appears as a DC current, it exhibits a sawtooth / sine wave characteristic with the same frequency as the PWM wave near the effective value of the output current.

[0066] The drive current generated by the PWM wave generating current driving circuit is output to drive the current load circuit for self-calibration, and an output current load voltage is generated on the load circuit.

[0067] Although the output current load voltage appears as a DC voltage, it exhibits a sawtooth / sine wave characteristic with the same frequency as the PWM wave near the effective value of the voltage.

[0068] The output current load voltage is sent to the high / low limit comparison circuit, and is compared with the high / low limit comparison reference voltage sent by the high / low limit comparison reference voltage circuit in the comparison circuit;

[0069] When the output current load voltage is less than the high / low limit comparison reference voltage, the comparison circuit outputs a logic low (high) voltage;

[0070] When the output current load voltage is greater than the high / low limit comparison reference voltage, the comparison circuit outputs a logic high (low) voltage;

[0071] The high / low limit comparison reference voltage output by the high / low limit comparison reference voltage circuit is:

[0072] Low limit comparison reference voltage value: the product of the theoretical low limit value of the drive output current and the current load for self-calibration.

[0073] High limit comparison reference voltage value: the product of the theoretical value of the high limit of the drive output current and the current load for self-calibration.

[0074] When the sawtooth / sine wave crest or trough of the output current load voltage is far away from the high / low limit comparison reference voltage, the high / low limit comparison circuit output is in the form of a single level.

[0075] When the peak or trough of the sawtooth / sine wave of the output current load voltage crosses the upper / lower limit comparison reference voltage in one direction, the upper / lower limit comparison circuit output flips. At this point, the upper / lower limit comparison circuit output flips twice within one cycle of the sawtooth / sine wave. Ultimately, the upper / lower limit comparison circuit output is a digital waveform (usually in PWM form). The duty cycle of the digital waveform output by the upper / lower limit comparison circuit varies depending on the magnitude of the peak or trough of the sawtooth / sine wave of the output current load voltage crossing the comparison reference voltage.

[0076] The comparison circuit outputs a digital waveform. The duty cycle detection circuit detects and calculates the duty cycle of the digital waveform from the high / low limit comparison circuit, and sends the duty cycle value to the current drive PWM wave generation and duty cycle adjustment circuit.

[0077] The duty cycle detection circuit usually requires the assistance of processor algorithms to measure and calculate the duty cycle. For example, it can remove jitter from glitch signals and perform multi-cycle measurements on digital waveforms to obtain more accurate duty cycle data.

[0078] The current-driven PWM wave generation and duty cycle adjustment loop compares the actual duty cycle of the comparison loop's output digital waveform with the reference duty cycle values ​​for the high / low limit drive currents. If the difference between the two is too large, the current-driven PWM wave duty cycle is adjusted accordingly to change the effective value of the drive current output, thereby changing the difference between the two comparator inputs and, consequently, the duty cycle of the comparison output digital waveform, until the duty cycle of the comparison loop's output digital waveform reaches the reference duty cycle range. The current-driven PWM wave duty cycle at this point is stored as the high / low limit current-driven PWM wave duty cycle value for a particular instance (module, device, or system). This saved current-driven PWM wave duty cycle value can be used as the high / low limit current output duty cycle value for subsequent operation of that instance.

[0079] The drive current output generated by the PWM wave generation current drive circuit of different design schemes has different sawtooth wave / sine wave characteristics near its effective value, thereby generating output current load voltages with different characteristics on the self-calibration current load circuit, and outputting comparison output digital waveforms with different characteristics in the high / low limit comparison circuit. While meeting the design requirements of each circuit case, it is ultimately manifested as different comparison circuit output digital waveform duty cycle reference values.

[0080] Each design case needs to use multiple data samples according to its actual circuit to obtain a reference value for the duty cycle of the comparison circuit output digital waveform that meets its final design requirements, and use this reference value to calibrate other cases of the same design.

[0081] Different instances of the same PWM wave generation current drive circuit design may exhibit different sawtooth / sine wave characteristics. However, these characteristic variations can generally satisfy the design accuracy requirements for all instances by using a fixed comparison circuit output digital waveform duty cycle reference value. For higher-accuracy designs, however, the use of a fixed comparison circuit output digital waveform duty cycle reference value may not guarantee that all instances meet the design accuracy requirements. In such cases, this self-calibration solution is not suitable for such designs.

[0082] The current-driven PWM wave generation and duty cycle adjustment loop usually uses a stepping method to adjust the duty cycle of the current-driven PWM wave.

[0083] When the actual value of the duty cycle of the digital waveform output by the comparison loop deviates significantly from the reference value of the duty cycle of the digital waveform output by the comparison loop, the current-driven PWM wave duty cycle adjustment can adopt a relatively large step value to make the actual value of the duty cycle of the digital waveform output by the comparison loop quickly approach the reference value of the duty cycle of the digital waveform output by the comparison loop.

[0084] When the actual duty cycle value of the comparison loop output digital waveform deviates slightly from the reference duty cycle value of the comparison loop output digital waveform, the current-driven PWM wave duty cycle adjustment can use a relatively small step value to make the actual duty cycle value of the comparison loop output digital waveform closer to the reference duty cycle value of the comparison loop output digital waveform. Ultimately, a more accurate reference duty cycle value of the current-driven PWM wave is obtained.

[0085] The self-calibration process of an individual instance:

[0086] First, the control current drives the PWM wave generation and the duty cycle adjustment loop to generate a current output far away from the high / low limit drive current theoretical value. At this time, the comparison loop compares that the output digital waveform does not oscillate or the duty cycle is far away from the comparison loop comparison output digital waveform duty cycle reference value when it oscillates.

[0087] Afterwards, the duty cycle output of the current-driven PWM wave is adjusted and controlled in a step-by-step manner, so that the comparison loop compares the output digital waveform oscillation and changes its duty cycle.

[0088] Afterwards, the duty cycle output of the control current driving the PWM wave is maintained and adjusted in a step-by-step manner until the comparison loop compares the output digital waveform oscillations and the actual duty cycle value reaches the duty cycle reference value of the comparison loop compares the output digital waveform, and the current control current driving the PWM wave duty cycle is recorded and stored.

[0089] At this point, the self-calibration process is completed.

[0090] Finally, in subsequent operation of the individual instance, the stored control current drive PWM wave duty cycle can be used as the high / low limit drive current output duty cycle.

[0091] The following describes the contents designed in the above embodiment in conjunction with a preferred embodiment.

[0092] like Figure 1 As shown, the drive current generated by the PWM wave generating current drive circuit appears as a DC current, but near its RMS value, it exhibits sawtooth / sine-like characteristics at the same frequency as the PWM wave. The drive current output generated by the PWM wave generating current drive circuits of different designs exhibits different sawtooth / sine-like characteristics near its RMS value. It may be a relatively regular triangle wave, sawtooth wave, sine wave, or other waveform, depending on the circuit design, but its waveform period is the same as the PWM wave.

[0093] like Figure 2As shown, a commonly used PWM wave generation drive current loop calibration method in the prior art, an individual loop instance first sets a pre-set PWM duty cycle and outputs it (53.3% in the example). At this point, when the actual drive current output is measured, the accuracy often exceeds the limit. In this case, it is necessary to manually fine-tune the PWM duty cycle and manually determine when the actual output current value meets the design accuracy requirements. If the actual output current value is greater than the theoretical output value, in principle, the PWM wave output duty cycle should be reduced; if the actual output current value is less than the theoretical output value, in principle, the PWM wave output duty cycle should be increased. Adjustments are usually performed multiple times, so that the actual output current value gradually approaches the theoretical value, until the final current output value meets the accuracy range and is as close to the theoretical output value as possible. The PWM wave duty cycle at this time (40% in the example) is recorded and stored. Each subsequent power-up of this individual instance reads and uses this recorded PWM wave as a reference value to ensure current output accuracy.

[0094] like Figure 3 As shown, the PWM wave generation circuit generates a PWM wave and transmits it to the PWM wave generation drive current circuit. The PWM wave generation drive current circuit generates a DC current output. Assuming that the desired current output value is 100mA in the illustrated embodiment, the PWM wave generation drive current circuit causes the drive current output to have a sawtooth wave superimposed on it at a current value of 100mA, with a peak-to-peak value of 0.5mA. That is, the theoretical trough and peak values ​​of the current output are approximately 99.75mA to 100.25mA. This drive current drives a self-calibration load. In the illustrated embodiment, the resistance of the self-calibration load is 100 ohms, so the theoretical voltage generated across the self-calibration load resistance is 10V. Due to the sawtooth wave in the current output, the voltage generated across the self-calibration load resistance also exhibits a sawtooth wave form, with theoretical trough and peak values ​​approximately 9.975V and 10.025V.

[0095] The comparison reference voltage value generated by the comparison reference voltage Vref generation circuit is equal to the product of the self-calibration load resistance value and the drive current output limit value, so in this embodiment it is equal to the product of 100 ohm and 100 mA, and the theoretical value is 10V.

[0096] The voltage (9.975-10.025V) generated by the load resistance value for self-calibration is sent to the comparison circuit for comparison with the comparison reference voltage (10V).

[0097] According to the magnitude of the amplitude of the sawtooth wave / sine wave peak or trough of the output current load voltage crossing the comparison reference voltage, the digital waveform output by the high / low limit comparison circuit will have different duty cycles.

[0098] The duty cycle of the digital waveform output by the comparison circuit is measured and calculated within the comparison output digital waveform duty cycle calculation circuit. In this embodiment, the duty cycle of the digital waveform is calculated by performing high-frequency multi-point sampling over N waveform cycles and ultimately calculating the ratio of the number of high-level and low-level signals within all sampling points. The duty cycle calculation method is not limited to that used in this embodiment.

[0099] Multiple samples in this design are tested, and the duty cycle of the digital waveform output by the comparison loop that can meet the design accuracy requirements for the driving current output accuracy of all samples is recorded and found. It is assumed that the duty cycle value is 53% in this embodiment.

[0100] For this embodiment, the simulated drive current output self-calibration process is as follows:

[0101] First, the control current drive PWM wave generation and duty cycle adjustment loop generate a current output far from the theoretical drive current value (100mA). For example, when the duty cycle of the drive current PWM wave is 60%, the drive current output is approximately 95mA. The final sawtooth wave voltage generated by this 95mA current on the 100ohm self-calibration load loop is in the range of 9.475-9.525V. Because the peak and valley voltage values ​​of the sawtooth wave are both less than the comparison reference voltage of 10V, the comparison loop output does not oscillate and remains at a single level.

[0102] Afterwards, the duty cycle of the control current driving the PWM wave is adjusted and increased in a stepwise manner, for example, from 60% to 61%-62%-63%, etc. At this time, the drive current output will increase accordingly. For example, in this embodiment, the output current value will go through 96mA-97mA-98mA-99mA, etc., until the effective value of the output current increases to 99.75mA. Due to the existence of the output sawtooth wave, the final sawtooth wave voltage range generated on the self-calibration load circuit is 9.950-10.000V. Because the peak value of the sawtooth wave begins to touch the comparison reference voltage of 10V, the comparison circuit output begins to flip. However, because the time for the sawtooth wave waveform to cross 10V from less than 10V accounts for too small a proportion of the entire sawtooth wave period, the duty cycle value of the comparison output digital waveform is very small, for example: 1%.

[0103] By adjusting and increasing the control current driving the PWM wave duty cycle output in a stepwise manner, the drive current output will increase accordingly, and the final sawtooth voltage RMS value generated in the self-calibration load circuit will also further increase. This will cause the time when the sawtooth waveform crosses from less than 10V to 10V to increase within the entire sawtooth wave cycle, resulting in a larger duty cycle of the comparison output digital waveform. For example, the duty cycle of the control current driving the PWM wave will change from 1% to 5%, 9% to 15% to 22% to 30% to 40%, and so on. When the control current driving the PWM wave duty cycle increases to 65%, the duty cycle of the comparison output digital waveform changes to the desired 53% duty cycle. At this point, the drive current output accuracy meets the design requirements.

[0104] Record and store the current control current driving PWM wave duty cycle, which is 65%.

[0105] At this point, the self-calibration process is completed.

[0106] Finally, in subsequent operation of this instance, the stored control current drive PWM wave duty cycle value of 65% is used as the driving current output duty cycle reference value to obtain a 100mA current output that meets the accuracy requirements.

[0107] A constant current source circuit with self-calibration function and its self-calibration method designed according to this method have been successfully applied to the actual use of analog current output modules in distributed control systems. The self-calibration operation that can be completed without manual fine operation saves the debugging workload of the module before leaving the factory. In the subsequent engineering applications in the next few years, secondary self-calibration can be performed at any time according to needs, and has achieved good engineering use results.

[0108] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A constant current source circuit with self-calibration function, characterized in that: include: A PWM wave generating current driving circuit is connected to a current driving PWM wave generating and duty cycle adjusting circuit, and is used to generate a driving current and send it to a current load circuit for self-calibration; A current load circuit for self-calibration is connected to the PWM wave generating current drive circuit, and is used to receive the drive current, generate the output current load voltage and send it to the high / low limit comparison circuit; The high / low limit comparison circuit is connected to the current load circuit for self-calibration, and is used to receive the output current load voltage and compare it with the high / low limit comparison reference voltage sent by the high / low limit comparison reference voltage circuit, and output a digital waveform to the comparison circuit output digital waveform duty cycle detection circuit; A high / low limit comparison reference voltage circuit is connected to the high / low limit comparison circuit, and is used to generate a high / low limit comparison reference voltage and send it to the high / low limit comparison circuit; The comparison circuit outputs a digital waveform duty cycle detection circuit, which is connected to the high / low limit comparison circuit, and is used to receive the digital waveform, detect the digital waveform duty cycle, and send the detected digital waveform duty cycle to the current drive PWM wave generation and duty cycle adjustment circuit; The current-driven PWM wave generation and duty cycle adjustment loop is connected to the comparison loop output digital waveform duty cycle detection loop, and is used to detect the digital waveform duty cycle and compare it with a preset digital waveform duty cycle reference value. The duty cycle of the PWM wave output by the current-driven PWM wave generation and duty cycle adjustment loop is adjusted according to the comparison difference, thereby changing the driving current size, and then changing the duty cycle of the digital waveform output by the comparison loop until the digital waveform duty cycle reaches the digital waveform duty cycle reference value range.

2. A self-calibration method for a constant current source circuit with a self-calibration function according to claim 1, characterized in that: include: The PWM wave generating current driving circuit generates a driving current and sends the driving current to the current load circuit for self-calibration; The current load loop for self-calibration receives the driving current, generates an output current load voltage and sends it to the high / low limit comparison loop; The high / low limit comparison circuit receives the output current load voltage and compares it with the high / low limit comparison reference voltage sent by the high / low limit comparison reference voltage circuit, and outputs a digital waveform to the comparison circuit output digital waveform duty cycle detection circuit; The comparison circuit outputs a digital waveform; the duty cycle detection circuit receives the digital waveform, detects the duty cycle of the digital waveform, and sends the detected duty cycle of the digital waveform to the current drive PWM wave generation and duty cycle adjustment circuit; The current-driven PWM wave generation and duty cycle adjustment loop receives the digital waveform duty cycle and compares it with a preset digital waveform duty cycle reference value. According to the comparison result, the PWM wave duty cycle output by the current-driven PWM wave generation and duty cycle adjustment loop is adjusted, thereby changing the driving current size, and then changing the digital waveform duty cycle output by the comparison loop until the digital waveform duty cycle reaches the digital waveform duty cycle reference value range.

3. The calibration method according to claim 2, wherein: The driving current generated by the PWM wave generating current driving circuit is a direct current, which exhibits a sawtooth wave / sine wave characteristic with the same frequency as the PWM wave near the effective value of the output current; The output current load voltage is a DC voltage, which exhibits a sawtooth wave / sine wave characteristic with the same frequency as the PWM wave near the effective value of the voltage.

4. The calibration method according to claim 2, wherein: The high / low limit comparison circuit receives the output current load voltage and compares it with the high / low limit comparison reference voltage sent by the high / low limit comparison reference voltage circuit, and outputs a digital waveform, including: When the output current load voltage is less than the high / low limit comparison reference voltage, the high / low limit comparison circuit outputs a logic low voltage; When the output current load voltage is greater than the high / low limit comparison reference voltage, the high / low limit comparison circuit outputs a logic high voltage; When the sawtooth / sine wave peak or trough of the output current load voltage is far away from the high / low limit comparison reference voltage, the high / low limit comparison circuit output is in the form of a single level; When the peak or trough of the sawtooth / sine wave of the output current load voltage crosses the high / low limit comparison reference voltage in a certain direction, the high / low limit comparison circuit output flips. At this time, within one cycle of the sawtooth / sine wave, the high / low limit comparison circuit output undergoes two level flips, and the high / low limit comparison circuit outputs a digital waveform. The digital waveform output by the high / low limit comparison circuit will have different duty cycles depending on the amplitude and duration of the sawtooth / sine wave peak or trough of the output current load voltage crossing the comparison reference voltage.

5. The calibration method according to claim 2, wherein: The high / low limit comparison reference voltage sent by the high / low limit comparison reference voltage circuit includes: The lower limit comparison reference voltage value is the product of the theoretical lower limit value of the drive output current and the current load for self-calibration; The high limit comparison reference voltage value is the product of the theoretical value of the high limit of the drive output current and the current load for self-calibration.

6. The calibration method according to claim 2, wherein: The comparison circuit outputs a digital waveform, and the duty cycle detection circuit receives the digital waveform. When detecting the duty cycle of the digital waveform, the digital waveform is de-jittered and filtered, and multi-cycle detection is performed to obtain more accurate duty cycle data.

7. The calibration method according to claim 2, wherein: The current-driven PWM wave generation and duty cycle adjustment loop receives the digital waveform duty cycle and compares it with a preset digital waveform duty cycle reference value, and adjusts the PWM wave duty cycle output by the current-driven PWM wave generation and duty cycle adjustment loop according to the comparison result, thereby changing the driving current, and further changing the digital waveform duty cycle output by the comparison loop until the digital waveform duty cycle reaches the digital waveform duty cycle reference value range, including: The current-driven PWM wave generation and duty cycle adjustment loop compares the actual value of the duty cycle of the digital waveform output by the comparison loop with the reference value of the duty cycle of the digital waveform output by the comparison loop corresponding to the high / low limit drive current, calculates the difference, and if the difference is greater than the preset threshold, adjusts and changes the duty cycle of the current-driven PWM wave in a step-by-step manner to change the effective value of the drive current output, thereby changing the difference between the two input terminals of the comparator, thereby changing the duty cycle of the comparison output digital waveform, until the duty cycle of the digital waveform output by the comparison loop reaches the reference value range of the duty cycle of the digital waveform output by the comparison loop.

8. The calibration method according to claim 7, characterized in that: The current-driven PWM wave generation and duty cycle adjustment loop adjusts the current-driven PWM wave duty cycle in a stepping manner, and the size of the step value is positively correlated with the size of the deviation of the actual value of the duty cycle of the comparison loop output digital waveform from the reference value of the duty cycle of the comparison loop output digital waveform.

9. The calibration method according to claim 7, wherein: After the duty cycle of the digital waveform output by the comparison loop reaches the reference value range of the duty cycle of the digital waveform output by the comparison loop, the current-driven PWM wave duty cycle at this time is stored, and the saved current-driven PWM wave duty cycle value can be used as the high / low limit current output duty cycle value in subsequent work.

10. The calibration method according to claim 7, wherein: Each design case needs to use multiple data samples according to its actual circuit to obtain a reference value for the duty cycle of the comparison loop output digital waveform that meets the final design accuracy requirements, and use this reference value to calibrate other cases of the same design.

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