Chip-on-chip process and structure

Abstract

The application provides a chip mounting process and structure, which comprises the following steps: bonding at least one chip structure on a first substrate to obtain a first chip substrate; the size of the first substrate is larger than that of the chip; bonding at least one first chip substrate to a second substrate to obtain a second chip substrate; the size of the second substrate is larger than that of the first substrate; processing the second chip substrate; and separating the second substrate from the at least one first chip substrate through debonding treatment after processing the second chip substrate. In the application, the chip is temporarily bonded or permanently bonded on the first substrate which is suitable for the size of the chip, and a plurality of first substrates are bonded on the second substrate which is larger in size, so that the mounting precision is improved, the process is simplified, and the problem of meeting the differentiated needs of customers is solved.

Description

Technical Field

[0001] This invention relates to the field of chip mounting, and more particularly to a chip mounting process and structure. Background Technology

[0002] With the advancement of semiconductor manufacturing processes and the rapid growth in market demand for chips, the requirements for chip production efficiency are becoming increasingly stringent. In the current chip mounting process, a large substrate is used as the chip carrier, which reduces the precision of chip mounting and also places high demands on the substrate material. This can easily lead to increased chip misalignment during the process and introduce chemical risks. At the same time, it also places high demands on bonding time and pressure, increasing the difficulty of the process. Summary of the Invention

[0003] This invention provides a chip mounting process and structure to solve the problem that the use of a large substrate as a chip carrier in the prior art reduces the precision of chip mounting and increases the difficulty of the process.

[0004] To address the aforementioned problems, the present invention is implemented as follows:

[0005] In a first aspect, the present invention provides a chip mounting process, comprising:

[0006] At least one chip structure is bonded to a first substrate to obtain a first chip substrate; the size of the first substrate is larger than the size of the chip.

[0007] At least one first chip substrate is bonded to a second substrate to obtain a second chip substrate; the size of the second substrate is larger than the size of the first substrate.

[0008] The second chip substrate is processed.

[0009] The second chip substrate after processing is debonded to separate the second substrate from the at least one first chip substrate.

[0010] Optionally, at least one of the first chip substrates after being separated from the second substrate is subjected to a rough cutting process; and at least one of the first chip substrates after the rough cutting process is subjected to a ball-mounting process and a fine cutting process to obtain a processed third chip substrate.

[0011] Alternatively, at least one of the first chip substrates, after being separated from the second substrate, can be directly subjected to a ball-planting process and a precision cutting process to obtain a processed third chip substrate.

[0012] Optionally, at least one of the first chip substrates after the roughing process is debonded to separate the first substrate from the chip structure.

[0013] Optionally, the chip structure can be bonded to the first substrate using bonding adhesive.

[0014] Optionally, at least one of the first chip substrates may be bonded to the second substrate using bonding adhesive.

[0015] Optionally, the first substrate is a ceramic substrate or a silicon substrate;

[0016] The second substrate is a glass substrate or a steel plate.

[0017] Optionally, processing the second chip substrate includes performing at least one of the following processes on the second chip substrate: molding process, polishing process, photolithography process, etching process, temporary bonding process, and electroplating process.

[0018] Optionally, the second chip substrate after processing can be debonded by means of light or heat.

[0019] In a second aspect, the present invention provides a chip mounting structure, which is fabricated using the chip mounting process described in any one of the first aspects.

[0020] Optionally, the chip patch structure includes:

[0021] Substrate and chip structure;

[0022] The chip structure includes: a chip body; at least one chip pad is disposed at a first end of the chip body; the second end of the chip body is connected to the substrate by bonding adhesive; the first end and the second end of the chip body are opposite ends;

[0023] A molding compound; the molding compound is disposed on the substrate, the molding compound covers the chip body and has an opening to expose the chip pads;

[0024] An insulating layer disposed on the encapsulation layer and having vias;

[0025] A redistribution structure is disposed in the insulating layer and connected to the chip pads through the vias;

[0026] At least one bump solder ball is disposed on the rewiring structure.

[0027] In this invention, by selecting a first substrate adapted to the size of the chip, the chip is temporarily or permanently bonded to the first substrate, and multiple first substrates are bonded to a second substrate with a larger size. This improves the chip mounting accuracy through the first substrate and simplifies the process by using the second substrate, thus meeting the problem of different customer needs. Attached Figure Description

[0028] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0029] Figure 1 A schematic diagram of the overall process flow of chip mounting technology provided in this embodiment of the invention;

[0030] Figure 2 An exploded view of the first process of a chip mounting process provided in this embodiment of the invention;

[0031] Figure 3 An exploded view of the second process of a chip mounting process provided in this embodiment of the invention;

[0032] Figure 4 An exploded view of the third process of a chip mounting process provided in this embodiment of the invention;

[0033] Figure 5 An exploded view of the fourth process of a chip mounting process provided in this embodiment of the invention;

[0034] Figure 6 An exploded view of the fifth step of a chip mounting process provided in this embodiment of the invention;

[0035] Figure 7 An exploded view of the sixth process of a chip mounting process provided in this embodiment of the invention;

[0036] Figure 8 A schematic diagram of a chip patch structure provided in an embodiment of the present invention;

[0037] Figure 9 A schematic diagram of another chip patch structure provided in an embodiment of the present invention.

[0038] Figure label:

[0039] substrate 81;

[0040] Chip structure 82; chip body 821; chip pad 822; bonding adhesive 823; molding compound 824; insulating layer 825; redistribution structure 826; bump solder ball 827. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.

[0042] Unless otherwise defined, the technical or scientific terms used in this invention shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship also changes accordingly.

[0043] Please refer to Figure 1 This invention provides a chip mounting process, including:

[0044] Step 11: Bond at least one chip structure onto a first substrate to obtain a first chip substrate; the size of the first substrate is larger than the size of the chip.

[0045] Step 12: Bond at least one first chip substrate to a second substrate to obtain a second chip substrate; the size of the second substrate is larger than the size of the first substrate;

[0046] Step 13: Process the second chip substrate;

[0047] Step 14: Debond the processed second chip substrate to separate the second substrate from the at least one first chip substrate.

[0048] Please refer to Figure 2-7 In this embodiment of the invention, in step 11, as follows: Figure 2 and Figure 3The size and number of the first substrate are designed according to the capabilities of the chip mounting equipment. The material of the first substrate can be a carrier for bonding different materials according to the back characteristics of the chip structure. The material of the first substrate can be a ceramic substrate or a silicon substrate, because ceramic substrates have high heat dissipation capacity, or other materials with low thermal expansion coefficients or high heat dissipation characteristics, and is not limited to the two substrate materials mentioned above. At least one chip structure is bonded to the first substrate by selecting different bonding adhesives, either temporarily or permanently, to obtain the first chip substrate. Since the materials of the first substrate are widely selectable, the range of bonding materials is also very wide. Low-temperature or room-temperature bonding materials such as DAF (Die Attach Film) or UV-curable coatings can be used to avoid high-temperature bonding of chips, which would lead to large chip misalignment and improve the mounting accuracy.

[0049] Please refer to Figure 4 In step 12, at least one first chip substrate is bonded to a second substrate, wherein the second substrate may be a glass substrate or a steel plate; due to the choice of materials, bonding the chip to the first substrate is a simpler process than bonding it to the second substrate.

[0050] In step 13, in this embodiment of the invention, processing the second chip substrate includes performing at least one of the following processes on the second chip substrate: molding process, grinding process, photolithography process, etching process, temporary bonding process, and electroplating process; wherein, bonding the first chip substrate to the second substrate allows for the simultaneous processing of multiple small substrates, improving efficiency and reducing costs.

[0051] Please refer to Figure 5 In step 14, in this embodiment of the invention, light irradiation or heating, but not limited to other debonding methods, can be used to debond the processed second chip substrate to separate the second substrate from the at least one first chip substrate.

[0052] In this embodiment of the invention, by selecting a first substrate adapted to the size of the chip, the chip is temporarily or permanently bonded to the first substrate, and multiple first substrates are bonded to a second substrate with a larger size. This improves the chip mounting accuracy through the first substrate and simplifies the process by using the second substrate, thus meeting the problem of different customer needs.

[0053] In this embodiment of the invention, optionally, at least one of the first chip substrates after being separated from the second substrate is subjected to a rough cutting process; and at least one of the first chip substrates after the rough cutting process is subjected to a ball-mounting process and a fine cutting process to obtain a processed third chip substrate.

[0054] Alternatively, at least one of the first chip substrates, after being separated from the second substrate, can be directly subjected to a ball-planting process and a precision cutting process to obtain a processed third chip substrate.

[0055] Please refer to Figure 6 In this embodiment of the invention, since adhesion occurs between the substrates during the processing of the second chip substrate, a roughing process, a ball-mounting process, and a fine cutting process are required. The roughing process is a selective process, determined by the maximum size that the cutting equipment can cut. For example, if some equipment cannot directly process 600*600mm products but can only process 300*300mm substrates, then at least one of the separated 600*600mm first chip substrates needs to be cut into smaller sizes, such as... Figure 6 The product is cut into four 300*300mm pieces; the precision cutting process refers to cutting the product, which has completed all processes, into individual pieces suitable for shipment. Figure 7 The product is processed to obtain a third chip substrate, wherein the size of the third chip substrate is the same as the size of the chip structure.

[0056] In this embodiment of the invention, optionally, at least one of the first chip substrates after the roughing process is debonded to separate the first substrate from the chip structure.

[0057] In this embodiment of the invention, if the first substrate is temporarily bonded to the chip structure, i.e. the finished chip structure does not retain the first substrate, then the first substrate needs to be debonded before the ball-mounting process; if the first substrate is not retained, then the rough cutting process needs to be performed, and after the rough cutting process, the first substrate is debonded to separate the first substrate from the chip structure.

[0058] In this embodiment of the invention, optionally, bonding adhesive is used to bond the chip structure to the first substrate.

[0059] In this embodiment of the invention, optionally, bonding adhesive is used to bond at least one of the first chip substrates to the second substrate.

[0060] In this embodiment of the invention, the material of the bonding adhesive is appropriately selected according to the substrate material.

[0061] In this embodiment of the invention, by selecting a first substrate adapted to the size of the chip, the chip is temporarily or permanently bonded to the first substrate, and multiple first substrates are bonded to a second substrate with a larger size. This improves the chip mounting accuracy through the first substrate and simplifies the process by using the second substrate, thus meeting the problem of different customer needs.

[0062] Please refer to Figure 8 The present invention provides a chip mounting structure, which is fabricated using the chip mounting process described in any one of the first aspects.

[0063] In this embodiment of the invention, optionally, the chip patch structure includes:

[0064] Substrate 81 and chip structure 82;

[0065] The chip structure includes: a chip body 821; at least one chip pad 822 is provided at the first end of the chip body 821; the second end of the chip body is connected to the substrate 81 by bonding adhesive 823; the first end and the second end of the chip body are opposite ends;

[0066] A molding layer 824; the molding layer 824 is disposed on the substrate 81, the molding layer 824 covers the chip body 821 and has an opening to expose the chip pads 822;

[0067] An insulating layer 825 is disposed on the encapsulation layer 824 and has through holes;

[0068] A redistribution structure 826 is disposed in the insulating layer 825 and connected to the chip pad 822 through the via;

[0069] At least one bump solder ball 827 is disposed on the redistribution structure 826.

[0070] Please refer to Figure 8 and Figure 9 In this embodiment of the invention, the second end of the chip body is connected to the substrate by bonding adhesive, which can be performed by bonding the second end of the chip body; or by bonding the second end of the chip body to the molding compound.

[0071] In this embodiment of the invention, the insulating layer includes at least one layer, wherein each of the at least one insulating layer is stacked, and wherein the via penetrates each insulating layer; the rewiring structure includes at least one, wherein the at least one rewiring structure is stacked in each insulating layer and connected to the chip pad through the via; the at least one bump solder ball is disposed on the outermost rewiring structure.

[0072] In this embodiment of the invention, the substrate can be removed or permanently bonded as needed. Since the substrate is present, there is no need to apply a separate adhesive film to the back of the chip for protection. Special materials can be permanently bonded to the back of the chip to meet the differentiated needs of customers.

[0073] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of the present invention is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0074] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of the present invention.

Claims

1. A chip mounting process, characterized in that, include: Multiple chip structures are bonded onto a first substrate to obtain a first chip substrate; The size of the first substrate is larger than the size of the chip; Multiple first chip substrates are bonded to a second substrate to obtain a second chip substrate; the size of the second substrate is larger than the size of the first substrate. The second chip substrate is processed. The second chip substrate after processing is debonded to separate the second substrate from multiple first chip substrates; The first chip substrates, after being separated from the second substrate, are subjected to a rough cutting process; and the intermediate-sized units after the rough cutting process are subjected to a ball-mounting process and a fine cutting process to obtain a processed third chip substrate; the third chip substrate includes the chip structure and a substrate with the same size as the chip structure. Alternatively, multiple first chip substrates separated from the second substrate may be directly subjected to ball-mounting and precision cutting processes to obtain a processed third chip substrate, wherein the third chip substrate includes the chip structure and a substrate with the same size as the chip structure. The rough cutting process is a cutting process that cuts multiple separated first chip substrates into multiple intermediate size units, wherein the size of the intermediate size unit is larger than the size of a single third chip substrate; the fine cutting process is a cutting process that cuts a single third chip substrate.

2. The chip mounting process according to claim 1, characterized in that, Also includes: The first chip substrates, after being processed by the rough cutting process, are debonded to separate the first substrates from the chip structure.

3. The chip mounting process according to claim 1, characterized in that, The chip structure is bonded to the first substrate using bonding adhesive.

4. The chip mounting process according to claim 1, characterized in that, Multiple first chip substrates are bonded to the second substrate using bonding adhesive.

5. The chip mounting process according to claim 1, characterized in that, The first substrate is a ceramic substrate or a silicon substrate; The second substrate is a glass substrate or a steel plate.

6. The chip mounting process according to claim 1, characterized in that, The processing of the second chip substrate includes performing at least one of the following processes on the second chip substrate: molding process, grinding process, photolithography process, etching process, temporary bonding process and electroplating process.

7. The chip mounting process according to claim 1, characterized in that, The second chip substrate after processing is debonded by means of light irradiation or heating.

8. A chip surface mount structure, characterized in that, The chip patch structure is fabricated using the chip patching process described in any one of claims 1-7.

9. The chip mounting structure according to claim 8, characterized in that, The chip patch structure includes: Substrate and chip structure; The chip structure includes: a chip body; at least one chip pad is disposed at a first end of the chip body; the second end of the chip body is connected to the substrate by bonding adhesive; the first end and the second end of the chip body are opposite ends; A molding compound; the molding compound is disposed on the substrate, the molding compound covers the chip body and has an opening to expose the chip pads; An insulating layer disposed on the encapsulation layer and having vias; A redistribution structure is disposed in the insulating layer and connected to the chip pads through the vias; At least one bump solder ball is disposed on the rewiring structure.

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