Passivation materials and methods for metal-plated through-glass vias

Abstract

A through glass via (TGV) formed in a glass substrate may include a metal coating formed in the TGV. The TGV may have a three-dimensional (3D) topology through the glass substrate and a metal coating conformally covering the 3D topology. The TGV may also include a barrier layer disposed on the metal coating and a metallization layer disposed on the barrier layer. The metallization layer may be electrically coupled to the metal coating through the barrier layer. The barrier layer may include a metal nitride film disposed on the metal coating, the film being electrically coupled to the metallization layer. The barrier layer may include a metal film disposed on the metal coating and on a portion of the glass surrounding the TGV, and an electrically insulating film disposed on the metal film, the electrically insulating film completely overlapping the metal coating and partially overlapping the metal film.

Description

[0001] Related Applications

[0002] This application is a continuation of U.S. Application No. 16 / 897,788 filed on June 10, 2020. The entire teachings of the above application are incorporated herein by reference. Background Art

[0003] Glass, such as molten SiO2, is a promising substrate material for high-frequency electrical technologies. These technologies include, for example, millimeter wave devices, such as radio frequency (RF) integrated circuits (ICs) and microelectromechanical systems (MEMS). Glass is advantageous as a substrate material because it has unique advantages over conventional substrate materials such as silicon (Si), ceramics, and organic laminates. Glass not only provides excellent RF performance (e.g., high electrical isolation, low insertion loss, and low loss tangent at ultra-high and extremely high frequencies (SHF and EHF)), but also provides excellent dimensional and thermal stability (e.g., adjustable coefficient of thermal expansion (CTE), effective moisture barrier, and very thin IC and MEMS packaging).

[0004] For 2.5-dimensional (2.5D) and 3-dimensional (3D) ICs and MEMS, electrical signals can be transmitted through vertical conductive paths called through-silicon vias (TSVs) that pass completely through one or more separate substrates and / or interposers to interconnect multiple IC chips. Such out-of-plane electrical connections can also be achieved in silicate glass substrates by drilling a through-hole via with a cross-sectional diameter that varies relative to depth (e.g., 1-100 μm), thereby forming an hourglass-shaped via through the silicate glass substrate.

[0005] The hourglass-shaped aperture may be constructed, for example, using laser machining techniques. Figure 1A A cross-sectional view of an example through glass via (TGV) 102 formed in a silicate glass substrate 104 is shown. At the narrowest point 106 of the TGV 102, the diameter can be about 10 μm, although the diameter at the narrowest point 106 can be as small as 1 μm and as large as 100 μm. The TGV outer surface diameter 108 can be about 50 μm, although the outer surface diameter 108 can be as small as 1 μm and as large as 100 μm. The thickness 110 of the silicate glass substrate 104 can be about 300 μm, although the thickness 110 can be as small as 100 μm and as large as 1000 μm.

[0006] The inner surface 112 of the TGV 102 may be coated with one or more layers of metal using one or more conventional electroplating techniques known in the art to form a metal-plated or metal-filled TGV. Figure 1BAs shown in the example TGV shown in FIG, these metal layers may include a thin adhesion layer 120 (e.g., titanium (Ti)), a metal seed layer 122 disposed on the adhesion layer 120, and a metal plating layer 124 disposed on the seed layer 122. The metal plating layer 124 may include a conductive material, such as copper (Cu) or aluminum (Al).

[0007] Electrical signals routed along horizontal conductive paths (e.g., patterned metallization layers comprising gold (Au)) can be electrically coupled to metal-filled TGVs. During the manufacturing process, the metallization layer 124 of the metal-plated TGV can be exposed to environmental conditions characterized by high concentrations of oxygen (O2). Some atoms of the metallization layer 124 can diffuse along the grain boundaries of the patterned metallization layer disposed on the metallization layer 124 and encounter O2. O2 can easily react with exposed non-inert metal atoms, such as Cu at temperatures above 100°C, to produce unstable metal oxide byproducts, such as copper oxide (CuO or Cu2O). The resulting metal oxide byproducts may degrade the performance, reliability, lifetime, and packaging integrity of the associated devices. Figure 2A and 2B The scanning electron micrograph (SEM) shown in shows such micro- and nano-sized particles 206 composed primarily of CuO or Cu2O generated on the Au surface 204. The particles 206 are generated in the area near the TGV 202 due to the diffusion of Cu atoms through the patterned metallization layer.

[0008] To prevent Figure 2A and 2B In order to prevent atomic diffusion of the metal plating layer 124 shown in the figure and the resulting contamination, a barrier layer can be set between the metal plating layer 124 and the patterned metallization layer. Due to the small physical size of the through silicon via (relative to the TGV), it is feasible to configure such a barrier layer using conventional technology. For example, silicon-based manufacturing technology can use a diffusion barrier layer such as titanium nitride (TiN) or tantalum nitride (TaN), which is deposited using a chemical vapor deposition (CVD) or physical vapor deposition (PVD) or atomic layer deposition (ALD) process. Such a TiN or TaN barrier is typically very thin (less than 10nm), but thinness is not a problem because the size of the scaled TSV is relatively small (e.g., less than 5μm in diameter).

[0009] However, due to the relatively large size of the TGV, it may be problematic to fully configure such a barrier layer using such conventional techniques. For example, placing a barrier film on the 3D topology associated with the large-scale hourglass-shaped TGV described herein using conventional manufacturing techniques (e.g., PVD) may result in an incomplete barrier seal. Such an incomplete seal may allow atoms to diffuse from the metallization layer into the patterned metallization layer. Summary of the invention

[0010] Embodiments described herein relate to passivation (or barrier) layers associated with metallized through-glass vias (TGVs) and methods of making the same. Ideally, an intermediate layer disposed between a metallization layer and an outer metallization layer of a TGV can serve as a barrier layer for atoms of the metallization layer to migrate to the outer metallization layer. For example, Figure 3 The intermediate layer 302 between the metal coating 124 and the outer metallization layer 304 shown in FIG can be used to prevent atoms from the metal coating from diffusing into the outer metallization layer 304. The 3D topology and large spatial dimensions (relative to TSVs) of the hourglass-shaped TGVs create obstacles to establishing a complete barrier layer within the TGV. Thin film deposition techniques known in the art (e.g., PVD) typically produce conformal films, but such thin conformal film deposition techniques may result in incomplete filling of 3D types, such as Figure 1A , Figure 1B and Figure 3 A large hourglass-shaped TGV is shown in Figure 2. Any area in the 3D topology that is not covered by the barrier film can provide a path for metal diffusion.

[0011] According to the described embodiments, oxide-based and nitride-based films, such as silicon dioxide (SiO2) and titanium nitride (TiN), can be effectively used as diffusion barriers to block metal diffusion and subsequent O2 interaction. Such barriers can be deposited on the surface of the metallized TGV substrate using conventional deposition techniques (such as CVD, PVD, and ALD) and patterned using standard photolithography and etching processes.

[0012] In one aspect, the present invention may be a method of providing a barrier film on a metallized through glass via (TGV) formed in a glass substrate, the method comprising using an atomic layer deposition (ALD) process to build a metal nitride film on a metal plating layer of the metallized TGV, and forming a conductive metallization layer on the metal nitride film. The conductive metallization layer may be electrically coupled to the metal nitride film.

[0013] The method may also include formulating the conductive metal nitride film to include titanium nitride (TiN). The method may also include electrically coupling an external metallization layer to the conductive metal nitride film. The method may also include depositing one or more conductive coatings on the conductive metal nitride film. The one or more conductive coatings include TiW and / or Au.

[0014] In another aspect, the present invention may be a method of providing a barrier film on a metallized through glass via (TGV) formed in a glass substrate, the method comprising establishing a metal film using a physical vapor deposition (PVD) process (i) on a metal coating of the metallized TGV and (ii) on at least a portion of the glass surrounding the TGV. The method may also include establishing an electrically insulating film on the metal film using a chemical vapor deposition (CVD) process. The electrically insulating film may completely overlap the metal coating and partially overlap the metal film. The method may also include forming a conductive metallization layer on the insulating film and on the metal film using a PVD process. The conductive metallization layer may be electrically coupled to the metal film.

[0015] The method may also include preparing the conductive metal film to include titanium tungsten (TiW). The method may also include preparing the insulating film to include silicon dioxide (SiO2). The method may also include patterning the insulating film to form a diffusion barrier patch that covers at least the area of ​​the conductive metal film that is laid on the TGV. The method may also include extending the insulating film so that the diffusion barrier patch covers at least a portion of the glass around the TGV.

[0016] The method may further include electrically coupling an external metallization layer to the conductive metal film. The method may further include depositing one or more conductive coatings on the conductive metal nitride film. The one or more conductive coatings include TiW and / or Au.

[0017] In another aspect, the present invention may be a through glass via (TGV) formed in a glass substrate, comprising a metal coating formed in the TGV. The TGV may have a three-dimensional (3D) topology through the glass substrate and a metal coating conformally covering the 3D topology. The TGV may also include a barrier layer disposed on the metal coating and a conductive metallization layer disposed on the barrier layer. The conductive metallization layer may be electrically coupled to the metal coating through the barrier layer.

[0018] The barrier layer may further include a metal nitride film disposed on the metal plating layer, the metal nitride layer being electrically coupled to the conductive metallization layer. The metal nitride film may be titanium nitride (TiN).

[0019] The barrier layer may also include (i) a metal film disposed on the metal coating and at least a portion of the glass surrounding the TGV, and (ii) an electrically insulating film disposed on the metal film. The electrically insulating film may completely overlap the metal coating and partially overlap the metal film. The metal film may be electrically coupled to the conductive metallization layer. The metal film may be titanium tungsten (TiW) and the electrically insulating film may be silicon dioxide (SiO2). The TGV may also include one or more conductive coatings on the conductive metallization layer. The one or more conductive coatings may include TiW and / or Au. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The foregoing will be apparent from the following more particular description of example embodiments, as illustrated in the accompanying drawings, in which like reference characters refer to the same parts throughout the different views. The drawings are not necessarily drawn to scale, emphasis instead being placed upon the illustrative embodiments.

[0021] Figure 1A A cross-sectional view of an example through-glass via (TGV) formed in a silicate glass substrate is shown.

[0022] Figure 1B Shows Figure 1A A TGV having a thin adhesion layer, a metal seed layer disposed on the adhesion layer, and a metal plating layer disposed on the seed layer.

[0023] Figure 2A and 2B Shown is a scanning electron micrograph (SEM) depicting micro- and nanoscale particles on the Au surface of a TGV.

[0024] Figure 3 Example TGVs are shown with metal films deposited on the top and / or bottom surfaces of a glass substrate.

[0025] Figure 4 One embodiment of a passivation layer disposed on a TGV of the present invention is shown.

[0026] Figure 5 Another embodiment of the passivation layer disposed on the TGV of the present invention is shown.

[0027] Fig. 6A and 6B An example of a TGV fabricated with the passivation layer of the present invention is shown.

[0028] Figure 7 Shows Figure 4 Embodiments of passivated TGVs with additional metal coatings used as conductive interconnect paths and / or sealing rings used in IC and MEMS packaging.

[0029] Figure 8 Shows Figure 5 Embodiments of passivated TGVs with additional metal coatings used as conductive interconnect paths and / or sealing rings used in IC and MEMS packaging. DETAILED DESCRIPTION

[0030] A description of example implementations follows.

[0031] The teachings of all patents, published applications, and references cited herein are incorporated by reference in their entirety.

[0032] Embodiments described herein relate to passivation (or barrier) layers associated with metallized through-glass vias (TGVs). As described herein, Figure 1B An example hourglass-shaped TGV is shown lined with an adhesion layer 120, a metal seed layer 122, and a metal plating layer 124. Figure 3 , where one or more metal films are deposited on the top and / or bottom surfaces of a glass substrate using, for example, physical vapor deposition (PVD) techniques. Figure 3 In the example shown in , a first metal layer 302 of titanium tungsten (TiW) is deposited on the metal plating layer 124, and a second metal layer 304 of gold (Au) is disposed on the first metal layer 302. The external metallization layer 304 can be used not only as a conductive path for chip-to-chip interconnection, but also as a bond pad or sealing ring when bonding the device and the cover substrate using wafer bonding technology (e.g., by thermocompression bonding). For thermocompression bonding of the Au sealing ring with the counter substrate, a clean Au bonding pad free of foreign particles is required to achieve a strong Au-to-Au bond to achieve an airtight seal. Appropriate surface passivation of the metal-filled TGV can reduce or prevent metal diffusion and interaction with O2, thereby preventing unnecessary metal oxide particle formation.

[0033] The embodiments allow for a significant reduction in parasitic metal oxides generated on the substrate. Specifically, the surface of a silicate glass wafer having metal-filled TGVs is coated with a passivation layer. In addition, the embodiments facilitate the passivation layer to be disposed on a non-planar, 3-dimensional (3D) topography of the TGV type described herein. In certain applications, the TGV needs to deliver a large amount of power and must be physically larger than a typical TGV. The embodiments facilitate complete coverage of the TGV to prevent potential diffusion paths.

[0034] In one embodiment, Figure 4 As shown, the passivation layer includes a conductive metal nitride film 402 deposited using an atomic layer deposition (ALD) method known in the art. In an exemplary embodiment, the metal nitride film 402 includes titanium nitride (TiN), although other metal nitride materials, such as tantalum nitride (TaN), may be used instead in other embodiments. The ALD process causes the metal nitride film 402 to be fully conformally deposited within the 3D topography of the TGV.

[0035] In another embodiment, the passivation layer may include two parallel layers, including an insulating oxide-based film 504 deposited by chemical vapor deposition (CVD) on the surface of a metal film 502 (e.g., titanium tungsten (TiW)), which is deposited by PVD on the metal coating 124, such as Figure 5As shown. In the example embodiments described herein, the insulating oxide-based film 504 includes silicon dioxide (SiO2), although other insulating oxide-based materials known in the art, such as amorphous aluminum oxide (Al2O3) may be used instead. In the example embodiments described herein, the metal film 502 includes titanium tungsten (TiW), although in alternative embodiments, the metal film 502 may include other transition metals deposited by PVD, such as titanium (Ti) and chromium (Cr), or transition metal alloys deposited by PVD, such as TiN and TaN.

[0036] The insulating oxide base film 504 may be patterned to form a diffusion barrier patch 506 on the metal-filled TGV (ie, the metal plating layer 124), thereby exposing the underlying metal film 502 to the outside of the diffusion barrier patch, such as Figure 5 The oxide patch can effectively serve as a barrier layer to hinder metal-O2 diffusion and reaction.

[0037] Fig. 6A and 6B The optical micrographs shown in FIG. 5 show that the metal oxide particles substantially disappear in the presence of the SiO2 / TiW diffusion barrier patch 506, while Figure 2A and 2B Those in show the ubiquitous presence of copper oxide particles on the Au surface in the absence of a passivation layer.

[0038] One or more additional metal coatings (e.g., Au and TiW) may be applied over the Figure 4 and 5 The passivation layer can be implemented on top of any of the techniques described. Additional metal coatings can be deposited by PVD and then patterned together with the passivation layer by standard photolithography and etching techniques. Figure 4 The embodiment shown Figure 7 In the illustrated exemplary embodiment, the additional metal coating on the underlying TiN film 402 includes a TiW film 702 and an Au film 704. Figure 5 The embodiment shown Figure 8 In the illustrated example embodiment, the additional metal coating on the underlying TiW film 502 outside the SiO2 / TiW diffusion barrier patch 506 also includes a TiW film 802 and an Au film 804. The additional metal coatings 702, 704, 802, 804 may be used to define conductive paths for chip-to-chip interconnects and bonding pads and / or sealing rings used in IC and MEMS packaging.

[0039] In the described embodiments, metal nitride and oxide based films, such as TiN and SiO2, have been proposed to passivate the surface of metal filled TGVs. The metal nitride and oxide based films can act as effective diffusion barriers and can inhibit non-inert metal atoms within the metal coating from diffusing through the metallization layer and thereby encountering and reacting with O2, thereby enabling the production of clean silicate glass substrate surfaces free of undesirable metal oxide micro- and nanoparticles. The metal nitride and oxide based films can be easily deposited onto the surface of metallized TGV wafers using conventional deposition methods (e.g., CVD, PVD, and ALD) and easily patterned using standard photolithography and etching techniques.

[0040] The described embodiments show great potential for applications in 3-dimensional, 2.5-dimensional, and 2-dimensional (3D, 2.5D, and 2D, respectively) ICs and MEMS that require silicate glass packaging for excellent electrical isolation, RF performance, optical transparency, and structural flexibility.

[0041] While example embodiments have been particularly shown and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the embodiments as covered by the following claims.

Claims

1. A method for providing a barrier film on a metallized through-glass via formed in a glass substrate, the method comprising: Using an atomic layer deposition process to establish a conductive metal nitride film on the metal plating of the metallized glass through hole; forming a conductive metallization layer on the conductive metal nitride film, the conductive metallization layer being electrically coupled to the conductive metal nitride film; and A titanium tungsten coating is deposited on the conductive metal nitride film, and a gold coating is deposited on the titanium tungsten coating.

2. The method of claim 1 further comprising formulating the conductive metal nitride film to comprise titanium nitride.

3. The method of claim 1, further comprising electrically coupling the outer metallization layer to the additional metal coating.

4. A method for providing a barrier film on a metallized through-glass via formed in a glass substrate, the method comprising: Using a physical vapor deposition process to establish a conductive metal film (i) on the metal coating of the metallized through-glass via and (ii) on at least a portion of the glass surrounding the through-glass via; Using a chemical vapor deposition process to establish an electrical insulating film on the conductive metal film, the electrical insulating film completely overlapping the metal plating layer and partially overlapping the conductive metal film; as well as A conductive metallization layer is formed on the insulating film and on the conductive metal film using a physical vapor deposition process, the conductive metallization layer being electrically coupled to the conductive metal film. 5 . The method of claim 4 , further comprising preparing the conductive metal film to include titanium tungsten. 6 . The method of claim 4 , further comprising preparing the insulating film to include silicon dioxide.

7. The method of claim 4, further comprising patterning the insulating film to form a diffusion barrier patch that covers at least a region of the conductive metal film that overlies the through-glass via.

8. The method of claim 7, further comprising extending the insulating film so that the diffusion barrier patch covers at least a portion of the glass around the through-glass via.

9. The method of claim 4, further comprising electrically coupling an external metallization layer to the conductive metal film.

10. The method of claim 4, further comprising depositing one or more conductive coatings on the conductive metal nitride film.

11. The method of claim 10, wherein the one or more conductive coatings comprise titanium tungsten and / or gold.

12. A through-glass via formed in a glass substrate, comprising: a metal coating formed in the through-glass via, the through-glass via having a three-dimensional topological structure passing through the glass substrate, and the metal coating conformally covering the three-dimensional topological structure; A barrier layer disposed on the metal coating; and A conductive metallization layer is disposed on the barrier layer, the conductive metallization layer being electrically coupled to the metal plating layer through the barrier layer, The barrier layer further comprises (i) a metal film disposed on the metal plating layer and on at least a portion of the glass around the through-glass hole, and (ii) an electrical insulating film disposed on the metal film, the electrical insulating film completely overlapping the metal plating layer and partially overlapping the metal film, and wherein the metal film is electrically coupled to the conductive metallization layer.

13. The through glass via of claim 12, wherein the barrier layer further comprises a metal nitride film disposed on the metal plating layer, the metal nitride layer being electrically coupled to the conductive metallization layer.

14. The through-glass via of claim 13, wherein the metal nitride film is titanium nitride.

15. The through glass via of claim 12, wherein the metal film is titanium tungsten and the electrically insulating film is silicon dioxide.

16. The through glass via of claim 12, further comprising one or more conductive coatings on the conductive metallization layer.

17. The through-glass via of claim 16, wherein the one or more conductive coatings comprise titanium tungsten and / or gold.

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