Power semiconductor module having at least one power semiconductor element

Abstract

The invention relates to a power semiconductor module (2) having at least one power semiconductor element (4). In order to reduce the installation space required by the power semiconductor module (2) and to increase its service life, it is proposed that the at least one power semiconductor element (4) is connected to a cooling element (10) in an electrically insulating and thermally conductive manner via a dielectric material layer (8), wherein the dielectric material layer (8) is placed flat on a surface (11) of the cooling element (10) and is connected to the cooling element (10) in a force-fit manner by means of a first force (F1) acting perpendicular to the surface (11) of the cooling element (10).

Description

Technical Field

[0001] The present invention relates to a power semiconductor module having at least one power semiconductor element.

[0002] Furthermore, the present invention relates to a power converter having at least one such power semiconductor module.

[0003] Furthermore, the present invention relates to a method for manufacturing such a power semiconductor module. Background Technology

[0004] In power converters, power semiconductor modules with metallized ceramic substrates on both sides are typically used. The ceramic substrates are usually metallized and bonded to a metal coolant, which is implemented, for example, as a base plate. Power converters should be understood, for example, as rectifiers, inverters, frequency converters, or DC-DC voltage converters. Due to their structure, the ceramic substrates are subjected to high inherent stresses, with the rigid welded connection to the coolant providing additional stress, particularly mechanical and / or thermomechanical stresses. The power semiconductor elements used in the power semiconductor modules are typically bonded to the metallized structure of the ceramic substrate; these power semiconductor elements include, for example, transistors, particularly insulated-gate bipolar transistors (IGBTs). Therefore, the entire structure has very different coefficients of thermal expansion, and thus, the alternating heat loads that occur during operation cause additional, particularly mechanical and / or thermomechanical stresses.

[0005] To compensate for stress factors, particularly mechanical and / or thermomechanical stress factors, ceramic substrates are made thicker than required for electrical insulation, thereby increasing the thermal resistance between the power semiconductor element and the cooling body. Therefore, power semiconductors with larger chip areas are needed to meet the specific application requirements due to the higher thermal resistance. Furthermore, rigid welded connections age, leading to premature failure, especially thermal failure. To reduce heat rise while still achieving the required lifespan, power semiconductors with even larger chip areas are needed. With the increasing miniaturization of power semiconductor modules, significant challenges arise in terms of structural space, lifespan, and cost.

[0006] Publication EP 0762 496 A2 describes a power semiconductor module in which at least one semiconductor chip disposed on a substrate is contacted by corresponding contact posts. The position of the contact posts can be individually adjusted according to the distance from the semiconductor chip to the main connection accommodating the contact posts. The contact posts are either pressed by means of a spring or fixed by means of a solder layer.

[0007] Publicly available document US 2018 / 122782 A1 describes a power module having a power unit and a control unit for driving the power unit. The power unit has a cooling body, at least one power element disposed on the cooling body, and an insulating layer covering the cooling body and the at least one power element. Here, the lower side of the power unit is formed by the lower side of the cooling body, and the upper side of the power unit is formed by at least one contact surface thermally and / or electrically coupled to the at least one power element and a surface of the insulating layer surrounding the at least one contact surface.

[0008] The published document US 2009 / 261472 A1 describes a power semiconductor module and a pressure device, wherein the power semiconductor module has at least one power semiconductor chip, and the pressure device applies pressure to the upper side of the power semiconductor chip when the power semiconductor module is fixed to a cooling body.

[0009] The published document US 2005 / 230820 A1 describes a power semiconductor device having: an electrically insulating and thermally conductive substrate having a structured metallization structure on at least one side; a cooling device in thermal contact with the other side of the substrate; at least one semiconductor element disposed on the substrate and electrically connected to the structured metallization structure; a partially electrically insulating film having a wire structure disposed on at least one side of the substrate, on which at least one semiconductor element is placed, and stacked without cavities on the substrate having or not having at least one semiconductor element; and a pressing device that applies localized force to the substrate via at least one semiconductor element, such that the substrate presses against the cooling device.

[0010] Publicly available document US 2006 / 138633 A1 describes a semiconductor device comprising: first and second semiconductor chips having electrodes formed on their front and rear sides; a first bus on which the first semiconductor chip is mounted, thereby enabling connection to the rear electrode; a second bus arranged parallel to the first bus, and a second semiconductor chip mounted on the second bus, thereby enabling connection to the rear electrode; a third bus pressed against the front electrode of the first semiconductor chip; a fourth bus pressed against the front electrode of the second semiconductor chip; and a connecting section electrically connected to the first and fourth buses.

[0011] Publicly available document DE 102009 002191 A1 describes a power semiconductor module having a power semiconductor chip with an upper electrical contact region to which bonding wires are bonded. At least when the power semiconductor module is fixed to a cooling body, a pressing element generates a pressing force acting on a sub-segment of the bonding wire formed between two adjacent bonding points. The power semiconductor chip and its underlying substrate are pressed against the cooling body by this pressing force. Summary of the Invention

[0012] In this context, the purpose of the present invention is to further reduce the structural space required for power semiconductor modules and extend their service life.

[0013] According to the present invention, this objective is achieved by a power semiconductor module having at least one power semiconductor element, wherein the at least one power semiconductor element is electrically and thermally connected to a cooling element via a dielectric material layer, wherein the dielectric material layer is laid flat on the surface of the cooling element and is forcefully connected to the cooling element by means of a first force acting perpendicular to the surface of the cooling element, wherein the dielectric material layer is in direct contact with the cooling element, wherein the power semiconductor element has a power semiconductor that is materially connected to a first metal contact element on the side facing the dielectric material layer, wherein the power semiconductor element is placed on the dielectric material layer via the first metal contact element and is forcefully connected to the dielectric material layer by the first force, wherein the first metal contact element is in direct contact with the dielectric material layer.

[0014] Furthermore, according to the present invention, this objective is achieved by a power converter having at least one such power semiconductor module.

[0015] Furthermore, according to the invention, this objective is achieved by a method for manufacturing such a power semiconductor module, wherein a dielectric material layer is in planar contact with the surface of a cooling element, wherein a power semiconductor element is in contact with the dielectric material layer, and wherein a force-fit connection to the cooling element is generated by means of a first force acting perpendicular to the surface of the cooling element.

[0016] The advantages and preferred design schemes of power semiconductor modules listed below can be similarly applied to power converters and methods.

[0017] This invention is based on the idea of ​​reducing mechanical and / or thermomechanical stresses in power semiconductor modules and reducing the required structural space. This is achieved by creating an electrically insulating and thermally conductive connection between the power semiconductor element and the cooling element through a dielectric material layer, wherein the dielectric material layer is surface-force-fitted with the cooling element. The power semiconductor module includes at least one power semiconductor, particularly a turn-off vertical power semiconductor, and connection members for contacting the vertical power semiconductor, particularly the turn-off power semiconductor. The connection members are, for example, planar contact elements made of a metallic material and configured to create electrical and / or mechanical connections with conductors (e.g., bonding wires) or with insulators (e.g., the dielectric material layer). The power semiconductor is specifically implemented as a transistor and / or a diode, wherein the transistor is implemented as, for example, an insulated-gate bipolar transistor (IGBT), a metal-oxide-semiconductor field-effect transistor (MOSFET), or a field-effect transistor. In particular, the power semiconductor element includes exactly one transistor and / or exactly one diode, thereby enabling, for example, a half-bridge to be constructed from two power semiconductor elements.

[0018] The dielectric layer is made of ceramic materials (e.g., aluminum nitride or alumina) or organic materials (e.g., polyamide). Since there is no rigid connection to the cooling body, metallization of the dielectric layer is unnecessary, thus reducing costs. For example, the thickness d of the dielectric layer is from 25 μm to 400 μm, particularly from 50 μm to 250 μm. The cooling element is designed, for example, as a cooling body comprising aluminum, copper, and / or alloys thereof. In this case, the dielectric layer lies flat on the surface of the cooling element. A force-fit connection is created by a first force acting perpendicular to the surface of the cooling element, wherein the first force is transmitted, for example, from the housing cover to the power semiconductor element. By eliminating the rigid connection to the cooling body, the stress in the power semiconductor module, particularly mechanical and / or thermomechanical stress, is significantly reduced, allowing the dielectric layer to be designed to be thinner, thereby extending its lifespan.

[0019] Furthermore, the dielectric material layer is in direct contact with the cooling element. In this case, direct contact does not require additional bonding materials such as adhesives or thermal paste. Direct contact enables a lower component height, and especially compared to rigid welded connections, the pressure acting on the dielectric material layer is significantly reduced.

[0020] Furthermore, the power semiconductor device has a power semiconductor that is material-fitted to a first metal contact element on the side facing the dielectric material layer. The power semiconductor device is placed on the dielectric material layer via the first metal contact element and is force-fitted to the dielectric material layer by a first force. The first metal contact element is, for example, a small copper or molybdenum plate with a thickness of 25 μm to 250 μm. The material-fitted connection is achieved, for example, by welding or sintering. While maintaining substantially the same electrical insulation effect, this metal contact element reduces thermal resistance by dissipating heat.

[0021] Furthermore, the first metal contact element directly contacts the dielectric material layer. In this case, direct contact eliminates the need for additional bonding materials such as adhesives or thermal paste. Direct contact achieves a lower component height, and especially compared to rigid welded connections, the pressure acting on the dielectric material layer is significantly reduced.

[0022] Another embodiment proposes that the first force is transmitted to the power semiconductor element via a first bus. This bus, also known as a busbar, is made of copper, for example. Specifically, the bus is arranged substantially vertically on the power semiconductor element, thus the electric field lines within the power semiconductor element remain unchanged, which has a positive impact on the electrical characteristics during operation. This bus offers improved reliability and a longer lifespan, particularly compared to bonded connections. Since both power transmission and electrical connection are achieved via the bus, no additional components are required, thus saving structural space and cost.

[0023] Another embodiment proposes that a dielectric material layer creates an adhesive bond between the surfaces of the power semiconductor element and the cooling element. This adhesive bond can be created, for example, via a dielectric material layer comprising an organic material such as polyamide. Improved reliability and lifespan of the power semiconductor module are achieved through adhesive bonding, in addition to force-fit connections.

[0024] Another embodiment proposes that the power semiconductor module has at least two power semiconductor elements, each of which is provided with a dedicated dielectric material layer. For example, a half-bridge is constructed from two power semiconductor elements, each of which is provided with a dedicated dielectric material layer. In particular, with a very thin dielectric material layer, for example, with a maximum thickness of 400 μm, the inherent stress is significantly reduced in the case of a single dielectric material layer.

[0025] Another embodiment proposes that at least one second metal contact element is planarly connected to the power semiconductor on the side facing away from the electrical material layer, wherein the first bus is in direct contact with the second metal contact element, and wherein a first force is applied to the second metal contact element via the first bus. The second metal contact element is designed, for example, as a small copper or molybdenum plate with a thickness of 25 μm to 250 μm, and protects the power semiconductor from mechanical damage or destruction caused by the first bus.

[0026] Another embodiment proposes that the second metal contact element is mateably connected to the power semiconductor material. This mate connection is achieved, for example, by welding or sintering. The mate connection achieves optimal electrical and thermal connectivity between the contact element and the power semiconductor element.

[0027] Another embodiment proposes that the first busbar and the second metal contact element are force-fitted together. For example, the first busbar is pressed against the second metal contact element via a housing cover, thereby creating a thermally and electrically conductive connection. This connection is detachable and easy to manufacture.

[0028] Another embodiment proposes that the control contacts (particularly the gate contacts) of the power semiconductor are connected to a third metal contact element via a bonding connection, wherein the third metal contact element is forcefully connected to the cooling element by means of a second force acting perpendicular to the surface of the cooling element. Since such control contacts (such as the gate contacts of an IGBT) have a much smaller area, particularly compared to current-carrying emitter or collector contacts, they are manufactured via conventional bonding connections for cost and ease of production. The third metal contact element is particularly designed as a small copper or molybdenum plate with a thickness of 25 μm to 250 μm, and, for example, short bonding line lengths can be achieved.

[0029] Another embodiment proposes that the second force acts on the third metal contact element via a second bus. For example, the bus is made of copper. Specifically, the bus is arranged substantially vertically on the third metal contact element, which has a positive impact on the electrical characteristics during operation. This bus offers improved reliability and a longer service life, particularly compared to bonded connections. Since both power transmission and electrical connection are achieved via the bus, no additional components are required, thus saving structural space and cost.

[0030] Another embodiment proposes forming a power semiconductor element by creating a material-fit connection between a power semiconductor and a lead frame. The lead frame includes a first metal contact element and a third metal contact element connected to the first metal contact element. The power semiconductor element contacts a dielectric material layer via the lead frame. A bonding connection is established between the control contacts of the power semiconductor, particularly the gate contacts, and the third metal contact element of the lead frame. The first and third metal contact elements are respectively fixed by a force acting perpendicular to the surface of a cooling element, and the connection between the first and third metal contacts of the lead frame is disengaged. In this case, the lead frame should be understood as a structured small metal plate, wherein the structure is produced, for example, by stamping or laser cutting. The lead frame includes a first metal contact element and a third metal contact element, which are interconnected by at least one metal tab, wherein the tab width is narrower than the width of the first and third metal contact elements. At least one tab between the first and third metal contact elements is cut, particularly by laser or by mechanical processing (e.g., cutting). Since the first and third metal contact elements are fixed by force during production before at least one tab is cut off, this production method is both simple and reliable. Attached Figure Description

[0031] The present invention will now be described and explained in more detail with reference to the embodiments shown in the accompanying drawings.

[0032] The diagram shows:

[0033] Figure 1 A schematic diagram of a first embodiment of a power semiconductor module is shown.

[0034] Figure 2 A schematic diagram of a second embodiment of the power semiconductor module is shown.

[0035] Figure 3 A schematic diagram of a third embodiment of a power semiconductor module is shown.

[0036] Figure 4 A schematic diagram of a fourth embodiment of a power semiconductor module is shown.

[0037] Figure 5 A schematic diagram of a fifth embodiment of a power semiconductor module is shown.

[0038] Figure 6 A schematic diagram of a sixth embodiment of a power semiconductor module is shown, and

[0039] Figure 7 A schematic diagram of a method for manufacturing a power semiconductor module is shown. Detailed Implementation

[0040] The embodiments explained below are preferred embodiments of the present invention. In the embodiments, the described portions of each embodiment represent various features of the invention that are considered independently of each other, and each also independently improves the invention and is therefore considered, individually or in combination as shown, as part of the invention. Furthermore, the described embodiments can be supplemented by other features of the invention already described.

[0041] The same reference symbols have the same meaning in different figures.

[0042] Figure 1 A schematic diagram of a first embodiment of a power semiconductor module 2 having a power semiconductor element 4, the power semiconductor element having a power semiconductor 6 and a dielectric material layer 8, the dielectric material layer being electrically and thermally connected to a cooling element 10. The cooling element 10 is particularly designed as a cooling body, which is made of, for example, aluminum and / or copper and is suitable for natural convection and / or forced air cooling. The dielectric material layer 8 is made of a ceramic material (e.g., aluminum nitride or alumina) or an organic material (e.g., polyamide) and is planarly located on the surface 11 of the cooling element 10. For example, the thickness d of the dielectric material layer is from 825 μm to 400 μm, particularly from 50 μm to 250 μm. The power semiconductor element 4 is thus electrically and thermally connected to the surface 11 of the cooling element 10 via the dielectric material layer 8. In particular, the dielectric material layer 8 is floated onto the surface 11 of the cooling element 10 by means of thermal paste 12. The thermal paste 12 is applied as thinly as possible. For example, a thermal paste 12 with very small particles is used, particularly with a particle size in the range of 0.04 μm to 4 μm. The surface 11 of the cooling element 10 defines the xy plane and the z direction.

[0043] The power semiconductor 6 is designed as an IGBT, for example, and has a collector contact C on the side 14 facing the dielectric material layer 8. The collector contact C is material-fitted to a first metal contact element 16, which is made of, for example, copper. The material-fitted connection is achieved via a conductive and thermally conductive connecting material 18, for example, by soldering or sintering. The power semiconductor element 4 is floating on the dielectric material layer 8 via the first metal contact element 6, wherein an electrically insulating and thermally conductive connection is formed between the first metal contact element 16 and the dielectric material layer 8 by thermal paste 12.

[0044] For example, a power semiconductor 6 implemented as an IGBT has an emitter contact E and a gate contact G on the side 20 away from the dielectric material layer 8, wherein a second metal contact element 22, for example made of copper, is material-fitted to the emitter contact E of the power semiconductor 6. This material-fitted connection is achieved via a conductive and thermally conductive connecting material 18, for example by welding or sintering. A first force F1 is transmitted to the second metal contact element 22 via a first bus 24 arranged perpendicular to the xy plane. The first force F1 presses the power semiconductor element 4 onto the dielectric material layer 8, and the dielectric material layer 8 onto the surface 11 of the cooling element 10, so that the power semiconductor element 4 is forcefully connected to the dielectric material layer 8 and the dielectric material layer 8 is forcefully connected to the cooling element 10.

[0045] The third metal contact element 26 is connected to the first metal contact element 16 via (particularly adhesive) insulator 28, particularly via an adhesive connection, wherein the gate contact G of the power semiconductor 4 is in contact with the third metal contact element 26 via a bonding connection 30. Furthermore, the third metal contact element 26 is pressed against the first metal contact element 16 by means of a second force F2 transmitted via the second bus 32 and acting parallel to the first force F1.

[0046] Figure 2 A schematic diagram of a second embodiment of the power semiconductor module 2 is shown. A third metal contact element 26 is pressed onto the dielectric material layer 8 via a second busbar 32 using a second force F2, wherein an electrically insulating and thermally conductive connection is established between the third metal contact element 26 and the dielectric material layer 8 by thermal paste 12. Figure 2 Other design options for medium-power semiconductor module 2 correspond to Figure 1 The design scheme in the middle.

[0047] Figure 3 A schematic diagram of a third embodiment of the power semiconductor module 2 is shown. The dielectric material layer 8 is in direct contact with the surface 11 of the cooling element 10. In this context, direct contact does not include additional connecting components such as adhesives, solders, thermal pastes, etc. Furthermore, the first metal contact element 16 of the power semiconductor element 4 is in direct contact with the dielectric material layer 8. The dielectric material layer 8 can be designed as an adhesive insulator made of an organic material (e.g., polyamide).

[0048] An adhesive connection between the power semiconductor element 4 and the surface 11 of the cooling element 10 can be achieved through this adhesive insulator. By means of pressing with the busbars 24 and 32, the power semiconductor element 4 is connected to the surface 11 of the cooling element 10 in an electrically insulating and thermally conductive manner through the dielectric material layer 8. Figure 3 Further design options for medium-power semiconductor module 2 correspond to Figure 3 The design scheme in the middle.

[0049] Figure 4 A schematic diagram of a fourth embodiment of a power semiconductor module 2 is shown, which exemplarily has two power semiconductor elements 4. The two power semiconductor elements 4 are assigned a common dielectric material layer 8. The power semiconductor module 2 can also have more than two power semiconductor elements 4, which are assigned a common dielectric material layer 8.

[0050] Each power semiconductor element 4 is floating on a common dielectric layer 8 via a first metal contact element 16. An electrically insulating and thermally conductive connection is formed between the respective first metal contact element 16 and the common dielectric layer 8 using thermal paste 12. Furthermore, the common dielectric layer 8 is floating on the surface 11 of the cooling element 10 via the thermal paste 12. By pressing with busbars 24 and 32, the power semiconductor elements 4 are electrically and thermally connected to the surface 11 of the cooling element 10 via the common dielectric layer 8.

[0051] The first metal contact element 16 of the corresponding power semiconductor element 4 can also be in direct contact with the common dielectric material layer 8, and / or the common dielectric material layer 8 can also be in direct contact with the surface 11 of the cooling element 10, wherein an electrically insulating and thermally conductive connection is established by pressing. Figure 4 Other design options for medium-power semiconductor module 2 correspond to Figure 2 The design scheme in the middle.

[0052] Figure 5 A schematic diagram of a fifth embodiment of a power semiconductor module 2 is shown, which exemplarily has two power semiconductor elements 4. Each of the two power semiconductor elements 4 is provided with a dedicated dielectric material layer 8. The power semiconductor module 2 can also have more than two power semiconductor elements 4, each of which is correspondingly provided with a dedicated dielectric material layer 8. Figure 5 Other design options for medium-power semiconductor module 2 correspond to Figure 4 The design scheme in the middle.

[0053] Figure 6 A schematic diagram of a sixth embodiment of the power semiconductor module 2 is shown, which exemplarily has two power semiconductor elements 4. Each of the two power semiconductor elements 4 is provided with a dedicated dielectric material layer 8, wherein a first metal contact element 16 of the corresponding power semiconductor element 4 directly contacts the dedicated dielectric material layer 8. In addition, the dielectric material layer 8 is in direct contact with the surface 11 of the cooling element 10, respectively. Figure 6 Other design options for medium-power semiconductor module 2 correspond to Figure 3 The design scheme in the middle.

[0054] Figure 7A schematic diagram of a method for manufacturing a power semiconductor module 2 is shown. A dielectric material layer 8 is planarly contacted with the surface 11 of a cooling element 10. Furthermore, to form a power semiconductor element 4, the collector contact C of a power semiconductor 6, designed as an IGBT, is material-fitted to a lead frame 34, wherein the lead frame 34 includes a first metal contact element 16 and a third metal contact element 26 connected to the first metal contact element 16. Additionally, a second metal contact element 22 is material-fitted to the emitter contact E of the power semiconductor 6, and the power semiconductor element 4 is contacted on the dielectric material layer 8 via the lead frame 34.

[0055] In a subsequent step, a bonding connection 30 is formed between the gate contact G, the power semiconductor 6, and the third metal contact element 26 of the lead frame 34. The first metal contact element 16 and the third metal contact element 26 are fixed by forces F1 and F2 acting perpendicular to the surface 11 of the cooling element 10, respectively.

[0056] In a subsequent step, the connection between the first metal contact element 16 and the third metal contact element 26 of the lead frame 34 is separated. This separation is achieved, for example, by means of a laser or by machining. Figure 7 Other embodiments of the power semiconductor module 2, for example, correspond to Figure 2 The embodiments described in this paper are implemented similarly to other embodiments.

[0057] In summary, the present invention relates to a power semiconductor module 2 having at least one power semiconductor element 4. To reduce the structural space required for the power semiconductor module 2 and improve its lifespan, it is proposed to connect at least one power semiconductor element 4 to a cooling element 10 in an electrically insulating and thermally conductive manner via a dielectric material layer 8, wherein the dielectric material layer 8 is laid flat on the surface 11 of the cooling element 10 and is forcefully connected to the cooling element 10 by a first force F1 acting perpendicular to the surface 11 of the cooling element 10.

Claims

1. A power semiconductor module (2) having at least one power semiconductor element (4). in, The at least one power semiconductor element (4) is connected to the cooling element (10) in an electrically insulating and thermally conductive manner via a dielectric material layer (8). The dielectric material layer (8) is placed in a planar manner on the surface (11) of the cooling element (10), and The dielectric material layer is forcefully connected to the cooling element (10) by means of a first force (F1) acting perpendicular to the surface (11) of the cooling element (10). The dielectric material layer (8) is in direct contact with the cooling element (10). The power semiconductor element (4) includes a power semiconductor (6), which is materially connected to a first metal contact element (16) on the side (14) facing the dielectric material layer (8). The power semiconductor element (4) is placed on the dielectric material layer (8) via the first metal contact element (16), and The power semiconductor element is connected to the dielectric material layer (8) by the first force (F1). The first metal contact element (16) is in direct contact with the dielectric material layer (8). The control contacts of the power semiconductor (6) are connected to the third metal contact element (26). The third metal contact element (26) is forcefully connected to the cooling element (10) by means of a second force (F2) acting perpendicular to the surface (11) of the cooling element (10).

2. The power semiconductor module (2) according to claim 1, wherein, The first force (F1) is transmitted to the power semiconductor element (4) via the first bus (24).

3. The power semiconductor module (2) according to claim 1, wherein, The dielectric material layer (8) creates an adhesive bond between the power semiconductor element (4) and the surface (11) of the cooling element (10).

4. The power semiconductor module (2) according to claim 1, having at least two power semiconductor elements (4), wherein, Each of at least two of the power semiconductor elements (4) is provided with a dedicated dielectric material layer (8).

5. The power semiconductor module (2) according to any one of claims 1 to 4. in, At least one second metal contact element (22) is connected to the power semiconductor (6) on the side (20) of the power semiconductor (6) opposite to the dielectric material layer (8) with a plane. The first busbar (24) is in direct contact with the second metal contact element (22). The first force (F1) is applied to the second metal contact element (22) via the first busbar (24).

6. The power semiconductor module (2) according to claim 5, wherein, The second metal contact element (22) is connected in a mating manner with the power semiconductor (6) material.

7. The power semiconductor module (2) according to claim 5, wherein, The first busbar (24) is forcefully connected to the second metal contact element (22).

8. The power semiconductor module (2) according to claim 1, wherein, The gate contact (G) of the power semiconductor (6) is connected to the third metal contact element (26).

9. The power semiconductor module (2) according to claim 1, wherein, The control contacts of the power semiconductor (6) are connected to the third metal contact element (26) via a bonding connection (30).

10. The power semiconductor module (2) according to claim 1, wherein, The second force (F2) acts on the third metal contact element (26) via the second busbar (32).

11. A power converter having at least one power semiconductor module (2) according to any one of claims 1 to 10.

12. A method for manufacturing a power semiconductor module (2) according to any one of claims 1 to 10, in, The dielectric material layer (8) is in contact with the surface (11) of the cooling element (10) in a planar manner. The power semiconductor element (4) is in contact with the dielectric material layer (8), and A force-fitting connection with the cooling element (10) is generated by a first force (F1) acting perpendicular to the surface (11) of the cooling element (10).

13. The method according to claim 12, in, The power semiconductor element (4) is formed by creating a material connection between the power semiconductor (6) and the lead frame (34). The lead frame (34) includes a first metal contact element (16) and a third metal contact element (26), wherein the third metal contact element is connected to the first metal contact element (16). The power semiconductor element (4) is in contact with the dielectric material layer (8) via the lead frame (34). A bonding connection (30) is formed between the control contact of the power semiconductor (6) and the third metal contact element (26) of the lead frame (34). The first metal contact element (16) and the third metal contact element (26) are fixed by forces (F1, F2) acting perpendicular to the surface (11) of the cooling element (10), and The connection between the first metal contact element (16) and the third metal contact element (26) of the lead frame (34) is separated.

14. The method according to claim 13, wherein, A bonding connection (30) is formed between the gate contact (G) of the power semiconductor (6) and the third metal contact element (26) of the lead frame (34).

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