An oscillator circuit

Abstract

The application discloses an oscillator circuit (800) and relates to the chip technical field, which can reduce the number of oscillators in a PLL, reduce the area of a radio frequency chip, and thus reduce the cost of the chip. The oscillator circuit (800) comprises a first oscillator, a second oscillator and a switch matrix, wherein: the first oscillator comprises a first transconductance amplifier (V1), a second transconductance amplifier (V2) and a first resonator; the second oscillator comprises a third transconductance amplifier (V3), a fourth transconductance amplifier (V4) and a second resonator; the first resonator comprises a first capacitive element (C1) and a first inductive element (801), the second resonator comprises a second capacitive element (C2) and a second inductive element (802), and the first inductive element (801) and the second inductive element (802) are coupled; and the switch matrix comprises a first switch (SW1), a second switch (SW2), a third switch (SW3) and a fourth switch (SW4). The switch matrix is coupled between the first transconductance amplifier (V1), the second transconductance amplifier (V2), the third transconductance amplifier (V3) and the fourth transconductance amplifier (V4). The switch matrix is used for changing the coupling coefficient of the first inductive element (801) and the second inductive element (802).

Description

TECHNICAL FIELD

[0001] The present application relates to the chip technical field, and particularly to an oscillator circuit. BACKGROUND

[0002] With the development and evolution of wireless communication, the communication protocols and frequency bands supported by terminal devices are increasing, which causes the frequency range covered by the oscillator in the phase-locked loop (PLL) in the radio frequency integrated circuit (RFIC) to increase continuously.

[0003] Since the greater the frequency coverage range of the oscillator is, the greater the power consumption of the oscillator is, and the greater the noise of the PLL output is, in order to achieve the noise performance required by the PLL under acceptable power consumption, usually, a PLL needs to integrate multiple oscillators to meet the frequency coverage, noise and power consumption requirements. Moreover, in order to support multiple communication modes, an RFIC integrates multiple PLLs, which causes the oscillator to occupy a considerable RFIC area, affecting the chip cost. SUMMARY

[0004] Embodiments of the present application provide an oscillator circuit, which can reduce the number of oscillators in the PLL, reduce the RFIC area, and thus reduce the chip cost.

[0005] To achieve the above object, the embodiments of the present application adopt the following technical solutions:

[0006] In a first aspect, an oscillator circuit is provided, which includes a first oscillator, a second oscillator and a switch matrix. The first oscillator includes a first transconductance amplifier, a second transconductance amplifier and a first resonator. The second oscillator includes a third transconductance amplifier, a fourth transconductance amplifier and a second resonator. The first resonator includes a first capacitive element and a first inductive element, and the second resonator includes a second capacitive element and a second inductive element. The first inductive element and the second inductive element are coupled. The switch matrix includes a first switch, a second switch, a third switch and a fourth switch. The first switch is coupled between the output terminal of the first transconductance amplifier and the output terminal of the third transconductance amplifier. The second switch is coupled between the output terminal of the first transconductance amplifier and the output terminal of the fourth transconductance amplifier. The third switch is coupled between the output terminal of the second transconductance amplifier and the output terminal of the third transconductance amplifier. The fourth switch is coupled between the output terminal of the second transconductance amplifier and the output terminal of the fourth transconductance amplifier. The switch matrix is used to change the coupling coefficient of the first inductive element and the second inductive element.

[0007] Therefore, the oscillator circuit provided in the application can realize the conversion of the frequency of the oscillator circuit by coupling two oscillators in the PLL through the switch matrix, and compared with the PLL system integrated with two or more oscillators, the oscillator circuit of the application can reduce the chip area and reduce the device loss. Moreover, the oscillator circuit of the application can also separate the mode switching module of the working frequency from the oscillation loop by coupling two oscillators through the switch matrix, which helps to maintain a high quality factor of the oscillation loop.

[0008] In a possible design, the switch matrix changes the coupling coefficient by controlling the relative current directions of the first inductor and the second inductor, where: the switch matrix is configured to control the coupling coefficient of the first inductor and the second inductor to be greater than zero when the relative current directions of the first inductor and the second inductor are the same, and the oscillator circuit works at a first frequency; and the switch matrix is configured to control the coupling coefficient of the first inductor and the second inductor to be less than zero when the relative current directions of the first inductor and the second inductor are opposite, and the oscillator circuit works at a second frequency, the second frequency being greater than the first frequency.

[0009] The oscillator circuit works at the first frequency, which can be considered as that the oscillator circuit works in a low-frequency mode, and the oscillator circuit works at the second frequency, which can be considered as that the oscillator circuit works in a high-frequency mode. Here, it is assumed that the inductance of the first inductor is L1, the inductance of the second inductor is L4, the capacitance of the first capacitor is C1, the capacitance of the second capacitor is C2, and the coupling coefficient is K, and then the working frequency F0sc of the oscillator circuit can be represented as: It can be concluded that F osc is greater than F osc when the coupling coefficient is greater than 0. That is, when the coupling coefficient is less than 0, the oscillator circuit works in the high-frequency mode, and when the coupling coefficient is greater than 0, the oscillator circuit works in the low-frequency mode.

[0010] In a possible design, the control signals of the first switch and the fourth switch are the same, and the control signals of the second switch and the third switch are the same.

[0011] In this way, when a group of switches with the same control signal are turned on, another group of switches with the same control signal can be turned off, and when different switch combinations are turned on, the current injection modes to the first oscillator and the second oscillator are different, so that the relative current directions between the inductors of the first oscillator and the second oscillator can be changed.

[0012] In a possible design, the first switch and the fourth switch are turned on, and the second switch and the third switch are turned off; the first switch and the fourth switch are turned off, and the second switch and the third switch are turned on.

[0013] In a possible design, when the first switch and the fourth switch are turned on, and the second switch and the third switch are turned off, the phase of the output terminal of the first transconductance amplifier and the output terminal of the third transconductance amplifier is the same, the phase of the output terminal of the second transconductance amplifier and the output terminal of the fourth transconductance amplifier is the same, and the relative current directions of the first inductive element and the second inductive element are the same; when the first switch and the fourth switch are turned off, and the second switch and the third switch are turned on, the phase of the output terminal of the first transconductance amplifier and the output terminal of the fourth transconductance amplifier is the same, the phase of the output terminal of the second transconductance amplifier and the output terminal of the third transconductance amplifier is the same, and the relative current directions of the first inductive element and the second inductive element are opposite.

[0014] That is, by controlling the turning on and turning off of different switch combinations, the relative current directions of the two inductive elements coupled to each other can be changed, so that the coupling coefficient between the inductive elements is changed, and the working frequency of the oscillator circuit is changed.

[0015] In a possible design, the first oscillator and the second oscillator are both differential signal structures; the first oscillator includes a first differential input terminal and a first differential output terminal, the first differential input terminal includes a first input terminal and a second input terminal, and the first differential output terminal includes a first output terminal and a second output terminal; the first input terminal is coupled to the input terminal of the first transconductance amplifier, the second input terminal is coupled to the input terminal of the second transconductance amplifier, the first output terminal is coupled to the output terminal of the first transconductance amplifier, and the second output terminal is coupled to the output terminal of the second transconductance amplifier; the second oscillator includes a second differential input terminal and a second differential output terminal, the second differential input terminal includes a third input terminal and a fourth input terminal, and the second differential output terminal includes a third output terminal and a fourth output terminal; the third input terminal is coupled to the input terminal of the third transconductance amplifier, the fourth input terminal is coupled to the input terminal of the fourth transconductance amplifier, the third output terminal is coupled to the output terminal of the third transconductance amplifier, and the fourth output terminal is coupled to the output terminal of the fourth transconductance amplifier.

[0016] In a possible design, the first inductive element includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal.

[0017] That is, the first inductive element and the second inductive element of the present application are both multi-port inductive elements. In addition, when a switch matrix is coupled between the first inductive element and the second inductive element of the present application, the first switch can be coupled between the output terminal of the first transconductance amplifier and the output terminal of the third transconductance amplifier, the second switch can be coupled between the extended terminal (the ninth terminal) of the output terminal of the first transconductance amplifier and the extended terminal (the eleventh terminal) of the output terminal of the fourth transconductance amplifier, the third switch can be coupled between the extended terminal (the twelfth terminal) of the output terminal of the second transconductance amplifier and the extended terminal (the tenth terminal) of the output terminal of the third transconductance amplifier, and the fourth switch can be coupled between the extended terminal (the twelfth terminal) of the output terminal of the second transconductance amplifier and the extended terminal (the eleventh terminal) of the output terminal of the fourth transconductance amplifier.

[0018] In a possible design, the first capacitive element is coupled between the first input terminal and the second input terminal, and the second capacitive element is coupled between the third input terminal and the fourth input terminal. It can be understood that the first capacitive element is in parallel with the first inductive element, and the second capacitive element is in parallel with the second inductive element.

[0019] In a possible design, the oscillator circuit further includes a third capacitive element and a fourth capacitive element, the third capacitive element is coupled between the first output terminal and the fourth output terminal, and the fourth capacitive element is coupled between the second output terminal and the third output terminal.

[0020] The phases at the two ends of the third capacitive element and the fourth capacitive element are also related to the on and off of the switch combination of the switch matrix, which makes the third capacitive element and the fourth capacitive element can be connected to the oscillator circuit or not connected to the oscillator circuit under the on and off of different switch combinations, so that a wider frequency range can be obtained when calculating the working frequency of the oscillator circuit.

[0021] For example, it is assumed here that the inductance of the first inductive element is L1, the inductance of the second inductive element is L4, the capacitance of the first capacitive element is C1, the capacitance of the second capacitive element is C2, the capacitance of the third capacitive element is C3, the capacitance of the fourth capacitive element is C4, and the coupling coefficient is K. In the case that the third capacitive element and the fourth capacitive element are also connected to the oscillator circuit, the working frequency F of the oscillator circuit osc may be expressed as:

[0022] It can be appreciated that the third and fourth capacitive elements, when connected to the oscillator circuit, can cause the oscillator circuit to operate at a lower operating frequency relative to Fosc, which can further extend the operating frequency range of the oscillator circuit 800.

[0023] In one possible design, the main coils of the first and second inductive elements each include multiple metal layers. For example, the multiple metal layers can include a lower metal layer, an upper metal layer, and a top metal layer.

[0024] In one possible design, the first and second inductive elements overlap each other. The overlapping area can be arranged with a switch matrix. By changing the on and off states of the switches in the switch matrix, the polarity of the mutual coupling between the first and second inductive elements can be changed, which can change the relative current directions of the first and second inductive elements. The change in the relative current directions can cause the coupling coefficient to be greater than 0 or less than 0. The size of the overlapping area can be flexibly designed according to design requirements. In the case where the coupling coefficient is greater than 0 or less than 0, different sizes of the overlapping area can correspond to different absolute values of the coupling coefficient, thereby obtaining operating frequencies of multiple oscillator circuits. For example, when the size of the overlapping area is large, the absolute value of the coupling coefficient is large, and the operating frequency of the oscillator circuit is large. When the size of the overlapping area is small, the absolute value of the coupling coefficient is small, and the operating frequency of the oscillator circuit is small.

[0025] In one possible design, the first inductive element includes multiple conductive segments that form an 8-shaped physical loop in a layer-hopping crossing manner. The “8-shaped” can be understood as including two loop-shaped or approximately loop-shaped (e.g., polygonal) geometric shapes that form an 8 shape and are both axisymmetric structures. The two geometric shapes can be closed shapes or non-closed shapes. Each conductive segment can be understood as an inductor with two terminals, e.g., each conductive segment can be a coil with two terminals. Similarly, the second inductive element can also be an 8-shaped physical loop. The 8-shaped physical loop can provide good anti-interference between inductors in the 8-shaped physical loop. The “layer-hopping crossing manner” can be understood by way of example as follows: the multiple conductive segments can be routed on a top metal layer and a next-top metal layer, or on a top metal layer and a rewiring layer. For example, the 8-shaped physical loop can be divided into a non-crossing portion and two crossing portions when routed. The non-crossing portion and one of the two crossing portions can be routed on a top metal layer, and the other crossing portion can be routed on a next-top metal layer or a rewiring layer. The multiple conductive segments can also be routed on other metal layers.

[0026] Secondly, an oscillator circuit is provided, including a first oscillator, a second oscillator, and a switching matrix. The switching matrix changes the coupling coefficient between a first inductor element of the first oscillator and a second inductor element of the second oscillator by controlling the relative current directions of the first oscillator and the second oscillator. Specifically: when the relative current directions of the first oscillator and the second oscillator are the same, the coupling coefficient is greater than zero; when the relative current directions of the first oscillator and the second oscillator are opposite, the coupling coefficient is less than zero. The beneficial effects of the second aspect are described in the first aspect.

[0027] In one possible design, the first oscillator includes a first transconductance amplifier, a second transconductance amplifier, and a first resonator; the second oscillator includes a third transconductance amplifier, a fourth transconductance amplifier, and a second resonator; the first resonator includes a first capacitor element and a first inductor element, and the second resonator includes a second capacitor element and a second inductor element, with the first and second inductor elements coupled; the switch matrix includes a first switch, a second switch, a third switch, and a fourth switch; the first switch is coupled to the output terminals of the first and third transconductance amplifiers; the second switch is coupled to the output terminals of the first and fourth transconductance amplifiers; the third switch is coupled to the output terminals of the second and third transconductance amplifiers; and the fourth switch is coupled to the output terminals of the second and fourth transconductance amplifiers.

[0028] In one possible design, when the first and fourth switches are on, the second and third switches are off; when the first and fourth switches are off, the second and third switches are on.

[0029] In one possible design, when the first and fourth switches are on and the second and third switches are off, the outputs of the first and third transconductance amplifiers are in phase, the outputs of the second and fourth transconductance amplifiers are in phase, and the relative current directions of the first and second inductors are the same. When the first and fourth switches are off and the second and third switches are on, the outputs of the first and fourth transconductance amplifiers are in phase, the outputs of the second and third transconductance amplifiers are in phase, and the relative current directions of the first and second inductors are opposite.

[0030] In a possible design, the first oscillator and the second oscillator are both differential signal structures; the first oscillator includes a first differential input and a first differential output, the first differential input includes a first input and a second input, and the first differential output includes a first output and a second output; the first input is coupled with an input of the first trans-impedance amplifier, the second input is coupled with an input of the second trans-impedance amplifier, the first output is coupled with an output of the first trans-impedance amplifier, and the second output is coupled with an output of the second trans-impedance amplifier; the second oscillator includes a second differential input and a second differential output, the second differential input includes a third input and a fourth input, and the second differential output includes a third output and a fourth output; the third input is coupled with an input of the third trans-impedance amplifier, the fourth input is coupled with an input of the fourth trans-impedance amplifier, the third output is coupled with an output of the third trans-impedance amplifier, and the fourth output is coupled with an output of the fourth trans-impedance amplifier.

[0031] In a possible design, the first inductive element includes a first input, a second input, a first output, and a second output; and the second inductive element includes a third input, a fourth input, a third output, and a fourth output.

[0032] In a possible design, the first inductive element includes a first input, a second input, a first output, and a second output; and the second inductive element includes a third input, a fourth input, a third output, and a fourth output.

[0033] In a possible design, the oscillator circuit further includes a third capacitive element and a fourth capacitive element, the third capacitive element is coupled between the first output and the fourth output, and the fourth capacitive element is coupled between the second output and the third output.

[0034] In a possible design, the main coils of the first inductive element and the second inductive element each include a plurality of metal layers.

[0035] In a possible design, the first inductive element and the second inductive element overlap each other.

[0036] In a possible design, the first inductive element includes a plurality of conductive segments, and the plurality of conductive segments form an 8-shaped physical loop.

[0037] The third aspect further provides a PLL system, which includes the oscillator circuit according to the first aspect and / or the second aspect.

[0038] The fourth aspect further provides an electronic device, which can include a processor and a transceiver, the processor and the transceiver are coupled, and the transceiver includes the oscillator circuit according to any possible design of the first aspect and / or the second aspect.

[0039] In one possible design, the apparatus further includes a memory, and the processor and the memory are coupled with the transceiver. BRIEF DESCRIPTION OF DRAWINGS

[0040] Figure 1 A structure schematic diagram of a PLL system provided for an embodiment of the present application;

[0041] Figure 2 A structure schematic diagram of a differential VCO provided for an embodiment of the present application;

[0042] Figure 3 An exemplary layout of an inductive element provided for an embodiment of the present application;

[0043] Figure 4 An ideal schematic diagram of an inductive element in a resonant circuit and a capacitive element coupled in parallel with the inductive element provided for an embodiment of the present application;

[0044] Figure 5 An equivalent circuit schematic diagram of a VCO provided for an embodiment of the present application;

[0045] Figure 6 A structure schematic diagram of a PLL system provided for an embodiment of the present application;

[0046] Figure 7 A structure schematic diagram of a VCO provided for an embodiment of the present application;

[0047] Figure 8 A structure schematic diagram of an oscillator circuit provided for an embodiment of the present application;

[0048] Figure 9 An exemplary structure of a coupling mode of a switch matrix provided for an embodiment of the present application;

[0049] Figure 9A A structure schematic diagram of an oscillator circuit provided for an embodiment of the present application;

[0050] Figure 10 A structure schematic diagram of an oscillator circuit provided for an embodiment of the present application;

[0051] Figure 11 A phase contrast schematic diagram of an output end of a transconductance amplifier provided for an embodiment of the present application;

[0052] Figure 12 A structure schematic diagram of an oscillator circuit provided for an embodiment of the present application;

[0053] Figure 13 A structure schematic diagram of an oscillator circuit provided for an embodiment of the present application;

[0054] Figure 14A structural schematic diagram of an oscillator circuit provided by an embodiment of the present application;

[0055] Figure 15 An exemplary layout schematic diagram of a first inductive element and a second inductive element provided by an embodiment of the present application;

[0056] Figure 16 A schematic diagram of a first inductive element and a second inductive element coupled to each other through a switch matrix provided by an embodiment of the present application;

[0057] Figure 17 A schematic diagram of different on-switch combinations and the current direction of the inductor and the coupling coefficient when a first inductive element and a second inductive element are coupled to each other provided by an embodiment of the present application;

[0058] Figure 18 An ideal schematic diagram of an oscillator circuit provided by an embodiment of the present application;

[0059] Figure 19 A coupling schematic diagram when a first inductive element and a second inductive element are in a physical loop in the shape of an 8 provided by an embodiment of the present application;

[0060] Figure 20 An ideal schematic diagram of an oscillator circuit provided by an embodiment of the present application;

[0061] Figure 21 A circuit schematic diagram of a class AB oscillator provided by an embodiment of the present application;

[0062] Figure 22 A circuit schematic diagram of a class AB oscillator provided by an embodiment of the present application;

[0063] Figure 23 A circuit schematic diagram of a class AB oscillator provided by an embodiment of the present application;

[0064] Figure 24 A structural schematic diagram of an electronic device provided by an embodiment of the present application;

[0065] Figure 25 A structural schematic diagram of a terminal device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0066] The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. In the description of the embodiments of the present application, unless otherwise specified, " / " represents the meaning of or, for example, A / B can represent A or B; the "and / or" herein only describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. In addition, in the description of the embodiments of the present application, "multiple" means two or more than two.

[0067] Hereinafter, the terms "first" and "second" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with "first" and "second" can explicitly or implicitly include one or more features. In the description of the embodiments, unless otherwise specified, the meaning of "multiple" is two or more than two.

[0068] The embodiments of the present application can be used in the PLL of a radio frequency chip.

[0069] As shown in Figure 1 , the PLL system can include a phase detector (PD), a loop filter (LPF), an oscillator, and a frequency divider, etc. The PD can be used to detect the phase difference of the input signal and the output signal, and convert the detected phase difference signal into a voltage signal output. After the signal is filtered by the LPF, a control voltage of the oscillator is formed, and the frequency of the oscillator output signal is controlled.

[0070] The PD therein can also be replaced by a combination of a phase frequency detector (PFD) and a charge pump (CP), and the oscillator can be a voltage controlled oscillator (VCO) or a digitally controlled oscillator (DCO) or other types.

[0071] Taking the VCO as an example:

[0072] The PFD is used to perform discrete-time sampling on the phase difference between the reference frequency of the input PLL and the feedback frequency of the frequency divider, to obtain a discrete-time phase difference signal, i.e., the result of phase frequency detection, and input the result of phase frequency detection into the CP;

[0073] The CP is used to convert the discrete-time phase difference signal sampled by the PFD into a discrete-time charge signal;

[0074] The LPF is used to integrate and hold or filter the discrete-time charge signal output by the CP, and output a voltage signal;

[0075] The VCO is used to obtain a desired signal frequency and phase according to the voltage signal output by the LPF;

[0076] The frequency divider comprises a pre-divider 1 / M, a post-divider 1 / P and a feedback divider 1 / N, the pre-divider 1 / M is used to divide the input reference frequency and input the PFD, the post-divider 1 / P is used to divide the frequency of the oscillator and output, and the feedback divider 1 / N is used to divide the feedback frequency and input the PFD;

[0077] Reference Figure 1 The output end of the pre-divider 1 / M is connected with one input end of the PFD, the output end of the PFD is connected with the input end of the CP, the output end of the CP is connected with the input end of the LPF, the output end of the LPF is connected with the input end of the oscillator, the output end of the oscillator is connected with the input end of the post-divider 1 / P, the output end of the oscillator is also connected with the input end of the feedback divider 1 / N, and the output end of the feedback divider 1 / N is connected with the other input end of the PFD.

[0078] The PLL system can be applied to clock tree and frequency synthesizer technologies. For example, in the clock tree technology, the digital circuit clock, whether synchronous circuit or asynchronous circuit, needs stable clock signals for transmission, operation and storage of digital information, and the PLL system can be used to generate stable clock signals; in the frequency synthesizer in the wireless communication system, the signal is transmitted according to a specific frequency, and the PLL system can be used to generate accurate clock signals.

[0079] The PLL system is widely used in various chips of base station equipment or terminal equipment, such as processor chips and radio frequency chips.

[0080] The oscillator in the PLL system plays a key role in the communication system, and provides the required periodic signal for timing in the digital circuit and frequency conversion in the RF circuit. The oscillator can be implemented as a separate module from other circuits or integrated into an application specific integrated circuit (ASIC) for use in devices such as, but not limited to, mobile phones, base stations and almost every communication device.

[0081] First, the structure of the oscillator will be introduced. Referring to Figure 2 , Figure 2A schematic diagram of a differential VCO is shown. The VCO may include two transconductance amplifiers and a resonant circuit 205. One transconductance amplifier may include a PMOS transistor 201 and an NMOS transistor 202, and the other transconductance amplifier may include a PMOS transistor 203 and an NMOS transistor 204. The sources of PMOS transistors 201 and 203 are coupled to the positive power rail (VDD), and their gates are coupled to the gates of NMOS transistors 202 and 204. The gates of PMOS transistors 201 and 202 are coupled to terminal VG1 of the resonant circuit 205. The gates of PMOS transistors 203 and 204 are coupled to terminal VG2 of the resonant circuit 205. The sources of NMOS transistors 202 and 204 are coupled to the negative power rail (ground), and their drains are coupled to the drains of PMOS transistors 201 and 203. Terminal VD1 of resonant circuit 205 is coupled to the drain of PMOS transistor 201 and the drain of NMOS transistor 202, and terminal VD2 of resonant circuit 205 is coupled to the drain of PMOS transistor 203 and the drain of NMOS transistor 204.

[0082] If Figure 2 The structure of the differential VCO shown is coupled to Figure 1 In the PLL system shown, two series-connected capacitors can be coupled between the input terminals VG1 and VG2 of the differential structure in the resonant circuit, and the output terminal of the LPF can be coupled between the two series-connected capacitors. The output terminals VD1 and VD2 of the differential structure are then coupled to the buffer (BUF) circuit, and the output terminal of the BUF circuit is further coupled to the input terminal of the frequency divider.

[0083] The resonant circuit 205 may include a capacitor and an inductor, the inductor having the aforementioned terminals VG1, VG2, VD1, and VD2. An example layout of the inductor may be as follows: Figure 3 As shown. Figure 4 A schematic diagram of the inductor and the capacitor C coupled in parallel with the inductor in the resonant circuit 205 is shown. Figure 3 Inductor 300 and Figure 4 The equivalent of the 400 inductor in the middle, Figure 3 The conductive segments VG1-V5a, VG2-V5b, and V5a-V5b of the inductor element 300 correspond to respectively Figure 4 The diagram shows inductors La, Lb, and Lc. Combined with... Figure 3 and Figure 4 , Figure 2 The equivalent circuit of the VCO shown can also be as follows: Figure 5 As shown. Figure 2 The PMOS transistor 201 and NMOS transistor 202 in the diagram can be corresponding to... Figure 5 The first transconductance amplifier V1 in the middle,Figure 2 PMOS transistor 203 and NMOS transistor 204 in FIG. 2 correspond to Figure 5 second transconductance amplifier V2 in FIG. 2. Figure 4 and Figure 5 The VCO structure shown in FIG. 2 can reduce the phase noise of the oscillator circuit and improve the performance of the oscillator circuit. However, the VCO structure has a small operating frequency range.

[0084] The inductive element 300 includes one or more inductor segments (e.g., VG1-V5a, VG2-V5b, and V5a-V5b) that form a physical loop. As used herein, the term “physical loop” refers to a closed or approximately closed geometric shape having a start point and an end point that are co-located or immediately adjacent to each other and including at least one convex portion that defines an interior space (e.g., a ring polygon or a segment of a ring polygon) within the convex portion. Thus, a physical loop is different from an “electrical loop,” which generally refers to a closed path of any shape through which current can flow.

[0085] The physical loop is preferably symmetrical and is shown as generally octagonal when in the inductive element 300. Those skilled in the art will recognize that the physical loop can include other symmetrical and non-symmetrical shapes (e.g., rectangular, square, hexagonal, etc.) without departing from the scope of the present application. The inductive element 300 is tapped at V5a and V5b by electrical connections with segments VD1-V5b and VD2-V5a, forming electrical loops that are disposed within the interior space formed by the physical loop (including La, Lb, and Lc).

[0086] The capacitive element C can be embodied as a PMOS varactor diode, an NMOS varactor diode, a metal-insulator-metal (MIM) device, or any other suitable capacitive element. In a silicon process, two types of varactor diodes can be used, namely a reverse-biased pn-junction type diode or a MOS capacitor varactor diode. The MOS capacitor varactor diode can include a MOS transistor with the drain, source, and body taps coupled together and a capacitance adjusted based on a voltage applied between the body and gate taps. Those skilled in the art will recognize other alternative elements for the capacitive element C without departing from the scope of the present application.

[0087] The quality factor (Q) of the resonant circuit 205 depends on the inductive element 300 having a low resistance. The resistance of the inductive element 300 is minimized by using a thick / wide metallization process, such as but not limited to aluminum, copper, gold, or other suitable material, to reduce the series resistance. The inductive element 300 preferably includes a high dielectric substrate material such as silicon, gallium arsenide, or other suitable material. Surface micromachining techniques can be used to create an air gap between the inductor and the substrate to further improve the dielectric properties.

[0088] Based on the above understanding of the circuit structure of the VCO, generally, as shown in Figure 6 , a plurality of VCOs are integrated in a PLL system, and the plurality of VCOs are coupled with a BUF circuit to meet the requirements of frequency coverage, noise, and power consumption. However, the integration of the plurality of VCOs increases the area of the PLL and the cost of the chip. Moreover, the inductor integrated in the VCO requires a large avoidance space, which increases the complexity of the wiring of the chip. In addition, the frequency coverage ranges of the VCOs need to overlap each other to cover the process deviation, which reduces the quality factor of the VCO and increases the power consumption. In another kind of PLL system, the design of the VCO can be as shown in Figure 7 , and a switch can be connected in series with each inductor segment. By switching the switch, the inductor segment connected to the VCO is different, and the operating frequency of the corresponding VCO is different. However, this design deteriorates the quality factor and the phase noise of the inductor because a switch is connected in series with each inductor. Moreover, the equivalent parallel resistance of the resonant network is reduced, thereby increasing the power consumption of the VCO.

[0089] Therefore, the present application proposes to improve the oscillator circuit. The PLL system can integrate one oscillator circuit, which can cover a wider frequency range than the traditional oscillator structure, thereby helping to reduce the chip area and thus reducing the chip cost and power consumption. The basic principle can be as follows: by coupling a current direction control module between two independent oscillators, the current direction control module can be implemented by using a switch matrix. By controlling the conduction and non-conduction of different switch combinations in the switch matrix, the phase between the terminal coupled with the oscillator by the conduction switch can be the same, thereby changing the relative current direction of the resonant loop of the two independent oscillators, changing the polarity of the interaction between the two inductive elements coupled in the two oscillators, changing the coupling coefficient between the inductive elements, and achieving the purpose of expanding the frequency coverage range of the oscillator.

[0090] Based on this, the present application proposes an oscillator circuit 800, which can include a first oscillator, a second oscillator, and a switch matrix, as shown in Figure 8 .

[0091] The first oscillator includes a first transconductance amplifier V1, a second transconductance amplifier V2, and a first resonator.

[0092] The second oscillator comprises a third trans-impedance amplifier V3, a fourth trans-impedance amplifier V4 and a second resonator;

[0093] The first resonator comprises a first capacitive element C1 and a first inductive element 801, the second resonator comprises a second capacitive element C2 and a second inductive element 802, and the first inductive element 801 and the second inductive element 802 are coupled;

[0094] The switch matrix is coupled between the first oscillator and the second oscillator, and by controlling the relative current directions of the first inductive element 801 and the second inductive element 802, the coupling coefficient between the first inductive element 801 and the second inductive element 802 can be changed, so as to change the working frequency of the oscillator.

[0095] For example, the VCO in the first oscillator and the second oscillator can also be a DCO or other types, and can also be a separate structure.

[0096] Reference Figure 8 The first oscillator comprises a first differential input end and a first differential output end, the first differential input end comprises a first input end A and a second input end B, and the first differential output end comprises a first output end C and a second output end D; the first input end A is coupled with an input end VG1 of the first trans-impedance amplifier V1, the second input end B is coupled with an input end VG2 of the second trans-impedance amplifier V2, the first output end C is coupled with an output end VD1 of the first trans-impedance amplifier V1, and the second output end D is coupled with an output end VD2 of the second trans-impedance amplifier V2;

[0097] The second oscillator comprises a second differential input end and a second differential output end, the second differential input end comprises a third input end E and a fourth input end F, and the second differential output end comprises a third output end G and a fourth output end H; the third input end E is coupled with an input end VG3 of the third trans-impedance amplifier V3, the fourth input end F is coupled with an input end VG4 of the fourth trans-impedance amplifier V4, the third output end G is coupled with an output end VD3 of the third trans-impedance amplifier V3, and the fourth output end H is coupled with an output end VD4 of the fourth trans-impedance amplifier V4.

[0098] In some embodiments, an exemplary coupling mode of the switch matrix is independently extracted, which can be referred to as Figure 9 The switch matrix can comprise a first switch SW1, a second switch SW2, a third switch SW3 and a fourth switch SW4;

[0099] The first switch SW1 is coupled between the output end VD1 of the first trans-impedance amplifier V1 and the output end VD3 of the third trans-impedance amplifier V3;

[0100] The second switch SW2 is coupled between the output terminal VD1 of the first transconductance amplifier V1 and the output terminal VD4 of the fourth transconductance amplifier V4.

[0101] The third switch SW3 is coupled between the output terminal VD2 of the second transconductance amplifier V2 and the output terminal VD3 of the third transconductance amplifier V3.

[0102] The fourth switch SW4 is coupled between the output terminal VD2 of the second transconductance amplifier V2 and the output terminal VD4 of the fourth transconductance amplifier V4.

[0103] The first inductive element 801 can include inductors L1, L2 and L3 in Figure 8 The second inductive element 802 can include inductors L4, L5 and L6 in Figure 8 .

[0104] In combination with Figure 8 and Figure 9 , the oscillator circuit 800 as shown in Figure 9A can be obtained.

[0105] The current direction control module described above is equivalent to the switch matrix as shown in Figure 8 or Figure 9 , that is, the switch matrix is used to control the relative current direction of the resonance loop of the two independent oscillators and the phase at both ends of the switch matrix, so as to control the working frequency of the oscillator circuit 800.

[0106] The switches in the switch matrix can be various combinations of NMOS tubes, PMOS tubes and CMOS tubes.

[0107] When the switch combination in the on state and the switch combination in the off state in the switch matrix are changed, the active circuit of the oscillator circuit 800 can inject current into the oscillation loop in different ways, so that the relative current directions of the first inductive element 801 and the second inductive element 802 are the same or different. The change of the relative current direction can make the coupling coefficients of the first inductive element 801 and the second inductive element 802 different. In this way, according to the inverse relationship between the coupling coefficient and the working frequency, the working frequency of the oscillator circuit 800 can also be changed. That is, when the coupling coefficient increases, the working frequency decreases, and when the coupling coefficient decreases, the working frequency increases.

[0108] In some embodiments, the switch matrix is used to control the relative current directions of the first inductive element 801 and the second inductive element 802 to be the same (for example, the current directions shown in Figure 10 , the coupling coefficient of the first inductive element 801 and the second inductive element 802 is greater than 0, and the oscillator circuit works at a first frequency;

[0109] The switching matrix is ​​used to control the relative current directions of the first inductor 801 and the second inductor 802 to be opposite (e.g., Figure 12 When the current direction is shown in the figure, the coupling coefficient of the first inductor 801 and the second inductor 802 is less than 0, and the oscillator circuit operates at the second frequency, which is greater than the first frequency.

[0110] It should be understood that the first frequency can be understood as low frequency, and the second frequency can be understood as high frequency.

[0111] The "same relative current direction" can be understood as the current in the first oscillator flowing sequentially through inductor L2 into inductor L1 and then into inductor L3, which is a clockwise current direction; the current in the second oscillator flowing sequentially through inductor L5 into inductor L4 and then into inductor L6, which is a counterclockwise current direction.

[0112] The opposite current direction can be understood as follows: the current in the first oscillator flows sequentially through inductor L2, then into inductor L1, and finally into inductor L3, in a clockwise direction; the current in the second oscillator flows sequentially through inductor L6, then into inductor L4, and finally into inductor L5, also in a clockwise direction. In some embodiments, according to Figure 8 The oscillator circuit 800 shown has the same control signals for the first switch SW1 and the fourth switch SW4, and the same control signals for the second switch SW2 and the third switch SW3 when controlling the relative current direction.

[0113] For example, when the first switch SW1 and the fourth switch SW4 are turned on, the second switch SW2 and the third switch are turned off;

[0114] When the first switch SW1 and the fourth switch SW4 are turned off, the second switch SW2 and the third switch SW3 are turned on.

[0115] When the first switch SW1 and the fourth switch SW4 are turned on, and the second switch SW2 and the third switch SW3 are turned off... Figure 8 The oscillator circuit 800 shown can be transformed as follows: Figure 10 The oscillator circuit 100 shown is shown.

[0116] It can be seen that when the first switch SW1 and the fourth switch SW4 are on, and the second switch SW2 and the third switch SW3 are off, the output terminals VD1 of the first transconductance amplifier V1 and VD3 of the third transconductance amplifier V3 are in phase, the output terminals VD2 of the second transconductance amplifier V2 and VD4 of the fourth transconductance amplifier V4 are in phase, and the relative current directions of the first inductor 801 and the second inductor 802 are the same.

[0117] refer to Figure 11Assuming the phase of the output VD1 of the first transconductance amplifier V1 is as follows: Figure 11 As shown in (a), the phase of the output terminal VD3 of the third transconductance amplifier V3 is as follows: Figure 11 As shown in (b) above, VD1 and VD3 are in phase. Similarly, refer to... Figure 11 Assuming the phase of the output VD2 of the second transconductance amplifier V2 is as follows: Figure 11 In (c), the phase of the output terminal VD4 of the fourth transconductance amplifier V4 is as follows: Figure 11 As shown in (d) in the figure, VD2 and VD4 are in phase.

[0118] So, continue to refer to Figure 10 When VD1 and VD3 are in phase, and VD2 and VD4 are in phase (for example, in a differential structure, the same phase of two terminals can be understood as a phase difference of 0, and opposite phases of two terminals can be understood as a phase difference of 180°. It should be considered that there can be a certain implementation tolerance for 0° and 180° in engineering implementation), the relative current directions of the first inductor 801 and the second inductor 802 are the same. The coupling effect of inductors L1 and L4 makes the coupling coefficient K between L1 and L4 greater than 0. At this time, if the inductance values ​​of inductors L2, L3, L5 and L6 are ignored, the operating frequency F0sc of the oscillator circuit 800 can be expressed as Equation 1:

[0119]

[0120] In Formula 1, C1 represents the capacitance value of the first capacitor element C1, C2 represents the capacitance value of the second capacitor element C2, L1 represents the inductance value of the inductor L1, and L4 represents the inductance value of the inductor L4. It should be understood that, typically, the inductance values ​​of the functionally symmetrical inductors in the first and second oscillators are the same, and the capacitance values ​​of the functionally symmetrical capacitor elements are also the same. In some embodiments, the capacitance value of the first capacitor element C1 is the same as the capacitance value of the second capacitor element C2, and the inductance values ​​of the inductors L1 and L4 are the same. 0sc It can represent the operating frequency of oscillator circuit 800, the operating frequency of the first oscillator, or the operating frequency of the second oscillator.

[0121] Since the coupling coefficient is greater than 0, the operating frequency F0sc can be considered to be relatively small at this time, and the oscillator circuit 800 is operating in low-frequency mode.

[0122] When the first switch SW1 and the fourth switch SW4 are off, and the second switch SW2 and the third switch SW3 are on, Figure 8 The oscillator circuit 800 shown can be transformed as follows: Figure 12 The oscillator circuit 120 shown is shown.

[0123] As can be seen, when the first switch SW1 and the fourth switch SW4 are off, and the second switch SW2 and the third switch SW3 are on, the phase of the output terminal VD1 of the first transconductance amplifier V1 and the phase of the output terminal VD4 of the fourth transconductance amplifier V4 are the same, the phase of the output terminal VD2 of the second transconductance amplifier V2 and the phase of the output terminal VD3 of the third transconductance amplifier V3 are the same, and the relative current directions of the first inductive element 801 and the second inductive element 802 are opposite.

[0124] Referring to Figure 11 , assuming that the phase of the output terminal VD1 of the first transconductance amplifier V1 is as shown in (a) of Figure 11 , the phase of the output terminal VD4 of the fourth transconductance amplifier V4 is as shown in (b) of Figure 11 , that is, the phases of VD1 and VD4 are the same. Similarly, referring to Figure 11 , assuming that the phase of the output terminal VD2 of the second transconductance amplifier V2 is as shown in (c) of Figure 11 , the phase of the output terminal VD3 of the third transconductance amplifier V3 is as shown in (d) of Figure 11 , that is, the phases of VD2 and VD3 are the same.

[0125] Therefore, continuing to refer to Figure 12 , when the phases of VD1 and VD4 are the same, the phases of VD2 and VD3 are the same, and the relative current directions of the first inductive element 801 and the second inductive element 802 are the same, the coupling effect of the inductor L1 and the inductor L4 makes the coupling coefficient K' between L1 and L4 less than 0. At this time, if the inductance values of the inductors L2, L3, L5 and L6 are ignored, the working frequency Fosc' of the oscillator circuit 800 can be represented as Formula Two:

[0126]

[0127] The meanings of the various symbols in Formula Two can be referred to the above description of Formula One.

[0128] Similarly, Fosc' can represent the working frequency of the oscillator circuit 800, can represent the working frequency of the first oscillator, and can represent the working frequency of the second oscillator.

[0129] Since the coupling coefficient of the oscillator circuit 800 shown in Figure 12 is less than 0, compared with the calculation result of the above coupling coefficient greater than 0, it can be concluded that the working frequency Fosc' of the oscillator circuit 800 when the coupling coefficient is less than 0 is greater than Fosc when the coupling coefficient is greater than 0, which can be understood as that when the coupling coefficient is less than 0, the oscillator circuit 800 works in a high frequency mode.

[0130] Thus, it can be understood that, in order to realize the switching of the working mode, the switching matrix needs to be used. When any switch in the switching matrix is turned on and the impedance is low enough, the terminals connected at both ends of the switch will work in the in-phase state. When different switch combinations are turned on and turned off, the relative current directions of the first inductive element 801 in the first oscillator and the second inductive element 802 in the second oscillator can be changed. The change of the current direction can change the coupling coefficient of the first inductive element 801 and the second inductive element 802 that are coupled at all times, so as to change the working frequency of the oscillator circuit 800. Therefore, the present application can cover a wider frequency range than the traditional oscillator circuit structure by integrating one oscillator in the PLL system, which helps to reduce the area of the radio frequency chip and the loss caused by the device.

[0131] In addition, the mode switching module (switching matrix) of the low-frequency mode and the high-frequency mode can be separated from the oscillation loop, which helps to maintain a high quality factor of the oscillation loop.

[0132] In some embodiments, with reference to Figure 13 The oscillator circuit 800 can further include a third capacitive element C3 and a fourth capacitive element C4. The third capacitive element C3 is coupled between the first output end C and the fourth output end H, and the fourth capacitive element C4 is coupled between the second output end D and the third output end G.

[0133] The phases at both ends of the third capacitive element C3 and the fourth capacitive element C4 are also related to the turning on and turning off of the switch combination of the switching matrix, which makes the third capacitive element C3 and the fourth capacitive element C4 can be connected to the oscillator circuit 800 or not connected to the oscillator circuit 800 under the turning on and turning off of different switch combinations. In this way, a wider frequency range can be obtained when calculating the working frequency of the oscillator circuit 800.

[0134] For example, when the first switch SW1 and the fourth switch SW4 are turned on, and the second switch SW2 and the third switch SW3 are turned off, the phases of the output end VD1 of the first transconductance amplifier V1 and the output end VD3 of the third transconductance amplifier V3 are the same, and the phases of the output end VD2 of the second transconductance amplifier V2 and the output end VD4 of the fourth transconductance amplifier V4 are the same. However, the phase of VD1 (such as (a) in Figure 11 ) is different from the phase of VD4 (such as (d) in Figure 11 ), the phase of the second input end B coupled with the third capacitive element C3 can refer to the phase of VD1, and the phase of the fourth output end H can refer to the phase of VD4. Therefore, the phases of the second input end B coupled with the third capacitive element C3 and the fourth output end H are different, and the third capacitive element C3 is connected to the oscillator circuit 800 at this time.

[0135] When the third capacitor C3 and the fourth capacitor C4 are also connected to the oscillator circuit 800, referring to Formula 1 for calculating the operating frequency of the oscillator circuit 800, Formula 1 can be transformed into the formula expressed in Formula 3 as F. osc” Formula 3 is:

[0136]

[0137] F in Formula 3 osc” This indicates the operating frequency when the third capacitor C3 and the fourth capacitor C4 are connected to the oscillator circuit 800. In Formula 3, C3 represents the capacitance value of the third capacitor and C4 represents the capacitance value of the fourth capacitor.

[0138] It is understandable that when the third capacitor C3 and the fourth capacitor C4 are connected to the oscillator circuit 800, the oscillator circuit 800 can operate at a lower operating frequency than F0sc, which can further extend the operating frequency range of the oscillator circuit 800.

[0139] When the first switch SW1 and the fourth switch SW4 are off, and the second switch SW2 and the third switch SW3 are on, the output terminals VD1 of the first transconductance amplifier V1 and VD4 of the fourth transconductance amplifier V4 are in phase, and the output terminals VD2 of the second transconductance amplifier V2 and VD3 of the third transconductance amplifier V3 are in phase. The phase of the fourth output terminal H, coupled to the third capacitor element C3, can be referenced to the phase of VD4 (e.g., ...). Figure 11 In (b), the phase of the first output terminal C coupled to the third capacitor element C3 can be referenced to the phase of VD1 (e.g., Figure 11 In (a)), therefore, the first output terminal C and the fourth output terminal H, which are coupled to the third capacitor element C3, are in phase, as shown in (a). Figure 14 As shown, the third capacitor element C3 can be considered not connected to the oscillator circuit 800. Similarly, the phase of the second output terminal D coupled to the fourth capacitor element C4 can be referenced to the phase of VD2 (e.g., Figure 11 In (c)), the phase of the third output terminal G coupled to the fourth capacitor element C4 can be referenced to the phase of VD3 (e.g., Figure 11 In (d), therefore, the second output terminal D and the third output terminal G, which are coupled to the fourth capacitor element C4, are in phase, as shown in the figure. Figure 14 As shown, the fourth capacitor element C4 can be considered not connected to the oscillator circuit 800.

[0140] In the case that the third capacitor C3 and the fourth capacitor C4 are not connected to the oscillator circuit 800, the working frequency Fosc' represented by the formula two is the working frequency of the oscillator circuit 800 when the third capacitor C3 and the fourth capacitor C4 are not connected to the oscillator circuit 800. Therefore, the working frequency of the oscillator circuit 800 when the third capacitor C3 and the fourth capacitor C4 are not connected to the oscillator circuit 800 can be referred to the above formula two.

[0141] Therefore, in the case that the third capacitor C3 and the fourth capacitor C4 are connected to the oscillator circuit 800, the oscillator circuit 800 can work in a wider frequency coverage range. According to the case that the frequency coverage range is inversely proportional to the power consumption and the noise of the oscillator circuit, the greater the frequency coverage range, the smaller the power consumption and the noise. Thus, the purpose of extending the frequency coverage range of the oscillator circuit is achieved, and the power consumption and the noise of the oscillator circuit are reduced.

[0142] In addition, for the oscillator circuit 800 proposed in the present application, the first inductor 801 and the second inductor 802 are both multi-port inductors. Referring to Figure 13 , the first inductor 801 includes a first input end A, a second input end B, a first output end C and a second output end D. The first input end A is coupled with an input end VG1 of the first transconductance amplifier V1, the second input end B is coupled with an input end VG2 of the second transconductance amplifier V2, the first output end C is coupled with an output end VD1 of the first transconductance amplifier V1, and the second output end D is coupled with an output end VD2 of the second transconductance amplifier V2.

[0143] The second inductor 802 includes a third input end E, a fourth input end F, a third output end G and a fourth output end H. The third input end E is coupled with an input end VG3 of the third transconductance amplifier V3, the fourth input end F is coupled with an input end VG4 of the fourth transconductance amplifier V4, the third output end G is coupled with an output end VD3 of the third transconductance amplifier V3, and the fourth output end H is coupled with an output end VD4 of the fourth transconductance amplifier V4.

[0144] The first capacitor C1 is coupled between the first input end A and the second input end B of the first inductor 801, and the second capacitor C2 is coupled between the third input end E and the fourth input end F of the second inductor 802.

[0145] The third capacitor C3 is coupled between the second input end B and the fourth output end H, and the fourth capacitor C4 is coupled between the first output end C and the third input end E.

[0146] An exemplary layout of the first inductor 801 can be as shown in Figure 15As shown in (a), an exemplary layout of the second inductor element 802 can be as follows: Figure 15 As shown in (b). Since the first inductor 801 and the second inductor 802 of this application are also coupled to the switch matrix, therefore, with Figure 3 Unlike the illustrated inductor element 300, the first inductor element 801 and the second inductor element 802 also include terminals coupled to a switch matrix. Specifically, the terminal of the first inductor element 801 coupled to the switch matrix may be an extended terminal vd1 of the output terminal VD1 of the first transconductance amplifier V1, and an extended terminal vd2 of the output terminal VD2 of the second transconductance amplifier V2. Similarly, the terminal of the second inductor element 802 coupled to the switch matrix may be an extended terminal vd3 of the output terminal VD3 of the third transconductance amplifier V3, and an extended terminal vd4 of the output terminal VD4 of the fourth transconductance amplifier V4.

[0147] and Figure 9 The switch matrix shown corresponds to the following: terminal vd1 is coupled to the first switch SW1 and the second switch SW2; terminal vd2 is coupled to the third switch SW3 and the fourth switch SW4; terminal vd3 is coupled to the first switch SW1 and the third switch SW3; and terminal vd4 is coupled to the second switch SW2 and the fourth switch SW4.

[0148] Notice, Figure 15 The conductive segments VG1-V5a in the middle correspond to Figure 8 Inductor L2, conductive segments VG2-V5b correspond to Figure 8 Inductors L3, V5a-V5b correspond to Figure 8 Inductor L1, the conductive segments VG3-V5c correspond to Figure 8 Inductor L5, the conductive section VG4-V5d corresponds to Figure 8 Inductors L6, V5c-V5d correspond to Figure 8 Inductor L4 in the middle.

[0149] In some embodiments, the main coils of the first inductor 801 and the second inductor 802 may include multiple metal layers. Since the first inductor 801 and the second inductor 802 are coupled to each other, therefore, reference... Figure 16 The first inductor 801 and the second inductor 802 can overlap, with a switch matrix coupled at the overlap. When designing the chip layout, the size of the overlapping area of ​​the first inductor 801 and the second inductor 802 can be configured according to design requirements. When the designed overlapping area is small, the absolute value of the coupling coefficient is small, and the operating frequency range of the oscillator circuit 800 is small; conversely, when the designed overlapping area is large, the absolute value of the coupling coefficient is large, and the operating frequency range of the oscillator circuit 800 is large.

[0150] existFigure 16 On this basis, Figure 17 This diagram illustrates the relationship between different switching combinations, the current direction in the inductors, and the coupling coefficient when the first inductor 801 and the second inductor 802 are coupled together. It can be seen that... Figure 17 In (a), the first switch SW1 and the fourth switch SW4 are turned on. Figure 17 As shown in (a), the second switch SW2 and the third switch SW3 are turned off. Figure 17 When (a) is not shown, and k is greater than 0, the relative current directions of the first inductor 801 and the second inductor 802 are the same. Figure 17 In (b), the first switch SW1 and the fourth switch SW4 are turned off. Figure 17 (not shown in (b)), the second switch SW2 and the third switch SW3 are turned on. Figure 17 As shown in (b), when k is less than 0, the relative current directions of the first inductor 801 and the second inductor 802 are opposite.

[0151] and Figure 4 Similarly, in the oscillator circuit 800, the ideal schematic diagram of the first inductor 801, the second inductor 802, the first capacitor C1, the second capacitor C2, and the switching matrix coupling can be shown as follows: Figure 18 As shown.

[0152] In some embodiments, such as Figure 19 As shown, when the first inductor 801 includes multiple conductive segments, the multiple conductive segments can form an 8-shaped physical loop through a jump-layer crossing method. Similarly, the second inductor 802 can also be a figure-8-shaped physical loop.

[0153] The term "figure-eight" here can be understood as: a geometric shape consisting of two rings or near-rings (e.g., polygons) that form the figure-eight shape, both of which are axially symmetrical. These shapes can be closed or open. Each conductive segment can be understood as an inductor with two terminals; for example, each conductive segment can be a coil with two terminals.

[0154] like Figure 19 In (a), the first inductor element 801 can be divided into two inductor segments, a first inductor segment and a second inductor segment, which are coupled through a fifth capacitor C5. Figure 19In (a) of FIG. 8, the first inductor can include VG1-V5a, V5a-V5c and V5a-VD2, VG1 and V5c can be two output terminals of the first inductor; the second inductor can include VG2-V5b, V5b-V5d and V5b-VD1, VG2 and V5d can be two output terminals of the second inductor.

[0155] As shown in (b) of FIG. 8, the second inductor 802 can also be divided into two inductors, a third inductor and a fourth inductor, which are coupled by a sixth capacitor C6. In (b) of FIG. 8, Figure 19 Figure 19 In (b) of FIG. 8, the third inductor can include VG3-V6a, V6a-V6c and V6a-VD4, VG3 and V6c can be two output terminals of the third inductor; the fourth inductor can include VG4-V6b, V6b-V6d and V6b-VD3, VG4 and V6d can be two output terminals of the fourth inductor. The first inductor 801 and the second inductor 802 are coupled by a switch matrix.

[0156] Figure 20 As shown in (b) of FIG. 8, the second inductor 802 can also be divided into two inductors, a third inductor and a fourth inductor, which are coupled by a sixth capacitor C6. In (b) of FIG. 8, Figure 19 Figure 19 In (b) of FIG. 8, the third inductor can include VG3-V6a, V6a-V6c and V6a-VD4, VG3 and V6c can be two output terminals of the third inductor; the fourth inductor can include VG4-V6b, V6b-V6d and V6b-VD3, VG4 and V6d can be two output terminals of the fourth inductor. The first inductor 801 and the second inductor 802 are coupled by a switch matrix. Figure 20 Figure 20 Figure 20 In (b) of FIG. 8, the third inductor can include VG3-V6a, V6a-V6c and V6a-VD4, VG3 and V6c can be two output terminals of the third inductor; the fourth inductor can include VG4-V6b, V6b-V6d and V6b-VD3, VG4 and V6d can be two output terminals of the fourth inductor. The first inductor 801 and the second inductor 802 are coupled by a switch matrix. Figure 20 Figure 20 Figure 20 In (b) of FIG. 8, the third inductor can include VG3-V6a, V6a-V6c and V6a-VD4, VG3 and V6c can be two output terminals of the third inductor; the fourth inductor can include VG4-V6b, V6b-V6d and V6b-VD3, VG4 and V6d can be two output terminals of the fourth inductor. The first inductor 801 and the second inductor 802 are coupled by a switch matrix.

[0157] Figure 19 In (b) of FIG. 8, the third inductor can include VG3-V6a, V6a-V6c and V6a-VD4, VG3 and V6c can be two output terminals of the third inductor; the fourth inductor can include VG4-V6b, V6b-V6d and V6b-VD3, VG4 and V6d can be two output terminals of the fourth inductor. The first inductor 801 and the second inductor 802 are coupled by a switch matrix. Figure 20 Figure 20 Figure 20 In (b) of FIG. 8, the third inductor can include VG3-V6a, V6a-V6c and V6a-VD4, VG3 and V6c can be two output terminals of the third inductor; the fourth inductor can include VG4-V6b, V6b-V6d and V6b-VD3, VG4 and V6d can be two output terminals of the fourth inductor. The first inductor 801 and the second inductor 802 are coupled by a switch matrix. Figure 20 Figure 20 Figure 20 In (b) of FIG. 8, the third inductor can include VG3-V6a, V6a-V6c and V6a-VD4, VG3 and V6c can be two output terminals of the third inductor; the fourth inductor can include VG4-V6b, V6b-V6d and V6b-VD3, VG4 and V6d can be two output terminals of the fourth inductor. The first inductor 801 and the second inductor 802 are coupled by a switch matrix.

[0158] ​​​​​​​​​​In practical applications, the plurality of conductive segments forming the 8-shaped physical loop can be routed by means of layer-jumping crossing. Alternatively, the plurality of conductive segments can be routed on a top metal layer and a sub-top metal layer, respectively, or on a top metal layer and a redistribution layer (RDL), respectively. For example, the 8-shaped physical loop can be divided into a non-crossing portion and two crossing portions when routed, the non-crossing portion and one of the two crossing portions can be routed on a top metal layer, and the other crossing portion can be routed on a sub-top metal layer or a redistribution layer, so as to Figure 19 For example, the two crossing portions can include P0-P1 and P2-P3, and the non-crossing portion includes other portions of the physical loop except P0-P1 and P2-P3. Of course, the plurality of conductive segments can also be routed on other metal layers, and embodiments of the present application do not specifically limit this.

[0159] It should be noted that a chip (also referred to as a die) of an integrated circuit usually includes multiple metal layers, and a metal layer close to a substrate of the integrated circuit can be referred to as a low-level metal layer, and a metal layer far from the substrate can be referred to as a high-level metal layer. The above-mentioned top metal layer can be a metal layer farthest from the substrate in the high-level metal layer, and the sub-top metal layer can be a metal layer next to the top metal layer. The above-mentioned redistribution layer is located between the chip of the integrated circuit and the package, and the redistribution layer can be an aluminum layer.

[0160] In some embodiments, Figure 21 A circuit schematic diagram of a class AB oscillator using the principles of the present application is shown. Figure 21 In some embodiments, the first transconductance amplifier V1 can include a PMOS transistor and an NMOS transistor, and the second transconductance amplifier V2 can also include a PMOS transistor and an NMOS transistor. The sources of the PMOS transistors are coupled to a positive power supply rail (VDD), and the sources of the NMOS transistors are coupled to a negative power supply rail (ground). The gates a of the PMOS and NMOS transistors in the first transconductance amplifier V1 are coupled to a first input A of the first inductor 801, and the drains b of the PMOS and NMOS transistors in the first transconductance amplifier V1 are coupled to a first output C of the first inductor 801. The gates c of the PMOS and NMOS transistors in the second transconductance amplifier V2 are coupled to a second input B of the first inductor 801, and the drains d of the PMOS and NMOS transistors in the second transconductance amplifier V2 are coupled to a second output D of the first inductor 801.

[0161] The third transconductance amplifier V3 and the fourth transconductance amplifier V4 can also each include a PMOS tube and an NMOS tube. The sources of the PMOS tubes are each coupled to a positive power rail (VDD), and the sources of the NMOS tubes are each coupled to a negative power rail (ground). The gates e of the PMOS tube and the NMOS tube in the third transconductance amplifier V3 are coupled to the third input end E of the second inductive element 802, and the drains f of the PMOS tube and the NMOS tube in the third transconductance amplifier V3 are coupled to the third output end G of the second inductive element 802. The gates g of the PMOS tube and the NMOS tube in the fourth transconductance amplifier V4 are coupled to the fourth input end F of the second inductive element 802, and the drains h of the PMOS tube and the NMOS tube in the fourth transconductance amplifier V4 are coupled to the fourth output end H of the second inductive element 802.

[0162] The drains b of the PMOS tube and the NMOS tube in the first transconductance amplifier V1 (the output end VD1 of the first transconductance amplifier V1), the drains d of the PMOS tube and the NMOS tube in the second transconductance amplifier V2 (the output end VD2 of the second transconductance amplifier V2), the drains f of the PMOS tube and the NMOS tube in the third transconductance amplifier V3 (the output end VD3 of the third transconductance amplifier V3), and the drains h of the PMOS tube and the NMOS tube in the fourth transconductance amplifier V4 (the output end VD4 of the fourth transconductance amplifier V4) are coupled to a switch matrix, and the coupling relationship can be referred to the description in Figure 9 .

[0163] It should be noted that, Figure 18 The equivalent inductances L1-L6 in the oscillator circuit 800 shown can be designed by the inductances L11-L18 shown in Figure 21 , which are merely exemplary and do not limit the embodiments of the present application.

[0164] In Figure 21 , when the on and off switch combinations of the switch matrix are different, the relative current directions of the equivalent inductances are different, so that the coupling coefficients between the inductances are different, and the working frequencies of the oscillator circuit 800 obtained are also different.

[0165] In some embodiments, referring to Figure 22 , another circuit schematic diagram of an example class AB oscillator using the oscillator circuit 800 practiced according to the principles of the present application is shown. In Figure 22 , the first transconductance amplifier V1, the second transconductance amplifier V2, the third transconductance amplifier V3, and the fourth transconductance amplifier V4 are consistent with the above Figure 21 , and the specific description can be referred to the related description in Figure 21 , which will not be described herein again.

[0166] wherein, Figure 20 the equivalent inductances L1-L12 in the above equation can be designed by the inductances shown in Figure 22 , and L21-L28 are only exemplary and do not limit the embodiments of the present application.

[0167] Since the 8-shaped inductance has the characteristic of anti-interference, the L21-L24 in the above equation are set as a 8-shaped physical loop, so that the L21-L24 form two opposite direction magnetic fields to achieve the purpose of anti-interference. Exemplarily, as shown in Figure 22 , when designed as 8-shaped, the positions of L22 and L24 in the above equation are interchanged, then L1 and L3 are set as one half of the 8-shaped, and L2 and L4 are set as the other half of the 8-shaped, that is, a 8-shaped physical loop is obtained. Similarly, the L25-L28 in the above equation are set as a 8-shaped physical loop, so that the L25-L28 form two opposite direction magnetic fields to achieve the purpose of anti-interference. Exemplarily, as shown in Figure 23 , when designed as 8-shaped, the positions of L26 and L28 in the above equation are interchanged, then L5 and L7 are set as one half of the 8-shaped, and L6 and L8 are set as the other half of the 8-shaped, that is, another 8-shaped physical loop is obtained. Figure 22 Figure 22 Thus, the embodiments of the present application couple two oscillators through the switch matrix, so that the relative current direction of the inductances in the two oscillators is changed, so that the coupling coefficient between the inductances is changed, and then the working frequency of the oscillator (or the oscillator circuit) is changed. Therefore, the present application needs only one oscillator circuit to cover a wider frequency range than the traditional one oscillator structure, which helps to reduce the area and power consumption of the chip. Moreover, the oscillator circuit of the present application, by the way of coupling through the switch matrix, switches the mode of the working frequency from the oscillation loop, which helps to keep the oscillation loop at a high quality factor. Figure 23 Figure 22 The embodiments of the present application also provide an electronic device 240, which can include a transceiver 2401, a memory 2402 and a processor 2403, wherein the transceiver 2401 includes a radio frequency chip 2401a, and the radio frequency chip 2401a includes a PLL system, which can include any one of the oscillator circuits 800 as described above, for example, as shown in ,

[0168] , ,

[0169] , Figure 24 , Figure 8 , Figure 9A , Figure 10 , Figure 12 , Figure 13 ,Figure 14 、 Figure 18 、 Figures 20-23 Any one of the oscillator circuits shown in Figure 1 . The structure of the PLL system can refer to the structure shown in Figure 8 . In some embodiments, the oscillator circuit comprises a first oscillator, a second oscillator and a switch matrix, wherein:

[0170] The first oscillator comprises a first transconductance amplifier, a second transconductance amplifier and a first resonator;

[0171] The second oscillator comprises a third transconductance amplifier, a fourth transconductance amplifier and a second resonator;

[0172] The first resonator comprises a first capacitive element and a first inductive element, and the second resonator comprises a second capacitive element and a second inductive element, wherein the first inductive element and the second inductive element are coupled;

[0173] The switch matrix comprises a first switch, a second switch, a third switch and a fourth switch;

[0174] The first switch is coupled between the output terminal of the first transconductance amplifier and the output terminal of the third transconductance amplifier; the second switch is coupled between the output terminal of the first transconductance amplifier and the output terminal of the fourth transconductance amplifier; the third switch is coupled between the output terminal of the second transconductance amplifier and the output terminal of the third transconductance amplifier; and the fourth switch is coupled between the output terminal of the second transconductance amplifier and the output terminal of the fourth transconductance amplifier.

[0175] Figure 24 The electronic device 240 shown in

[0176] When the electronic device 240 is a terminal device, for the convenience of description, Figure 25 only the main components of the terminal device are shown. As Figure 25As shown, the terminal device 250 includes a processor 2502, a memory 2503, a control circuit, an antenna, and an input / output device. The processor 2502 is mainly used for processing communication protocols and communication data, and controlling the entire terminal device, executing software programs, processing data of the software programs, for example, for supporting the terminal device 250 to perform the actions described in the above method embodiments. The memory 2503 is mainly used for storing software programs and data. The control circuit is mainly used for converting baseband signals and radio frequency signals and processing radio frequency signals. The control circuit and the antenna together can also be called a transceiver 2501, which is mainly used for transceiving radio frequency signals in the form of electromagnetic waves. The control circuit can include a radio frequency chip 2401a provided in the present application; the input / output device, such as a touch screen, a display screen, a keyboard, etc., is mainly used for receiving user input data and outputting data to the user.

[0177] When the terminal device is powered on, the processor 2502 can read the software program of the memory, interpret and execute the instructions of the software program, and process the data of the software program. When it is necessary to send data wirelessly, the processor 2502 performs baseband processing on the data to be sent, and outputs the baseband signal to the radio frequency circuit. The radio frequency circuit converts the baseband signal into a radio frequency signal, and transmits the radio frequency signal in the form of electromagnetic waves through the antenna. When data is transmitted to the terminal device, the radio frequency circuit receives the radio frequency signal through the antenna, converts the radio frequency signal into a baseband signal, and outputs the baseband signal to the processor 2502. The processor 2502 converts the baseband signal into data and processes the data.

[0178] Those skilled in the art can understand that, in order to facilitate the description, Figure 25 Only one memory and one processor are shown. In actual terminal devices, there can be multiple processors and multiple memories. The memory can also be referred to as a storage medium or a storage device, etc. The memory can be a storage element on the same radio frequency chip as the processor, i.e., an on-chip storage element, or an independent storage element, and the present application embodiments do not limit this.

[0179] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed in the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An oscillator circuit, characterized by The oscillator circuit comprises a first oscillator, a second oscillator and a switch matrix, wherein: The first oscillator comprises a first transconductance amplifier, a second transconductance amplifier and a first resonator; The second oscillator comprises a third transconductance amplifier, a fourth transconductance amplifier and a second resonator; The first resonator comprises a first capacitive element and a first inductive element, and the second resonator comprises a second capacitive element and a second inductive element, and the first inductive element and the second inductive element are coupled; Each transconductance amplifier comprises a P-type field effect transistor and an N-type field effect transistor, the source of the P-type field effect transistor is coupled to a positive power supply, the source of the N-type field effect transistor is coupled to a negative power supply, the gate of the P-type field effect transistor and the gate of the N-type field effect transistor are coupled to the input of the corresponding resonator, and the gate of the P-type field effect transistor and the gate of the N-type field effect transistor are coupled to the output of the corresponding resonator; The switch matrix comprises a first switch, a second switch, a third switch and a fourth switch; The first switch is coupled between the output of the first transconductance amplifier and the output of the third transconductance amplifier, the second switch is coupled between the output of the first transconductance amplifier and the output of the fourth transconductance amplifier, the third switch is coupled between the output of the second transconductance amplifier and the output of the third transconductance amplifier, and the fourth switch is coupled between the output of the second transconductance amplifier and the output of the fourth transconductance amplifier; The switch matrix is used to control the coupling coefficient of the first inductive element and the second inductive element by controlling the phase difference between the two ends of the switch matrix to control the relative current direction of the first inductive element and the second inductive element.

2. The oscillator circuit according to claim 1, wherein: When the switch matrix controls the relative current direction of the first inductive element and the second inductive element to be the same, the coupling coefficient is greater than zero; When the switch matrix controls the relative current direction of the first inductive element and the second inductive element to be opposite, the coupling coefficient is less than zero.

3. The oscillator circuit according to claim 1 or 2, wherein: The control signals of the first switch and the fourth switch are the same, The control signals of the second switch and the third switch are the same.

4. The oscillator circuit according to claim 1 or 2, wherein: When the first switch and the fourth switch are turned on, the second switch and the third switch are turned off; When the first switch and the fourth switch are turned off, the second switch and the third switch are turned on.

5. The oscillator circuit of claim 4, wherein, When the first switch and the fourth switch are turned on and the second switch and the third switch are turned off, the phase of the output of the first transconductance amplifier and the output of the third transconductance amplifier is the same, the phase of the output of the second transconductance amplifier and the output of the fourth transconductance amplifier is the same, and the relative current direction of the first inductive element and the second inductive element is the same. The phases of the output end of the first transconductance amplifier and the output end of the fourth transconductance amplifier are the same, the phases of the output end of the second transconductance amplifier and the output end of the third transconductance amplifier are the same, and the relative current directions of the first inductive element and the second inductive element are opposite when the first switch and the fourth switch are off and the second switch and the third switch are on.

6. The oscillator circuit of claim 1 or 2, wherein The first oscillator and the second oscillator are both differential signal structures. The first oscillator comprises a first differential input end and a first differential output end, the first differential input end comprises a first input end and a second input end, and the first differential output end comprises a first output end and a second output end; the first input end is coupled with the input end of the first transconductance amplifier, the second input end is coupled with the input end of the second transconductance amplifier, the first output end is coupled with the output end of the first transconductance amplifier, and the second output end is coupled with the output end of the second transconductance amplifier. The second oscillator comprises a second differential input end and a second differential output end, the second differential input end comprises a third input end and a fourth input end, and the second differential output end comprises a third output end and a fourth output end; the third input end is coupled with the input end of the third transconductance amplifier, the fourth input end is coupled with the input end of the fourth transconductance amplifier, the third output end is coupled with the output end of the third transconductance amplifier, and the fourth output end is coupled with the output end of the fourth transconductance amplifier.

7. The oscillator circuit of claim 6, wherein, The first inductive element comprises the first input end, the second input end, the first output end, and the second output end; and the second inductive element comprises the third input end, the fourth input end, the third output end, and the fourth output end.

8. The oscillator circuit of claim 7, wherein, The first capacitor element is coupled between the first input end and the second input end, and the second capacitor element is coupled between the third input end and the fourth input end.

9. The oscillator circuit of claim 8, wherein, The oscillator circuit further comprises a third capacitor element and a fourth capacitor element, the third capacitor element is coupled between the first output end and the fourth output end, and the fourth capacitor element is coupled between the second output end and the third output end.

10. The oscillator circuit of claim 1 or 2, wherein The main coils of the first inductive element and the second inductive element each comprise a plurality of metal layers.

11. The oscillator circuit of claim 1 or 2, wherein The first inductive element and the second inductive element are mutually overlapped.

12. The oscillator circuit of claim 1 or 2, wherein The first inductive element comprises a plurality of conductive segments, and the plurality of conductive segments form an 8-shaped physical loop.

13. An electronic device, comprising: Comprise: A processor and a transceiver, the processor and the transceiver are coupled, and the transceiver comprises the oscillator circuit according to any one of claims 1-12.

14. The electronic device of claim 13, wherein, Further comprising a memory, the processor and the memory are coupled with the transceiver.

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