Pixel driving circuit and driving method thereof, display substrate and display device

Abstract

The present disclosure provides a pixel driving circuit, comprising: a data writing circuit, a compensation control circuit, a light emitting control circuit, a voltage stabilizing circuit and a driving transistor, wherein the compensation control circuit and the gate electrode of the driving transistor are connected to a first node, the compensation control circuit and the data writing circuit are connected to a second node, and the compensation control circuit, the light emitting control circuit, the voltage stabilizing circuit and the second electrode of the driving transistor are connected to a third node; wherein the compensation control circuit is configured to obtain the threshold voltage of the driving transistor in response to the control of a signal at a second control signal terminal, and to write a third voltage provided by a third voltage input terminal to the second node in response to the control of a signal at a third control signal terminal, and to write a light emitting voltage capable of performing threshold compensation on the driving transistor to the first node according to the voltage change at the second node and the threshold voltage; and the voltage stabilizing circuit is configured to maintain the stability of the voltage at the third node when the compensation control circuit writes the light emitting voltage to the first node.

Description

Technical Field

[0001] The present disclosure relates to the field of display, and in particular to a pixel driving circuit and a driving method thereof, a display substrate, and a display device. Background Art

[0002] When the existing pixel driving circuit operates in a low-frequency state, the bias stress causes the threshold voltage of the driving transistor to shift. The degree of threshold voltage shift varies with the bias stress applied to the driving transistor, which means that the electrical characteristics of the driving transistor are unstable. At this time, a serious hysteresis effect will occur, resulting in defects such as afterimages and flickering. Summary of the Invention

[0003] In a first aspect, an embodiment of the present disclosure provides a pixel driving circuit, comprising: a data writing circuit, a compensation control circuit, a light emitting control circuit, a voltage stabilizing circuit, and a driving transistor, wherein the compensation control circuit and a gate electrode of the driving transistor are connected to a first node, the compensation control circuit and the data writing circuit are connected to a second node, and the compensation control circuit, the light emitting control circuit, the voltage stabilizing circuit, and a second electrode of the driving transistor are connected to a third node;

[0004] The data writing circuit is connected to the first control signal terminal and the data line, and is configured to write the data voltage provided by the data line into the second node in response to the control of the signal of the first control signal terminal;

[0005] The light emitting control circuit is connected to the light emitting control signal terminal and the first electrode of the light emitting device, and is configured to control the on / off between the third node and the first electrode of the light emitting device in response to the control of the signal of the light emitting control signal terminal;

[0006] The compensation control circuit is connected to the second control signal terminal, the third control signal terminal and the third voltage input terminal, and is configured to obtain the threshold voltage of the driving transistor in response to the control of the signal of the second control signal terminal, and write the third voltage provided by the third voltage input terminal to the second node in response to the control of the signal of the third control signal terminal, and write the light-emitting voltage capable of threshold compensation for the driving transistor to the first node according to the voltage change at the second node and the threshold voltage;

[0007] The voltage stabilizing circuit is configured to maintain the stability of the voltage at the third node when the compensation control circuit writes the light-emitting voltage to the first node;

[0008] The driving transistor has a first electrode connected to the first voltage input terminal and is configured to generate a corresponding driving current according to the light-emitting voltage.

[0009] In some embodiments, the voltage stabilization circuit includes: a fifth transistor;

[0010] The control electrode of the fifth transistor is connected to the first electrode of the fourth control signal terminal, the first electrode of the fifth transistor is connected to the third node, and the second electrode of the fifth transistor is connected to the third voltage input terminal.

[0011] In some embodiments, the voltage stabilization circuit includes: a voltage stabilization capacitor;

[0012] The first end of the voltage-stabilizing capacitor is connected to the third node, and the second end of the voltage-stabilizing capacitor is connected to the fourth voltage input end.

[0013] In some embodiments, the fourth voltage input terminal is the light emitting control signal terminal.

[0014] In some embodiments, the data writing circuit includes a first transistor;

[0015] The control electrode of the first transistor is connected to the first control signal terminal, the first electrode of the first transistor is connected to the data line, and the second electrode of the first transistor is connected to the second node.

[0016] In some embodiments, the first transistor is a dual-gate low-temperature polysilicon transistor.

[0017] In some embodiments, the reset compensation circuit includes: a second transistor, a third transistor, and a coupling capacitor;

[0018] The control electrode of the second transistor is connected to the second control signal terminal, the first electrode of the second transistor is connected to the first node, and the second electrode of the second transistor is connected to the third node;

[0019] The control electrode of the third transistor is connected to the third control signal terminal, the first electrode of the third transistor is connected to the third voltage input terminal, and the second electrode of the third transistor is connected to the second node;

[0020] A first end of the coupling capacitor is connected to the first node, and a second end of the coupling capacitor is connected to the second node.

[0021] In some embodiments, the data writing circuit includes a first transistor;

[0022] The control electrode of the first transistor is connected to the first control signal terminal, the first electrode of the first transistor is connected to the data line, and the second electrode of the first transistor is connected to the second node;

[0023] The first transistor is a low-temperature polysilicon transistor, and the third transistor is an oxide transistor;

[0024] The first control signal terminal and the third control signal terminal are the same control signal terminal.

[0025] In some embodiments, the pixel driving circuit further includes: a first reset circuit;

[0026] The first reset circuit includes: a sixth transistor;

[0027] The control electrode of the sixth transistor is connected to the fifth control signal terminal, the first electrode of the sixth transistor is connected to the first electrode of the light-emitting device, and the second electrode of the sixth transistor is connected to the third voltage input terminal;

[0028] The second transistor and the sixth transistor are both low-temperature polysilicon transistors or both are oxide transistors;

[0029] The second control signal terminal and the fifth control signal terminal are the same control signal terminal.

[0030] In some embodiments, the first transistor is a dual-gate low-temperature polysilicon transistor.

[0031] In some embodiments, the light emitting control circuit includes: a fourth transistor;

[0032] The control electrode of the fourth transistor is connected to the light emitting control signal terminal, the first electrode of the fourth transistor is connected to the third node, and the second electrode of the fourth transistor is connected to the first electrode of the light emitting device.

[0033] In some embodiments, the pixel driving circuit further includes: a first reset circuit;

[0034] The first reset circuit is connected to the fifth control signal terminal, the third voltage input terminal and the first electrode of the light-emitting device, and is configured to write the third voltage provided by the third voltage input terminal into the first electrode of the light-emitting device in response to the control of the signal of the fifth control signal terminal.

[0035] In some embodiments, the first reset circuit includes: a sixth transistor;

[0036] The control electrode of the sixth transistor is connected to the fifth control signal terminal, the first electrode of the sixth transistor is connected to the first electrode of the light emitting device, and the second electrode of the sixth transistor is connected to the third voltage input terminal.

[0037] In some embodiments, the pixel driving circuit further includes: a second reset circuit;

[0038] The second reset circuit is connected to the sixth control signal terminal, the third voltage input terminal and the first node, and is configured to write the third voltage provided by the third voltage input terminal to the first node in response to the control of the signal of the sixth control signal terminal.

[0039] In some embodiments, the second reset circuit includes: a seventh transistor;

[0040] The control electrode of the seventh transistor is connected to the sixth control signal terminal, the first electrode of the seventh transistor is connected to the third voltage input terminal, and the second electrode of the seventh transistor is connected to the first node.

[0041] In some embodiments, the seventh transistor is an oxide transistor.

[0042] In a second aspect, an embodiment of the present disclosure further provides a driving method of a pixel driving circuit, wherein the pixel driving circuit is the pixel driving circuit provided in the first aspect, and the driving method includes:

[0043] In the compensation phase, the data writing circuit writes the data voltage provided by the data line to the second node in response to the control of the signal of the first control signal terminal, and the compensation control circuit obtains the threshold voltage of the driving transistor in response to the control of the signal of the second control signal terminal;

[0044] In a light-emitting voltage writing stage, the compensation control circuit writes the third voltage provided by the third voltage input terminal to the second node in response to the control of the signal of the third control signal terminal, and writes a light-emitting voltage capable of performing threshold compensation on the driving transistor to the first node based on the voltage change at the second node and the threshold voltage, and the voltage stabilization circuit maintains the voltage at the third node stable;

[0045] In the light-emitting stage, the light-emitting control circuit connects the third node and the first electrode of the light-emitting device in response to the control of the signal at the light-emitting control signal terminal, and the driving transistor generates a corresponding driving current according to the light-emitting voltage to drive the light-emitting device to emit light.

[0046] In a third aspect, an embodiment of the present disclosure further provides a display substrate, comprising: the pixel driving circuit provided in the second aspect above.

[0047] In a fourth aspect, an embodiment of the present disclosure further provides a display device, comprising: the display substrate provided in the third aspect above. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Figure 1 A schematic diagram of a circuit structure of a pixel driving circuit provided in an embodiment of the present disclosure;

[0049] Figure 2 A schematic diagram of another circuit structure of a pixel driving circuit provided in an embodiment of the present disclosure;

[0050] Figure 3a A schematic diagram of another circuit structure of a pixel driving circuit provided in an embodiment of the present disclosure;

[0051] Figure 3b A schematic diagram of another circuit structure of the pixel driving circuit provided in an embodiment of the present disclosure;

[0052] Figure 4 A schematic diagram of another circuit structure of the pixel driving circuit provided in an embodiment of the present disclosure;

[0053] Figure 5 for Figure 4 An operating timing diagram of the pixel driving circuit shown;

[0054] Figure 6 A schematic diagram of another circuit structure of the pixel driving circuit provided in an embodiment of the present disclosure;

[0055] Figure 7 A schematic diagram of another circuit structure of the pixel driving circuit provided in an embodiment of the present disclosure;

[0056] Figure 8 A schematic diagram of another circuit structure of the pixel driving circuit provided in an embodiment of the present disclosure;

[0057] Figure 9 for Figure 7 An operating timing diagram of the pixel driving circuit shown;

[0058] Figure 10 A schematic diagram of another circuit structure of the pixel driving circuit provided in an embodiment of the present disclosure;

[0059] Figure 11 A schematic diagram of another circuit structure of the pixel driving circuit provided in an embodiment of the present disclosure;

[0060] Figure 12 for Figure 10 An operating timing diagram of the pixel driving circuit shown;

[0061] Figure 13 A schematic diagram of another circuit structure of the pixel driving circuit provided in an embodiment of the present disclosure;

[0062] Figure 14 A schematic diagram of another circuit structure of the pixel driving circuit provided in an embodiment of the present disclosure;

[0063] Figure 15A schematic diagram of another circuit structure of the pixel driving circuit provided in an embodiment of the present disclosure;

[0064] Figure 16 for Figure 15 An operating timing diagram of the pixel driving circuit shown;

[0065] Figure 17 A schematic diagram of another circuit structure of the pixel driving circuit provided in an embodiment of the present disclosure;

[0066] Figure 18 for Figure 17 An operating timing diagram of the pixel driving circuit shown;

[0067] Figure 19 A schematic diagram of another circuit structure of the pixel driving circuit provided in an embodiment of the present disclosure;

[0068] Figure 20 for Figure 19 An operating timing diagram of the pixel driving circuit shown;

[0069] Figure 21 A flowchart of a driving method of a pixel driving circuit provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0070] To enable those skilled in the art to better understand the technical solutions of the present disclosure, a pixel driving circuit and a driving method thereof, a display substrate, and a display device provided by the present disclosure are described in detail below with reference to the accompanying drawings.

[0071] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. And in the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0072] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0073] It should be noted that the transistors used in the embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices with the same or similar characteristics. Since the source and drain of the transistors used are symmetrical, there is no difference between the source and drain. In the embodiments of the present disclosure, in order to distinguish the source and drain of the transistor, one of the electrodes is called the first electrode, the other electrode is called the second electrode, and the gate is called the control electrode. In addition, according to the characteristics of the transistor, the transistor can be divided into N-type and P-type. When a P-type transistor is used, the first electrode is the source of the P-type transistor, and the second electrode is the drain of the P-type transistor. The situation of the N-type transistor is the opposite. The "effective level" in the present disclosure refers to the level that can control the conduction of the corresponding transistor; specifically, for a P-type transistor, the corresponding effective level is a low level; for an N-type transistor, the corresponding effective level is a high level.

[0074] The working process of the pixel driving circuit with internal compensation function is roughly as follows: in the compensation stage, the threshold voltage of the driving transistor is obtained; in the light-emitting voltage writing stage, a light-emitting voltage that can perform threshold compensation on the driving transistor is generated according to the data voltage and the threshold voltage of the driving transistor, and the light-emitting voltage is written to the gate of the driving transistor; in the light-emitting stage, the drain of the driving transistor is connected to the light-emitting device so that the driving transistor can output a driving current to the light-emitting device.

[0075] In related art, during the process of writing the light-emitting voltage into the driver transistor (i.e., the light-emitting voltage writing phase), the drain of the driver transistor is generally in a floating state. Due to the parasitic capacitance between the gate and drain of the driver transistor, the voltage at the drain of the driver transistor changes accordingly during the writing of the light-emitting voltage into the driver transistor. This change in the drain voltage of the driver transistor causes inconsistent bias stress on the driver transistor, resulting in a significant shift in the threshold voltage of the driver transistor, which in turn causes a severe hysteresis effect and leads to defects such as image sticking and flickering.

[0076] In order to solve at least one of the technical problems existing in the related art, the embodiments of the present disclosure provide corresponding solutions.

[0077] The light-emitting device in the present disclosure refers to a current-driven light-emitting element including an organic light-emitting diode (OLED) and a light-emitting diode (LED). In the embodiment of the present disclosure, the light-emitting device is OLED as an example for exemplary description, wherein the first pole and the second pole of the light-emitting device refer to the anode and the cathode, respectively.

[0078] Figure 1 A circuit structure diagram of a pixel driving circuit provided by an embodiment of the present disclosure is shown in FIG. Figure 1 As shown, the pixel driving circuit includes: a data writing circuit 1, a compensation control circuit 2, a light emitting control circuit 3, a voltage stabilizing circuit 4 and a driving transistor DTFT, the compensation control circuit 2 and the gate of the driving transistor DTFT are connected to a first node N1, the compensation control circuit 2 and the data writing circuit 1 are connected to a second node N2, and the compensation control circuit 2, the light emitting control circuit 3, the voltage stabilizing circuit 4 and the second electrode of the driving transistor DTFT are connected to a third node N3.

[0079] The data writing circuit 1 is connected to the first control signal terminal SC1 and the data line Data. The data writing circuit 1 is configured to write the data voltage provided by the data line Data into the second node N2 in response to the control of the signal of the first control signal terminal SC1.

[0080] The light emitting control circuit 3 is connected to the light emitting control signal terminal EM and the first electrode of the light emitting device OLED. The light emitting control circuit 3 is configured to control the on / off between the third node N3 and the first electrode of the light emitting device OLED in response to the control of the signal of the light emitting control signal terminal EM.

[0081] The compensation control circuit 2 is connected to the second control signal terminal SC2, the third control signal terminal SC3 and the third voltage input terminal. The compensation control circuit 2 is configured to obtain the threshold voltage of the driving transistor DTFT in response to the control of the signal of the second control signal terminal SC2, and to write the third voltage provided by the third voltage input terminal to the second node N2 in response to the control of the signal of the third control signal terminal SC3, and to write the light-emitting voltage that can perform threshold compensation on the driving transistor DTFT to the first node N1 according to the voltage change and the threshold voltage at the second node N2.

[0082] The voltage stabilizing circuit 4 is configured to maintain the stability of the voltage at the third node N3 when the compensation control circuit 2 writes the light emitting voltage to the first node N1.

[0083] A first electrode of the driving transistor DTFT is connected to the first voltage input terminal, and the driving transistor DTFT is configured to generate a corresponding driving current according to the light-emitting voltage.

[0084] In the embodiment of the present disclosure, a voltage stabilizing circuit 4 is provided at the third node N3 within the pixel driving circuit. The voltage stabilizing circuit 4 can weaken or even completely eliminate the influence of the parasitic capacitance between the gate and drain of the driving transistor DTFT on the voltage at the drain of the driving transistor DTFT during the process of the compensation control circuit 2 writing the light-emitting voltage to the gate of the driving transistor DTFT, so as to maintain the stability of the voltage at the third node N3, thereby making the bias stress on the driving transistor DTFT basically consistent, and the threshold voltage of the driving transistor DTFT basically stable, which can weaken the influence of the hysteresis effect and effectively improve the problems of afterimage and flicker of the display device.

[0085] Figure 2 Another circuit structure diagram of the pixel driving circuit provided in the embodiment of the present disclosure is shown in FIG. Figure 2 As shown, in some embodiments, the voltage stabilizing circuit 4 includes: a fifth transistor T5; the control electrode of the fifth transistor T5 is connected to the first electrode of the fourth control signal terminal SC4, the first electrode of the fifth transistor T5 is connected to the third node N3, and the second electrode of the fifth transistor T5 is connected to the third voltage input terminal.

[0086] During the process of the compensation control circuit 2 writing the light-emitting voltage to the gate of the driving transistor DTFT, the fifth transistor T5 is controlled to be turned on by the signal of the fourth control signal terminal SC4, so that the third voltage provided by the third voltage input terminal (a constant voltage at least in the light-emitting voltage writing stage) is written to the third node N3; that is, during the light-emitting voltage writing stage, the voltage at the third node N3 is always the third voltage; that is, during the light-emitting voltage writing stage, the voltage stabilizing circuit 4 in the embodiment of the present disclosure can completely eliminate the influence of the parasitic capacitance between the gate and the drain of the driving transistor DTFT on the voltage at the drain of the driving transistor DTFT.

[0087] Figure 3a This is another circuit structure diagram of the pixel driving circuit provided by the embodiment of the present disclosure, such as Figure 3a As shown, Figure 2 The voltage stabilizing circuit 4 shown in FIG. 4 includes a fifth transistor T5. Figure 3a The voltage stabilizing circuit 4 in the illustrated embodiment includes a voltage stabilizing capacitor C2; a first terminal of the voltage stabilizing capacitor C2 is connected to the third node N3, and a second terminal of the voltage stabilizing capacitor C2 is connected to a fourth voltage input terminal. The fourth voltage input terminal provides a constant fourth voltage at least during the light-emitting voltage writing phase.

[0088] In the embodiment of the present disclosure, by providing the voltage-stabilizing capacitor C2 at the third node N3, the effect of the parasitic capacitance between the gate and drain of the driving transistor DTFT on the voltage at the third node N3 can be effectively reduced, so that the voltage at the third node N3 changes only slightly or remains substantially unchanged during the light-emitting voltage writing phase. In other words, during the light-emitting voltage writing phase, the voltage-stabilizing circuit 4 in the embodiment of the present disclosure can completely and effectively reduce the effect of the parasitic capacitance between the gate and drain of the driving transistor DTFT on the voltage at the drain of the driving transistor DTFT.

[0089] Figure 3b A schematic diagram of another circuit structure of a pixel driving circuit provided in an embodiment of the present disclosure is shown in FIG. Figure 3b As shown, in some embodiments, the fourth voltage input terminal connected to the second terminal of the voltage stabilizing capacitor C2 is the light emitting control signal terminal EM. In other words, the second terminal of the voltage stabilizing capacitor C2 can be directly connected to the light emitting control signal terminal EM configured by the light emitting control circuit 3.

[0090] The above-mentioned design of connecting the second end of the voltage-stabilizing capacitor C2 to the light-emitting control signal terminal EM can, on the one hand, effectively reduce the types of signals required to be configured in the pixel driving circuit, which is conducive to simplifying product design. On the other hand, since the second capacitor is relatively close to the light-emitting control circuit 3, the connection between the second end of the second capacitor and the light-emitting control signal terminal EM is easier to implement in actual products.

[0091] Figure 4 A schematic diagram of another circuit structure of a pixel driving circuit provided in an embodiment of the present disclosure is shown in FIG. Figure 4 As shown, in some embodiments, the data writing circuit 1 includes a first transistor T1; wherein the control electrode of the first transistor T1 is connected to the first control signal terminal SC1, the first electrode of the first transistor T1 is connected to the data line Data, and the second electrode of the first transistor T1 is connected to the second node N2.

[0092] In some implementations, the bit compensation circuit includes: a second transistor T2, a third transistor T3, and a coupling capacitor C1; wherein the control electrode of the second transistor T2 is connected to the second control signal terminal SC2, the first electrode of the second transistor T2 is connected to the first node N1, and the second electrode of the second transistor T2 is connected to the third node N3. The control electrode of the third transistor T3 is connected to the third control signal terminal SC3, the first electrode of the third transistor T3 is connected to the third voltage input terminal, and the second electrode of the third transistor T3 is connected to the second node N2. The first end of the coupling capacitor C1 is connected to the first node N1, and the second end of the coupling capacitor C1 is connected to the second node N2.

[0093] In some embodiments, the light emitting control circuit 3 includes: a fourth transistor T4; wherein the control electrode of the fourth transistor T4 is connected to the light emitting control signal terminal EM, the first electrode of the fourth transistor T4 is connected to the third node N3, and the second electrode of the fourth transistor T4 is connected to the first electrode of the light emitting device OLED.

[0094] The following will be combined with the accompanying drawings Figure 4 The specific working process of the pixel driving circuit shown is described in detail. Figure 4 The example shows a case where all transistors in the pixel driving circuit are P-type transistors, for example, all transistors in the pixel driving circuit are low-temperature polysilicon (LTPS) transistors. The first voltage input terminal provides a first voltage VDD, the second voltage input terminal provides a second voltage VSS, and the third voltage input terminal provides a third voltage Vref. The third voltage Vref can be equal to the first voltage VDD or slightly less than the first voltage VDD.

[0095] Figure 5 for Figure 4 A working timing diagram of the pixel driving circuit shown in FIG. Figure 5 As shown, Figure 4 The working process of the pixel driving circuit shown may include the following stages:

[0096] During the reset phase t1, the signal provided by the first control signal terminal SC1 is at a high level, the signal provided by the second control signal terminal SC2 is at a low level, the signal provided by the third control signal terminal SC3 is at a low level, the signal provided by the emission control signal terminal EM is at a low level, and the signal provided by the fourth control signal terminal SC4 is at a high level. At this time, the second transistor T2, the third transistor T3, and the fourth transistor T4 are all turned on, and the first transistor T1 and the fifth transistor T5 are both turned off.

[0097] The third voltage Vref is written to the second node N2 through the third transistor T3 to reset the second node N2; the voltage VSS+Voled at the first electrode of the light-emitting device OLED is written to the first node N1 through the fourth transistor T4 and the second transistor T2 to reset the first node N1; wherein Voled is the turn-on voltage of the light-emitting device OLED (the magnitude of Voled changes with the working state of the light-emitting device OLED).

[0098] During compensation phase t2, the signal provided by the first control signal terminal SC1 is at a low level, the signal provided by the second control signal terminal SC2 is at a low level, the signal provided by the third control signal terminal SC3 is at a high level, the signal provided by the light-emission control signal terminal EM is at a high level, and the signal provided by the fourth control signal terminal SC4 is at a high level. At this time, the first transistor T1 and the second transistor T2 are both turned on, and the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are all turned off.

[0099] The data voltage Vdata is written to the second node N2N2 via the first transistor T1. The first voltage VDD charges the first node N1 via the driving transistor DTFT and the second transistor T2. When the voltage at the first node N1 reaches VDD + Vth, the driving transistor DTFT is turned off, and charging is complete. Vth is the threshold voltage of the driving transistor DTFT. At this point, the voltage difference across the coupling capacitor C1 is VDD + Vth - Vdata.

[0100] During the light-emitting voltage writing phase t3, the signal provided by the first control signal terminal SC1 is at a high level, the signal provided by the second control signal terminal SC2 is at a high level, the signal provided by the third control signal terminal SC3 is at a low level, the signal provided by the light-emitting control signal terminal EM is at a high level, and the signal provided by the fourth control signal terminal SC4 is at a low level. At this time, the third transistor T3 and the fifth transistor T5 are both turned on, and the first transistor T1, the second transistor T2, and the fourth transistor T4 are all turned off.

[0101] The second transistor T2 is turned off, and the first node N1 is in a floating state. The third voltage Vref is written to the second node N2 via the third transistor T3. The voltage at the second node N2 changes from Vdata to Vref. Under the bootstrap effect of the coupling capacitor C1, the voltage at the first node N1 changes from VDD + Vth to VDD + Vth + Vref - Vdata. In other words, the light-emitting voltage written to the first node N1 is VDD + Vth + Vref - Vdata.

[0102] During the process of writing the light-emitting voltage to the first node N1, since the fifth transistor T5 is turned on, the third voltage Vref is written to the third node N3 through the fifth transistor T5. The voltage at the third node N3 is always maintained at Vref, that is, the bias stress on the driving transistor DTFT is basically consistent, and the threshold voltage of the driving transistor DTFT remains basically stable, which can reduce the influence of the hysteresis effect.

[0103] In the light-emitting phase t4, the signal provided by the first control signal terminal SC1 is at a high level, the signal provided by the second control signal terminal SC2 is at a high level, the signal provided by the third control signal terminal SC3 is at a low level, the signal provided by the light-emitting control signal terminal EM is at a low level, and the signal provided by the fourth control signal terminal SC4 is at a high level. At this time, the third transistor T3 and the fourth transistor T4 are both turned on, and the first transistor T1, the second transistor T2, and the fifth transistor T5 are all turned off.

[0104] The third transistor T3 continuously writes the third voltage Vref to the second node N2 to maintain the stability of the voltage at the second node N2, which is conducive to maintaining the stability of the voltage at the first node N1; at the same time, the driving transistor DTFT outputs the driving current I according to its own gate-source voltage Vgs.

[0105] Wherein, Vgs=VDD+Vth+Vref-Vdata-VDD=Vth+Vref-Vdata; According to the saturation drive current formula of the driving transistor DTFT, it can be obtained:

[0106] I=K*(Vgs-Vth) 2

[0107] =K*(Vth+Vref-Vdata-Vth) 2

[0108] =K*(Vref-Vdata) 2

[0109] Wherein, K is a constant (the magnitude of which is related to the electrical characteristics of the driving transistor DTFT). As can be seen from the above formula, the driving current I output by the driving transistor DTFT is only related to the data voltage Vdata and the third voltage Vref, and is not related to the threshold voltage Vth of the driving transistor DTFT. This can prevent the driving current flowing through the light-emitting device OLED from being affected by the unevenness and drift of the threshold voltage, thereby effectively improving the uniformity of the driving current flowing through the light-emitting device OLED.

[0110] It should be noted that, in some embodiments, the above-mentioned reset phase may not be required; that is, the operation process of the pixel driving circuit only includes the above-mentioned compensation phase t2, the light-emitting voltage writing phase t3 and the light-emitting phase t4.

[0111] It should be noted that Figure 4 exemplarily shows the case where the voltage stabilizing circuit 4 includes the fifth transistor T5. Figure 6 A schematic diagram of another circuit structure of a pixel driving circuit provided in an embodiment of the present disclosure is shown in FIG. Figure 6 As shown, Figure 6The specific circuit structures of the data writing circuit 1, the compensation control circuit 2 and the light emitting control circuit 3 are the same as those in FIG. Figure 4 Same as in Figure 6 The voltage stabilizing circuit 4 includes a voltage stabilizing capacitor C2. Figure 6 The example in which the second end of the voltage-stabilizing capacitor C2 is connected to the light-emitting control signal end EM is also only given as an example.

[0112] Figure 6 The working timing of the pixel driving circuit shown can also be adopted Figure 5 As shown in , the specific process will not be repeated here.

[0113] Figure 7 This is another circuit structure diagram of the pixel driving circuit provided in the embodiment of the present disclosure. Figure 8 A schematic diagram of another circuit structure of a pixel driving circuit provided in an embodiment of the present disclosure is shown in FIG. Figure 7 and Figure 8 As shown, in some embodiments, the pixel driving circuit includes not only a data writing circuit 1 , a compensation control circuit 2 , a light emitting control circuit 3 and a voltage stabilizing circuit 4 , but also a first reset circuit 5 .

[0114] The first reset circuit 5 is connected to the fifth control signal terminal SC5, the third voltage input terminal, and the first electrode of the light-emitting device OLED. The first reset circuit 5 is configured to write the third voltage provided by the third voltage input terminal to the first electrode of the light-emitting device OLED in response to the control of the signal at the fifth control signal terminal SC5. In the embodiment of the present disclosure, the provision of the first reset circuit 5 allows the first electrode of the light-emitting device OLED to be reset during the reset phase.

[0115] In some embodiments, the first reset circuit 5 includes: a sixth transistor T6; the control electrode of the sixth transistor T6 is connected to the fifth control signal terminal SC5, the first electrode of the sixth transistor T6 is connected to the first electrode of the light-emitting device OLED, and the second electrode of the sixth transistor T6 is connected to the third voltage input terminal.

[0116] Figure 9 for Figure 7 A working timing diagram of the pixel driving circuit shown in FIG. Figure 9 As shown, Figure 7 The operation process of the pixel driving circuit shown may include: a reset phase t1, a compensation phase t2, a light emitting voltage writing phase t3 and a light emitting phase t4. Figure 9 The working timing of the first control signal terminal SC1, the second control signal terminal SC2, the third control signal terminal SC3, the light emitting control signal terminal EM and the fourth control signal terminal SC4 is shown in FIG. Figure 5 The situation is the same as that shown in , and the following only describes in detail the working timing of the fifth control signal terminal SC5 in each stage.

[0117] During reset phase t1, the signal provided by the fifth control signal terminal SC5 is at a low level, the sixth transistor T6 is turned on, and the third operating voltage Vref is written to the first electrode of the light-emitting device OLED via the sixth transistor T6, thereby resetting the first electrode of the light-emitting device OLED. Simultaneously, the third operating voltage Vref can also be written to the first node N1 via the fourth transistor T4 and the second transistor T2, thereby resetting the first node N1. During compensation phase t2, the light-emitting voltage writing phase t3, and the light-emitting phase t4, the fifth control signal terminal SC5 is at a low level, and the sixth transistor T6 is turned off.

[0118] It should be noted that, in some embodiments, Figure 9 The fifth control signal terminal SC5 may also provide a low level in the compensation phase t2 and / or the light-emitting voltage writing phase t3 to continuously reset the first electrode of the light-emitting device OLED. This situation also falls within the protection scope of the present disclosure.

[0119] Figure 10 This is another circuit structure diagram of the pixel driving circuit provided in the embodiment of the present disclosure. Figure 11 A schematic diagram of another circuit structure of a pixel driving circuit provided in an embodiment of the present disclosure is shown in FIG. Figure 10 and Figure 11 As shown, in some embodiments, the pixel driving circuit includes not only a data writing circuit 1 , a compensation control circuit 2 , a light emitting control circuit 3 and a voltage stabilizing circuit 4 , but also a second reset circuit 6 .

[0120] The second reset circuit 6 is connected to the sixth control signal terminal SC6, the third voltage input terminal, and the first node N1. The second reset circuit 6 is configured to write the third voltage provided by the third voltage input terminal to the first node N1 in response to the control of the signal of the sixth control signal terminal SC6. In the embodiment of the present disclosure, by providing the second reset circuit 6, the first node N1 can be reset during the reset phase. In this case, it is no longer necessary to use the voltage at the first electrode of the light-emitting device OLED to reset the first node N1. Accordingly, during the reset phase, the light-emitting control circuit 3 no longer needs to connect the third node N3 to the first electrode of the light-emitting device OLED.

[0121] In some embodiments, the second reset circuit 6 includes: a seventh transistor T7; a control electrode of the seventh transistor T7 is connected to the sixth control signal terminal SC6, a first electrode of the seventh transistor T7 is connected to the third voltage input terminal, and a second electrode of the seventh transistor T7 is connected to the first node N1.

[0122] Figure 12 for Figure 10 A working timing diagram of the pixel driving circuit shown in FIG. Figure 12 As shown, Figure 10The operation process of the pixel driving circuit shown may include: a reset phase t1, a compensation phase t2, a light emitting voltage writing phase t3 and a light emitting phase t4. Figure 12 The working timing of the first control signal terminal SC1, the second control signal terminal SC2, the third control signal terminal SC3 and the fourth control signal terminal SC4 shown in FIG is the same as Figure 9 The working timings of the first control signal terminal SC1, the second control signal terminal SC2, the third control signal terminal SC3 and the fourth control signal terminal SC4 are the same. The following describes in detail the working timings of the light emitting control signal terminal EM and the sixth control signal terminal SC6 in each stage.

[0123] During reset phase t1, the signal provided by the emission control signal terminal EM is at a high level, the signal provided by the sixth control signal terminal SC6 is at a low level, the seventh transistor T7 is in an on state, and the fourth transistor T4 is in an off state. The third voltage Vref is written to the first node N1 via the seventh transistor T7 to reset the first node N1.

[0124] In the compensation stage t2 and the light-emitting voltage writing stage t3, the signal provided by the light-emitting control signal terminal EM is at a high level, and the signal provided by the sixth control signal terminal SC6 is at a high level; the seventh transistor T7 is in the off state, and the fourth transistor T4 is in the off state.

[0125] In the light emitting stage t4, the signal provided by the light emitting control signal terminal EM is at a low level, and the signal provided by the sixth control signal terminal SC6 is at a high level; the fourth transistor T4 is in the on state, and the seventh transistor T7 is in the off state.

[0126] Figure 13 This is another circuit structure diagram of the pixel driving circuit provided in the embodiment of the present disclosure. Figure 14 A schematic diagram of another circuit structure of a pixel driving circuit provided in an embodiment of the present disclosure is shown in FIG. Figure 13 and Figure 14 As shown, in some embodiments, the pixel driving circuit includes not only the data writing circuit 1, the compensation control circuit 2, the light emitting control circuit 3 and the voltage stabilizing circuit 4, but also the first reset circuit 5 and the second reset circuit 6 mentioned above.

[0127] for Figure 13 、 Figure 14 The description of the specific circuit structures of the data writing circuit 1, the compensation control circuit 2, the light emitting control circuit 3, the voltage stabilizing circuit 4, the first reset circuit 5 and the second reset circuit 6 can be found in the corresponding contents in the previous embodiments and will not be repeated here. Figure 13 and Figure 14 The specific working process of the pixel driving circuit shown in FIG. Figure 9 and Figure 12 Description of the timing shown in .

[0128] Figure 15 A schematic diagram of another circuit structure of a pixel driving circuit provided in an embodiment of the present disclosure is shown in FIG. Figure 15 As shown, in some embodiments, the first transistor T1 is a dual-gate low-temperature polysilicon transistor. Low-temperature polysilicon transistors have a fast response speed, enabling the data voltage Vdata to be quickly written to the second node N2 during the compensation phase, thereby meeting the high data voltage writing speed requirements of high-resolution products. Furthermore, the dual-gate structure of the low-temperature polysilicon transistor effectively reduces leakage from the second node N2 through the first transistor T1.

[0129] Continue to see Figure 15 As shown, in some embodiments, the first transistor T1 is a low-temperature polysilicon transistor (P-type transistor), while the third transistor T3 is an oxide transistor (N-type transistor, specifically a low-temperature polycrystalline oxide transistor). The first control signal terminal SC1 and the third control signal terminal SC3 are the same control signal terminal. Oxide transistors have a relatively low leakage current, which can effectively reduce leakage from the second node N2 through the third transistor T3. Furthermore, designing the first control signal terminal SC1 and the third control signal terminal SC3 as the same control signal terminal can effectively reduce the number of signals required by the pixel driving circuit, thereby simplifying product design.

[0130] In some embodiments, the second transistor T2 and the sixth transistor T6 are both low-temperature polysilicon transistors, and the second control signal terminal SC2 and the fifth control signal terminal SC5 are the same control signal terminal. In the present disclosure, the sixth transistor T6 is designed as a low-temperature polysilicon transistor, so that the third voltage Vref can be quickly written to the first electrode of the light-emitting device OLED during the reset phase. Therefore, the duration of the reset phase can be designed to be relatively short to meet the high reset speed requirements of high-resolution products; the second transistor T2 is designed as a low-temperature polysilicon transistor, so that the threshold voltage of the driving transistor DTFT can be quickly obtained during the compensation phase. Therefore, the duration of the compensation phase can be designed to be relatively short to meet the high compensation speed requirements of high-resolution products; at the same time, the second control signal terminal SC2 and the fifth control signal terminal SC5 are designed as the same control signal terminal, which can effectively reduce the number of signals required to be configured in the pixel driving circuit, which is conducive to simplifying product design.

[0131] Furthermore, considering that the first node N1 is in a floating state during the light-emitting stage, and the stability of the voltage at the first node N1 directly affects the light-emitting effect of the light-emitting device OLED, the second transistor T2 connected to the first node N1 can be designed as a dual-gate low-temperature polysilicon transistor, which can effectively reduce the leakage of the first node N1 through the second transistor T2.

[0132] Figure 16 for Figure 15 A working timing diagram of the pixel driving circuit shown in FIG. Figure 16 As shown, Figure 16 The working process of the pixel driving circuit shown may include the following stages:

[0133] During the reset phase t1, the signal provided by the first control signal terminal SC1 (the third control signal terminal SC3) is at a high level, the signal provided by the second control signal terminal SC2 (the fifth control signal terminal SC5) is at a low level, the signal provided by the light-emission control signal terminal EM is at a low level, and the signal provided by the fourth control signal terminal SC4 is at a high level. At this time, the second transistor T2, the third transistor T3, the fourth transistor T4, and the sixth transistor T6 are all turned on, and the first transistor T1 and the fifth transistor T5 are both turned off.

[0134] The third voltage Vref is written to the second node N2 through the third transistor T3 to reset the second node N2; the third voltage Vref is written to the first electrode of the light-emitting device OLED through the sixth transistor T6 to reset the first electrode of the light-emitting device OLED, and is also written to the first node N1 through the fourth transistor T4 and the second transistor T2 to reset the first node N1.

[0135] During the compensation phase t2, the signal provided by the first control signal terminal SC1 (the third control signal terminal SC3) is at a low level, the signal provided by the second control signal terminal SC2 (the fifth control signal terminal SC5) is at a low level, the signal provided by the light-emission control signal terminal EM is at a high level, and the signal provided by the fourth control signal terminal SC4 is at a high level. At this time, the first transistor T1, the second transistor T2, and the sixth transistor T6 are all turned on, and the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are all turned off.

[0136] The data voltage Vdata is written to the second node N2N2 through the first transistor T1; the first voltage VDD charges the first node N1 through the driving transistor DTFT and the second transistor T2. When the voltage at the first node N1 is VDD+Vth, the driving transistor DTFT is turned off and the charging is completed; at this time, the voltage difference between the two ends of the coupling capacitor C1 is VDD+Vth-Vdata.

[0137] During the light-emitting voltage writing phase t3, the signal provided by the first control signal terminal SC1 (third control signal terminal SC3) is at a high level, the signal provided by the second control signal terminal SC2 (fifth control signal terminal SC5) is at a high level, the signal provided by the light-emitting control signal terminal EM is at a high level, and the signal provided by the fourth control signal terminal SC4 is at a low level. At this time, the third transistor T3 and the fifth transistor T5 are both turned on, and the first transistor T1, the second transistor T2, the fourth transistor T4, and the sixth transistor T6 are all turned off.

[0138] The second transistor T2 is turned off, and the first node N1 is in a floating state. The third voltage Vref is written to the second node N2 via the third transistor T3. The voltage at the second node N2 changes from Vdata to Vref. Under the bootstrap effect of the coupling capacitor C1, the voltage at the first node N1 changes from VDD + Vth to VDD + Vth + Vref - Vdata. In other words, the light-emitting voltage written to the first node N1 is VDD + Vth + Vref - Vdata.

[0139] During the process of writing the light-emitting voltage to the first node N1, since the fifth transistor T5 is turned on, the third voltage Vref is written to the third node N3 through the fifth transistor T5. The voltage at the third node N3 is always maintained at Vref, that is, the bias stress on the driving transistor DTFT is basically consistent, and the threshold voltage of the driving transistor DTFT remains basically stable, which can reduce the influence of the hysteresis effect.

[0140] In the light-emitting phase t4, the signal provided by the first control signal terminal SC1 (the third control signal terminal SC3) is at a high level, the signal provided by the second control signal terminal SC2 (the fifth control signal terminal SC5) is at a high level, the signal provided by the light-emitting control signal terminal EM is at a low level, and the signal provided by the fourth control signal terminal SC4 is at a high level. At this time, the third transistor T3 and the fourth transistor T4 are both turned on, and the first transistor T1, the second transistor T2, the fifth transistor T5, and the sixth transistor T6 are all turned off.

[0141] The third transistor T3 continuously writes the third voltage Vref to the second node N2 to maintain the stability of the voltage at the second node N2, which is conducive to maintaining the stability of the voltage at the first node N1; at the same time, the driving transistor DTFT outputs the driving current I according to its own gate-source voltage Vgs.

[0142] Figure 17 A schematic diagram of another circuit structure of a pixel driving circuit provided in an embodiment of the present disclosure is shown in FIG. Figure 17 As shown, in Figure 16 Based on the pixel driving circuit shown in Figure 17 The pixel driving circuit shown further includes: a second reset circuit 6 , and the second reset circuit 6 further includes a seventh transistor T7 .

[0143] Considering that the first node N1 is in a floating state during the light-emitting stage, and the stability of the voltage at the first node N1 directly affects the light-emitting effect of the light-emitting device OLED, the seventh transistor T7 connected to the first node N1 can be designed as an oxide transistor, which can effectively reduce the leakage of the first node N1 through the second transistor T2.

[0144] Figure 18 for Figure 17 A working timing diagram of the pixel driving circuit shown in FIG. Figure 18 As shown, Figure 18 The working timing of the first control signal terminal SC1 (third control signal terminal SC3), the second control signal terminal SC2 (fifth control signal terminal SC5) and the fourth control signal terminal SC4 shown in FIG is the same as Figure 16 The working timings of the first control signal terminal SC1 (third control signal terminal SC3), the second control signal terminal SC2 (fifth control signal terminal SC5) and the fourth control signal terminal SC4 are the same. Figure 18 The working timing of the middle light-emitting control signal terminal EM and the sixth control signal terminal SC6 in each stage is described in detail.

[0145] During reset phase t1, the signal provided by the emission control signal terminal EM is at a high level, the signal provided by the sixth control signal terminal SC6 is at a high level, the seventh transistor T7 is in an on state, and the fourth transistor T4 is in an off state. The third voltage Vref is written to the first node N1 via the seventh transistor T7 to reset the first node N1.

[0146] In the compensation stage t2 and the light-emitting voltage writing stage t3, the signal provided by the light-emitting control signal terminal EM is at a high level, and the signal provided by the sixth control signal terminal SC6 is at a low level; the seventh transistor T7 is in the off state, and the fourth transistor T4 is in the off state.

[0147] In the light emitting stage t4 , the signal provided by the light emitting control signal terminal EM is at a low level, and the signal provided by the sixth control signal terminal SC6 is at a low level; the fourth transistor T4 is in the on state, and the seventh transistor T7 is in the off state.

[0148] Figure 19 A schematic diagram of another circuit structure of a pixel driving circuit provided in an embodiment of the present disclosure is shown in FIG. Figure 19 As shown, Figure 15 The second transistor T2 and the sixth transistor T6 shown in FIG are both low-temperature polysilicon transistors. Figure 17The second transistor T2 and the sixth transistor T6 shown in the figure are both oxide-type transistors, which can effectively reduce the leakage of the first node N1 through the second transistor T2 and reduce the leakage of the first electrode of the light-emitting device OLED through the sixth transistor T6.

[0149] Figure 20 for Figure 19 A working timing diagram of the pixel driving circuit shown in FIG. Figure 20 As shown, Figure 20 The working timing of the first control signal terminal SC1 (third control signal terminal SC3), the fourth control signal terminal SC4 and the light emitting control signal terminal EM shown in FIG is the same as that of FIG. Figure 16 The working timings of the first control signal terminal SC1 (third control signal terminal SC3), the fourth control signal terminal SC4 and the light emitting control signal terminal EM are the same; Figure 20 The level state of the second control signal terminal SC2 (fifth control signal terminal SC5) in each stage is shown in FIG. Figure 16 As shown in FIG, the level state of the second control signal terminal SC2 (fifth control signal terminal SC5) is opposite in each stage. The specific working process will not be described in detail here.

[0150] Figure 15 、 Figure 17 、 Figure 19 The medium regulated voltage may also be not the fifth transistor T5 mentioned above, but the stabilizing capacitor C2 involved in the previous embodiment. In this case, no corresponding figure is given.

[0151] It should be noted that each transistor in the pixel driving circuit provided in each of the above embodiments can be independently selected from either N-type transistors or P-type transistors. Technical solutions obtained by simply changing the transistor type and the corresponding timing should also fall within the scope of protection of this disclosure. Furthermore, in all of the above embodiments, different technical features can be combined with each other, and new technical solutions obtained by combining these technical features should also fall within the scope of protection of this disclosure.

[0152] Based on the same inventive concept, an embodiment of the present disclosure further provides a driving method for a pixel driving circuit. Figure 21 A flowchart of a driving method of a pixel driving circuit provided by an embodiment of the present disclosure is shown in FIG. Figure 21 As shown, the pixel driving circuit is the pixel driving circuit provided in the previous embodiment. For the detailed description of the pixel driving circuit, please refer to the content of the previous embodiment and will not be repeated here. The driving method includes:

[0153] Step S1: In the compensation phase, the data writing circuit writes the data voltage provided by the data line to the second node in response to the control of the signal of the first control signal terminal, and the compensation control circuit obtains the threshold voltage of the driving transistor in response to the control of the signal of the second control signal terminal.

[0154] Step S2: In the light-emitting voltage writing stage, the compensation control circuit writes the third voltage provided by the third voltage input terminal to the second node in response to the control of the signal of the third control signal terminal, and writes the light-emitting voltage that can perform threshold compensation on the driving transistor to the first node according to the voltage change and the threshold voltage at the second node, and the voltage stabilizing circuit maintains the stability of the voltage at the third node.

[0155] Step S3: In the light-emitting stage, the light-emitting control circuit connects the third node and the first electrode of the light-emitting device in response to the control of the signal at the light-emitting control signal terminal, and the driving transistor generates a corresponding driving current according to the light-emitting voltage to drive the light-emitting device to emit light.

[0156] For the detailed description of the above steps S1 to S3, please refer to the contents of the previous embodiment, which will not be repeated here.

[0157] In the embodiment of the present disclosure, a voltage stabilizing circuit is provided at the third node within the pixel driving circuit. The voltage stabilizing circuit can weaken or even completely eliminate the influence of the parasitic capacitance between the gate and drain of the driving transistor on the voltage at the drain of the driving transistor during the process of the compensation control circuit writing the light-emitting voltage to the gate of the driving transistor, so as to maintain the stability of the voltage at the third node, thereby making the bias stress on the driving transistor basically consistent, and the threshold voltage of the driving transistor basically stable, which can weaken the influence of the hysteresis effect and effectively improve the problems of afterimage and flicker of the display device.

[0158] Based on the same inventive concept, an embodiment of the present disclosure further provides a display substrate, which includes: a pixel driving circuit, which adopts the pixel driving circuit provided by the previous embodiment. For specific description, please refer to the content of the previous embodiment and will not be repeated here.

[0159] An embodiment of the present disclosure further provides a display device, which includes: a display substrate, which uses the display substrate provided by the previous embodiment.

[0160] The display device in the embodiments of the present disclosure may be any product or component with a display function, such as electronic paper, an OLED panel, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, or a navigator.

[0161] It is understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present disclosure, and the present disclosure is not limited thereto. Those skilled in the art may make various modifications and improvements without departing from the spirit and substance of the present disclosure, and such modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A pixel driving circuit, characterized in that: include: a data writing circuit, a compensation control circuit, a light emitting control circuit, a voltage stabilizing circuit, and a driving transistor, wherein the compensation control circuit and the gate of the driving transistor are connected to a first node, the compensation control circuit and the data writing circuit are connected to a second node, and the compensation control circuit, the light emitting control circuit, the voltage stabilizing circuit, and the second electrode of the driving transistor are connected to a third node; The data writing circuit is connected to the first control signal terminal and the data line, and is configured to write the data voltage provided by the data line into the second node in response to the control of the signal of the first control signal terminal; The light emitting control circuit is connected to the light emitting control signal terminal and the first electrode of the light emitting device, and is configured to control the on / off between the third node and the first electrode of the light emitting device in response to the control of the signal of the light emitting control signal terminal; The compensation control circuit is connected to the second control signal terminal, the third control signal terminal and the third voltage input terminal, and is configured to obtain the threshold voltage of the driving transistor in response to the control of the signal of the second control signal terminal, and write the third voltage provided by the third voltage input terminal to the second node in response to the control of the signal of the third control signal terminal, and write the light-emitting voltage capable of threshold compensation for the driving transistor to the first node according to the voltage change at the second node and the threshold voltage; The voltage stabilizing circuit is configured to maintain the stability of the voltage at the third node when the compensation control circuit writes the light-emitting voltage to the first node; The driving transistor has a first electrode connected to the first voltage input terminal and is configured to generate a corresponding driving current according to the light-emitting voltage; The compensation control circuit includes: a second transistor, a third transistor and a coupling capacitor; The control electrode of the second transistor is connected to the second control signal terminal, the first electrode of the second transistor is connected to the first node, and the second electrode of the second transistor is connected to the third node; The control electrode of the third transistor is connected to the third control signal terminal, the first electrode of the third transistor is connected to the third voltage input terminal, and the second electrode of the third transistor is connected to the second node; The first end of the coupling capacitor is connected to the first node, and the second end of the coupling capacitor is connected to the second node; The data writing circuit includes a first transistor; The control electrode of the first transistor is connected to the first control signal terminal, the first electrode of the first transistor is connected to the data line, and the second electrode of the first transistor is connected to the second node; The first transistor is a low-temperature polysilicon transistor, and the third transistor is an oxide transistor; The first control signal terminal and the third control signal terminal are the same control signal terminal; The pixel driving circuit further includes: a first reset circuit; The first reset circuit includes: a sixth transistor; The control electrode of the sixth transistor is connected to the fifth control signal terminal, the first electrode of the sixth transistor is connected to the first electrode of the light-emitting device, and the second electrode of the sixth transistor is connected to the third voltage input terminal; The second transistor and the sixth transistor are both low-temperature polysilicon transistors or both are oxide transistors; The second control signal terminal and the fifth control signal terminal are the same control signal terminal; The working process of the pixel driving circuit includes a reset stage, a compensation stage, a light-emitting voltage writing stage and a light-emitting stage; In the reset phase, the second transistor, the third transistor, and the sixth transistor are all turned on, the first transistor is turned off, and the voltage stabilizing circuit is disconnected; In the compensation stage, the first transistor, the second transistor, and the sixth transistor are all turned on, the third transistor is turned off, and the voltage stabilizing circuit is disconnected; During the light emitting voltage writing phase, the third transistor and the voltage stabilizing circuit are both turned on, and the first transistor, the second transistor, and the sixth transistor are all turned off; In the light emitting stage, the third transistor is turned on, and the first transistor, the second transistor, the voltage stabilizing circuit, and the sixth transistor are all turned off.

2. The pixel driving circuit according to claim 1, wherein: The voltage stabilizing circuit includes: a fifth transistor; The control electrode of the fifth transistor is connected to the first electrode of the fourth control signal terminal, the first electrode of the fifth transistor is connected to the third node, and the second electrode of the fifth transistor is connected to the third voltage input terminal.

3. The pixel driving circuit according to claim 1, wherein: The voltage stabilizing circuit includes: a voltage stabilizing capacitor; The first end of the voltage-stabilizing capacitor is connected to the third node, and the second end of the voltage-stabilizing capacitor is connected to the fourth voltage input end.

4. The pixel driving circuit according to claim 3, wherein: The fourth voltage input terminal is the light-emitting control signal terminal.

5. The pixel driving circuit according to any one of claims 1 to 4, characterized in that: The data writing circuit includes a first transistor; The control electrode of the first transistor is connected to the first control signal terminal, the first electrode of the first transistor is connected to the data line, and the second electrode of the first transistor is connected to the second node.

6. The pixel driving circuit according to claim 5, wherein: The first transistor is a dual-gate low-temperature polysilicon transistor.

7. The pixel driving circuit according to claim 1, wherein: The first transistor is a dual-gate low-temperature polysilicon transistor.

8. The pixel driving circuit according to any one of claims 1 to 4, characterized in that: The light emitting control circuit includes: a fourth transistor; The control electrode of the fourth transistor is connected to the light emitting control signal terminal, the first electrode of the fourth transistor is connected to the third node, and the second electrode of the fourth transistor is connected to the first electrode of the light emitting device.

9. The pixel driving circuit according to any one of claims 1 to 4, characterized in that: Also includes: a first reset circuit; The first reset circuit is connected to the fifth control signal terminal, the third voltage input terminal and the first electrode of the light-emitting device, and is configured to write the third voltage provided by the third voltage input terminal into the first electrode of the light-emitting device in response to the control of the signal of the fifth control signal terminal.

10. The pixel driving circuit according to claim 9, wherein: The first reset circuit includes: a sixth transistor; The control electrode of the sixth transistor is connected to the fifth control signal terminal, the first electrode of the sixth transistor is connected to the first electrode of the light emitting device, and the second electrode of the sixth transistor is connected to the third voltage input terminal.

11. The pixel driving circuit according to any one of claims 1 to 4, characterized in that: Also includes: a second reset circuit; The second reset circuit is connected to the sixth control signal terminal, the third voltage input terminal and the first node, and is configured to write the third voltage provided by the third voltage input terminal to the first node in response to the control of the signal of the sixth control signal terminal.

12. The pixel driving circuit according to claim 11, wherein: The second reset circuit includes: a seventh transistor; The control electrode of the seventh transistor is connected to the sixth control signal terminal, the first electrode of the seventh transistor is connected to the third voltage input terminal, and the second electrode of the seventh transistor is connected to the first node.

13. The pixel driving circuit according to claim 12, wherein: The seventh transistor is an oxide transistor.

14. A driving method for a pixel driving circuit, characterized in that: The pixel driving circuit is the pixel driving circuit according to any one of claims 1 to 13, and the driving method includes: In the compensation phase, the data writing circuit writes the data voltage provided by the data line to the second node in response to the control of the signal of the first control signal terminal, and the compensation control circuit obtains the threshold voltage of the driving transistor in response to the control of the signal of the second control signal terminal; In a light-emitting voltage writing stage, the compensation control circuit writes the third voltage provided by the third voltage input terminal to the second node in response to the control of the signal of the third control signal terminal, and writes a light-emitting voltage capable of performing threshold compensation on the driving transistor to the first node based on the voltage change at the second node and the threshold voltage, and the voltage stabilization circuit maintains the voltage at the third node stable; In the light-emitting stage, the light-emitting control circuit connects the third node and the first electrode of the light-emitting device in response to the control of the signal at the light-emitting control signal terminal, and the driving transistor generates a corresponding driving current according to the light-emitting voltage to drive the light-emitting device to emit light.

15. A display substrate, characterized in that: include: A pixel driving circuit as claimed in any one of claims 1 to 13.

16. A display device, characterized in that: include: A display substrate as claimed in claim 15.

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