Circuit board, computing device, and board card detection method

Abstract

Embodiments of the present application provide a circuit board, a computing device and a board card detection method, and relate to the technical field of circuit boards. The circuit board comprises a processing chip and an auxiliary detection unit. The auxiliary detection unit is configured to cooperate with the state of a tri-state interface and change the voltage value of a first node when the first node is electrically connected to a board card of different types. The processing chip is configured to control the state of the tri-state interface, detect a level signal received by a first detection interface, and determine first board card in-place information according to the state of the tri-state interface and the level signal received by the first detection interface. The first board card in-place information comprises whether a board card is electrically connected to the circuit board through the first node and the type of the board card electrically connected to the circuit board. In the embodiments of the present application, the processing chip can not only detect whether a board card is electrically connected to the circuit board, but also detect the type of the board card electrically connected to the circuit board, thereby improving the use reliability and convenience of the circuit board.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of circuit boards, and in particular to a circuit board, a computing device and a board card detection method. BACKGROUND

[0002] A computing device can include a circuit board and a board card, and the board card can be electrically connected with the circuit board. In the related art, the circuit board cannot detect the board card in-place information, which affects the use convenience and reliability of the circuit board. SUMMARY

[0003] Embodiments of the present application aim to provide a circuit board, a computing device and a board card detection method, so that the circuit board can detect the board card in-place information, and improve the use convenience and reliability of the circuit board.

[0004] In order to achieve the above-mentioned purpose, the following technical solutions are provided:

[0005] In one aspect, the embodiments of the present application provide a circuit board, which can be electrically connected with different types of board cards. The circuit board includes a processing chip and an auxiliary detection unit. The processing chip includes a tri-state interface and a first detection interface. The auxiliary detection unit is electrically connected between a first set voltage terminal and a first node, the first node is electrically connected to the tri-state interface and the first detection interface, and the first node is also used to be electrically connected with the different types of board cards. The auxiliary detection unit is used to cooperate with the state of the tri-state interface, and change the voltage value of the first node when the first node is electrically connected to the different types of board cards. The processing chip is used to control the state of the tri-state interface, and detect the level signal received by the first detection interface, and determine the first board card in-place information according to the state of the tri-state interface and the level signal received by the first detection interface. The first board card in-place information includes whether there is a board card electrically connected to the circuit board through the first node, and the type of the board card electrically connected to the circuit board.

[0006] In the embodiments of the present application, the auxiliary detection unit can play an auxiliary detection role. When the different types of board cards are electrically connected to the first node, the auxiliary detection unit can cooperate with the state of the tri-state interface to change the voltage value of the first node. That is, when the first node is electrically connected to the different types of board cards in different states of the tri-state interface, the auxiliary detection unit can make the voltage value of the first node different, so that the level signal received by the first detection interface can be different.

[0007] In this way, the processing chip can determine whether the board card is electrically connected to the circuit board through the first node according to the state of the tri-state interface and the level signal received by the first detection interface, and the type of the board card electrically connected to the circuit board (i.e., the type of the in-place board card), so that the circuit board can determine the signal transmission between the processing chip and the board card of which type, improve the reliability of signal transmission between the circuit board and the board card, and improve the use reliability of the circuit board. In addition, since the processing chip can determine the type of the board card electrically connected to the circuit board, when the board card electrically connected to the circuit board fails and causes abnormal signal transmission, the processing chip can determine which type of board card has failed, thereby reducing the difficulty of maintenance and improving the use convenience of the circuit board.

[0008] In addition, the detection of whether the board card is in place and the type of the in-place board card can be realized through the first detection interface, thereby improving the use convenience of the circuit board.

[0009] The use of the auxiliary detection unit enables the processing chip to determine the first board card in-place information, which, on the one hand, does not need to change the structure of the connector (such as the circuit board connector and the board card connector), and on the other hand, does not need to set a complex logic circuit, thereby simplifying the structure of the circuit board and reducing the cost of the circuit board.

[0010] In some embodiments, the first set voltage terminal includes a first power terminal or a first ground terminal. In this way, the applicability of the circuit board can be improved to meet different use requirements.

[0011] In some embodiments, the circuit board further includes a first resistance unit, and the first node is electrically connected to the tri-state interface through the first resistance unit. In this way, the first resistance unit can play a role of current limiting protection, avoiding excessive current between the first node and the tri-state interface, and improving the reliability of the circuit board circuit.

[0012] In some embodiments, the circuit board further includes a second resistance unit, and the first node is electrically connected to the first detection interface through the second resistance unit. In this way, the second resistance unit can play a role of current limiting protection, avoiding excessive current between the first node and the first detection interface, and improving the reliability of the circuit board circuit.

[0013] In some embodiments, the first resistance unit includes a first resistance, and the second resistance unit includes a second resistance. In this way, the structure of the first resistance unit and the second resistance unit is simplified, and the cost of the first resistance unit and the second resistance unit is reduced, thereby reducing the cost of the circuit board.

[0014] In some embodiments, the board card includes a board card connector, and the board card connector includes a first test pin. The circuit board further includes a circuit board connector. The circuit board connector is configured to be electrically connected with the board card connector. The circuit board connector includes a first pin, and the first node is electrically connected with the first pin, and the first pin is configured to be electrically connected with the first test pin. In this way, the first test pin of the board card connector can be electrically connected with the first node through the first pin of the circuit board connector, and the convenience of electrical connection between the board card and the circuit board is improved.

[0015] In some embodiments, the board card connector further includes a second test pin. The processing chip further includes a second detection interface. The second node is electrically connected with the second detection interface and a second set voltage terminal. The circuit board connector further includes a second pin, and the second node is electrically connected with the second pin, and the second pin is configured to be electrically connected with the second test pin. The processing chip is configured to detect a level signal received by the second detection interface, and determine second board card in-place information according to the level signal received by the second detection interface. The second board card in-place information includes whether there is a board card electrically connected with the circuit board through the second node. In this way, the second test pin of the board card connector can be electrically connected with the second node through the second pin of the circuit board connector, and the convenience of electrical connection between the board card and the circuit board is improved. Moreover, the processing chip can determine whether there is a board card electrically connected with the circuit board through the second node according to the level signal received by the second detection interface, and the use reliability of the circuit board is improved, without changing the structure of the connector (for example, the circuit board connector and the board card connector) and setting a complex logic circuit, so that the structure of the circuit board is simplified, and the cost of the circuit board is reduced.

[0016] In some embodiments, the first pin and the second pin are respectively arranged close to two end portions of the circuit board connector along an extension direction of the circuit board connector, or the first pin and the second pin are respectively arranged close to two vertices of the circuit board connector along an extension direction of a diagonal line of the circuit board connector. In this way, the first pin and the second pin can be arranged at different positions of the circuit board connector, so that the processing chip can detect the electrical connection state between different positions of the circuit board connector and the board card, and the reliability of electrical connection between the circuit board and the board card is improved.

[0017] In some embodiments, the second set voltage terminal includes a second power terminal or a second ground terminal. When the second set voltage terminal includes the second power terminal, the circuit board further includes a sixth resistor, and the second node is electrically connected with the second power terminal through the sixth resistor. The second set voltage terminal includes the second power terminal or the second ground terminal, which can improve the applicability of the circuit board and meet different use requirements. Moreover, when the second set voltage terminal includes the second power terminal, the sixth resistor can play a role of current limiting protection, so that the current between the second power terminal and the second node is prevented from being too large, and the use reliability of the circuit board is improved.

[0018] In some embodiments, the processing chip comprises a first input interface, and the first input interface is multiplexed as the first detection interface; and / or, the processing chip comprises a second input interface, and the second input interface is multiplexed as the second detection interface. In this way, no additional detection interface needs to be arranged, thereby saving the I / O resources of the processing chip. Moreover, no additional detection pin needs to be arranged on the circuit board connector, thereby improving the pin utilization efficiency, reducing the number of pins on the circuit board connector, and facilitating the reduction of the length of the circuit board connector. In addition, the structure of the circuit board circuit can be simplified, and the occupied space and design cost of the circuit board circuit can be reduced.

[0019] In some embodiments, the processing chip is configured to: determine that one of the first type of board card and the second type of board card is electrically connected to the circuit board through the first node when the tri-state interface is in the high-impedance state and the first detection interface receives the first level signal; switch the tri-state interface from the high-impedance state to the target state when the tri-state interface is in the high-impedance state and the first detection interface receives the second level signal; determine that the other of the first type of board card and the second type of board card is electrically connected to the circuit board through the first node when the tri-state interface is in the target state and the first detection interface receives the second level signal; and determine that no board card is electrically connected to the circuit board through the first node when the tri-state interface is in the target state and the first detection interface receives the first level signal. In this way, the processing chip can determine the first board card in-place information according to the state of the tri-state interface and the level signal received by the first detection interface, thereby improving the transmission reliability of the signal between the circuit board and the board card, and improving the use reliability of the circuit board.

[0020] In some embodiments, the circuit board further comprises a control chip. The control chip is electrically connected to the processing chip and is configured to receive the board card in-place information from the processing chip. In this way, the user can obtain the board card in-place information through the control chip, thereby improving the use convenience of the circuit board.

[0021] In another aspect, the embodiments of the present application provide a computing device. The computing device comprises the circuit board and the plurality of board cards as described above. The plurality of board cards are configured to be electrically connected to the circuit board.

[0022] The computing device provided by the embodiments of the present application comprises the board card as described above, and thus has all the beneficial effects described above, which will not be repeated here.

[0023] In some embodiments, the plurality of board cards includes a first type of board card and a second type of board card. The first type of board card includes a first board card output interface and a fourth resistor, and the first board card output interface is electrically connected to the third power supply end through the fourth resistor. The second type of board card includes a second board card output interface and a fifth resistor, and the second board card output interface is electrically connected to the third ground end through the fifth resistor. The auxiliary detection unit includes a third resistor, and the resistance value of the third resistor is greater than the resistance value of the fifth resistor. In this way, the fourth resistor can play a role in current limiting protection, avoiding excessive current between the first board card output interface and the third power supply end, and improving the use reliability of the first type of board card. In addition, the fifth resistor can play a role in current limiting protection, avoiding excessive current between the second board card output interface and the third ground end, and improving the use reliability of the second type of board card. The auxiliary detection unit includes the third resistor, so that the auxiliary detection unit not only plays a role in auxiliary detection, but also plays a role in current limiting, avoiding excessive current between the first node and the first set voltage end, improving the reliability of the circuit board circuit, and thus improving the use reliability of the circuit board. The resistance value of the third resistor is greater than the resistance value of the fifth resistor, so that when the second type of board card is electrically connected to the first node and the third resistor is connected in parallel with the fifth resistor, the resistance value after the third resistor and the fifth resistor are connected in parallel can be smaller, thereby reducing the voltage value of the first node, so that the first detection interface can receive a low-level signal, that is, the processing chip can detect that the second type of board card is in place.

[0024] In some embodiments, the first type of board card includes a first board card connector, and the first board card connector includes a third pin electrically connected to the first board card output interface. The second type of board card includes a second board card connector, and the second board card connector includes a fourth pin electrically connected to the second board card output interface. The third pin is a first test pin of the first type of board card, and the fourth pin is a first test pin of the second type of board card. In this way, the first board card output interface can be electrically connected to the circuit board through the third pin, and the second board card output interface can be electrically connected to the circuit board through the fourth pin, so that the first type of board card and the second type of board card can provide different level signals for the first node, so that the processing chip can determine the type of the board card in place according to the different level signals, and improve the use reliability of the circuit board.

[0025] In yet another aspect, embodiments of the present application provide a board card detection method. The board card detection method is used in the computing device as described above. The board card detection method includes a first detection stage and a second detection stage. The first detection stage includes: controlling the tri-state interface to be in a high-impedance state, detecting a level signal received by the first detection interface; if the first detection interface receives a first level signal, determining that one of the first type of board card and the second type of board card is electrically connected to the circuit board through the first node; and if the first detection interface receives a second level signal, entering the second detection stage. The second detection stage includes: switching the tri-state interface from the high-impedance state to a target state, detecting a level signal received by the first detection interface; if the first detection interface still receives the second level signal, determining that the other of the first type of board card and the second type of board card is electrically connected to the circuit board through the first node; and if the first detection interface receives the first level signal, determining that no board card is electrically connected to the circuit board through the first node.

[0026] The board card detection method provided by embodiments of the present application is used in the computing device as described above, and thus has all the beneficial effects described above, which will not be repeated here. It can be understood that the board card detection method includes the first detection stage and the second detection stage, and the state of the tri-state interface is different in the first detection stage and the second detection stage, so that the auxiliary detection unit can cooperate with the state of the tri-state interface, change the voltage value of the first node when the board card of different types is electrically connected to the first node, so that the level signal received by the first detection interface can change, so that the processing chip can determine the in-place information of the first board card according to the state of the tri-state interface and the level signal received by the first detection interface, improve the transmission reliability of the signal between the circuit board and the board card, and thus improve the use reliability of the circuit board.

[0027] In some embodiments, when the first setting voltage end comprises a first power end: the first level signal is a low level signal, the second level signal is a high level signal, and the target state of the tri-state interface is an input state. In the first detection stage, if the first detection interface receives a low level signal, it is determined that the second type of board card is electrically connected to the circuit board through the first node; in the second detection stage, if the first detection interface receives a high level signal, it is determined that the first type of board card is electrically connected to the circuit board through the first node. When the first setting voltage end comprises a first ground end: the first level signal is a high level signal, the second level signal is a low level signal, and the target state of the tri-state interface is an output state. In the first detection stage, if the first detection interface receives a high level signal, it is determined that the first type of board card is electrically connected to the circuit board through the first node; in the second detection stage, if the first detection interface receives a low level signal, it is determined that the second type of board card is electrically connected to the circuit board through the first node. In this way, after the processing chip obtains the level signal received by the first detection interface, it can determine the first board card in-place information according to the control logic, thereby improving the use reliability of the circuit board, without the need to change the structure of the connector (such as the circuit board connector and the board card connector) or set a complex logic circuit, thereby simplifying the structure of the circuit board and reducing the cost of the circuit board. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the present application, the following will briefly introduce the drawings needed to be used in some embodiments of the present application. Obviously, the drawings described below are only the drawings of some embodiments of the present application, and other drawings can also be obtained by those skilled in the art according to these drawings. In addition, the drawings described below can be regarded as schematic diagrams, and are not limited to the actual size of the product, the actual process of the method, the actual timing of the signal, etc. involved in the embodiments of the present application.

[0029] Figure 1 Block diagram of a computing device provided by some embodiments of the present application;

[0030] Figure 2 Structure diagram of a circuit board connector and a board card provided by some embodiments of the present application;

[0031] Figure 3A Structure diagram of a computing device provided by some embodiments of the present application;

[0032] Figure 3B Structure diagram of a computing device provided by some embodiments of the present application;

[0033] Figure 3C Structure diagram of a computing device provided by some embodiments of the present application;

[0034] Figure 3DA structural diagram of a computing device provided for some embodiments of the present application;

[0035] Figure 4A A flowchart of a board detection method provided for some embodiments of the present application;

[0036] Figure 4B A flowchart of a board detection method provided for some embodiments of the present application;

[0037] Figure 4C A flowchart of a board detection method provided for some embodiments of the present application;

[0038] Figure 5A A structural diagram of a computing device provided for some embodiments of the present application;

[0039] Figure 5B A structural diagram of a computing device provided for some embodiments of the present application. DETAILED DESCRIPTION

[0040] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings. Obviously, the described embodiments are only some of the embodiments of the present application, but not all of the embodiments of the present application. Based on the embodiments provided by the present application, all other embodiments obtained by a person of ordinary skill in the art belong to the scope of protection of the present application.

[0041] Unless otherwise required by context, the term "comprise" and other forms of the term "comprise", such as "comprises" and "comprising", and the like, are used in an open, inclusive sense, that is, as "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example", or "some examples" are intended to mean that a particular feature, structure, material, or characteristic included in at least one embodiment or example of the present application. The illustrative representation of the above terms does not necessarily mean the same embodiment or example. In addition, the specific features, structures, materials or characteristics described can be included in any one or more embodiments or examples in any appropriate manner.

[0042] The terms "first", "second", "third", etc. are used herein only to describe different instances, and are not used to denote or imply relative importance or a number of the indicated technical features. Thus, features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, the meaning of "a plurality of" is two or more, unless otherwise specified.

[0043] As used herein, "parallel", "perpendicular", "equal" include the stated case and a case similar to the stated case within an acceptable deviation range, wherein the acceptable deviation range is determined by a person of ordinary skill in the art taking into account the measurement being discussed and the error related to the measurement of the specific quantity (i.e., limitations of the measurement system). For example, "parallel" includes absolute parallel and approximately parallel, wherein the acceptable deviation range of approximately parallel can be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicular and approximately perpendicular, wherein the acceptable deviation range of approximately perpendicular can also be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality can be, for example, a difference between the two less than or equal to 5% of either.

[0044] Figure 1 A block diagram of a computing device provided for some embodiments of the present application. Figure 2 A structural diagram of a circuit board connector and a board card provided for some embodiments of the present application.

[0045] In some embodiments, as shown in Figure 1 An embodiment of the present application provides a computing device 200. It can be understood that the computing device 200 can be an apparatus having functions of processing, computing, and communication, etc. In some examples, the computing device 200 can be a server.

[0046] In some examples, as shown in Figure 1 The computing device 200 can include a circuit board 100 and a plurality of board cards 210. The plurality of board cards 210 can be used to be electrically connected with the circuit board 100. For example, the circuit board 100 can be a mainboard of the computing device 200.

[0047] In some examples, as shown in Figure 1 The circuit board 100 can include a processing chip 110, for example, the processing chip 110 can be a CPLD (Complex Programming Logic Device).

[0048] In some examples, the processing chip 110 can be electrically connected with the circuit board circuit Figure 1Electrical connections (not shown). For example, circuit board 100 may include a printed circuit board (PCB) with circuitry disposed on it. Processing chip 110 is electrically connected to the PCB, such that processing chip 110 can be electrically connected to the circuitry.

[0049] In some examples, such as Figure 1 As shown, circuit board 100 may include circuit board connector 150. For example... Figure 2 As shown, board 210 may include board connector 211. Circuit board connector 150 may be used for electrical connection with board connector 211. For example, circuit board connector 150 may be electrically connected to circuit board circuitry, such that circuit board connector 150 can be electrically connected to processing chip 110 via circuit board circuitry. In this way, the electrical connection between board connector 211 and circuit board connector 150 enables signal transmission between board 210 and processing chip 110 of circuit board 100.

[0050] In some examples, the board connector 211 can be plugged in to achieve electrical connection with the circuit board connector 150, improving the convenience of electrical connection between the board connector 211 and the circuit board connector 150.

[0051] For example, the state in which board 210 is electrically connected to circuit board 100 can be referred to as board 210 being "in place", and the state in which board 210 is not electrically connected to circuit board 100 can be referred to as board 210 being "out of place".

[0052] See you again Figure 1 In some examples, circuit board 100 may include a control chip 160, which may be electrically connected to processing chip 110, enabling signal transmission between the control chip 160 and processing chip 110. In some examples, control chip 160 may be a BMC (Base Board Management Controller).

[0053] In some examples, the circuit board 100 can further include a CPU (English: Central Processing Unit, Chinese: Central Processing Unit), which can be electrically connected with the circuit board circuit. Understandably, as the function of the CPU is constantly improving, the I / O (English: Input / Output, Chinese: Input / Output) resources of the CPU are constantly increasing (such as memory and PCIE, English full name: Peripheral Component Interface Express, Chinese name: High-speed serial computer expansion bus standard). In this way, more circuit board connectors 150 need to be set to enable the processing chip 110 to be electrically connected with more boards 210 to meet the operation requirements of the CPU.

[0054] However, due to unstable plugging and other reasons between the circuit board connector 150 and the board connector 211, the reliability of the electrical connection is generally poor, thereby affecting the reliability of signal transmission between the circuit board 100 and the board 210.

[0055] In order to improve the transmission reliability of signals between the circuit board 100 and the board 210, in some implementations, as shown in Figure 2 Generally, the in-place detection pin 153 needs to be defined on the circuit board connector 150. The processing chip 110 judges whether the board 210 is in place or out of place by detecting the level signal of the in-place detection pin 153.

[0056] Understandably, the level signal can include a high level signal and a low level signal. In some examples, when the in-place detection pin 153 is a high level signal, it indicates that the board 210 is in place; when the in-place detection pin 153 is a low level signal, it indicates that the board 210 is out of place. In other examples, when the in-place detection pin 153 is a high level signal, it indicates that the board 210 is out of place; when the in-place detection pin 153 is a low level signal, it indicates that the board 210 is in place.

[0057] However, the inventors of the present application found that the above implementation has at least the following problems:

[0058] The in-place detection pin 153 can only detect whether the board 210 is in place or out of place, and cannot detect the type of the in-place board 210 when the board 210 is in place, so that the circuit board 100 cannot determine which type of board 210 the signal is transmitted between the processing chip 110 and the board 210, affecting the reliability of signal transmission between the circuit board 100 and the board 210, that is, affecting the use reliability of the circuit board 100.

[0059] Figure 3A The structural diagram of the computing device provided by some embodiments of the present application. Figure 3BA structural diagram of a computing device provided for another embodiment of the present application.

[0060] Based on this, as shown in Figure 3A and Figure 3B embodiments of the present application provide a computing device 200. The computing device 200 can include a circuit board 100 and a plurality of board cards 210, and the plurality of board cards 210 can be used to be electrically connected with the circuit board 100.

[0061] It can be understood that the above embodiments of the present application have exemplified the computing device 200 and the circuit board 100, etc., and will not be repeated here.

[0062] In some examples, the types of the plurality of board cards 210 can be different, and the circuit board 100 is capable of being electrically connected with the different types of board cards 210.

[0063] In some examples, as shown in Figure 3A and Figure 3B the plurality of board cards 210 can include a first type of board card 220 and a second type of board card 230. The circuit board 100 is capable of being electrically connected with the different types of board cards 210, that is, the circuit board 100 is capable of being electrically connected with the first type of board card 220 and the second type of board card 230.

[0064] In some examples, the first type of board card 220 can be a PCIE Riser card, and the second type of board card 230 can be a hard disk backboard. In another example, the first type of board card 220 can be a hard disk backboard, and the second type of board card 230 can be a PCIE Riser card. In yet another example, the first type of board card 220 and the second type of board card 230 can also be other board cards 210 of different types. It can be understood that the embodiments of the present application do not further limit the types of the first type of board card 220 and the second type of board card 230.

[0065] In some examples, as shown in Figure 3A and Figure 3B the first type of board card 220 can include a first board card output interface 221 and a fourth resistor R4, and the first board card output interface 221 can be electrically connected with a third power supply end VCC3 through the fourth resistor R4.

[0066] In an example, as shown in Figure 3A and Figure 3B the third power supply end VCC3 can be arranged on the first type of board card 220, so that the first board card output interface 221 can be electrically connected with the third power supply end VCC3 through the fourth resistor R4. It can be understood that the first board card output interface 221 is capable of outputting a high-level signal.

[0067] In some examples, the fourth resistor R4 can have a resistance value of 1KΩ (unit: kilo-ohm) or 4.7KΩ. In other examples, the fourth resistor R4 can also have other resistance values to meet different use requirements.

[0068] In some examples, the third power supply end VCC3 can have a voltage value of 3.3V. In other examples, the third power supply end VCC3 can also have other voltage values to meet different use requirements.

[0069] It can be understood that the fourth resistor R4 can play a role in current limiting protection to avoid excessive current between the first board card output interface 221 and the third power supply end VCC3, thereby improving the use reliability of the first type of board card 220.

[0070] As can be seen from the above, the board card 210 can include a board card connector 211, which can be used to electrically connect with the circuit board connector 150. In some examples, as shown in Figure 3A and Figure 3B The first type of board card 220 can include a first board card connector 222, which can include a third pin 223 electrically connected with the first board card output interface 221.

[0071] It can be understood that the third pin 223 is electrically connected with the first board card output interface 221, so that the first board card output interface 221 can be electrically connected with the circuit board connector 150 through the third pin 223, thereby enabling the first board card output interface 221 to provide a high-level signal to the circuit board 100 through the third pin 223.

[0072] In some examples, as shown in Figure 3A and Figure 3B The second type of board card 230 can include a second board card output interface 231 and a fifth resistor R5, and the second board card output interface 231 can be electrically connected with the third ground end GND3 through the fifth resistor R5.

[0073] In some examples, as shown in Figure 3A and Figure 3B The third ground end GND3 can be provided on the second type of board card 230, so that the second board card output interface 231 can be electrically connected with the third ground end GND3 through the fifth resistor R5. It can be understood that the second board card output interface 231 can output a low-level signal.

[0074] In some examples, the fifth resistor R5 can have a resistance value of 100Ω (unit: ohm). In other examples, the fifth resistor R5 can also have other resistance values to meet different use requirements.

[0075] It can be understood that the fifth resistor R5 can play a role of current limiting protection, so as to avoid that the current between the second board card output interface 231 and the third ground terminal GND3 is too large, and the use reliability of the second type board card 230 is improved.

[0076] In some examples, as shown in Figure 3A and Figure 3B The second type board card 230 can include a second board card connector 232, and the second board card connector 232 can include a fourth pin 233, which can be electrically connected with the second board card output interface 231.

[0077] It can be understood that the fourth pin 233 is electrically connected with the second board card output interface 231, so that the second board card output interface 231 can be electrically connected with the circuit board connector 150 through the fourth pin 233, so that the second board card output interface 231 can provide a low-level signal for the circuit board 100 through the fourth pin 233.

[0078] From the above, it can be understood that in some examples, the board card connector 211 (including the first board card connector 222 or the second board card connector 232) can be in a plug-in manner to realize electrical connection with the circuit board connector 150.

[0079] In other examples, as shown in Figure 3A and Figure 3B The computing device 200 can include a cable 117, and the board card connector 211 can be electrically connected with the circuit board connector 150 through the cable 117, so as to improve the flexibility of electrical connection between the board card connector 211 and the circuit board connector 150.

[0080] It should be noted that in some examples, taking Figure 3A and Figure 3B as an example, the first board card connector 222 and the second board card connector 232 are the same structure, that is, when the first type board card 220 is electrically connected with the circuit board 100, the board card connector 211 is the first board card connector 222; when the second type board card 230 is electrically connected with the circuit board 100, the board card connector 211 is the second board card connector 232. In other examples, the first board card connector 222 and the second board card connector 232 can also be two independent board card connectors 211, and the embodiments of the present application do not make further limitation.

[0081] From the above, it can be understood that the first board card output interface 221 can output a high-level signal, and the second board card output interface 231 can output a low-level signal. That is, the first type board card 220 and the second type board card 230 can output different level signals.

[0082] In some examples, as shown in Figure 3A andFigure 3B As shown, the circuit board circuit 170 can include the auxiliary detection unit 120. That is, in some examples, as shown in FIG. 1, the circuit board 100 can include the processing chip 110 and the auxiliary detection unit 120. Figure 3A and Figure 3B As shown, the circuit board 100 can include the processing chip 110 and the auxiliary detection unit 120.

[0083] In some examples, the processing chip 110 can include a tri-state interface 113 and a first detection interface 111. The auxiliary detection unit 120 can be electrically connected between the first set voltage terminal G1 and a first node Q1, and the first node Q1 can be electrically connected to the tri-state interface 113 and the first detection interface 111. The first node Q1 can also be used to be electrically connected to different types of board cards 210.

[0084] It can be understood that the tri-state interface 113 has three states of input state, output state and high impedance state. The first detection interface 111 can be used to detect whether the board card 210 is in place or not in place, and the type of the board card 210 in place. In some examples, the tri-state interface 113 and the first detection interface 111 can be electrically connected to the pins of the circuit board connector 150.

[0085] It can be understood that the first set voltage terminal G1 can have a set voltage value. In some examples, as shown in FIG. 1, the first set voltage terminal G1 can include a first power supply terminal VCC1. In some examples, the voltage value of the first power supply terminal VCC1 can be 3.3V, that is, the set voltage value of the first set voltage terminal G1 can be 3.3V. In other examples, the first power supply terminal VCC1 can also have other voltage values to meet different use requirements. Figure 3A In other examples, as shown in FIG. 2, the first set voltage terminal G1 can also include a first ground terminal GND1. That is, the set voltage value of the first set voltage terminal G1 can be 0V.

[0086] Figure 3B It can be understood that setting the first set voltage terminal G1 to include the first power supply terminal VCC1 or the first ground terminal GND1 improves the applicability of the circuit board 100 and meets different use requirements.

[0087] The first node Q1 can be used to be electrically connected to different types of board cards 210. In some examples, the first node Q1 can be electrically connected to the first type of board card 220 or the second type of board card 230. It can be understood that since the first type of board card 220 can output a high-level signal, the first type of board card 220 can pull up the voltage value of the first node Q1; since the second type of board card 230 can output a low-level signal, the second type of board card 230 can pull down the voltage value of the first node Q1.

[0088] The first node Q1 can be used to be electrically connected to different types of board cards 210. In some examples, the first node Q1 can be electrically connected to the first type of board card 220 or the second type of board card 230. It can be understood that since the first type of board card 220 can output a high-level signal, the first type of board card 220 can pull up the voltage value of the first node Q1; since the second type of board card 230 can output a low-level signal, the second type of board card 230 can pull down the voltage value of the first node Q1.

[0089] ​It can be understood that, since the auxiliary detection unit 120 is electrically connected between the first node Q1 and the first set voltage terminal G1, the auxiliary detection unit 120 can be used to cooperate with the state of the tri-state interface 113 to change the voltage value of the first node Q1 when different types of board cards 210 are electrically connected to the first node Q1. It can be understood that the state of the tri-state interface 113 is the current state of the tri-state interface 113.

[0090] It can be understood that, since the first node Q1 is electrically connected to the first detection interface 111, when the voltage value of the first node Q1 changes, the voltage value received by the first detection interface 111 changes, so that the level signal received by the first detection interface 111 changes.

[0091] In some examples, when the voltage value received by the first detection interface 111 is less than the first set voltage threshold, the level signal received by the first detection interface 111 is a low level signal. When the voltage value received by the first detection interface 111 is greater than the second set voltage threshold, the level signal received by the first detection interface 111 is a high level signal. It can be understood that the second set voltage threshold is greater than the first set voltage threshold.

[0092] In some examples, the processing chip 110 is configured to control the state of the tri-state interface 113, and detect the level signal received by the first detection interface 111, and determine the first board card in-place information according to the state of the tri-state interface 113 and the level signal received by the first detection interface 111. The first board card in-place information includes whether a board card 210 is electrically connected to the circuit board 100 through the first node Q1, and the type of the board card 210 electrically connected to the circuit board 100.

[0093] It can be understood that the processing chip 110 can be configured to set the state of the tri-state interface 113 to the input state, the output state, or the high impedance state.

[0094] It can be understood that the auxiliary detection unit 120 can play an auxiliary detection role. When different types of board cards 210 are electrically connected to the first node Q1, the auxiliary detection unit 120 can cooperate with the state of the tri-state interface 113 to change the voltage value of the first node Q1. That is, when the first node Q1 is electrically connected to different types of board cards 210 in different states of the tri-state interface 113, the auxiliary detection unit 120 can make the voltage value of the first node Q1 different, so that the level signal received by the first detection interface 111 can be different.

[0095] In this way, the processing chip 110 can determine whether the board card 210 is electrically connected to the circuit board 100 through the first node Q1 (i.e., whether the board card 210 is in place or not in place) and the type of the board card 210 electrically connected to the circuit board 100 (i.e., the type of the board card 210 in place) according to the state of the tri-state interface 113 and the level signal received by the first detection interface 111, so that the circuit board 100 can determine the type of the board card 210 through which the signal is transmitted between the processing chip 110 and the board card 210, improve the reliability of signal transmission between the circuit board 100 and the board card 210, and improve the use reliability of the circuit board 100. In addition, since the processing chip 110 can determine the type of the board card 210 electrically connected to the circuit board 100, when the board card 210 electrically connected to the circuit board 100 fails and causes abnormal signal transmission, the processing chip 110 can determine which type of board card 210 (e.g., the first type of board card 220 or the second type of board card 230) fails, thereby reducing the difficulty of maintenance and improving the use convenience of the circuit board 100.

[0096] In addition, the detection of whether the board card 210 is in place and the type of the board card 210 in place can be realized through the first detection interface 111, thereby improving the use convenience of the circuit board 100.

[0097] It can be understood that the use of the auxiliary detection unit 120 enables the processing chip 110 to determine the first board card in place information, which on the one hand does not need to change the structure of the connector (e.g., the circuit board connector 150 and the board card connector 211), and on the other hand does not need to set a complex logic circuit, thereby simplifying the structure of the circuit board 100 and reducing the cost of the circuit board 100.

[0098] In some examples, as shown in FIGS. 1A and 1B, the processing chip 110 can include a first input interface 114. Figure 3A and Figure 3B The first input interface 114 can be multiplexed as the first detection interface 111.

[0099] In some examples, the first input interface 114 can be a low-speed signal input interface. In other examples, the first input interface 114 can also be a high-speed signal input interface. It can be understood that the first input interface 114 is used to receive a stable level signal, for example, the first input interface 114 can be used to receive a stable high-level signal, or the first input interface 114 can also be used to receive a low-stable level signal.

[0100] It can be understood that the first input interface 114 is multiplexed as the first detection interface 111, that is, the processing chip 110 can realize the detection of the first board card in-place information through the first input interface 114, without the need to set an additional detection interface, saving the I / O resources of the processing chip 110. Moreover, the pins of the circuit board connector 150 can be electrically connected with the interface of the processing chip 110, so that setting the first input interface 114 to be multiplexed as the first detection interface 111 does not need to set an additional detection pin on the circuit board connector 150, improves the pin reference efficiency, reduces the number of pins on the circuit board connector 150, and is beneficial to reducing the length of the circuit board connector 150. Moreover, since the interface of the processing chip 110 can be electrically connected with the pins of the circuit board connector 150 through the circuit board circuit 170, setting the first input interface 114 to be multiplexed as the first detection interface 111 can also simplify the structure of the circuit board circuit 170, reduce the occupied space of the circuit board circuit 170, and reduce the design cost.

[0101] In some examples, as shown in Figure 3A and Figure 3B The processing chip 110 can include a power supply interface 116, which can be electrically connected with the fifth power supply end VCC5, so that the fifth power supply end VCC5 can supply power to the processing chip 110, so that the processing chip 110 can work normally.

[0102] In some examples, the voltage value of the fifth power supply end VCC5 can be 3.3V. In other examples, the fifth power supply end VCC5 can also have other voltage values to meet different use requirements.

[0103] Figure 3C The structural diagram of the computing device provided by some embodiments of the present application is shown. Figure 3D The structural diagram of the computing device provided by some embodiments of the present application is shown.

[0104] In some examples, as shown in Figure 3C and Figure 3D The auxiliary detection unit 120 can include a third resistor R3.

[0105] It can be understood that setting the auxiliary detection unit 120 to include the third resistor R3 can not only play an auxiliary detection role, but also play a current limiting role, avoiding the current value between the first node Q1 and the first set voltage end G1 being too large, improving the reliability of the circuit board circuit 170, and thus improving the use reliability of the circuit board 100.

[0106] In some examples, the resistance value of the third resistor R3 can be 47KΩ. In other examples, the third resistor R3 can also have other resistance values to meet different use requirements.

[0107] In some examples, as shown in Figure 3A and Figure 3B , the circuit board circuit 170 can include a first resistance unit 131. That is, in some examples, the circuit board 100 can further include the first resistance unit 131, and the first node Q1 is electrically connected to the tri-state interface 113 through the first resistance unit 131.

[0108] It can be understood that the first resistance unit 131 plays a role of current limiting protection. The first node Q1 is electrically connected to the tri-state interface 113 through the first resistance unit 131, which can avoid excessive current between the first node Q1 and the tri-state interface 113, and improve the reliability of the circuit board circuit 170.

[0109] In some examples, as shown in Figure 3C and Figure 3D , the first resistance unit 131 can include a first resistance R1, which simplifies the structure of the first resistance unit 131 and reduces the cost of the circuit board 100.

[0110] In some examples, the resistance value of the first resistance R1 can be 10KΩ or 1KΩ. In other examples, the first resistance R1 can also have other resistance values to meet different use requirements.

[0111] In some examples, as shown in Figure 3A and Figure 3B , the circuit board circuit 170 can include a second resistance unit 132. That is, in some examples, the circuit board 100 can further include the second resistance unit 132, and the first node Q1 is electrically connected to the first detection interface 111 through the second resistance unit 132.

[0112] It can be understood that the second resistance unit 132 plays a role of current limiting protection. The first node Q1 is electrically connected to the first detection interface 111 through the second resistance unit 132, which can avoid excessive current between the first node Q1 and the first detection interface 111, and improve the reliability of the circuit board circuit 170.

[0113] In some examples, as shown in Figure 3C and Figure 3D , the second resistance unit 132 can include a second resistance R2, which simplifies the structure of the second resistance unit 132 and reduces the cost of the circuit board 100.

[0114] In some examples, the resistance value of the second resistance R2 can be 33Ω. In other examples, the second resistance R2 can also have other resistance values to meet different use requirements.

[0115] Figure 4A The flowchart of the board detection method provided by some embodiments of the present application. Figure 4BA flowchart of a board detection method provided for some embodiments of the present application. Figure 4C A flowchart of a board detection method provided for some embodiments of the present application.

[0116] As described above, the processing chip 110 can determine the first board in-place information according to the state of the tri-state interface 113 and the level signal received by the first detection interface 111. Next, the method for the processing chip 110 to determine the first board in-place information (hereinafter referred to as a "board detection method") is described in detail. Figures 4A-4C As described above, the processing chip 110 can determine the first board in-place information according to the state of the tri-state interface 113 and the level signal received by the first detection interface 111. Next, the method for the processing chip 110 to determine the first board in-place information (hereinafter referred to as a "board detection method") is described in detail.

[0117] In some examples, the board detection method includes a first detection stage and a second detection stage. For example, as shown in FIG. 1, the board detection method includes a first detection stage S101a-S103a and a second detection stage S104a-S105a. Figure 4A As shown in FIG. 1, the first detection stage includes:

[0118] The first detection stage includes:

[0119] In step S101a, the tri-state interface is controlled to be in a high-impedance state, and the level signal received by the first detection interface is detected.

[0120] In step S102a, if the first detection interface receives a first level signal, it is determined that one of the first type of board and the second type of board is electrically connected to the circuit board through the first node.

[0121] In step S103a, if the first detection interface receives a second level signal, the second detection stage is entered.

[0122] For example, after the processing chip 110 is powered on, the first detection stage can be entered, at which time the processing chip 110 can control the tri-state interface 113 to be in a high-impedance state, and then detect the level signal received by the first detection interface 111. If the first detection interface 111 receives a first level signal, it is determined that one of the first type of board 220 and the second type of board 230 is electrically connected to the circuit board 100 through the first node Q1, that is, it is determined that the first type of board 220 or the second type of board 230 is in place.

[0123] That is, in the first detection stage, the tri-state interface 113 is controlled to be in a high-impedance state, and once the first detection interface 111 receives a first level signal, the processing chip 110 can not only determine that the board 210 is in place, but also determine the type of the board 210 in place (one of the first type of board 220 and the second type of board 230), thereby improving the use reliability and convenience of the circuit board 100.

[0124] In the first detection stage, if the first detection interface 111 receives a second level signal, the second detection stage is entered.

[0125] It can be understood that the second level signal is different from the first level signal. In some examples, the first level signal can be a high level signal, and the second level signal can be a low level signal. In other examples, the first level signal can be a low level signal, and the second level signal can be a high level signal.

[0126] As shown in the examples, Figure 4A The second detection stage includes:

[0127] In step S201a, the tri-state interface is switched from the high-impedance state to the target state, and the level signal received by the first detection interface is detected.

[0128] In step S202a, if the first detection interface still receives the second level signal, it is determined that the other one of the first type of board card and the second type of board card is electrically connected to the circuit board through the first node.

[0129] In step S203a, if the first detection interface receives the first level signal, it is determined that no board card is electrically connected to the circuit board through the first node.

[0130] In the second detection stage, the processing chip 110 can switch the tri-state interface 113 from the high-impedance state to the target state. In some examples, the target state can be an input state. In other examples, the target state can be an output state. It can be understood that the processing chip 110 detects the level signal received by the first detection interface 111 after switching the tri-state interface 113 to the target state.

[0131] In the second detection stage, if the first detection interface 111 still receives the second level signal, it is determined that the other one of the first type of board card 220 and the second type of board card 230 is electrically connected to the circuit board 100 through the first node Q1, that is, it is determined that the other one of the first type of board card 220 and the second type of board card 230 is in place.

[0132] In the first detection stage, if the first detection interface 111 receives the first level signal, it is determined that the first type of board card 220 is in place; then, in the second detection stage, when the first detection interface 111 receives the second level signal, it is determined that the second type of board card 230 is in place; conversely, in the first detection stage, if the first detection interface 111 receives the first level signal, it is determined that the second type of board card 230 is in place, then, in the second detection stage, when the first detection interface 111 receives the second level signal, it is determined that the first type of board card 220 is in place.

[0133] It can be understood that in the second detection stage, if the first detection interface 111 receives the first level signal, it is determined that no board card 210 is electrically connected to the circuit board 100 through the first node Q1, that is, both the first type of board card 220 and the second type of board card 230 are off.

[0134] That is, the board card detection method includes a first detection stage and a second detection stage, the state of the tri-state interface 113 is different in the first detection stage and the second detection stage, so that the auxiliary detection unit 120 can cooperate with the state of the tri-state interface 113, change the voltage value of the first node Q1 when the board card 210 of different types is electrically connected to the first node Q1, so that the level signal received by the first detection interface 111 can change, so that the processing chip 110 can determine the first board card in-place information according to the state of the tri-state interface 113 and the level signal received by the first detection interface 111, improve the transmission reliability of the signal between the circuit board 100 and the board card 210, thereby improving the use reliability of the circuit board 100.

[0135] From the above, the first set voltage terminal G1 can include the first power terminal VCC1 or the first ground terminal GND1. Next, the board card in-place detection method is exemplarily described when the first set voltage terminal G1 includes the first power terminal VCC1 and the first ground terminal GND1, respectively.

[0136] In some examples, when the first set voltage terminal G1 includes the first power terminal VCC1: the first level signal is a low level signal, the second level signal is a high level signal, and the target state of the tri-state interface 113 is an input state; in the first detection stage, if the first detection interface 111 receives a low level signal, it is determined that the second type of board card 230 is electrically connected to the circuit board 100 through the first node Q1; in the second detection stage, if the first detection interface 111 receives a high level signal, it is determined that the first type of board card 220 is electrically connected to the circuit board 100 through the first node Q1.

[0137] That is, as shown in Figure 4B When the first set voltage terminal G1 includes the first power terminal VCC1, the board card detection method includes:

[0138] The first detection stage includes:

[0139] Step S101b, control the tri-state interface to be in a high resistance state, and detect the level signal received by the first detection interface;

[0140] Step S102b, if the first detection interface receives a low level signal, it is determined that the second type of board card is electrically connected to the circuit board through the first node;

[0141] Step S103b, if the first detection interface receives a high level signal, enter the second detection stage;

[0142] For example, when the first set voltage terminal G1 includes the first power terminal VCC1, in the first detection stage, the processing chip 110 controls the tri-state interface 113 to be in a high resistance state. Again referring to Figure 3C, the first power supply end VCC1 can pull up the voltage value of the first detection interface 111, that is, when the board card 210 (including the first type of board card 220 and the second type of board card 230) is off-site, the voltage value of the first node Q1 is relatively high, so that the first detection interface 111 can receive a high level signal.

[0143] It can be understood that, since the second board card output interface 231 is electrically connected to the third ground end GND3 through the fifth resistor R5, the second board card output interface 231 can output a low level signal. In this way, when the second type of board card 230 is electrically connected to the circuit board 100 through the first node Q1, the voltage value of the first node Q1 can be pulled down, that is, the first detection interface 111 can receive a low level signal.

[0144] That is, in the first detection stage, the control tri-state interface 113 is in a high resistance state, and once the first detection interface 111 receives a low level signal, it can be determined that the second type of board card 230 is in place.

[0145] For example, when the second type of board card 230 is in place, the voltage value received by the first detection interface 111 is about 0.007V. Wherein, V is the voltage value received by the first detection interface 111, VCC3 is the voltage value of the third power supply end VCC3, R3 is the resistance value of the third resistor R3, and R5 is the resistance value of the fifth resistor R5.

[0146] In this way, by setting the resistance value of the third resistor R3 and the resistance value of the fifth resistor R5, the voltage value received by the first detection interface 111 can be less than the first set voltage threshold, that is, the first detection interface 111 can receive a low level signal.

[0147] It should be noted that the resistance value of the second resistor R2 is usually small (for example, the resistance value of the second resistor R2 can be 33Ω), in order to facilitate calculation, the embodiment of the present application does not consider the voltage drop of the second resistor R2 when calculating the voltage value received by the first detection interface 111, that is, does not consider the influence of the second resistor R2 on the voltage value received by the first detection interface 111.

[0148] In some examples, the voltage value of the third power supply end VCC3 can be 3.3V, the resistance value of the third resistor R3 can be 47KΩ (unit: kilo-ohm), and the resistance value of the fifth resistor R5 can be 100Ω (unit: ohm). At this time, the voltage value received by the first detection interface 111 is about 0.007V.

[0149] It can be understood that when the first detection interface 111 receives a high level signal, it cannot be determined whether the first power supply end VCC1 pulls the voltage value of the first detection interface 111 high or the first type of board card 220 is in place, so that the third power supply end VCC3 pulls the voltage value of the first detection interface 111 high. Therefore, it is necessary to enter the second detection stage.

[0150] As shown in Figure 4B The second detection stage includes:

[0151] Step S201b, the tri-state interface is switched from a high resistance state to an input state, and the level signal received by the first detection interface is detected;

[0152] Step S202b, if the first detection interface still receives a high level signal, it is determined that the first type of board card is electrically connected to the circuit board through the first node;

[0153] Step S203b, if the first detection interface receives a low level signal, it is determined that no board card is electrically connected to the circuit board through the first node.

[0154] As can be seen from the above, when the first set voltage end G1 includes the first power supply end VCC1, in the second detection stage, the target state of the tri-state interface 113 is the input state. That is, in the second detection stage, the processing chip 110 controls the tri-state interface 113 to switch from a high resistance state to an input state, and then detects the level signal of the first detection interface 111.

[0155] Again referring to Figure 3C When the tri-state interface 113 is in the input state and the first type of board card 220 is electrically connected to the first node Q1, the third resistor R3 can be connected in parallel with the fourth resistor R4. At this time, the voltage value received by the first detection interface 111 is about Wherein, V is the voltage value received by the first detection interface 111, VCC1 is the voltage value of the first power supply end VCC1, R1 is the resistance value of the first resistor R1, R3 is the resistance value of the third resistor R3, R4 is the resistance value of the fourth resistor R4, and R3 / / R4 is the resistance value of the third resistor R3 and the fourth resistor R4 in parallel.

[0156] It can be understood that since the resistance value of the third resistor R3 and the fourth resistor R4 in parallel is less than the resistance value of the third resistor R3 itself, the voltage drop between the first power supply end VCC1 and the first node Q1 can be smaller, thereby making the voltage value of the first node Q1 larger.

[0157] For example, the resistance values of the first resistor R1, the third resistor R3 and the fourth resistor R4 can be set so that the voltage value received by the first detection interface 111 can be greater than the second set voltage threshold, that is, the first detection interface 111 can receive a high level signal.

[0158] In some examples, the resistance value of the fourth resistor R4 can be less than the resistance value of the third resistor R3.

[0159] In some examples, the voltage value of the first power terminal VCC1 can be 3.3V, the resistance value of the first resistor R1 can be 10KΩ, the resistance value of the third resistor R3 can be 47KΩ, and the resistance value of the fourth resistor R4 can be 1KΩ. At this time, the voltage value received by the first detection interface 111 is about 3V.

[0160] Referring again to Figure 3C When the tri-state interface 113 is in the input state and the board card 210 (including the first type of board card 220 and the second type of board card 230) is off-site, the voltage value received by the first detection interface 111 is about Wherein, V is the voltage value received by the first detection interface 111, VCC1 is the voltage value of the first power terminal VCC1, R1 is the resistance value of the first resistor R1, and R3 is the resistance value of the third resistor R3.

[0161] It can be understood that, since the board card 210 is off-site, there is no resistor in parallel with the third resistor R3 at this time, so that the voltage drop between the first power terminal VCC1 and the first node Q1 is large, thereby making the voltage value of the first node Q1 small.

[0162] In examples, the resistance value of the first resistor R1 and the resistance value of the third resistor R3 can be set so that the voltage value received by the first detection interface 111 can be less than the first set voltage threshold, that is, the first detection interface 111 can receive a low-level signal.

[0163] In some examples, the voltage value of the first power terminal VCC1 can be 3.3V, the resistance value of the first resistor R1 can be 10KΩ, and the resistance value of the third resistor R3 can be 47KΩ. At this time, the voltage value received by the first detection interface 111 is about 0.18V.

[0164] It can be seen that, in the first detection stage, the tri-state interface 113 is in the high resistance state, and the first detection interface 111 receives a low-level signal, so that the second type of board card 230 is on-site; in the second detection stage, the tri-state interface 113 is in the input state, and when the first detection interface 111 receives a high-level signal, the first type of board card 220 is on-site; when the first detection interface 111 receives a low-level signal, the board card 210 (including the first type of board card 220 and the second type of board card 230) is off-site.

[0165] That is, when the first setting voltage terminal G1 includes the first power supply terminal VCC1, the board card 210 (including the first type board card 220 and the second type board card 230) in the on-site or off-site, the corresponding relationship between the state of the tri-state interface 113 and the level signal received by the first detection interface 111 has uniqueness.

[0166] In this way, in different detection stages, the state of the tri-state interface 113 is different, so that the auxiliary detection unit 120 (that is, the third resistor R3) can cooperate with the state of the tri-state interface 113, change the voltage value of the first node Q1 when the different types of board cards 210 are in the on-site, so that the level signal received by the first detection interface 111 can be changed, thereby enabling the processing chip 110 to determine the first board card on-site information.

[0167] For example, when the first setting voltage terminal G1 includes the first power supply terminal VCC1, the truth table of the first board card on-site information is shown in Table 1.

[0168] Table 1

[0169]

[0170] It can be understood that in Table 1, the "Z" state of the tri-state interface 113 represents the high resistance state, and the "0" state represents the input state. The "0" state of the first detection interface 111 represents that the first detection interface 111 receives a low level signal, and the "1" state represents that the first detection interface 111 receives a high level signal. The "X" in the board card type represents that no board card is in the on-site. The "Y" in the on-site state represents that the board card 210 is in the on-site, and the "N" represents that the board card 210 is off-site.

[0171] As shown in Table 1, in the first detection stage, the tri-state interface 113 is in the Z state (that is, the high resistance state). At this time, if the first detection interface 111 receives a low level signal, it is determined that the second type board card 230 is in the on-site. If the first detection interface 111 receives a high level signal, it enters the second detection stage. In the second detection stage, the tri-state interface 113 is in the 0 state (that is, the input state). At this time, if the first detection interface 111 receives a high level signal, it is determined that the first type board card 220 is in the on-site. If the first detection interface 111 is a low level signal, it is determined that no board card 210 is in the on-site.

[0172] That is, the embodiment of the present application sets the auxiliary detection unit 120, so that the processing chip 110 can determine the first board card in-place information according to the control logic (for example, Table 1) after obtaining the level signal received by the first detection interface 111, improves the use reliability of the circuit board 100, and does not need to change the structure of the connector (for example, the circuit board connector 150 and the board card connector 211), nor set a complex logic circuit, simplifies the structure of the circuit board 100, and reduces the cost of the circuit board 100.

[0173] In some examples, when the first set voltage terminal G1 includes the first ground terminal GND1: the first level signal is a high level signal, the second level signal is a low level signal, and the target state of the tri-state interface 113 is an output state; in the first detection stage, if the first detection interface 111 receives a high level signal, it is determined that the first type of board card 220 is electrically connected to the circuit board 100 through the first node Q1; in the second detection stage, if the first detection interface 111 receives a low level signal, it is determined that the second type of board card 230 is electrically connected to the circuit board 100 through the first node Q1.

[0174] That is, as shown in Figure 4C , when the first set voltage terminal G1 includes the first ground terminal GND1, the board card detection method includes:

[0175] The first detection stage includes:

[0176] Step S101c, control the tri-state interface to be in a high resistance state, and detect the received level signal of the first detection interface;

[0177] Step S102c, if the first detection interface receives a high level signal, it is determined that the first type of board card is electrically connected to the circuit board through the first node;

[0178] Step S103c, if the first detection interface receives a low level signal, enter the second detection stage;

[0179] In some examples, when the first set voltage terminal G1 includes the first ground terminal GND1, in the first detection stage, the processing chip 110 controls the tri-state interface 113 to be in a high resistance state. Again referring to Figure 3D , the first ground terminal GND1 can pull down the voltage value of the first detection interface 111, that is, when the board card 210 (including the first type of board card 220 and the second type of board card 230) is off-site, the voltage value of the first node Q1 is lower, so that the first detection interface 111 can receive a low level signal.

[0180] It can be understood that, since the first board card output interface 221 is electrically connected with the third power supply end VCC3 through the fourth resistor R4, the first board card output interface 221 can output a high level signal. In this way, when the first type of board card 220 is electrically connected to the circuit board 100 through the first node Q1, the voltage value of the first node Q1 can be pulled high, that is, the first detection interface 111 can receive a high level signal.

[0181] That is, in the first detection stage, the control tri-state interface 113 is in a high resistance state, and once the first detection interface 111 receives a high level signal, it can be determined that the first type of board card 220 is in place.

[0182] For example, when the first type of board card 220 is in place, the voltage value received by the first detection interface 111 is about Wherein, V is the voltage value received by the first detection interface 111, VCC3 is the voltage value of the third power supply end VCC3, R3 is the resistance value of the third resistor R3, and R4 is the resistance value of the fourth resistor R4.

[0183] In this way, the resistance value of the third resistor R3 and the resistance value of the fourth resistor R4 can be set so that the voltage value received by the first detection interface 111 is greater than the second set voltage threshold, that is, the first detection interface 111 can receive a high level signal.

[0184] In some examples, the voltage value of the third power supply end VCC3 can be 3.3V, the resistance value of the third resistor R3 can be 47KΩ, and the resistance value of the fourth resistor R4 can be about 4.7KΩ. At this time, the voltage value received by the first detection interface 111 is about 3V.

[0185] It can be understood that, when the first detection interface 111 receives a low level signal, it cannot be determined whether the first ground end GND1 pulls down the voltage value of the first detection interface 111 or the second type of board card 230 is in place, so that the third ground end GND3 pulls down the voltage value of the first detection interface 111. Therefore, it is necessary to enter the second detection stage.

[0186] For example, as shown in Figure 4C The second detection stage includes:

[0187] Step S201c, switching the tri-state interface from a high resistance state to an output state, detecting the level signal received by the first detection interface;

[0188] Step S202c, if the first detection interface still receives a low level signal, it is determined that the second type of board card is electrically connected to the circuit board through the first node;

[0189] Step S203c, if the first detection interface receives a high level signal, it is determined that no board card is electrically connected to the circuit board through the first node.

[0190] As described above, when the first setting voltage terminal G1 includes the first ground terminal GND1, in the second detection stage, the target state of the tri-state interface 113 is the output state. That is, in the second detection stage, the processing chip 110 controls the tri-state interface 113 to switch from the high resistance state to the output state, and then detects the level signal of the first detection interface 111. It can be understood that when the tri-state interface 113 is in the output state, the tri-state interface 113 can output a high level signal.

[0191] Again referring to Figure 3D When the tri-state interface 113 is in the output state and the second type of board card 230 is electrically connected to the first node Q1, the third resistor R3 and the fifth resistor R5 can be connected in parallel. At this time, the voltage value received by the first detection interface 111 is about Wherein, V is the voltage value received by the first detection interface 111, VCC is the voltage value output by the tri-state interface 113, R3 is the resistance value of the third resistor R3, R5 is the resistance value of the fifth resistor R5, and R3 / / R5 is the resistance value after the third resistor R3 and the fifth resistor R5 are connected in parallel.

[0192] It can be understood that since the resistance value after the third resistor R3 and the fifth resistor R5 are connected in parallel is smaller than the resistance value of the third resistor R3 itself, the voltage value of the first node Q1 can be smaller, so that the voltage value received by the first detection interface 111 can be smaller.

[0193] For example, the resistance value of the first resistor R1, the resistance value of the third resistor R3 and the resistance value of the fifth resistor R5 can be set so that the voltage value received by the first detection interface 111 is smaller than the first setting voltage threshold, that is, the first detection interface 111 can receive a low level signal.

[0194] In some examples, the resistance value of the third resistor R3 is greater than the resistance value of the fifth resistor R5.

[0195] It can be understood that by setting the resistance value of the third resistor R3 to be greater than the resistance value of the fifth resistor R5, when the second type of board card 230 is electrically connected to the first node Q1 and the third resistor R3 and the fifth resistor R5 are connected in parallel, the resistance value after the third resistor R3 and the fifth resistor R5 are connected in parallel is smaller, thereby reducing the voltage value of the first node Q1, so that the first detection interface 111 can receive a low level signal, that is, the processing chip 110 can detect the type of the board card 210 in place.

[0196] In some examples, the voltage value output by the tri-state interface 113 can be 3.3V, the resistance value of the first resistor R1 can be 1KΩ, the resistance value of the third resistor R3 can be 47KΩ, and the resistance value of the fifth resistor R5 can be 100Ω. At this time, the voltage value received by the first detection interface 111 is about 0.3V.

[0197] Referring again to Figure 3D When the tri-state interface 113 is in the output state and the board card 210 (including the first type of board card 220 and the second type of board card 230) is off-site, the voltage value received by the first detection interface 111 is about Wherein, V is the voltage value received by the first detection interface 111, VCC is the voltage value output by the tri-state interface 113, and R3 is the resistance value of the third resistor R3.

[0198] It can be understood that, since the board card 210 is off-site, there is no resistor in parallel with the third resistor R3 at this time, so that the voltage value of the first node Q1 is large.

[0199] In examples, the resistance value of the first resistor R1 and the resistance value of the third resistor R3 can be set so that the voltage value received by the first detection interface 111 can be greater than the second set voltage threshold, that is, the first detection interface 111 can receive a high-level signal.

[0200] In some examples, the voltage value output by the tri-state interface 113 can be 3.3V, the resistance value of the first resistor R1 can be 1KΩ, and the resistance value of the third resistor R3 can be 47KΩ. At this time, the voltage value received by the first detection interface 111 is about 3V.

[0201] It can be seen that, in the first detection stage, the tri-state interface 113 is in the high resistance state, and the first detection interface 111 receives a high-level signal, then the first type of board card 220 is on-site; in the second detection stage, the tri-state interface 113 is in the output state, and when the first detection interface 111 receives a low-level signal, the second type of board card 230 is on-site; when the first detection interface 111 receives a high-level signal, the board card 210 (including the first type of board card 220 and the second type of board card 230) is off-site.

[0202] That is, when the first set voltage terminal G1 includes the first ground terminal GND1, the board card 210 (including the first type of board card 220 and the second type of board card 230) is on-site or off-site, and the corresponding relationship between the different states of the tri-state interface 113 and the level signal received by the first detection interface 111 has uniqueness.

[0203] In this way, the state of the tri-state interface 113 is different in different detection stages, so that the auxiliary detection unit 120 (i.e., the third resistor R3) can cooperate with the state of the tri-state interface 113 to change the voltage value of the first node Q1 when the different types of board cards 210 are in place, so that the level signal received by the first detection interface 111 can be changed, thereby enabling the processing chip 110 to determine the first board card in-place information.

[0204] For example, when the first set voltage terminal G1 includes the first ground terminal GND1, the truth table of the first board card in-place information is shown in Table 2.

[0205] Table 2

[0206]

[0207] It can be understood that in Table 2, the "Z" state of the tri-state interface 113 represents the high-impedance state, and the "1" state represents the output state. The "0" state of the first detection interface 111 represents that the first detection interface 111 receives a low-level signal, and the "1" state represents that the first detection interface 111 receives a high-level signal. The "X" in the board card type represents that no board card is in place. The "Y" in the in-place state represents that the board card 210 is in place, and the "N" represents that the board card 210 is off.

[0208] As shown in Table 2, in the first detection stage, the tri-state interface 113 is in the Z state (i.e., the high-impedance state). At this time, if the first detection interface 111 receives a high-level signal, it is determined that the first type of board card 220 is in place. If the first detection interface 111 receives a low-level signal, it enters the second detection stage. In the second detection stage, the tri-state interface 113 is in the 1 state (i.e., the output state). At this time, if the first detection interface 111 receives a low-level signal, it is determined that the second type of board card 230 is in place. If the first detection interface 111 receives a high-level signal, it is determined that no board card 210 is in place.

[0209] That is, the embodiment of the present application sets the auxiliary detection unit 120, so that after the processing chip 110 obtains the level signal received by the first detection interface 111, it can determine the first board card in-place information according to the control logic (for example, Table 2), thereby improving the use reliability of the circuit board 100, without changing the structure of the connector (for example, the circuit board connector 150 and the board card connector 211) and without setting a complex logic circuit, thereby simplifying the structure of the circuit board 100 and reducing the cost of the circuit board 100.

[0210] In some examples, the processing chip 110 is configured to: when the tri-state interface 113 is in the high-impedance state and the first detection interface 111 receives the first level signal, determine that one of the first type of board card 220 and the second type of board card 230 is electrically connected to the circuit board 100 through the first node Q1; when the tri-state interface 113 is in the high-impedance state and the first detection interface 111 receives the second level signal, switch the tri-state interface 113 from the high-impedance state to the target state. When the tri-state interface 113 is in the target state and the first detection interface 111 receives the second level signal, determine that the other of the first type of board card 220 and the second type of board card 230 is electrically connected to the circuit board 100 through the first node Q1; when the tri-state interface 113 is in the target state and the first detection interface 111 receives the first level signal, determine that no board card 210 is electrically connected to the circuit board through the first node Q1.

[0211] It can be understood that the processing chip 110 can determine the first board card in-place information according to the control logic in cooperation with the state of the tri-state interface 113 after obtaining the level signal received by the first detection interface 111, which improves the use reliability of the circuit board 100, and does not need to change the structure of the connector (such as the circuit board connector 150 and the board card connector 211) or set a complex logic circuit, thereby simplifying the structure of the circuit board 100 and reducing the cost of the circuit board 100.

[0212] As described above, the circuit board connector 150 is configured to be electrically connected to the board card connector 211. In some examples, the board card connector 211 (including the first board card connector 222 of the first type of board card 220 and the second board card connector 232 of the second type of board card 230) can include a first test pin (not shown in the figure), and the circuit board connector 150 can include a first pin (not shown in the figure), and the first node Q1 can be electrically connected to the first pin. The first pin is configured to be electrically connected to the first test pin.

[0213] It can be understood that the first pin is electrically connected to the first test pin, and the first node Q1 is electrically connected to the first pin, so that the first test pin of the board card connector 211 can be electrically connected to the first node Q1 through the first pin of the circuit board connector 150, thereby improving the convenience of electrical connection between the board card 210 and the circuit board 100.

[0214] As known from the above, the first board connector 222 can include a third pin 223, and the second board connector 232 can include a fourth pin 233, the third pin 223 and the fourth pin 233 being configured to be electrically connected with the first pin. For example, the third pin is a first test pin of the first type of board 220, and the fourth pin is a first test pin of the second type of board 230. That is, the first pin can be configured to be electrically connected with the third pin 223 of the first type of board 220, and the first pin can also be configured to be electrically connected with the fourth pin 233 of the second type of board 230.

[0215] Figure 5A A structural diagram of a computing device provided for another embodiment of the present application. Figure 5B A structural diagram of a computing device provided for another embodiment of the present application.

[0216] In some examples, the board connector 211 further includes a second test pin (not shown in the figure). As shown in Figure 3C and Figure 3D The processing chip 110 further includes a second detection interface 112, and the second node Q2 is electrically connected to the second detection interface 112 and a second set voltage terminal G2. The board connector 150 further includes a second pin (not shown in the figure), and the second node Q2 is electrically connected to the second pin, the second pin being configured to be electrically connected with the second test pin.

[0217] The processing chip 110 is configured to detect a level signal received by the second detection interface 112, and determine second board in-place information according to the level signal received by the second detection interface 112. The second board in-place information includes whether there is a board 210 electrically connected to the circuit board 100 through the second node Q2.

[0218] It can be understood that the second set voltage terminal G2 can have a set voltage value. In some examples, as shown in Figure 3C and Figure 3D The second set voltage terminal G2 can include a second power terminal VCC2. In some examples, the voltage value of the second power terminal VCC2 can be 3.3V, that is, the set voltage value of the second set voltage terminal G2 can be 3.3V. In other examples, the second set power terminal VCC2 can also have other voltage values to meet different use requirements.

[0219] In other examples, as shown in Figure 5A and Figure 5B The second set voltage terminal G2 can include a second ground terminal GND2. That is, the set voltage value of the second set voltage terminal G2 can be 0V.

[0220] It can be understood that the second node Q2 is electrically connected to the second detection interface 112 and the second set voltage terminal G2, and thus, when the second set voltage terminal G2 includes the second power supply terminal VCC2, the voltage value of the second node Q2 can be pulled high, so that the second detection interface 112 can receive a high-level signal; when the second set voltage terminal G2 includes the second ground terminal GND2, the voltage value of the second node Q2 can be pulled low, so that the second detection interface 112 can receive a low-level signal.

[0221] It can be understood that the second node Q2 is electrically connected to the second pin, and the second pin is used to be electrically connected to the second test pin, so that the second test pin of the board card connector 211 can be electrically connected to the second node Q2 through the second pin of the circuit board connector 150, thereby improving the convenience of electrical connection between the board card 210 and the circuit board 100.

[0222] As shown in Figure 5A and Figure 5B , the first board card connector 222 can include a fifth pin 224, and the fifth pin 224 can be used to be electrically connected to the second pin, so that the first type of board card 220 can be electrically connected to the second node Q2. That is, the fifth pin 224 can be the second test pin of the first type of board card 220. As shown in Figure 5A and Figure 5B , the second board card connector 232 can include a sixth pin 234, and the sixth pin 234 can be used to be electrically connected to the second pin, so that the second type of board card 230 can be electrically connected to the second node Q2. That is, the sixth pin 234 can be the second test pin of the second type of board card 230.

[0223] As shown in Figure 3C and Figure 3D , when the second set voltage terminal G2 includes the second power supply terminal VCC2, the second test pin of the board card 210 (for example, the fifth pin 224 of the first type of board card 220 and the sixth pin 234 of the second type of board card 230) can be electrically connected to the fourth ground terminal GND4, so that once the second detection interface 112 receives a low-level signal, it can be determined that the fourth ground terminal GND4 pulls the voltage value of the second detection interface 112 low, that is, it can be determined that the board card 210 (the first type of board card 220 or the second type of board card 230) is in place.

[0224] As shown in Figure 5A and Figure 5BAs shown, when the second set voltage terminal G2 includes the second ground terminal GND2, the second test pin of the board 210 (e.g., the fifth pin 224 of the first type board 220 and the sixth pin 234 of the second type board 230) can be electrically connected to the fourth power supply terminal VCC4. In this way, once the second detection interface 112 receives a high-level signal, it can be determined that the fourth power supply terminal VCC4 pulls up the voltage value of the second detection interface 112, that is, it can be determined that the board 210 (the first type board 220 or the second type board 230) is in place.

[0225] This allows the processing chip 110 to determine the presence information of the second board based on the level signal received by the second detection interface 112. In other words, the processing chip 110 can determine whether board 210 is electrically connected to the circuit board 100 through the second node Q2 based on the level signal received by the second detection interface 112. This improves the reliability of the circuit board 100 and eliminates the need to change the structure of the connectors (e.g., circuit board connector 150 and board connector 211) or set up complex logic circuits. This simplifies the structure of the circuit board 100, reduces its cost, and improves its reliability.

[0226] In some examples, such as Figure 3C and Figure 3D As shown, when the second set voltage terminal G2 includes the second power supply terminal VCC2, the circuit board 100 also includes a sixth resistor R6, and the second node Q2 is electrically connected to the second power supply terminal VCC2 through the sixth resistor R6.

[0227] Understandably, the sixth resistor R6 can play a current limiting protection role, avoiding excessive current between the second power supply terminal VCC2 and the second node Q2, and improving the reliability of the circuit board 100.

[0228] In some examples, the resistance value of the sixth resistor R6 can be 4.7KΩ. In other examples, the sixth resistor R6 can also have other resistance values ​​to meet different application requirements.

[0229] In some examples, such as Figure 5A and Figure 5B As shown, when the second test pin (e.g., the fifth pin 224 and the sixth pin 234) of board 210 (including the first type board 220 and the second type board 230) is electrically connected to the fourth power supply terminal VCC4, board 210 may include a seventh resistor R7, so that the pin of board 210 can be electrically connected to the fourth power supply terminal VCC4 through the seventh resistor R7.

[0230] It can be understood that the seventh resistor R7 can play a role of current limiting protection, avoiding that the current between the fourth power supply end VCC4 and the second test pin of the board card 210 is too large, and improving the use reliability of the board card 210.

[0231] In some examples, the resistance value of the seventh resistor R7 can be 4.7KΩ. In other examples, the seventh resistor R7 can also have other resistance values to meet different use requirements.

[0232] In some examples, the processing chip 110 includes a second input interface 115, and the second input interface 115 is multiplexed as the second detection interface 112.

[0233] In some examples, the second input interface 115 can be a low-speed signal input interface. In other examples, the second input interface 115 can also be a high-speed signal input interface. It can be understood that the second input interface 115 is used to receive a stable level signal, for example, the second input interface 115 can be used to receive a stable high-level signal, or the second input interface 115 can also be used to receive a stable low-level signal.

[0234] It can be understood that the second input interface 115 is multiplexed as the second detection interface 112, that is, the processing chip 110 can detect the in-place information of the second board card through the second input interface 115, without the need to set an additional detection interface, thereby saving the I / O resources of the processing chip 110. Moreover, the pins of the circuit board connector 150 can be electrically connected with the interfaces of the processing chip 110, so that setting the second input interface 115 as the second detection interface 112 does not need to set an additional detection pin on the circuit board connector 150, thereby improving the pin reference efficiency, reducing the number of pins on the circuit board connector 150, and facilitating the reduction of the length of the circuit board connector 150. Moreover, since the interfaces of the processing chip 110 can be electrically connected with the pins of the circuit board connector 150 through the circuit board circuit 170, setting the second input interface 115 as the second detection interface 112 can also simplify the structure of the circuit board circuit 170, reduce the occupied space of the circuit board circuit 170, and reduce the design cost.

[0235] In some examples, the circuit board connector 150 can be rectangular or square. In other examples, the circuit board connector 150 can also have other shapes.

[0236] It can be understood that along the extension direction of the circuit board connector 150, the longer the length of the circuit board connector 150 is, the worse the electrical connection reliability between the circuit board connector 150 and the board card connector 211 is.

[0237] In some examples, the first pin and the second pin are respectively arranged close to two end portions of the circuit board connector 150 along an extension direction of the circuit board connector 150; or, the first pin and the second pin are respectively arranged close to two vertices of the circuit board connector 150 along an extension direction of a diagonal line of the circuit board connector 150.

[0238] In this way, the first pin and the second pin can be located at different positions of the circuit board connector 150, so that the processing chip 110 can detect the electrical connection state between the different positions of the circuit board connector 150 and the board card 210, improve the electrical connection reliability between the different positions of the circuit board connector 150 and the board card connector 211, and thus improve the electrical connection reliability between the circuit board 100 and the board card 210, thereby improving the transmission reliability of the signal.

[0239] In some examples, the number of the circuit board connectors 150 can be multiple.

[0240] For example, the number of the first nodes Q1 can be multiple. In some examples, one first node Q1 is electrically connected to one circuit board connector 150. In other examples, a part (one, two or more) of the multiple first nodes Q1 are electrically connected to one circuit board connector 150.

[0241] It can be understood that when the number of the first nodes Q1 is multiple, the number of the auxiliary detection units 120, the tri-state interfaces 113 and the first detection interfaces 111 are also multiple, and the number of the four of the first nodes Q1, the auxiliary detection units 120, the tri-state interfaces 113 and the first detection interfaces 111 are the same. One first node Q1 is electrically connected to the first set voltage terminal G1 through a first auxiliary detection unit 120, and one first node Q1 is electrically connected to one tri-state interface 113 and one first detection interface 111.

[0242] For example, the number of the second nodes Q2 can be multiple. In some examples, one second node Q2 is electrically connected to one circuit board connector 150. In other examples, a part (one, two or more) of the multiple second nodes Q2 are electrically connected to one circuit board connector 150.

[0243] It can be understood that when the number of the second nodes Q2 is multiple, the number of the second detection interfaces 112 is multiple, and one second node Q2 is electrically connected to one second detection interface 112.

[0244] It can be understood that the number of the board card connectors 150 is multiple, and at least one first node Q1 is electrically connected with one circuit board connector 150, and at least one second node Q2 is electrically connected with one circuit board connector 150, so that the processing chip 110 can detect the electrical connection state between each circuit board connector 150 and the board card 210, and the type of the board card 210 electrically connected with each circuit board connector 150, and the use performance of the circuit board 100 is improved.

[0245] It can be understood that when multiple board cards 210 are in place, the multiple board cards 210 in place can be the same type of board card 210 or different types of board card 210.

[0246] In some examples, one circuit board connector 150 can include multiple first pins. It can be understood that the number of the first nodes Q1 can be the same as the number of the first pins, and the multiple first nodes Q1 are electrically connected with the multiple first pins one by one.

[0247] For example, the multiple first pins can be arranged at intervals along the extension direction of the circuit board connector 150; and / or, the multiple first pins can be arranged at intervals along the direction intersecting the extension direction of the circuit board connector 150.

[0248] In this way, the first pins can be located at different positions of the circuit board connector 150, so that the processing chip 110 can detect the electrical connection state between the different positions of the circuit board connector 150 and the board card 210, improve the reliability of the electrical connection between the different positions of the circuit board connector 150 and the board card connector 211, and thus improve the reliability of the electrical connection between the circuit board 100 and the board card 210, thereby improving the transmission reliability of the signal.

[0249] As can be seen from the above, Figure 5A and Figure 5B As shown, the first board card connector 222 can include third pins 223, and the second board card connector 232 can include fourth pins 233, and the third pins 223 and the fourth pins 233 are used to be electrically connected with the first pins. It can be understood that when the first type of board card 220 is electrically connected with the circuit board 100, the number of the third pins 223 can be the same as the number of the first pins. When the second type of board card 230 is electrically connected with the circuit board 100, the number of the fourth pins 233 can be the same as the number of the first pins. That is, the number of the first test pins on the board card connector 211 is the same as the number of the first pins.

[0250] In some examples, one circuit board connector 150 can include multiple second pins. It can be understood that the number of the second nodes Q2 can be the same as the number of the second pins, and the multiple second nodes Q2 are electrically connected with the multiple second pins one by one.

[0251] In some examples, the plurality of second pins can be arranged in a direction along which the circuit board connector 150 extends; and / or the plurality of second pins can be arranged in a direction intersecting the direction along which the circuit board connector 150 extends.

[0252] In this way, the second pins can be arranged at different positions of the circuit board connector 150, so that the processing chip 110 can detect the electrical connection state between the different positions of the circuit board connector 150 and the board card 210, improve the electrical connection reliability between the different positions of the circuit board connector 150 and the board card connector 211, and thus improve the electrical connection reliability between the circuit board 100 and the board card 210, and improve the signal transmission reliability.

[0253] As described above, as shown in Figure 5A and Figure 5B The first board card connector 222 can include fifth pins 224, and the second board card connector 232 can further include sixth pins 234, and the fifth pins 224 and the sixth pins 234 are used to be electrically connected with the second pins. It can be understood that when the first type of board card 220 is electrically connected with the circuit board 100, the number of the fifth pins 224 can be the same as the number of the second pins. When the second type of board card 230 is electrically connected with the circuit board 100, the number of the sixth pins 234 can be the same as the number of the second pins. That is, the number of the second test pins on the board card connector 211 is the same as the number of the second pins.

[0254] As described above, the control chip 160 can be electrically connected with the processing chip 110, so that the signal can be transmitted between the processing chip 110 and the control chip 160. In some examples, the control chip 160 is used to receive the board card in-place information from the processing chip 110. It can be understood that the board card in-place information includes the first board card in-place information and the second board card in-place information.

[0255] In some examples, after the processing chip 110 determines the board card in-place information, the processing chip 110 can package the board card in-place information into a serial bus protocol (such as Local Bus or IIC, etc.) and send the board card in-place information to the control chip 160, so that the control chip 160 can obtain the board card in-place information. In this way, the user can obtain the board card in-place information through the control chip 160, and the use convenience of the circuit board 100 is improved.

[0256] In some examples, after the control chip 160 receives the board card in-place information, the control chip 160 can display the board card in-place information, for example, display that the first type of board card 220 is in place, or display that the second type of board card 230 is in place, or display that no board card 210 is in place, and the use convenience of the circuit board 100 is improved.

[0257] In summary, the embodiments of the present application have at least the following beneficial effects:

[0258] In the embodiments of the present application, the auxiliary detection unit 120 can play an auxiliary detection role. When the different types of board cards 210 are electrically connected to the first node Q1, the auxiliary detection unit 120 can cooperate with the state of the tri-state interface 113 to change the voltage value of the first node Q1, that is, when the first node Q1 is electrically connected to the different types of board cards 210 in different states of the tri-state interface 113, the auxiliary detection unit 120 can make the voltage value of the first node Q1 different, so that the level signal received by the first detection interface 111 can be different.

[0259] In this way, the processing chip 110 can determine whether the board card 210 is electrically connected to the circuit board 100 through the first node Q1 (that is, whether the board card 210 is in place or not in place) and the type of the board card 210 electrically connected to the circuit board 100 (that is, the type of the board card 210 in place) according to the state of the tri-state interface 113 and the level signal received by the first detection interface 111, so that the circuit board 100 can determine the signal transmission between the processing chip 110 and the board card 210, improve the reliability of signal transmission between the circuit board 100 and the board card 210, and improve the use reliability of the circuit board 100. Moreover, the detection of the two kinds of information of whether the board card 210 is in place and the type of the board card 210 in place can be realized through the first detection interface 111, which improves the use convenience of the circuit board 100.

[0260] In addition, since the processing chip 110 can determine the type of the board card 210 electrically connected to the circuit board 100, when the board card 210 electrically connected to the circuit board 100 fails and causes abnormal signal transmission, the processing chip 110 can determine which type of board card 210 (for example, the first type of board card 220 or the second type of board card 230) fails, which reduces the difficulty of maintenance and improves the use convenience of the circuit board 100.

[0261] It can be understood that the auxiliary detection unit 120 is arranged to enable the processing chip 110 to determine the first board card in place information, which on the one hand does not need to change the structure of the connector (for example, the circuit board connector 150 and the board card connector 211), and on the other hand does not need to set a complex logic circuit, thereby simplifying the structure of the circuit board 100 and reducing the cost of the circuit board 100.

[0262] The above merely describes the specific embodiments of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can think of changes or replacements within the technical range disclosed in the present application, which shall be covered in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A circuit board, characterized in that, Capable of electrical connection with different types of circuit boards; the circuit board includes: The processing chip includes a tri-state interface and a first detection interface; An auxiliary detection unit is electrically connected between a first set voltage terminal and a first node; the first node is electrically connected to the tri-state interface and the first detection interface; the first node is also used to electrically connect to different types of boards; the auxiliary detection unit is used to coordinate with the state of the tri-state interface to change the voltage value of the first node when the first node is electrically connected to different types of boards. The processing chip is used to: control the state of the tri-state interface, detect the level signal received by the first detection interface, and determine the first board's presence information based on the state of the tri-state interface and the level signal received by the first detection interface; The first board presence information includes whether a board is electrically connected to the circuit board through the first node, and the type of board electrically connected to the circuit board.

2. The circuit board according to claim 1, characterized in that, The first set voltage terminal includes a first power supply terminal or a first ground terminal.

3. The circuit board according to claim 1, characterized in that, Also includes: The first resistor unit, through which the first node is electrically connected to the tri-state interface.

4. The circuit board according to claim 1, characterized in that, Also includes: The second resistor unit is used to electrically connect the first node to the first detection interface.

5. The circuit board according to claim 3 or 4, characterized in that, The board includes a board connector, and the board connector includes a first test pin; the circuit board also includes: A circuit board connector for electrical connection with the board connector; the circuit board connector includes a first pin, a first node electrically connected to the first pin, and the first pin for electrical connection with the first test pin.

6. The circuit board according to claim 5, characterized in that, The board connector further includes a second test pin; the processing chip further includes a second detection interface, and a second node is electrically connected to the second detection interface and a second set voltage terminal; the circuit board connector further includes a second pin, and a second node is electrically connected to the second pin, which is used to be electrically connected to the second test pin. The processing chip is used to: detect the level signal received by the second detection interface, and determine the second board's presence information based on the level signal received by the second detection interface; The second board presence information includes whether a board is electrically connected to the circuit board through the second node.

7. The circuit board according to claim 6, characterized in that, The processing chip includes a first input interface, which is multiplexed as the first detection interface; and / or, the processing chip includes a second input interface, which is multiplexed as the second detection interface.

8. The circuit board according to any one of claims 1 to 4, characterized in that, The processing chip is used for: When the tri-state interface is in a high-impedance state and the first detection interface receives a first-level signal, it is determined that one of the first type of board and the second type of board is electrically connected to the circuit board through the first node; when the tri-state interface is in a high-impedance state and the first detection interface receives a second-level signal, the tri-state interface is switched from the high-impedance state to the target state. When the tri-state interface is in the target state and the first detection interface receives the second level signal, it is determined that another of the first type of board and the second type of board is electrically connected to the circuit board through the first node; when the tri-state interface is in the target state and the first detection interface receives the first level signal, it is determined that no board is electrically connected to the circuit board through the first node.

9. The circuit board according to any one of claims 1 to 4, characterized in that, It also includes a control chip, which is electrically connected to the processing chip and is used to receive board presence information from the processing chip.

10. A computing device, characterized in that, include: The circuit board as described in any one of claims 1 to 9; Multiple cards are used for electrical connection to the circuit board.

11. The computing device according to claim 10, characterized in that, The plurality of boards includes a first type of board and a second type of board; The first type of board includes a first board output interface and a fourth resistor, wherein the first board output interface is electrically connected to a third power supply terminal through the fourth resistor; The second type of board includes a second board output interface and a fifth resistor. The second board output interface is electrically connected to a third ground terminal through the fifth resistor. The auxiliary detection unit includes a third resistor, the resistance of which is greater than the resistance of the fifth resistor.

12. The computing device according to claim 11, characterized in that, The first type of board includes a first board connector; the first board connector includes a third pin, which is electrically connected to the output interface of the first board; The second type of board includes a second board connector; the second board connector includes a fourth pin, which is electrically connected to the output interface of the second board; The third pin is the first test pin of the first type of board, and the fourth pin is the first test pin of the second type of board.

13. A method for testing circuit boards, characterized in that, For use in any of claims 10-12; The board in-situ detection method includes a first detection stage and a second detection stage; The first detection stage includes: The control tri-state interface is in a high-impedance state, and the level signal received by the first detection interface is detected; If the first detection interface receives the first level signal, it is determined that one of the first type of board and the second type of board is electrically connected to the circuit board through the first node; If the first detection interface receives the second level signal, then the second detection stage is entered; The second detection stage includes: Switch the tri-state interface from high impedance state to target state and detect the level signal received by the first detection interface; If the first detection interface still receives the second level signal, it is determined that the other of the first type of board and the second type of board is electrically connected to the circuit board through the first node; If the first detection interface receives the first level signal, it determines that no board is electrically connected to the circuit board through the first node.

14. The board testing method according to claim 13, characterized in that, When the first set voltage terminal includes the first power supply terminal: The first level signal is a low level signal, the second level signal is a high level signal, and the target state of the tri-state interface is the input state; In the first detection phase, if the first detection interface receives a low-level signal, it is determined that the second type of board is electrically connected to the circuit board through the first node; in the second detection phase, if the first detection interface receives a high-level signal, it is determined that the first type of board is electrically connected to the circuit board through the first node. When the first set voltage terminal includes a first ground terminal: The first level signal is a high level signal, the second level signal is a low level signal, and the target state of the tri-state interface is the output state; In the first detection phase, if the first detection interface receives a high-level signal, it is determined that the first type of board is electrically connected to the circuit board through the first node; in the second detection phase, if the first detection interface receives a low-level signal, it is determined that the second type of board is electrically connected to the circuit board through the first node.

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