Silicon wafer processing method and apparatus
By forming hydrophobic protective patterns on single-crystal silicon wafers, the problem of silicon wafer surface contamination is solved, improving chip yield and device performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIAN ESWIN MATERIAL TECHNOLOGY CO LTD
- Filing Date
- 2022-12-07
- Publication Date
- 2026-05-15
AI Technical Summary
Surface contamination of silicon wafers leads to a decrease in chip yield, especially contaminants at the source and drain locations, which affect device performance.
A protective pattern is formed on a single-crystal silicon wafer. The protective pattern, made of a hydrophobic material, covers the fabrication sites of the source and drain electrodes. The protective pattern is then cured by heating to prevent contamination.
It improves the yield of chips fabricated from single-crystal silicon wafers, protects the source and drain sites from contamination, and enhances device performance.
Smart Images
Figure CN115719701B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a silicon wafer processing method and apparatus. Background Technology
[0002] As the most widely used substrate for large-scale silicon semiconductor integrated circuit manufacturing, the manufacturing process of silicon wafers generally includes crystal pulling, dicing, polishing, and cleaning. Different types of wafers are required for the fabrication of different devices in the integrated circuit manufacturing field. Epitaxial wafers are silicon wafers with a thin layer of single-crystal silicon deposited on the surface of a single-crystal silicon wafer, and are mostly used in the CMOS (Complementary Metal Oxide Semiconductor) field. Polished wafers are silicon wafers that have undergone polishing, and are mostly used in NAND (Non-volatile Memory Device) / DRAM (Dynamic Random Access Memory) devices.
[0003] Whether it's an epitaxial wafer or a polished wafer, the requirements for the cleanliness of the silicon substrate are becoming increasingly stringent. If the surface of the silicon wafer is contaminated, it will affect the yield of the fabricated devices. Summary of the Invention
[0004] To address the aforementioned technical problems, this invention provides a silicon wafer processing method and apparatus that can improve the yield of chips fabricated from single-crystal silicon wafers.
[0005] To achieve the above objectives, the technical solution adopted in the embodiments of the present invention is as follows:
[0006] A silicon wafer processing method, comprising:
[0007] A protective pattern is formed on a polished monocrystalline silicon wafer, the protective pattern covering a predetermined position on the monocrystalline silicon wafer, the predetermined position being used to form the source and drain of the chip, the protective pattern being made of a hydrophobic material.
[0008] In some embodiments, forming a protective pattern on a polished monocrystalline silicon wafer includes:
[0009] A first template is provided, the first template including a base and a protrusion located on the base;
[0010] A prepolymer is coated at the end of the protrusion;
[0011] The first template is combined with the polished monocrystalline silicon wafer so that the protrusion contacts a preset position on the monocrystalline silicon wafer;
[0012] The first template and the monocrystalline silicon wafer are separated, and the prepolymer coated on the protruding end adheres to a preset position on the monocrystalline silicon wafer. The prepolymer on the monocrystalline silicon wafer is then cured to form the protective pattern.
[0013] In some embodiments, curing the prepolymer on the monocrystalline silicon wafer includes:
[0014] The single-crystal silicon wafer is heated for 10-60 minutes at a temperature of 40-70°C.
[0015] In some embodiments, the prepolymer is made of a hydrophobic material.
[0016] In some embodiments, the method further includes creating the first template, which includes:
[0017] Provide a base;
[0018] A layer of photoresist is coated on the substrate;
[0019] The photoresist is exposed through a photomask, and after development, a photoresist pattern is formed on the substrate. The photoresist pattern includes multiple holes.
[0020] A prepolymer is coated on a substrate on which the photoresist pattern is formed, such that the prepolymer fills the holes;
[0021] The prepolymer is cured to form the protrusion;
[0022] Remove the photoresist from the substrate.
[0023] In some embodiments, curing the prepolymer to form the protrusion includes:
[0024] The substrate is heated for 10-60 minutes at a temperature of 40-70°C.
[0025] In some embodiments, the substrate is a monocrystalline silicon wafer, a quartz substrate, or a glass substrate.
[0026] In some embodiments, the shape and size of the substrate are the same as those of the polished monocrystalline silicon wafer.
[0027] In some embodiments, after coating a prepolymer onto a substrate on which the photoresist pattern is formed, such that the prepolymer fills the voids, the method further includes:
[0028] The substrate coated with the prepolymer is subjected to vacuum treatment.
[0029] In some embodiments, the thickness of the protective pattern is 5-50 nm.
[0030] The beneficial effects of this invention are:
[0031] In this embodiment, protective patterns are set at the source and drain fabrication sites on the monocrystalline silicon wafer. The protective patterns can protect the source and drain fabrication sites from contamination, thereby improving the yield of the chip fabricated from the monocrystalline silicon wafer. Attached Figure Description
[0032] Figures 1-6 This is a schematic flowchart illustrating the silicon wafer processing method according to an embodiment of the present invention.
[0033] Figure Labels
[0034] 100 UV light source
[0035] 200 mask
[0036] 300 lens
[0037] 400 spin-coated single-crystal silicon wafers with photoresist
[0038] 500 prepolymer supply pipeline
[0039] 600 prepolymer
[0040] 700 developer
[0041] 800 First Template
[0042] 810 protrusion
[0043] 900 monocrystalline silicon wafer
[0044] 910 Protected Graphic Detailed Implementation
[0045] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.
[0046] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0047] Whether it's an epitaxial wafer or a polished wafer, chips are fabricated on its surface. Therefore, if there are contaminants at the source and drain positions on a single-crystal silicon wafer used to fabricate chips, it can lead to chip failure.
[0048] This invention provides a silicon wafer processing method and apparatus that can improve the yield of chips fabricated from single-crystal silicon wafers.
[0049] This invention provides a silicon wafer processing method, comprising:
[0050] A protective pattern is formed on the polished monocrystalline silicon wafer, the protective pattern covering a predetermined position on the monocrystalline silicon wafer, the predetermined position being used to form the source and drain of the chip.
[0051] In this embodiment, protective patterns are set at the source and drain fabrication sites on the monocrystalline silicon wafer. The protective patterns can protect the source and drain fabrication sites from contamination, thereby improving the yield of the chip fabricated from the monocrystalline silicon wafer.
[0052] Silicon wafers are cut from silicon rods. The multi-layered crystal lattice on the surface of the silicon wafer is in a disrupted state, filled with unsaturated dangling bonds. These dangling bonds are highly reactive and easily attract external impurity particles, leading to surface contamination and performance degradation. Impurity particles adsorbed on the silicon wafer include particulate impurities, metal ions, organic compounds, and H2O. Particulate impurities reduce the dielectric strength of the silicon wafer, metal ions increase the reverse leakage current of the photovoltaic cell's PN junction and reduce minority carrier lifetime, organic compounds degrade the quality of the oxide layer on the silicon wafer surface, and H2O exacerbates surface corrosion. In this embodiment, protective patterns are formed at the source and drain locations on the monocrystalline silicon wafer. These protective patterns are made of hydrophobic materials, which do not easily attract external impurity particles, thus preventing contamination at the source and drain locations on the monocrystalline silicon wafer. In this embodiment, after polishing the monocrystalline silicon wafer, a protective pattern can be formed on the polished monocrystalline silicon wafer. When the monocrystalline silicon wafer is transported to the wafer fab and is ready to be used to make chips, the protective pattern can be removed using acid or alkali solution before chip fabrication.
[0053] In some embodiments, forming a protective pattern on a polished monocrystalline silicon wafer includes:
[0054] A first template is provided, the first template including a base and a protrusion located on the base;
[0055] A prepolymer is coated at the end of the protrusion;
[0056] The first template is combined with the polished monocrystalline silicon wafer so that the protrusion contacts a preset position on the monocrystalline silicon wafer;
[0057] The first template and the monocrystalline silicon wafer are separated, and the prepolymer coated on the protruding end adheres to a preset position on the monocrystalline silicon wafer. The prepolymer on the monocrystalline silicon wafer is then cured to form the protective pattern.
[0058] The curing of the prepolymer on the single-crystal silicon wafer includes:
[0059] The single-crystal silicon wafer is heated for 10-60 minutes at a temperature of 40-70°C.
[0060] Heating a single-crystal silicon wafer allows the prepolymer to solidify and form the protective pattern, preventing external impurities such as particles and metal ions from adhering to the source and drain electrode fabrication sites.
[0061] In some embodiments, the prepolymer may be polydimethylsiloxane. Of course, the prepolymer is not limited to polydimethylsiloxane and may also be other hydrophobic materials.
[0062] In some embodiments, the method further includes creating the first template, which includes:
[0063] Provide a base;
[0064] A layer of photoresist is coated on the substrate;
[0065] The photoresist is exposed through a photomask, and after development, a photoresist pattern is formed on the substrate. The photoresist pattern includes multiple holes.
[0066] A prepolymer is coated on a substrate on which the photoresist pattern is formed, such that the prepolymer fills the holes;
[0067] The prepolymer is cured to form the protrusion;
[0068] Remove the photoresist from the substrate.
[0069] In some embodiments, curing the prepolymer to form the protrusion includes:
[0070] The substrate is heated for 10-60 minutes at a temperature of 40-70°C.
[0071] In some embodiments, the substrate may be a single-crystal silicon wafer. Of course, the substrate is not limited to a single-crystal silicon wafer; it may also be a quartz substrate, a glass substrate, etc.
[0072] In some embodiments, the shape and size of the substrate are the same as those of the monocrystalline silicon wafer, which facilitates the alignment of the first template and the monocrystalline silicon wafer when they are bonded together. When the shape and size of the substrate are the same as those of the monocrystalline silicon wafer, the positions of the protrusions on the substrate correspond to preset positions on the monocrystalline silicon wafer; that is, the relative positional relationship between the protrusions and the substrate is the same as the relative positional relationship between the preset positions and the monocrystalline silicon wafer. Thus, when the first template is bonded to the monocrystalline silicon wafer, if there are multiple protrusions, each protrusion corresponds one-to-one with a preset position on the monocrystalline silicon wafer, and each protrusion can contact its corresponding preset position on the monocrystalline silicon wafer.
[0073] In some embodiments, after coating a prepolymer onto a substrate on which the photoresist pattern is formed, such that the prepolymer fills the voids, the method further includes:
[0074] The substrate coated with the prepolymer is subjected to a vacuum treatment. Specifically, the substrate coated with the prepolymer can be placed in a vacuum chamber, and the vacuum chamber is evacuated. Vacuuming removes air bubbles generated during the coating of the prepolymer, ensuring the structural strength of the subsequently formed protrusions.
[0075] In some embodiments, the thickness of the protective pattern is 5-50 nm, which can effectively protect the preset position of the single crystal silicon wafer.
[0076] In a specific example, taking a single-crystal silicon wafer as the substrate, the technical solution of the present invention will be further described with reference to the accompanying drawings. This example includes the following steps:
[0077] like Figure 1 As shown, a single-crystal silicon wafer 400 is provided, on which a layer of photoresist is coated. The thickness of the photoresist can be set as needed, and the thickness of the photoresist determines the height of the protrusion on the first template.
[0078] The photoresist on the single-crystal silicon wafer 400 is exposed using an ultraviolet light source 100 and a mask 200. The mask 200 includes a transparent pattern and an opaque pattern. The transparent pattern is used to form protrusions on the single-crystal silicon wafer 400. The pattern of the mask 200 can be reduced or enlarged using a lens 300 so that the pattern of the mask 200 matches the size of the single-crystal silicon wafer 400.
[0079] The exposed photoresist is developed to form a photoresist pattern, which includes multiple holes.
[0080] like Figure 2 As shown, prepolymer 600 is coated onto a single-crystal silicon wafer 400 with a photoresist pattern formed through a prepolymer supply pipe 500 until all holes are filled. Then, a vacuum process is performed, and the single-crystal silicon wafer 400 is heated to 40℃-70℃ for 10-60 minutes, causing the prepolymer to solidify and form protrusions. The prepolymer can be polydimethylsiloxane.
[0081] like Figure 3 As shown, a single-crystal silicon wafer 400 with protrusions is immersed in a developer solution 700 to remove the photoresist pattern on the single-crystal silicon wafer 400, resulting in the following: Figure 4 The first template 800 shown has multiple protrusions 810 formed on it.
[0082] A certain amount of prepolymer is adhered to the protrusion 810 of the first template 800, such as Figure 5 As shown, the first template 800 is moved to bond with the monocrystalline silicon wafer 900. The side of the first template 800 with protrusions 810 faces the monocrystalline silicon wafer 900. The protrusions 810 on the first template 800 contact the monocrystalline silicon wafer 900, causing the prepolymer adhered to the protrusions 810 to adhere to a predetermined position on the monocrystalline silicon wafer 900. The template is then heated at 40℃-70℃ for 10-60 minutes. Afterward, the first template 800 is removed. Figure 6 As shown, the prepolymer adhered to the preset position on the single crystal silicon wafer 900 is solidified to form a protective pattern 910 at the preset position on the single crystal silicon wafer 900. The protective pattern 910 can protect the source and drain electrode fabrication positions from contamination, thereby improving the yield of the chip fabricated from the single crystal silicon wafer.
[0083] In this embodiment, when the size and shape of the single-crystal silicon wafer 400 used in the first template 800 are the same as the size and shape of the single-crystal silicon wafer 900, the position of the protrusion 810 on the single-crystal silicon wafer 400 is also the position on the single-crystal silicon wafer 900 used to form the source and drain of the chip.
[0084] It should be noted that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, since the embodiments are basically similar to the product embodiments, the descriptions are relatively simple, and the relevant parts can be referred to the descriptions of the product embodiments.
[0085] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.
[0086] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.
Claims
1. A silicon wafer processing method, characterized in that, include: A protective pattern is formed on a polished monocrystalline silicon wafer, the protective pattern covering a predetermined position on the monocrystalline silicon wafer, the predetermined position being used to form the source and drain of the chip, the protective pattern being made of a hydrophobic material; The formation of protective patterns on the polished single-crystal silicon wafer includes: A first template is provided, the first template including a base and a protrusion located on the base; A prepolymer is coated at the end of the protrusion; The first template is combined with the polished monocrystalline silicon wafer so that the protrusion contacts a preset position on the monocrystalline silicon wafer; The first template and the monocrystalline silicon wafer are separated, and the prepolymer coated on the protruding end adheres to a preset position on the monocrystalline silicon wafer. The prepolymer on the monocrystalline silicon wafer is then cured to form the protective pattern.
2. The silicon wafer processing method according to claim 1, characterized in that, Curing the prepolymer on the single-crystal silicon wafer includes: The single-crystal silicon wafer is heated for 10-60 minutes at a temperature of 40-70°C.
3. The silicon wafer processing method according to claim 1, characterized in that, The prepolymer is made of a hydrophobic material.
4. The silicon wafer processing method according to claim 1, characterized in that, The method further includes creating the first template, which includes: Provide a base; A layer of photoresist is coated on the substrate; The photoresist is exposed through a photomask, and after development, a photoresist pattern is formed on the substrate. The photoresist pattern includes multiple holes. A prepolymer is coated on a substrate on which the photoresist pattern is formed, such that the prepolymer fills the holes; The prepolymer is cured to form the protrusion; Remove the photoresist from the substrate.
5. The silicon wafer processing method according to claim 4, characterized in that, Curing the prepolymer to form the protrusion includes: The substrate is heated for 10-60 minutes at a temperature of 40-70°C.
6. The silicon wafer processing method according to claim 4, characterized in that, The substrate is a monocrystalline silicon wafer, a quartz substrate, or a glass substrate.
7. The silicon wafer processing method according to claim 4, characterized in that, The shape and size of the substrate are the same as those of the polished monocrystalline silicon wafer.
8. The silicon wafer processing method according to claim 4, characterized in that, After coating a prepolymer onto a substrate on which the photoresist pattern is formed, such that the prepolymer fills the holes, the method further includes: The substrate coated with the prepolymer is subjected to vacuum treatment.
9. The silicon wafer processing method according to claim 1, characterized in that, The thickness of the protective pattern is 5-50 nm.