Anti-warping fpc wiring layer stress release structure

Abstract

The present application relates to the warp-proof FPC circuit layer stress release structure, adopt the technical scheme of the improvement to FPC circuit layer structure, including the copper of FPC circuit layer isolated area is covered to reduce the tension of copper foil of wire to substrate PI, the well-shaped waste area is divided into the main waste area parallel to the FPC direction and the edge waste area of parallel line copper is covered in the parallel direction of wire extension line to strengthen the traction force to the gold finger direction, the FPC inner corner structure of the stress concentration prone to be produced by rubbing the plate is converted into the isolated area of smooth transition to prevent the stress concentration area from being produced, the stress concentration caused by FPC circuit layer structure is released, thereby improving or preventing FPC warping.

Description

Technical Field

[0001] This invention relates to the field of FPC manufacturing technology, and more specifically to a stress-relieving structure for FPC circuit layers to prevent warping. Background Technology

[0002] In the production of Flexible Printed Circuits (FPCs), warpage can be caused by a variety of factors, including material selection, manufacturing processes, FPC structure, board shape and size, substrate PI thickness, and material expansion and contraction. FPC warpage can cause equipment to fail to recognize mark points during the bonding process, leading to reduced bonding capacity or even production stoppage. Therefore, it is crucial to prevent and minimize FPC warpage. In conventional FPC circuit layer structures, the large gaps between conductors creating isolated areas without conductors (copper-free designs) can easily cause FPC curling. Furthermore, the internal corner structure of the FPC is prone to stress concentration and irreversible bending during board bending. Additionally, the grid-like design with one end wider than the other can easily cause warping at the gold finger area. These stress concentration areas created by the FPC circuit layer structure are significant factors contributing to FPC warpage. Summary of the Invention

[0003] To address the issue of stress concentration areas in existing FPC circuit layer structures causing FPC warping, this invention proposes a stress-relieving structure that involves copper plating in isolated areas of the FPC circuit layer, dividing the waste area into a grid-like structure (wide at one end and narrow at the other) into a square main waste area parallel to the FPC direction and a side waste area with parallel copper plating along the extension of the FPC conductors, and eliminating the original FPC inner corner and connecting the two endpoints of the original inner corner to form an isolated area with the two sides of the original inner corner. This releases the stress in the stress concentration areas and reduces the degree of FPC warping.

[0004] The technical solution adopted by this invention to solve its technical problem is as follows:

[0005] This invention provides a stress relief structure for an FPC circuit layer to prevent warping. The FPC circuit layer includes a circuit area composed of conductors, an isolated area formed by non-conductor areas outside the circuit area, and a scrap area located outside the edge of the FPC. The stress relief structure for the FPC circuit layer includes: copper plating on the isolated area, thereby providing good support for the FPC board.

[0006] Preferably, the copper plating in the isolated area is solid copper, grid copper, or parallel line copper parallel to the extension line of the conductor. The type of copper plating in the isolated area is determined by balancing the ratio of the copper area of ​​each region composed of conductors and isolated areas to the copper area of ​​the entire FPC board, thereby reducing the pulling force of the conductor copper on the substrate PI.

[0007] Preferably, the grid lines of the isolated area copper grid are at a 45-degree angle to the direction of the conductor, so that the two copper wires in the isolated area and the extension line of the conductor form an equilateral triangle, which makes the substrate PI layer of the FPC uniformly stressed and reduces warping.

[0008] Preferably, the stress relief structure of the FPC circuit layer further includes: dividing the square area formed by the scrap area parallel to the FPC into a main scrap area and the area outside the main scrap area into an edge scrap area. The main scrap area is set as grid copper, and the edge scrap area is set as parallel line copper parallel to the extension line of the conductor. This structure allows the FPC to have a traction force in the direction parallel to the gold finger, reducing warping in the direction of the gold finger.

[0009] Preferably, the stress relief structure of the FPC circuit layer further includes: canceling the inner corner of the FPC circuit layer, connecting and extending the two ends of the original inner corner to form the FPC edge line, and the two sides of the original inner corner and the extended FPC edge line together to form an isolated area, thereby changing the inner corner position that is prone to stress concentration during board kneading to a smooth transition, and preventing stress concentration in this area.

[0010] Preferably, the stress relief structure of the FPC circuit layer further includes: the distance between the circuit area and the waste area is 1mm, and the larger distance reduces the compressive force on the circuit area.

[0011] Preferably, the stress relief structure of the FPC circuit layer further includes: the FPC circuit layer is electrolytic copper, and the deformation of electrolytic copper is less than that of rolled copper.

[0012] The beneficial effects of this invention are as follows:

[0013] This invention improves the FPC circuit layer structure by: covering the isolated areas of the FPC circuit layer with copper to reduce the pulling force of the copper wires on the substrate PI; dividing the grid-shaped waste area into a main waste area parallel to the FPC direction and an edge waste area covered with parallel copper wires in a direction parallel to the extension line of the conductors to strengthen the traction force in the direction of the gold fingers; and converting the FPC inner corners that are prone to stress concentration due to board bending into smooth transition isolated areas to prevent stress concentration. In fact, by releasing the stress concentration caused by the FPC circuit layer structure, FPC warping is improved or prevented. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the stress relief structure of the FPC circuit layer provided in an embodiment of the present invention;

[0015] Figure 2 This is a schematic diagram of the isolated region solid copper structure provided in an embodiment of the present invention;

[0016] Figure 3 This is a schematic diagram of the isolated area grid copper structure provided in an embodiment of the present invention;

[0017] Figure 4 This is a schematic diagram of an independent area covered with parallel line copper structure provided in an embodiment of the present invention;

[0018] Figure 5 This is a schematic diagram of the main waste area and the side waste area provided in an embodiment of the present invention;

[0019] Figure 6 This is a schematic diagram of the structure provided by an embodiment of the present invention, which connects and extends the two endpoints of the original FPC inner corner to form the FPC edge line.

[0020] Figure label:

[0021] 1-FPC circuit layer; 2-Circuit area; 3-Isolated area; 4-Scrap area; 31-Isolated area solid copper; 32-Isolated area grid copper; 33-Isolated area parallel line copper; 41-Main scrap area; 42-Edge scrap area; 5-FPC edge line; 6-Spacing between circuit area and scrap area; 7-Inner corner. Detailed Implementation

[0022] The present invention will be further described below with reference to the accompanying drawings and specific embodiments:

[0023] Please refer to Figure 1 The present invention provides a stress relief structure for an anti-warping FPC circuit layer 1. The FPC circuit layer 1 includes a circuit area 2 composed of conductors, an isolated area 3 formed by a non-conductor area outside the circuit area 2, and a waste area 4 located outside the edge of the FPC. The stress relief structure of the FPC circuit layer 1 includes: the isolated area 3 is copper-clad, thereby providing a good support for the FPC substrate PI.

[0024] Specifically, since the conductors on the FPC circuit layer 1 do not have a uniform trend, such as the spacing and line width of the gold fingers being different from those of the non-gold fingers, different areas of the FPC circuit layer 1 have varying widths. The blank areas formed between the conductors are called isolated areas 3. The tension on the FPC substrate PI is different between the circuit area 2 with conductors and the isolated area 3 without copper foil, which can easily cause the FPC to bend and warp. When the area of ​​the isolated area 3 is large, the warping is more obvious. At this time, copper foil is applied to the isolated area 3 to balance the tension of the copper foil on the substrate PI, thereby providing good support.

[0025] Further, please refer to Figure 2 , Figure 3 , Figure 4 The copper plating of isolated area 3 includes isolated area solid copper 31, isolated area grid copper 32, or isolated area parallel line copper 33 parallel to the extension line of the conductor. The type of copper plating in isolated area is determined by the ratio of the copper area formed by the conductor and the copper skin of isolated area 3 in each area after copper plating to the copper area of ​​the entire FPC board. This balances the pulling force of the conductor copper skin on the substrate PI. The smaller the ratio, the better the support for the substrate.

[0026] Specifically, the copper areas of the isolated areas are different for solid copper, grid copper, or parallel line copper, resulting in different pulling forces on the substrate PI. The residual copper rate can be used to calculate this, which involves dividing the entire FPC into different virtual blocks and comparing the sum of the copper area formed by the three different copper plating methods in each block with the sum of the copper area of ​​the conductors with the sum of the copper area of ​​the entire FPC. The closer the two are, the more balanced the pulling force on the substrate PI.

[0027] Furthermore, the grid lines of the isolated area copper 32 are at a 45-degree angle to the direction of the conductor, so that the two copper wires of the isolated area 3 and the extension line of the conductor form an equilateral triangle, making the substrate PI layer of the FPC uniformly stressed and reducing warping.

[0028] Specifically, the three different copper plating forms differ primarily in their copper area, resulting in varying degrees of support for the substrate PI. Furthermore, when the copper area is within a balanced range, the choice can be made based on the slight differences in the balance of tension on the conductors by the three copper plating forms. Using solid copper in the smaller isolated area 3 provides more balanced support for the substrate, while using grid copper in the larger isolated area 3 provides a more balanced tension on the conductors, and using parallel line copper provides better traction for the conductors, especially the gold fingers.

[0029] Further, please refer to Figure 5 The stress relief structure of FPC circuit layer 1 also includes: dividing the square area formed by the scrap area 4 parallel to the FPC into the main scrap area 41, and dividing the scrap area 4 outside the main scrap area 41 into the edge scrap area 42. The main scrap area 41 is set as grid copper, and the edge scrap area 42 is set as parallel line copper parallel to the extension line of the conductor. This structure allows the FPC to have a traction force in the direction parallel to the gold finger, reducing warping in the direction of the gold finger.

[0030] Specifically, the waste area 4 is usually designed with a "well" shaped circuit design, which means that the FPC is narrow in some places and wide in others, in accordance with the direction of the conductor. This shape can easily cause the gold fingers to warp due to the tension generated. This solution adjusts the design by changing the original "well" shaped design of the waste area 4 to a design that is parallel to the direction of the FPC, which is a square main waste area 41. The rest of the waste area 4 is covered with parallel copper lines that are parallel to the direction of the conductor. This structure has a pulling force in the direction parallel to the gold fingers, reducing the warping of the gold fingers.

[0031] Further, please refer to Figure 5 , Figure 6The stress relief structure of FPC circuit layer 1 also includes: canceling the inner corner 7 of FPC circuit layer 1, connecting and extending the two ends of the original inner corner 7 to form FPC edge line 5, and the two sides of the original inner corner 7 and the extended FPC edge line 5 together form an isolated area 3, thereby changing the position of the inner corner 7, which is prone to stress concentration during board kneading, to a smooth transition and preventing stress concentration at this point.

[0032] Specifically, after lamination, FPCs are prone to curling due to the carrier film, especially under high temperature and pressure. Curled FPCs cannot pass through the horizontal line of the pre-gold treatment, so a "kneading" action is required, which involves manually smoothing the severely curled board surface. During this kneading, stress concentration can easily occur at the inner corner 7 of the FPC, leading to irreversible bending. Therefore, this solution changes the original stress-concentrated inner corner 7 position to a smooth transition, i.e., the inner corner 7 structure is eliminated. The endpoints of the two sides of the original inner corner 7 are connected to form the FPC edge line 5. The FPC edge line 5 and the two sides of the original inner corner 7 together form an isolated area 3. The isolated area 3 is covered with solid copper, grid copper, or parallel line copper to prevent stress concentration at this location.

[0033] Preferably, the stress relief structure of the FPC circuit layer 1 further includes: the distance 6 between the circuit area and the waste area is 1mm, and the larger distance reduces the compressive force on the circuit area 2.

[0034] Preferably, the stress relief structure of the FPC circuit layer 1 further includes: the FPC circuit layer 1 is electrolytic copper, and the deformation of electrolytic copper is less than that of rolled copper.

[0035] Specifically, the copper plating method for FPC circuit layer 1 is usually electrolytic copper or rolled copper. The electrolytic copper production process involves copper material, oxygen, and sulfuric acid at the anodic potential of the electrolytic reaction. Copper loses electrons to generate divalent copper ions, i.e., copper sulfate electrolyte. Simultaneously, this electrolyte undergoes a reduction reaction at the cathode, precipitating pure copper. Rolled copper, on the other hand, is produced by repeatedly rolling and annealing high-precision copper strips using plastic processing principles. The preparation processes of these two methods differ, resulting in differences in the overall expansion and contraction characteristics exhibited when subjected to high temperature and pressure during FPC manufacturing. Electrolytic copper has a smaller deformation than rolled copper, resulting in better flatness for the FPC.

[0036] For those skilled in the art, various other corresponding changes and modifications can be made based on the technical solutions and concepts described above, and all such changes and modifications should fall within the protection scope of the claims of this invention.

[0037] It should be noted that the embodiments described above are only some embodiments of the present invention, and not all embodiments. The singular forms "a," "described," and "itself" used in the embodiments and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

Claims

1. A stress-relieving structure for an anti-warping FPC circuit layer, wherein the FPC circuit layer comprises a circuit area composed of conductors, an isolated area formed by non-conductor areas outside the circuit area, and a waste area located outside the edge of the FPC, characterized in that, The stress relief structure of the FPC circuit layer includes: The square area formed by the waste area parallel to the FPC is designated as the main waste area, and the area between the main waste area and the edge of the FPC is designated as the edge waste area. The main waste area is set as grid copper, and the edge waste area is set as parallel line copper parallel to the extension line of the conductor. The inner corner of the FPC line layer is removed, and the two endpoints of the original inner corner are connected and extended to form the FPC edge line. The two sides of the original inner corner and the extended FPC edge line together form the isolated area. The isolated region is copper-clad.

2. The anti-warping FPC circuit layer stress relief structure according to claim 1, characterized in that, The copper plating is solid copper in isolated areas.

3. The anti-warping FPC circuit layer stress relief structure according to claim 1, characterized in that, The copper cladding is isolated area grid copper.

4. The anti-warping FPC circuit layer stress relief structure according to claim 3, characterized in that, The grid lines of the isolated region's copper grid are at a 45-degree angle to the direction of the conductor.

5. The anti-warping FPC circuit layer stress relief structure according to claim 1, characterized in that, The copper plating is isolated parallel-line copper parallel to the extension line of the conductor.

6. The anti-warping FPC circuit layer stress relief structure according to claim 1, characterized in that, The distance between the circuit area and the waste area is 1mm.

7. The anti-warping FPC circuit layer stress relief structure according to claim 1, characterized in that, The FPC circuit layer is made of electrolytic copper.

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